#[repr(C)]
#[derive(Copy, Clone, Debug, Default, Eq, Hash, Ord, PartialEq, PartialOrd)]
pub struct __BindgenBitfieldUnit<Storage, Align> {
storage: Storage,
align: [Align; 0],
}
impl<Storage, Align> __BindgenBitfieldUnit<Storage, Align> {
#[inline]
pub const fn new(storage: Storage) -> Self {
Self { storage, align: [] }
}
}
impl<Storage, Align> __BindgenBitfieldUnit<Storage, Align>
where
Storage: AsRef<[u8]> + AsMut<[u8]>,
{
#[inline]
pub fn get_bit(&self, index: usize) -> bool {
debug_assert!(index / 8 < self.storage.as_ref().len());
let byte_index = index / 8;
let byte = self.storage.as_ref()[byte_index];
let bit_index = if cfg!(target_endian = "big") {
7 - (index % 8)
} else {
index % 8
};
let mask = 1 << bit_index;
byte & mask == mask
}
#[inline]
pub fn set_bit(&mut self, index: usize, val: bool) {
debug_assert!(index / 8 < self.storage.as_ref().len());
let byte_index = index / 8;
let byte = &mut self.storage.as_mut()[byte_index];
let bit_index = if cfg!(target_endian = "big") {
7 - (index % 8)
} else {
index % 8
};
let mask = 1 << bit_index;
if val {
*byte |= mask;
} else {
*byte &= !mask;
}
}
#[inline]
pub fn get(&self, bit_offset: usize, bit_width: u8) -> u64 {
debug_assert!(bit_width <= 64);
debug_assert!(bit_offset / 8 < self.storage.as_ref().len());
debug_assert!((bit_offset + (bit_width as usize)) / 8 <= self.storage.as_ref().len());
let mut val = 0;
for i in 0..(bit_width as usize) {
if self.get_bit(i + bit_offset) {
let index = if cfg!(target_endian = "big") {
bit_width as usize - 1 - i
} else {
i
};
val |= 1 << index;
}
}
val
}
#[inline]
pub fn set(&mut self, bit_offset: usize, bit_width: u8, val: u64) {
debug_assert!(bit_width <= 64);
debug_assert!(bit_offset / 8 < self.storage.as_ref().len());
debug_assert!((bit_offset + (bit_width as usize)) / 8 <= self.storage.as_ref().len());
for i in 0..(bit_width as usize) {
let mask = 1 << i;
let val_bit_is_set = val & mask == mask;
let index = if cfg!(target_endian = "big") {
bit_width as usize - 1 - i
} else {
i
};
self.set_bit(index + bit_offset, val_bit_is_set);
}
}
}
#[repr(C)]
#[derive(Default)]
pub struct __IncompleteArrayField<T>(::core::marker::PhantomData<T>, [T; 0]);
impl<T> __IncompleteArrayField<T> {
#[inline]
pub const fn new() -> Self {
__IncompleteArrayField(::core::marker::PhantomData, [])
}
#[inline]
pub fn as_ptr(&self) -> *const T {
self as *const _ as *const T
}
#[inline]
pub fn as_mut_ptr(&mut self) -> *mut T {
self as *mut _ as *mut T
}
#[inline]
pub unsafe fn as_slice(&self, len: usize) -> &[T] {
::core::slice::from_raw_parts(self.as_ptr(), len)
}
#[inline]
pub unsafe fn as_mut_slice(&mut self, len: usize) -> &mut [T] {
::core::slice::from_raw_parts_mut(self.as_mut_ptr(), len)
}
}
impl<T> ::core::fmt::Debug for __IncompleteArrayField<T> {
fn fmt(&self, fmt: &mut ::core::fmt::Formatter<'_>) -> ::core::fmt::Result {
fmt.write_str("__IncompleteArrayField")
}
}
pub const _NEWLIB_VERSION_H__: u32 = 1;
pub const _NEWLIB_VERSION: &'static [u8; 6usize] = b"3.0.0\0";
pub const __NEWLIB__: u32 = 3;
pub const __NEWLIB_MINOR__: u32 = 0;
pub const __NEWLIB_PATCHLEVEL__: u32 = 0;
pub const _DEFAULT_SOURCE: u32 = 1;
pub const _POSIX_SOURCE: u32 = 1;
pub const _POSIX_C_SOURCE: u32 = 200809;
pub const _ATFILE_SOURCE: u32 = 1;
pub const __ATFILE_VISIBLE: u32 = 1;
pub const __BSD_VISIBLE: u32 = 1;
pub const __GNU_VISIBLE: u32 = 0;
pub const __ISO_C_VISIBLE: u32 = 2011;
pub const __LARGEFILE_VISIBLE: u32 = 0;
pub const __MISC_VISIBLE: u32 = 1;
pub const __POSIX_VISIBLE: u32 = 200809;
pub const __SVID_VISIBLE: u32 = 1;
pub const __XSI_VISIBLE: u32 = 0;
pub const __SSP_FORTIFY_LEVEL: u32 = 0;
pub const _POSIX_THREADS: u32 = 1;
pub const _POSIX_TIMEOUTS: u32 = 1;
pub const _POSIX_TIMERS: u32 = 1;
pub const _POSIX_MONOTONIC_CLOCK: u32 = 200112;
pub const _POSIX_CLOCK_SELECTION: u32 = 200112;
pub const _UNIX98_THREAD_MUTEX_ATTRIBUTES: u32 = 1;
pub const __have_longlong64: u32 = 1;
pub const __have_long32: u32 = 1;
pub const ___int8_t_defined: u32 = 1;
pub const ___int16_t_defined: u32 = 1;
pub const ___int32_t_defined: u32 = 1;
pub const ___int64_t_defined: u32 = 1;
pub const ___int_least8_t_defined: u32 = 1;
pub const ___int_least16_t_defined: u32 = 1;
pub const ___int_least32_t_defined: u32 = 1;
pub const ___int_least64_t_defined: u32 = 1;
pub const __int20: u32 = 2;
pub const __INT8: &'static [u8; 3usize] = b"hh\0";
pub const __INT16: &'static [u8; 2usize] = b"h\0";
pub const __INT64: &'static [u8; 3usize] = b"ll\0";
pub const __FAST8: &'static [u8; 3usize] = b"hh\0";
pub const __FAST16: &'static [u8; 2usize] = b"h\0";
pub const __FAST64: &'static [u8; 3usize] = b"ll\0";
pub const __LEAST8: &'static [u8; 3usize] = b"hh\0";
pub const __LEAST16: &'static [u8; 2usize] = b"h\0";
pub const __LEAST64: &'static [u8; 3usize] = b"ll\0";
pub const __int8_t_defined: u32 = 1;
pub const __int16_t_defined: u32 = 1;
pub const __int32_t_defined: u32 = 1;
pub const __int64_t_defined: u32 = 1;
pub const __int_least8_t_defined: u32 = 1;
pub const __int_least16_t_defined: u32 = 1;
pub const __int_least32_t_defined: u32 = 1;
pub const __int_least64_t_defined: u32 = 1;
pub const __int_fast8_t_defined: u32 = 1;
pub const __int_fast16_t_defined: u32 = 1;
pub const __int_fast32_t_defined: u32 = 1;
pub const __int_fast64_t_defined: u32 = 1;
pub const WINT_MIN: u32 = 0;
pub const true_: u32 = 1;
pub const false_: u32 = 0;
pub const __bool_true_false_are_defined: u32 = 1;
pub const __NEWLIB_H__: u32 = 1;
pub const _WANT_IO_C99_FORMATS: u32 = 1;
pub const _WANT_IO_LONG_LONG: u32 = 1;
pub const _WANT_IO_POS_ARGS: u32 = 1;
pub const _WANT_REENT_SMALL: u32 = 1;
pub const _MB_LEN_MAX: u32 = 1;
pub const HAVE_INITFINI_ARRAY: u32 = 1;
pub const _ATEXIT_DYNAMIC_ALLOC: u32 = 1;
pub const _HAVE_LONG_DOUBLE: u32 = 1;
pub const _HAVE_CC_INHIBIT_LOOP_TO_LIBCALL: u32 = 1;
pub const _LDBL_EQ_DBL: u32 = 1;
pub const _FVWRITE_IN_STREAMIO: u32 = 1;
pub const _FSEEK_OPTIMIZATION: u32 = 1;
pub const _WIDE_ORIENT: u32 = 1;
pub const _UNBUF_STREAM_OPT: u32 = 1;
pub const _WANT_USE_LONG_TIME_T: u32 = 1;
pub const __OBSOLETE_MATH_DEFAULT: u32 = 1;
pub const __OBSOLETE_MATH: u32 = 1;
pub const XCHAL_HAVE_BE: u32 = 0;
pub const XCHAL_HAVE_WINDOWED: u32 = 1;
pub const XCHAL_NUM_AREGS: u32 = 64;
pub const XCHAL_NUM_AREGS_LOG2: u32 = 6;
pub const XCHAL_MAX_INSTRUCTION_SIZE: u32 = 3;
pub const XCHAL_HAVE_DEBUG: u32 = 1;
pub const XCHAL_HAVE_DENSITY: u32 = 1;
pub const XCHAL_HAVE_LOOPS: u32 = 1;
pub const XCHAL_LOOP_BUFFER_SIZE: u32 = 256;
pub const XCHAL_HAVE_NSA: u32 = 1;
pub const XCHAL_HAVE_MINMAX: u32 = 1;
pub const XCHAL_HAVE_SEXT: u32 = 1;
pub const XCHAL_HAVE_DEPBITS: u32 = 0;
pub const XCHAL_HAVE_CLAMPS: u32 = 1;
pub const XCHAL_HAVE_MUL16: u32 = 1;
pub const XCHAL_HAVE_MUL32: u32 = 1;
pub const XCHAL_HAVE_MUL32_HIGH: u32 = 1;
pub const XCHAL_HAVE_DIV32: u32 = 1;
pub const XCHAL_HAVE_L32R: u32 = 1;
pub const XCHAL_HAVE_ABSOLUTE_LITERALS: u32 = 0;
pub const XCHAL_HAVE_CONST16: u32 = 0;
pub const XCHAL_HAVE_ADDX: u32 = 1;
pub const XCHAL_HAVE_WIDE_BRANCHES: u32 = 0;
pub const XCHAL_HAVE_PREDICTED_BRANCHES: u32 = 0;
pub const XCHAL_HAVE_CALL4AND12: u32 = 1;
pub const XCHAL_HAVE_ABS: u32 = 1;
pub const XCHAL_HAVE_RELEASE_SYNC: u32 = 1;
pub const XCHAL_HAVE_S32C1I: u32 = 1;
pub const XCHAL_HAVE_SPECULATION: u32 = 0;
pub const XCHAL_HAVE_FULL_RESET: u32 = 1;
pub const XCHAL_NUM_CONTEXTS: u32 = 1;
pub const XCHAL_NUM_MISC_REGS: u32 = 4;
pub const XCHAL_HAVE_TAP_MASTER: u32 = 0;
pub const XCHAL_HAVE_PRID: u32 = 1;
pub const XCHAL_HAVE_EXTERN_REGS: u32 = 1;
pub const XCHAL_HAVE_MX: u32 = 0;
pub const XCHAL_HAVE_MP_INTERRUPTS: u32 = 0;
pub const XCHAL_HAVE_MP_RUNSTALL: u32 = 0;
pub const XCHAL_HAVE_PSO: u32 = 0;
pub const XCHAL_HAVE_PSO_CDM: u32 = 0;
pub const XCHAL_HAVE_PSO_FULL_RETENTION: u32 = 0;
pub const XCHAL_HAVE_THREADPTR: u32 = 1;
pub const XCHAL_HAVE_BOOLEANS: u32 = 1;
pub const XCHAL_HAVE_CP: u32 = 1;
pub const XCHAL_CP_MAXCFG: u32 = 8;
pub const XCHAL_HAVE_MAC16: u32 = 1;
pub const XCHAL_HAVE_FUSION: u32 = 0;
pub const XCHAL_HAVE_FUSION_FP: u32 = 0;
pub const XCHAL_HAVE_FUSION_LOW_POWER: u32 = 0;
pub const XCHAL_HAVE_FUSION_AES: u32 = 0;
pub const XCHAL_HAVE_FUSION_CONVENC: u32 = 0;
pub const XCHAL_HAVE_FUSION_LFSR_CRC: u32 = 0;
pub const XCHAL_HAVE_FUSION_BITOPS: u32 = 0;
pub const XCHAL_HAVE_FUSION_AVS: u32 = 0;
pub const XCHAL_HAVE_FUSION_16BIT_BASEBAND: u32 = 0;
pub const XCHAL_HAVE_FUSION_VITERBI: u32 = 0;
pub const XCHAL_HAVE_FUSION_SOFTDEMAP: u32 = 0;
pub const XCHAL_HAVE_HIFIPRO: u32 = 0;
pub const XCHAL_HAVE_HIFI4: u32 = 0;
pub const XCHAL_HAVE_HIFI4_VFPU: u32 = 0;
pub const XCHAL_HAVE_HIFI3: u32 = 0;
pub const XCHAL_HAVE_HIFI3_VFPU: u32 = 0;
pub const XCHAL_HAVE_HIFI2: u32 = 0;
pub const XCHAL_HAVE_HIFI2EP: u32 = 0;
pub const XCHAL_HAVE_HIFI_MINI: u32 = 0;
pub const XCHAL_HAVE_VECTORFPU2005: u32 = 0;
pub const XCHAL_HAVE_USER_DPFPU: u32 = 0;
pub const XCHAL_HAVE_USER_SPFPU: u32 = 0;
pub const XCHAL_HAVE_FP: u32 = 1;
pub const XCHAL_HAVE_FP_DIV: u32 = 1;
pub const XCHAL_HAVE_FP_RECIP: u32 = 1;
pub const XCHAL_HAVE_FP_SQRT: u32 = 1;
pub const XCHAL_HAVE_FP_RSQRT: u32 = 1;
pub const XCHAL_HAVE_DFP: u32 = 0;
pub const XCHAL_HAVE_DFP_DIV: u32 = 0;
pub const XCHAL_HAVE_DFP_RECIP: u32 = 0;
pub const XCHAL_HAVE_DFP_SQRT: u32 = 0;
pub const XCHAL_HAVE_DFP_RSQRT: u32 = 0;
pub const XCHAL_HAVE_DFP_ACCEL: u32 = 1;
pub const XCHAL_HAVE_DFP_accel: u32 = 1;
pub const XCHAL_HAVE_DFPU_SINGLE_ONLY: u32 = 1;
pub const XCHAL_HAVE_DFPU_SINGLE_DOUBLE: u32 = 0;
pub const XCHAL_HAVE_VECTRA1: u32 = 0;
pub const XCHAL_HAVE_VECTRALX: u32 = 0;
pub const XCHAL_HAVE_PDX4: u32 = 0;
pub const XCHAL_HAVE_CONNXD2: u32 = 0;
pub const XCHAL_HAVE_CONNXD2_DUALLSFLIX: u32 = 0;
pub const XCHAL_HAVE_BBE16: u32 = 0;
pub const XCHAL_HAVE_BBE16_RSQRT: u32 = 0;
pub const XCHAL_HAVE_BBE16_VECDIV: u32 = 0;
pub const XCHAL_HAVE_BBE16_DESPREAD: u32 = 0;
pub const XCHAL_HAVE_BBENEP: u32 = 0;
pub const XCHAL_HAVE_BSP3: u32 = 0;
pub const XCHAL_HAVE_BSP3_TRANSPOSE: u32 = 0;
pub const XCHAL_HAVE_SSP16: u32 = 0;
pub const XCHAL_HAVE_SSP16_VITERBI: u32 = 0;
pub const XCHAL_HAVE_TURBO16: u32 = 0;
pub const XCHAL_HAVE_BBP16: u32 = 0;
pub const XCHAL_HAVE_FLIX3: u32 = 0;
pub const XCHAL_HAVE_GRIVPEP: u32 = 0;
pub const XCHAL_HAVE_GRIVPEP_HISTOGRAM: u32 = 0;
pub const XCHAL_NUM_LOADSTORE_UNITS: u32 = 1;
pub const XCHAL_NUM_WRITEBUFFER_ENTRIES: u32 = 4;
pub const XCHAL_INST_FETCH_WIDTH: u32 = 4;
pub const XCHAL_DATA_WIDTH: u32 = 4;
pub const XCHAL_DATA_PIPE_DELAY: u32 = 2;
pub const XCHAL_CLOCK_GATING_GLOBAL: u32 = 1;
pub const XCHAL_CLOCK_GATING_FUNCUNIT: u32 = 1;
pub const XCHAL_UNALIGNED_LOAD_EXCEPTION: u32 = 0;
pub const XCHAL_UNALIGNED_STORE_EXCEPTION: u32 = 0;
pub const XCHAL_UNALIGNED_LOAD_HW: u32 = 1;
pub const XCHAL_UNALIGNED_STORE_HW: u32 = 1;
pub const XCHAL_SW_VERSION: u32 = 1100003;
pub const XCHAL_CORE_ID: &'static [u8; 17usize] = b"esp32_v3_49_prod\0";
pub const XCHAL_BUILD_UNIQUE_ID: u32 = 392854;
pub const XCHAL_HW_CONFIGID0: u32 = 3267166206;
pub const XCHAL_HW_CONFIGID1: u32 = 482737814;
pub const XCHAL_HW_VERSION_NAME: &'static [u8; 8usize] = b"LX6.0.3\0";
pub const XCHAL_HW_VERSION_MAJOR: u32 = 2600;
pub const XCHAL_HW_VERSION_MINOR: u32 = 3;
pub const XCHAL_HW_VERSION: u32 = 260003;
pub const XCHAL_HW_REL_LX6: u32 = 1;
pub const XCHAL_HW_REL_LX6_0: u32 = 1;
pub const XCHAL_HW_REL_LX6_0_3: u32 = 1;
pub const XCHAL_HW_CONFIGID_RELIABLE: u32 = 1;
pub const XCHAL_HW_MIN_VERSION_MAJOR: u32 = 2600;
pub const XCHAL_HW_MIN_VERSION_MINOR: u32 = 3;
pub const XCHAL_HW_MIN_VERSION: u32 = 260003;
pub const XCHAL_HW_MAX_VERSION_MAJOR: u32 = 2600;
pub const XCHAL_HW_MAX_VERSION_MINOR: u32 = 3;
pub const XCHAL_HW_MAX_VERSION: u32 = 260003;
pub const XCHAL_ICACHE_LINESIZE: u32 = 4;
pub const XCHAL_DCACHE_LINESIZE: u32 = 4;
pub const XCHAL_ICACHE_LINEWIDTH: u32 = 2;
pub const XCHAL_DCACHE_LINEWIDTH: u32 = 2;
pub const XCHAL_ICACHE_SIZE: u32 = 0;
pub const XCHAL_DCACHE_SIZE: u32 = 0;
pub const XCHAL_DCACHE_IS_WRITEBACK: u32 = 0;
pub const XCHAL_DCACHE_IS_COHERENT: u32 = 0;
pub const XCHAL_HAVE_PREFETCH: u32 = 0;
pub const XCHAL_HAVE_PREFETCH_L1: u32 = 0;
pub const XCHAL_PREFETCH_CASTOUT_LINES: u32 = 0;
pub const XCHAL_PREFETCH_ENTRIES: u32 = 0;
pub const XCHAL_PREFETCH_BLOCK_ENTRIES: u32 = 0;
pub const XCHAL_HAVE_CACHE_BLOCKOPS: u32 = 0;
pub const XCHAL_HAVE_ICACHE_TEST: u32 = 0;
pub const XCHAL_HAVE_DCACHE_TEST: u32 = 0;
pub const XCHAL_HAVE_ICACHE_DYN_WAYS: u32 = 0;
pub const XCHAL_HAVE_DCACHE_DYN_WAYS: u32 = 0;
pub const XCHAL_HAVE_PIF: u32 = 1;
pub const XCHAL_HAVE_AXI: u32 = 0;
pub const XCHAL_HAVE_PIF_WR_RESP: u32 = 0;
pub const XCHAL_HAVE_PIF_REQ_ATTR: u32 = 0;
pub const XCHAL_ICACHE_SETWIDTH: u32 = 0;
pub const XCHAL_DCACHE_SETWIDTH: u32 = 0;
pub const XCHAL_ICACHE_WAYS: u32 = 1;
pub const XCHAL_DCACHE_WAYS: u32 = 1;
pub const XCHAL_ICACHE_LINE_LOCKABLE: u32 = 0;
pub const XCHAL_DCACHE_LINE_LOCKABLE: u32 = 0;
pub const XCHAL_ICACHE_ECC_PARITY: u32 = 0;
pub const XCHAL_DCACHE_ECC_PARITY: u32 = 0;
pub const XCHAL_ICACHE_ACCESS_SIZE: u32 = 1;
pub const XCHAL_DCACHE_ACCESS_SIZE: u32 = 1;
pub const XCHAL_DCACHE_BANKS: u32 = 0;
pub const XCHAL_CA_BITS: u32 = 4;
pub const XCHAL_NUM_INSTROM: u32 = 1;
pub const XCHAL_NUM_INSTRAM: u32 = 2;
pub const XCHAL_NUM_DATAROM: u32 = 1;
pub const XCHAL_NUM_DATARAM: u32 = 2;
pub const XCHAL_NUM_URAM: u32 = 0;
pub const XCHAL_NUM_XLMI: u32 = 1;
pub const XCHAL_INSTROM0_VADDR: u32 = 1082130432;
pub const XCHAL_INSTROM0_PADDR: u32 = 1082130432;
pub const XCHAL_INSTROM0_SIZE: u32 = 4194304;
pub const XCHAL_INSTROM0_ECC_PARITY: u32 = 0;
pub const XCHAL_INSTRAM0_VADDR: u32 = 1073741824;
pub const XCHAL_INSTRAM0_PADDR: u32 = 1073741824;
pub const XCHAL_INSTRAM0_SIZE: u32 = 4194304;
pub const XCHAL_INSTRAM0_ECC_PARITY: u32 = 0;
pub const XCHAL_INSTRAM1_VADDR: u32 = 1077936128;
pub const XCHAL_INSTRAM1_PADDR: u32 = 1077936128;
pub const XCHAL_INSTRAM1_SIZE: u32 = 4194304;
pub const XCHAL_INSTRAM1_ECC_PARITY: u32 = 0;
pub const XCHAL_DATAROM0_VADDR: u32 = 1061158912;
pub const XCHAL_DATAROM0_PADDR: u32 = 1061158912;
pub const XCHAL_DATAROM0_SIZE: u32 = 4194304;
pub const XCHAL_DATAROM0_ECC_PARITY: u32 = 0;
pub const XCHAL_DATAROM0_BANKS: u32 = 1;
pub const XCHAL_DATARAM0_VADDR: u32 = 1073217536;
pub const XCHAL_DATARAM0_PADDR: u32 = 1073217536;
pub const XCHAL_DATARAM0_SIZE: u32 = 524288;
pub const XCHAL_DATARAM0_ECC_PARITY: u32 = 0;
pub const XCHAL_DATARAM0_BANKS: u32 = 1;
pub const XCHAL_DATARAM1_VADDR: u32 = 1065353216;
pub const XCHAL_DATARAM1_PADDR: u32 = 1065353216;
pub const XCHAL_DATARAM1_SIZE: u32 = 4194304;
pub const XCHAL_DATARAM1_ECC_PARITY: u32 = 0;
pub const XCHAL_DATARAM1_BANKS: u32 = 1;
pub const XCHAL_XLMI0_VADDR: u32 = 1072693248;
pub const XCHAL_XLMI0_PADDR: u32 = 1072693248;
pub const XCHAL_XLMI0_SIZE: u32 = 524288;
pub const XCHAL_XLMI0_ECC_PARITY: u32 = 0;
pub const XCHAL_HAVE_IMEM_LOADSTORE: u32 = 1;
pub const XCHAL_HAVE_INTERRUPTS: u32 = 1;
pub const XCHAL_HAVE_HIGHPRI_INTERRUPTS: u32 = 1;
pub const XCHAL_HAVE_NMI: u32 = 1;
pub const XCHAL_HAVE_CCOUNT: u32 = 1;
pub const XCHAL_NUM_TIMERS: u32 = 3;
pub const XCHAL_NUM_INTERRUPTS: u32 = 32;
pub const XCHAL_NUM_INTERRUPTS_LOG2: u32 = 5;
pub const XCHAL_NUM_EXTINTERRUPTS: u32 = 26;
pub const XCHAL_NUM_INTLEVELS: u32 = 6;
pub const XCHAL_EXCM_LEVEL: u32 = 3;
pub const XCHAL_INTLEVEL1_MASK: u32 = 407551;
pub const XCHAL_INTLEVEL2_MASK: u32 = 3670016;
pub const XCHAL_INTLEVEL3_MASK: u32 = 683706368;
pub const XCHAL_INTLEVEL4_MASK: u32 = 1392508928;
pub const XCHAL_INTLEVEL5_MASK: u32 = 2214658048;
pub const XCHAL_INTLEVEL6_MASK: u32 = 0;
pub const XCHAL_INTLEVEL7_MASK: u32 = 16384;
pub const XCHAL_INTLEVEL1_ANDBELOW_MASK: u32 = 407551;
pub const XCHAL_INTLEVEL2_ANDBELOW_MASK: u32 = 4077567;
pub const XCHAL_INTLEVEL3_ANDBELOW_MASK: u32 = 687783935;
pub const XCHAL_INTLEVEL4_ANDBELOW_MASK: u32 = 2080292863;
pub const XCHAL_INTLEVEL5_ANDBELOW_MASK: u32 = 4294950911;
pub const XCHAL_INTLEVEL6_ANDBELOW_MASK: u32 = 4294950911;
pub const XCHAL_INTLEVEL7_ANDBELOW_MASK: u32 = 4294967295;
pub const XCHAL_INT0_LEVEL: u32 = 1;
pub const XCHAL_INT1_LEVEL: u32 = 1;
pub const XCHAL_INT2_LEVEL: u32 = 1;
pub const XCHAL_INT3_LEVEL: u32 = 1;
pub const XCHAL_INT4_LEVEL: u32 = 1;
pub const XCHAL_INT5_LEVEL: u32 = 1;
pub const XCHAL_INT6_LEVEL: u32 = 1;
pub const XCHAL_INT7_LEVEL: u32 = 1;
pub const XCHAL_INT8_LEVEL: u32 = 1;
pub const XCHAL_INT9_LEVEL: u32 = 1;
pub const XCHAL_INT10_LEVEL: u32 = 1;
pub const XCHAL_INT11_LEVEL: u32 = 3;
pub const XCHAL_INT12_LEVEL: u32 = 1;
pub const XCHAL_INT13_LEVEL: u32 = 1;
pub const XCHAL_INT14_LEVEL: u32 = 7;
pub const XCHAL_INT15_LEVEL: u32 = 3;
pub const XCHAL_INT16_LEVEL: u32 = 5;
pub const XCHAL_INT17_LEVEL: u32 = 1;
pub const XCHAL_INT18_LEVEL: u32 = 1;
pub const XCHAL_INT19_LEVEL: u32 = 2;
pub const XCHAL_INT20_LEVEL: u32 = 2;
pub const XCHAL_INT21_LEVEL: u32 = 2;
pub const XCHAL_INT22_LEVEL: u32 = 3;
pub const XCHAL_INT23_LEVEL: u32 = 3;
pub const XCHAL_INT24_LEVEL: u32 = 4;
pub const XCHAL_INT25_LEVEL: u32 = 4;
pub const XCHAL_INT26_LEVEL: u32 = 5;
pub const XCHAL_INT27_LEVEL: u32 = 3;
pub const XCHAL_INT28_LEVEL: u32 = 4;
pub const XCHAL_INT29_LEVEL: u32 = 3;
pub const XCHAL_INT30_LEVEL: u32 = 4;
pub const XCHAL_INT31_LEVEL: u32 = 5;
pub const XCHAL_DEBUGLEVEL: u32 = 6;
pub const XCHAL_HAVE_DEBUG_EXTERN_INT: u32 = 1;
pub const XCHAL_NMILEVEL: u32 = 7;
pub const XCHAL_INTTYPE_MASK_UNCONFIGURED: u32 = 0;
pub const XCHAL_INTTYPE_MASK_SOFTWARE: u32 = 536871040;
pub const XCHAL_INTTYPE_MASK_EXTERN_EDGE: u32 = 1346372608;
pub const XCHAL_INTTYPE_MASK_EXTERN_LEVEL: u32 = 2411606847;
pub const XCHAL_INTTYPE_MASK_TIMER: u32 = 98368;
pub const XCHAL_INTTYPE_MASK_NMI: u32 = 16384;
pub const XCHAL_INTTYPE_MASK_WRITE_ERROR: u32 = 0;
pub const XCHAL_INTTYPE_MASK_PROFILING: u32 = 2048;
pub const XCHAL_TIMER0_INTERRUPT: u32 = 6;
pub const XCHAL_TIMER1_INTERRUPT: u32 = 15;
pub const XCHAL_TIMER2_INTERRUPT: u32 = 16;
pub const XCHAL_NMI_INTERRUPT: u32 = 14;
pub const XCHAL_PROFILING_INTERRUPT: u32 = 11;
pub const XCHAL_INTLEVEL7_NUM: u32 = 14;
pub const XCHAL_EXTINT0_NUM: u32 = 0;
pub const XCHAL_EXTINT1_NUM: u32 = 1;
pub const XCHAL_EXTINT2_NUM: u32 = 2;
pub const XCHAL_EXTINT3_NUM: u32 = 3;
pub const XCHAL_EXTINT4_NUM: u32 = 4;
pub const XCHAL_EXTINT5_NUM: u32 = 5;
pub const XCHAL_EXTINT6_NUM: u32 = 8;
pub const XCHAL_EXTINT7_NUM: u32 = 9;
pub const XCHAL_EXTINT8_NUM: u32 = 10;
pub const XCHAL_EXTINT9_NUM: u32 = 12;
pub const XCHAL_EXTINT10_NUM: u32 = 13;
pub const XCHAL_EXTINT11_NUM: u32 = 14;
pub const XCHAL_EXTINT12_NUM: u32 = 17;
pub const XCHAL_EXTINT13_NUM: u32 = 18;
pub const XCHAL_EXTINT14_NUM: u32 = 19;
pub const XCHAL_EXTINT15_NUM: u32 = 20;
pub const XCHAL_EXTINT16_NUM: u32 = 21;
pub const XCHAL_EXTINT17_NUM: u32 = 22;
pub const XCHAL_EXTINT18_NUM: u32 = 23;
pub const XCHAL_EXTINT19_NUM: u32 = 24;
pub const XCHAL_EXTINT20_NUM: u32 = 25;
pub const XCHAL_EXTINT21_NUM: u32 = 26;
pub const XCHAL_EXTINT22_NUM: u32 = 27;
pub const XCHAL_EXTINT23_NUM: u32 = 28;
pub const XCHAL_EXTINT24_NUM: u32 = 30;
pub const XCHAL_EXTINT25_NUM: u32 = 31;
pub const XCHAL_INT0_EXTNUM: u32 = 0;
pub const XCHAL_INT1_EXTNUM: u32 = 1;
pub const XCHAL_INT2_EXTNUM: u32 = 2;
pub const XCHAL_INT3_EXTNUM: u32 = 3;
pub const XCHAL_INT4_EXTNUM: u32 = 4;
pub const XCHAL_INT5_EXTNUM: u32 = 5;
pub const XCHAL_INT8_EXTNUM: u32 = 6;
pub const XCHAL_INT9_EXTNUM: u32 = 7;
pub const XCHAL_INT10_EXTNUM: u32 = 8;
pub const XCHAL_INT12_EXTNUM: u32 = 9;
pub const XCHAL_INT13_EXTNUM: u32 = 10;
pub const XCHAL_INT14_EXTNUM: u32 = 11;
pub const XCHAL_INT17_EXTNUM: u32 = 12;
pub const XCHAL_INT18_EXTNUM: u32 = 13;
pub const XCHAL_INT19_EXTNUM: u32 = 14;
pub const XCHAL_INT20_EXTNUM: u32 = 15;
pub const XCHAL_INT21_EXTNUM: u32 = 16;
pub const XCHAL_INT22_EXTNUM: u32 = 17;
pub const XCHAL_INT23_EXTNUM: u32 = 18;
pub const XCHAL_INT24_EXTNUM: u32 = 19;
pub const XCHAL_INT25_EXTNUM: u32 = 20;
pub const XCHAL_INT26_EXTNUM: u32 = 21;
pub const XCHAL_INT27_EXTNUM: u32 = 22;
pub const XCHAL_INT28_EXTNUM: u32 = 23;
pub const XCHAL_INT30_EXTNUM: u32 = 24;
pub const XCHAL_INT31_EXTNUM: u32 = 25;
pub const XCHAL_XEA_VERSION: u32 = 2;
pub const XCHAL_HAVE_XEA1: u32 = 0;
pub const XCHAL_HAVE_XEA2: u32 = 1;
pub const XCHAL_HAVE_XEAX: u32 = 0;
pub const XCHAL_HAVE_EXCEPTIONS: u32 = 1;
pub const XCHAL_HAVE_HALT: u32 = 0;
pub const XCHAL_HAVE_BOOTLOADER: u32 = 0;
pub const XCHAL_HAVE_MEM_ECC_PARITY: u32 = 0;
pub const XCHAL_HAVE_VECTOR_SELECT: u32 = 1;
pub const XCHAL_HAVE_VECBASE: u32 = 1;
pub const XCHAL_VECBASE_RESET_VADDR: u32 = 1073741824;
pub const XCHAL_VECBASE_RESET_PADDR: u32 = 1073741824;
pub const XCHAL_RESET_VECBASE_OVERLAP: u32 = 0;
pub const XCHAL_RESET_VECTOR0_VADDR: u32 = 1342177280;
pub const XCHAL_RESET_VECTOR0_PADDR: u32 = 1342177280;
pub const XCHAL_RESET_VECTOR1_VADDR: u32 = 1073742848;
pub const XCHAL_RESET_VECTOR1_PADDR: u32 = 1073742848;
pub const XCHAL_RESET_VECTOR_VADDR: u32 = 1073742848;
pub const XCHAL_RESET_VECTOR_PADDR: u32 = 1073742848;
pub const XCHAL_USER_VECOFS: u32 = 832;
pub const XCHAL_USER_VECTOR_VADDR: u32 = 1073742656;
pub const XCHAL_USER_VECTOR_PADDR: u32 = 1073742656;
pub const XCHAL_KERNEL_VECOFS: u32 = 768;
pub const XCHAL_KERNEL_VECTOR_VADDR: u32 = 1073742592;
pub const XCHAL_KERNEL_VECTOR_PADDR: u32 = 1073742592;
pub const XCHAL_DOUBLEEXC_VECOFS: u32 = 960;
pub const XCHAL_DOUBLEEXC_VECTOR_VADDR: u32 = 1073742784;
pub const XCHAL_DOUBLEEXC_VECTOR_PADDR: u32 = 1073742784;
pub const XCHAL_WINDOW_OF4_VECOFS: u32 = 0;
pub const XCHAL_WINDOW_UF4_VECOFS: u32 = 64;
pub const XCHAL_WINDOW_OF8_VECOFS: u32 = 128;
pub const XCHAL_WINDOW_UF8_VECOFS: u32 = 192;
pub const XCHAL_WINDOW_OF12_VECOFS: u32 = 256;
pub const XCHAL_WINDOW_UF12_VECOFS: u32 = 320;
pub const XCHAL_WINDOW_VECTORS_VADDR: u32 = 1073741824;
pub const XCHAL_WINDOW_VECTORS_PADDR: u32 = 1073741824;
pub const XCHAL_INTLEVEL2_VECOFS: u32 = 384;
pub const XCHAL_INTLEVEL2_VECTOR_VADDR: u32 = 1073742208;
pub const XCHAL_INTLEVEL2_VECTOR_PADDR: u32 = 1073742208;
pub const XCHAL_INTLEVEL3_VECOFS: u32 = 448;
pub const XCHAL_INTLEVEL3_VECTOR_VADDR: u32 = 1073742272;
pub const XCHAL_INTLEVEL3_VECTOR_PADDR: u32 = 1073742272;
pub const XCHAL_INTLEVEL4_VECOFS: u32 = 512;
pub const XCHAL_INTLEVEL4_VECTOR_VADDR: u32 = 1073742336;
pub const XCHAL_INTLEVEL4_VECTOR_PADDR: u32 = 1073742336;
pub const XCHAL_INTLEVEL5_VECOFS: u32 = 576;
pub const XCHAL_INTLEVEL5_VECTOR_VADDR: u32 = 1073742400;
pub const XCHAL_INTLEVEL5_VECTOR_PADDR: u32 = 1073742400;
pub const XCHAL_INTLEVEL6_VECOFS: u32 = 640;
pub const XCHAL_INTLEVEL6_VECTOR_VADDR: u32 = 1073742464;
pub const XCHAL_INTLEVEL6_VECTOR_PADDR: u32 = 1073742464;
pub const XCHAL_DEBUG_VECOFS: u32 = 640;
pub const XCHAL_DEBUG_VECTOR_VADDR: u32 = 1073742464;
pub const XCHAL_DEBUG_VECTOR_PADDR: u32 = 1073742464;
pub const XCHAL_NMI_VECOFS: u32 = 704;
pub const XCHAL_NMI_VECTOR_VADDR: u32 = 1073742528;
pub const XCHAL_NMI_VECTOR_PADDR: u32 = 1073742528;
pub const XCHAL_INTLEVEL7_VECOFS: u32 = 704;
pub const XCHAL_INTLEVEL7_VECTOR_VADDR: u32 = 1073742528;
pub const XCHAL_INTLEVEL7_VECTOR_PADDR: u32 = 1073742528;
pub const XCHAL_HAVE_DEBUG_ERI: u32 = 1;
pub const XCHAL_HAVE_DEBUG_APB: u32 = 1;
pub const XCHAL_HAVE_DEBUG_JTAG: u32 = 1;
pub const XCHAL_HAVE_OCD: u32 = 1;
pub const XCHAL_NUM_IBREAK: u32 = 2;
pub const XCHAL_NUM_DBREAK: u32 = 2;
pub const XCHAL_HAVE_OCD_DIR_ARRAY: u32 = 0;
pub const XCHAL_HAVE_OCD_LS32DDR: u32 = 1;
pub const XCHAL_HAVE_TRAX: u32 = 1;
pub const XCHAL_TRAX_MEM_SIZE: u32 = 16384;
pub const XCHAL_TRAX_MEM_SHAREABLE: u32 = 1;
pub const XCHAL_TRAX_ATB_WIDTH: u32 = 32;
pub const XCHAL_TRAX_TIME_WIDTH: u32 = 0;
pub const XCHAL_NUM_PERF_COUNTERS: u32 = 2;
pub const XCHAL_HAVE_TLBS: u32 = 1;
pub const XCHAL_HAVE_SPANNING_WAY: u32 = 1;
pub const XCHAL_SPANNING_WAY: u32 = 0;
pub const XCHAL_HAVE_IDENTITY_MAP: u32 = 1;
pub const XCHAL_HAVE_CACHEATTR: u32 = 0;
pub const XCHAL_HAVE_MIMIC_CACHEATTR: u32 = 1;
pub const XCHAL_HAVE_XLT_CACHEATTR: u32 = 0;
pub const XCHAL_HAVE_PTP_MMU: u32 = 0;
pub const XCHAL_MMU_ASID_BITS: u32 = 0;
pub const XCHAL_MMU_RINGS: u32 = 1;
pub const XCHAL_MMU_RING_BITS: u32 = 0;
pub const __BUFSIZ__: u32 = 128;
pub const __RAND_MAX: u32 = 2147483647;
pub const __GNUCLIKE_ASM: u32 = 3;
pub const __GNUCLIKE___TYPEOF: u32 = 1;
pub const __GNUCLIKE___OFFSETOF: u32 = 1;
pub const __GNUCLIKE___SECTION: u32 = 1;
pub const __GNUCLIKE_CTOR_SECTION_HANDLING: u32 = 1;
pub const __GNUCLIKE_BUILTIN_CONSTANT_P: u32 = 1;
pub const __GNUCLIKE_BUILTIN_VARARGS: u32 = 1;
pub const __GNUCLIKE_BUILTIN_STDARG: u32 = 1;
pub const __GNUCLIKE_BUILTIN_VAALIST: u32 = 1;
pub const __GNUC_VA_LIST_COMPATIBILITY: u32 = 1;
pub const __GNUCLIKE_BUILTIN_NEXT_ARG: u32 = 1;
pub const __GNUCLIKE_BUILTIN_MEMCPY: u32 = 1;
pub const __CC_SUPPORTS_INLINE: u32 = 1;
pub const __CC_SUPPORTS___INLINE: u32 = 1;
pub const __CC_SUPPORTS___INLINE__: u32 = 1;
pub const __CC_SUPPORTS___FUNC__: u32 = 1;
pub const __CC_SUPPORTS_WARNING: u32 = 1;
pub const __CC_SUPPORTS_VARADIC_XXX: u32 = 1;
pub const __CC_SUPPORTS_DYNAMIC_ARRAY_INIT: u32 = 1;
pub const __GNUC_VA_LIST: u32 = 1;
pub const _NULL: u32 = 0;
pub const _ATEXIT_SIZE: u32 = 32;
pub const _RAND48_SEED_0: u32 = 13070;
pub const _RAND48_SEED_1: u32 = 43981;
pub const _RAND48_SEED_2: u32 = 4660;
pub const _RAND48_MULT_0: u32 = 58989;
pub const _RAND48_MULT_1: u32 = 57068;
pub const _RAND48_MULT_2: u32 = 5;
pub const _RAND48_ADD: u32 = 11;
pub const _REENT_EMERGENCY_SIZE: u32 = 25;
pub const _REENT_ASCTIME_SIZE: u32 = 26;
pub const _REENT_SIGNAL_SIZE: u32 = 24;
pub const __BIT_TYPES_DEFINED__: u32 = 1;
pub const _LITTLE_ENDIAN: u32 = 1234;
pub const _BIG_ENDIAN: u32 = 4321;
pub const _PDP_ENDIAN: u32 = 3412;
pub const _BYTE_ORDER: u32 = 1234;
pub const _QUAD_HIGHWORD: u32 = 1;
pub const _QUAD_LOWWORD: u32 = 0;
pub const LITTLE_ENDIAN: u32 = 1234;
pub const BIG_ENDIAN: u32 = 4321;
pub const PDP_ENDIAN: u32 = 3412;
pub const BYTE_ORDER: u32 = 1234;
pub const FD_SETSIZE: u32 = 64;
pub const SCHED_OTHER: u32 = 0;
pub const SCHED_FIFO: u32 = 1;
pub const SCHED_RR: u32 = 2;
pub const PTHREAD_SCOPE_PROCESS: u32 = 0;
pub const PTHREAD_SCOPE_SYSTEM: u32 = 1;
pub const PTHREAD_INHERIT_SCHED: u32 = 1;
pub const PTHREAD_EXPLICIT_SCHED: u32 = 2;
pub const PTHREAD_CREATE_DETACHED: u32 = 0;
pub const PTHREAD_CREATE_JOINABLE: u32 = 1;
pub const PTHREAD_MUTEX_NORMAL: u32 = 0;
pub const PTHREAD_MUTEX_RECURSIVE: u32 = 1;
pub const PTHREAD_MUTEX_ERRORCHECK: u32 = 2;
pub const PTHREAD_MUTEX_DEFAULT: u32 = 3;
pub const __SLBF: u32 = 1;
pub const __SNBF: u32 = 2;
pub const __SRD: u32 = 4;
pub const __SWR: u32 = 8;
pub const __SRW: u32 = 16;
pub const __SEOF: u32 = 32;
pub const __SERR: u32 = 64;
pub const __SMBF: u32 = 128;
pub const __SAPP: u32 = 256;
pub const __SSTR: u32 = 512;
pub const __SOPT: u32 = 1024;
pub const __SNPT: u32 = 2048;
pub const __SOFF: u32 = 4096;
pub const __SORD: u32 = 8192;
pub const __SL64: u32 = 32768;
pub const __SNLK: u32 = 1;
pub const __SWID: u32 = 8192;
pub const _IOFBF: u32 = 0;
pub const _IOLBF: u32 = 1;
pub const _IONBF: u32 = 2;
pub const EOF: i32 = -1;
pub const BUFSIZ: u32 = 128;
pub const FOPEN_MAX: u32 = 20;
pub const FILENAME_MAX: u32 = 1024;
pub const L_tmpnam: u32 = 1024;
pub const P_tmpdir: &'static [u8; 5usize] = b"/tmp\0";
pub const SEEK_SET: u32 = 0;
pub const SEEK_CUR: u32 = 1;
pub const SEEK_END: u32 = 2;
pub const TMP_MAX: u32 = 26;
pub const L_ctermid: u32 = 16;
pub const ESP_OK: u32 = 0;
pub const ESP_FAIL: i32 = -1;
pub const ESP_ERR_NO_MEM: u32 = 257;
pub const ESP_ERR_INVALID_ARG: u32 = 258;
pub const ESP_ERR_INVALID_STATE: u32 = 259;
pub const ESP_ERR_INVALID_SIZE: u32 = 260;
pub const ESP_ERR_NOT_FOUND: u32 = 261;
pub const ESP_ERR_NOT_SUPPORTED: u32 = 262;
pub const ESP_ERR_TIMEOUT: u32 = 263;
pub const ESP_ERR_INVALID_RESPONSE: u32 = 264;
pub const ESP_ERR_INVALID_CRC: u32 = 265;
pub const ESP_ERR_INVALID_VERSION: u32 = 266;
pub const ESP_ERR_INVALID_MAC: u32 = 267;
pub const ESP_ERR_WIFI_BASE: u32 = 12288;
pub const ESP_ERR_MESH_BASE: u32 = 16384;
pub const ESP_ERR_FLASH_BASE: u32 = 24576;
pub const CONFIG_ADC2_DISABLE_DAC: u32 = 1;
pub const CONFIG_ADC_CAL_EFUSE_TP_ENABLE: u32 = 1;
pub const CONFIG_ADC_CAL_EFUSE_VREF_ENABLE: u32 = 1;
pub const CONFIG_ADC_CAL_LUT_ENABLE: u32 = 1;
pub const CONFIG_APP_COMPILE_TIME_DATE: u32 = 1;
pub const CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V: u32 = 1;
pub const CONFIG_BOOTLOADER_WDT_ENABLE: u32 = 1;
pub const CONFIG_BOOTLOADER_WDT_TIME_MS: u32 = 9000;
pub const CONFIG_BROWNOUT_DET: u32 = 1;
pub const CONFIG_BROWNOUT_DET_LVL: u32 = 0;
pub const CONFIG_BROWNOUT_DET_LVL_SEL_0: u32 = 1;
pub const CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN_EFF: u32 = 0;
pub const CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_EFF: u32 = 0;
pub const CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_EFF: u32 = 0;
pub const CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE: u32 = 0;
pub const CONFIG_BT_RESERVE_DRAM: u32 = 0;
pub const CONFIG_CONSOLE_UART_BAUDRATE: u32 = 115200;
pub const CONFIG_CONSOLE_UART_DEFAULT: u32 = 1;
pub const CONFIG_CONSOLE_UART_NUM: u32 = 0;
pub const CONFIG_DMA_RX_BUF_NUM: u32 = 10;
pub const CONFIG_DMA_TX_BUF_NUM: u32 = 10;
pub const CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4: u32 = 1;
pub const CONFIG_EFUSE_MAX_BLK_LEN: u32 = 192;
pub const CONFIG_EMAC_CHECK_LINK_PERIOD_MS: u32 = 2000;
pub const CONFIG_EMAC_L2_TO_L3_RX_BUF_MODE: u32 = 1;
pub const CONFIG_EMAC_TASK_PRIORITY: u32 = 20;
pub const CONFIG_EMAC_TASK_STACK_SIZE: u32 = 3072;
pub const CONFIG_ESP32_APPTRACE_DEST_NONE: u32 = 1;
pub const CONFIG_ESP32_APPTRACE_LOCK_ENABLE: u32 = 1;
pub const CONFIG_ESP32_DEBUG_OCDAWARE: u32 = 1;
pub const CONFIG_ESP32_DEBUG_STUBS_ENABLE: u32 = 1;
pub const CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY: u32 = 2000;
pub const CONFIG_ESP32_DEFAULT_CPU_FREQ_240: u32 = 1;
pub const CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ: u32 = 240;
pub const CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY: u32 = 1;
pub const CONFIG_ESP32_DPORT_WORKAROUND: u32 = 1;
pub const CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE: u32 = 1;
pub const CONFIG_ESP32_PANIC_PRINT_REBOOT: u32 = 1;
pub const CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE: u32 = 1;
pub const CONFIG_ESP32_PHY_MAX_TX_POWER: u32 = 20;
pub const CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER: u32 = 20;
pub const CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT: i32 = -1;
pub const CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT: &'static [u8; 8usize] = b"pthread\0";
pub const CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT: u32 = 5;
pub const CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT: u32 = 3072;
pub const CONFIG_ESP32_REV_MIN: u32 = 0;
pub const CONFIG_ESP32_REV_MIN_0: u32 = 1;
pub const CONFIG_ESP32_RTC_CLK_CAL_CYCLES: u32 = 1024;
pub const CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC: u32 = 1;
pub const CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1: u32 = 1;
pub const CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED: u32 = 1;
pub const CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED: u32 = 1;
pub const CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM: u32 = 32;
pub const CONFIG_ESP8266_WIFI_RX_BUFFER_NUM: u32 = 16;
pub const CONFIG_ESP8266_WIFI_LEFT_CONTINUOUS_RX_BUFFER_NUM: u32 = 8;
pub const CONFIG_ESP8266_WIFI_RX_PKT_NUM: u32 = 7;
pub const CONFIG_ESP8266_WIFI_TX_PKT_NUM: u32 = 6;
pub const CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER: u32 = 1;
pub const CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM: u32 = 32;
pub const CONFIG_ESP32_WIFI_IRAM_OPT: u32 = 1;
pub const CONFIG_ESP32_WIFI_MGMT_SBUF_NUM: u32 = 32;
pub const CONFIG_ESP32_WIFI_NVS_ENABLED: u32 = 1;
pub const CONFIG_ESP8266_WIFI_NVS_ENABLED: u32 = 1;
pub const CONFIG_ESP32_WIFI_RX_BA_WIN: u32 = 6;
pub const CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN: u32 = 752;
pub const CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM: u32 = 10;
pub const CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0: u32 = 1;
pub const CONFIG_ESP32_WIFI_TX_BA_WIN: u32 = 6;
pub const CONFIG_ESP32_WIFI_TX_BUFFER_TYPE: u32 = 1;
pub const CONFIG_ESP32_XTAL_FREQ: u32 = 40;
pub const CONFIG_ESP32_XTAL_FREQ_40: u32 = 1;
pub const CONFIG_ESPTOOLPY_AFTER: &'static [u8; 11usize] = b"hard_reset\0";
pub const CONFIG_ESPTOOLPY_AFTER_RESET: u32 = 1;
pub const CONFIG_ESPTOOLPY_BAUD: u32 = 115200;
pub const CONFIG_ESPTOOLPY_BAUD_115200B: u32 = 1;
pub const CONFIG_ESPTOOLPY_BAUD_OTHER_VAL: u32 = 115200;
pub const CONFIG_ESPTOOLPY_BEFORE: &'static [u8; 14usize] = b"default_reset\0";
pub const CONFIG_ESPTOOLPY_BEFORE_RESET: u32 = 1;
pub const CONFIG_ESPTOOLPY_COMPRESSED: u32 = 1;
pub const CONFIG_ESPTOOLPY_FLASHFREQ: &'static [u8; 4usize] = b"40m\0";
pub const CONFIG_ESPTOOLPY_FLASHFREQ_40M: u32 = 1;
pub const CONFIG_ESPTOOLPY_FLASHMODE: &'static [u8; 4usize] = b"dio\0";
pub const CONFIG_ESPTOOLPY_FLASHSIZE: &'static [u8; 4usize] = b"2MB\0";
pub const CONFIG_ESPTOOLPY_FLASHSIZE_2MB: u32 = 1;
pub const CONFIG_ESPTOOLPY_FLASHSIZE_DETECT: u32 = 1;
pub const CONFIG_ESPTOOLPY_PORT: &'static [u8; 13usize] = b"/dev/ttyUSB0\0";
pub const CONFIG_ESP_ERR_TO_NAME_LOOKUP: u32 = 1;
pub const CONFIG_ESP_GRATUITOUS_ARP: u32 = 1;
pub const CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS: u32 = 1;
pub const CONFIG_FATFS_CODEPAGE: u32 = 437;
pub const CONFIG_FATFS_CODEPAGE_437: u32 = 1;
pub const CONFIG_FATFS_FS_LOCK: u32 = 0;
pub const CONFIG_FATFS_LFN_NONE: u32 = 1;
pub const CONFIG_FATFS_PER_FILE_CACHE: u32 = 1;
pub const CONFIG_FATFS_TIMEOUT_MS: u32 = 10000;
pub const CONFIG_FLASHMODE_DIO: u32 = 1;
pub const CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS: u32 = 1;
pub const CONFIG_FREERTOS_ASSERT_FAIL_ABORT: u32 = 1;
pub const CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION: u32 = 1;
pub const CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER: u32 = 1;
pub const CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY: u32 = 1;
pub const CONFIG_FREERTOS_CORETIMER_0: u32 = 1;
pub const CONFIG_FREERTOS_HZ: u32 = 1000;
pub const CONFIG_FREERTOS_IDLE_TASK_STACKSIZE: u32 = 1536;
pub const CONFIG_FREERTOS_INTERRUPT_BACKTRACE: u32 = 1;
pub const CONFIG_FREERTOS_ISR_STACKSIZE: u32 = 1536;
pub const CONFIG_FREERTOS_MAX_TASK_NAME_LEN: u32 = 16;
pub const CONFIG_FREERTOS_NO_AFFINITY: u32 = 2147483647;
pub const CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE: u32 = 0;
pub const CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER: u32 = 1;
pub const CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS: u32 = 1;
pub const CONFIG_GARP_TMR_INTERVAL: u32 = 60;
pub const CONFIG_HEAP_POISONING_DISABLED: u32 = 1;
pub const CONFIG_HTTPD_ERR_RESP_NO_DELAY: u32 = 1;
pub const CONFIG_HTTPD_MAX_REQ_HDR_LEN: u32 = 512;
pub const CONFIG_HTTPD_MAX_URI_LEN: u32 = 512;
pub const CONFIG_HTTPD_PURGE_BUF_LEN: u32 = 32;
pub const CONFIG_IDF_TARGET: &'static [u8; 6usize] = b"esp32\0";
pub const CONFIG_IDF_TARGET_ESP32: u32 = 1;
pub const CONFIG_INT_WDT: u32 = 1;
pub const CONFIG_INT_WDT_CHECK_CPU1: u32 = 1;
pub const CONFIG_INT_WDT_TIMEOUT_MS: u32 = 300;
pub const CONFIG_IPC_TASK_STACK_SIZE: u32 = 1024;
pub const CONFIG_IP_LOST_TIMER_INTERVAL: u32 = 120;
pub const CONFIG_LIBSODIUM_USE_MBEDTLS_SHA: u32 = 1;
pub const CONFIG_LOG_BOOTLOADER_LEVEL: u32 = 3;
pub const CONFIG_LOG_BOOTLOADER_LEVEL_INFO: u32 = 1;
pub const CONFIG_LOG_COLORS: u32 = 1;
pub const CONFIG_LOG_DEFAULT_LEVEL: u32 = 3;
pub const CONFIG_LOG_DEFAULT_LEVEL_INFO: u32 = 1;
pub const CONFIG_LWIP_TCP_OVERSIZE_MSS: u32 = 1;
pub const CONFIG_LWIP_DHCPS_LEASE_UNIT: u32 = 60;
pub const CONFIG_LWIP_DHCPS_MAX_STATION_NUM: u32 = 8;
pub const CONFIG_LWIP_DHCP_DOES_ARP_CHECK: u32 = 1;
pub const CONFIG_LWIP_DHCP_MAX_NTP_SERVERS: u32 = 1;
pub const CONFIG_LWIP_LOOPBACK_MAX_PBUFS: u32 = 8;
pub const CONFIG_LWIP_MAX_ACTIVE_TCP: u32 = 16;
pub const CONFIG_LWIP_MAX_LISTENING_TCP: u32 = 16;
pub const CONFIG_LWIP_MAX_RAW_PCBS: u32 = 16;
pub const CONFIG_LWIP_MAX_SOCKETS: u32 = 10;
pub const CONFIG_LWIP_MAX_UDP_PCBS: u32 = 16;
pub const CONFIG_LWIP_NETIF_LOOPBACK: u32 = 1;
pub const CONFIG_LWIP_SO_REUSE: u32 = 1;
pub const CONFIG_LWIP_SO_REUSE_RXTOALL: u32 = 1;
pub const CONFIG_MAIN_TASK_STACK_SIZE: u32 = 3584;
pub const CONFIG_MBEDTLS_AES_C: u32 = 1;
pub const CONFIG_MBEDTLS_CCM_C: u32 = 1;
pub const CONFIG_MBEDTLS_ECDH_C: u32 = 1;
pub const CONFIG_MBEDTLS_ECDSA_C: u32 = 1;
pub const CONFIG_MBEDTLS_ECP_C: u32 = 1;
pub const CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED: u32 = 1;
pub const CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED: u32 = 1;
pub const CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED: u32 = 1;
pub const CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED: u32 = 1;
pub const CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED: u32 = 1;
pub const CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED: u32 = 1;
pub const CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED: u32 = 1;
pub const CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED: u32 = 1;
pub const CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED: u32 = 1;
pub const CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED: u32 = 1;
pub const CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED: u32 = 1;
pub const CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED: u32 = 1;
pub const CONFIG_MBEDTLS_ECP_NIST_OPTIM: u32 = 1;
pub const CONFIG_MBEDTLS_GCM_C: u32 = 1;
pub const CONFIG_MBEDTLS_HARDWARE_AES: u32 = 1;
pub const CONFIG_MBEDTLS_HAVE_TIME: u32 = 1;
pub const CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC: u32 = 1;
pub const CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA: u32 = 1;
pub const CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA: u32 = 1;
pub const CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA: u32 = 1;
pub const CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA: u32 = 1;
pub const CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA: u32 = 1;
pub const CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE: u32 = 1;
pub const CONFIG_MBEDTLS_KEY_EXCHANGE_RSA: u32 = 1;
pub const CONFIG_MBEDTLS_PEM_PARSE_C: u32 = 1;
pub const CONFIG_MBEDTLS_PEM_WRITE_C: u32 = 1;
pub const CONFIG_MBEDTLS_RC4_DISABLED: u32 = 1;
pub const CONFIG_MBEDTLS_SSL_ALPN: u32 = 1;
pub const CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN: u32 = 16384;
pub const CONFIG_MBEDTLS_SSL_PROTO_TLS1: u32 = 1;
pub const CONFIG_MBEDTLS_SSL_PROTO_TLS1_1: u32 = 1;
pub const CONFIG_MBEDTLS_SSL_PROTO_TLS1_2: u32 = 1;
pub const CONFIG_MBEDTLS_SSL_RENEGOTIATION: u32 = 1;
pub const CONFIG_MBEDTLS_SSL_SESSION_TICKETS: u32 = 1;
pub const CONFIG_MBEDTLS_TLS_CLIENT: u32 = 1;
pub const CONFIG_MBEDTLS_TLS_ENABLED: u32 = 1;
pub const CONFIG_MBEDTLS_TLS_SERVER: u32 = 1;
pub const CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT: u32 = 1;
pub const CONFIG_MBEDTLS_X509_CRL_PARSE_C: u32 = 1;
pub const CONFIG_MBEDTLS_X509_CSR_PARSE_C: u32 = 1;
pub const CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE: u32 = 20;
pub const CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT: u32 = 20;
pub const CONFIG_MB_CONTROLLER_STACK_SIZE: u32 = 4096;
pub const CONFIG_MB_EVENT_QUEUE_TIMEOUT: u32 = 20;
pub const CONFIG_MB_QUEUE_LENGTH: u32 = 20;
pub const CONFIG_MB_SERIAL_BUF_SIZE: u32 = 256;
pub const CONFIG_MB_SERIAL_TASK_PRIO: u32 = 10;
pub const CONFIG_MB_SERIAL_TASK_STACK_SIZE: u32 = 2048;
pub const CONFIG_MB_TIMER_GROUP: u32 = 0;
pub const CONFIG_MB_TIMER_INDEX: u32 = 0;
pub const CONFIG_MB_TIMER_PORT_ENABLED: u32 = 1;
pub const CONFIG_MDNS_MAX_SERVICES: u32 = 10;
pub const CONFIG_MONITOR_BAUD: u32 = 115200;
pub const CONFIG_MONITOR_BAUD_115200B: u32 = 1;
pub const CONFIG_MONITOR_BAUD_OTHER_VAL: u32 = 115200;
pub const CONFIG_MQTT_PROTOCOL_311: u32 = 1;
pub const CONFIG_MQTT_TRANSPORT_SSL: u32 = 1;
pub const CONFIG_MQTT_TRANSPORT_WEBSOCKET: u32 = 1;
pub const CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE: u32 = 1;
pub const CONFIG_NEWLIB_STDIN_LINE_ENDING_CR: u32 = 1;
pub const CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF: u32 = 1;
pub const CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS: u32 = 4;
pub const CONFIG_OPENSSL_ASSERT_DO_NOTHING: u32 = 1;
pub const CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED: u32 = 1;
pub const CONFIG_OPTIMIZATION_LEVEL_DEBUG: u32 = 1;
pub const CONFIG_PARTITION_TABLE_CUSTOM_FILENAME: &'static [u8; 15usize] = b"partitions.csv\0";
pub const CONFIG_PARTITION_TABLE_FILENAME: &'static [u8; 25usize] = b"partitions_singleapp.csv\0";
pub const CONFIG_PARTITION_TABLE_MD5: u32 = 1;
pub const CONFIG_PARTITION_TABLE_OFFSET: u32 = 32768;
pub const CONFIG_PARTITION_TABLE_SINGLE_APP: u32 = 1;
pub const CONFIG_PTHREAD_STACK_MIN: u32 = 768;
pub const CONFIG_PYTHON: &'static [u8; 7usize] = b"python\0";
pub const CONFIG_REDUCE_PHY_TX_POWER: u32 = 1;
pub const CONFIG_SPIFFS_CACHE: u32 = 1;
pub const CONFIG_SPIFFS_CACHE_WR: u32 = 1;
pub const CONFIG_SPIFFS_GC_MAX_RUNS: u32 = 10;
pub const CONFIG_SPIFFS_MAX_PARTITIONS: u32 = 3;
pub const CONFIG_SPIFFS_META_LENGTH: u32 = 4;
pub const CONFIG_SPIFFS_OBJ_NAME_LEN: u32 = 32;
pub const CONFIG_SPIFFS_PAGE_CHECK: u32 = 1;
pub const CONFIG_SPIFFS_PAGE_SIZE: u32 = 256;
pub const CONFIG_SPIFFS_USE_MAGIC: u32 = 1;
pub const CONFIG_SPIFFS_USE_MAGIC_LENGTH: u32 = 1;
pub const CONFIG_SPIFFS_USE_MTIME: u32 = 1;
pub const CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS: u32 = 20;
pub const CONFIG_SPI_FLASH_ERASE_YIELD_TICKS: u32 = 1;
pub const CONFIG_SPI_FLASH_ROM_DRIVER_PATCH: u32 = 1;
pub const CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS: u32 = 1;
pub const CONFIG_SPI_FLASH_YIELD_DURING_ERASE: u32 = 1;
pub const CONFIG_SPI_MASTER_ISR_IN_IRAM: u32 = 1;
pub const CONFIG_SPI_SLAVE_ISR_IN_IRAM: u32 = 1;
pub const CONFIG_STACK_CHECK_NONE: u32 = 1;
pub const CONFIG_SUPPORT_TERMIOS: u32 = 1;
pub const CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT: u32 = 1;
pub const CONFIG_SYSTEM_EVENT_QUEUE_SIZE: u32 = 32;
pub const CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE: u32 = 2304;
pub const CONFIG_TASK_WDT: u32 = 1;
pub const CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0: u32 = 1;
pub const CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1: u32 = 1;
pub const CONFIG_TASK_WDT_TIMEOUT_S: u32 = 5;
pub const CONFIG_TCPIP_LWIP: u32 = 1;
pub const CONFIG_TCPIP_RECVMBOX_SIZE: u32 = 32;
pub const CONFIG_TCPIP_TASK_AFFINITY: u32 = 2147483647;
pub const CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY: u32 = 1;
pub const CONFIG_TCPIP_TASK_STACK_SIZE: u32 = 3072;
pub const CONFIG_TCP_MAXRTX: u32 = 12;
pub const CONFIG_TCP_MSL: u32 = 60000;
pub const CONFIG_TCP_MSS: u32 = 1436;
pub const CONFIG_TCP_OVERSIZE_MSS: u32 = 1;
pub const CONFIG_TCP_QUEUE_OOSEQ: u32 = 1;
pub const CONFIG_TCP_RECVMBOX_SIZE: u32 = 6;
pub const CONFIG_TCP_SND_BUF_DEFAULT: u32 = 5744;
pub const CONFIG_TCP_SYNMAXRTX: u32 = 6;
pub const CONFIG_TCP_WND_DEFAULT: u32 = 5744;
pub const CONFIG_TIMER_QUEUE_LENGTH: u32 = 10;
pub const CONFIG_TIMER_TASK_PRIORITY: u32 = 1;
pub const CONFIG_TIMER_TASK_STACK_DEPTH: u32 = 2048;
pub const CONFIG_TIMER_TASK_STACK_SIZE: u32 = 3584;
pub const CONFIG_TOOLPREFIX: &'static [u8; 18usize] = b"xtensa-esp32-elf-\0";
pub const CONFIG_TRACEMEM_RESERVE_DRAM: u32 = 0;
pub const CONFIG_UDP_RECVMBOX_SIZE: u32 = 6;
pub const CONFIG_ULP_COPROC_RESERVE_MEM: u32 = 0;
pub const CONFIG_UNITY_ENABLE_DOUBLE: u32 = 1;
pub const CONFIG_UNITY_ENABLE_FLOAT: u32 = 1;
pub const CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER: u32 = 1;
pub const CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES: u32 = 16;
pub const CONFIG_WL_SECTOR_SIZE: u32 = 4096;
pub const CONFIG_WL_SECTOR_SIZE_4096: u32 = 1;
pub const BIT31: u32 = 2147483648;
pub const BIT30: u32 = 1073741824;
pub const BIT29: u32 = 536870912;
pub const BIT28: u32 = 268435456;
pub const BIT27: u32 = 134217728;
pub const BIT26: u32 = 67108864;
pub const BIT25: u32 = 33554432;
pub const BIT24: u32 = 16777216;
pub const BIT23: u32 = 8388608;
pub const BIT22: u32 = 4194304;
pub const BIT21: u32 = 2097152;
pub const BIT20: u32 = 1048576;
pub const BIT19: u32 = 524288;
pub const BIT18: u32 = 262144;
pub const BIT17: u32 = 131072;
pub const BIT16: u32 = 65536;
pub const BIT15: u32 = 32768;
pub const BIT14: u32 = 16384;
pub const BIT13: u32 = 8192;
pub const BIT12: u32 = 4096;
pub const BIT11: u32 = 2048;
pub const BIT10: u32 = 1024;
pub const BIT9: u32 = 512;
pub const BIT8: u32 = 256;
pub const BIT7: u32 = 128;
pub const BIT6: u32 = 64;
pub const BIT5: u32 = 32;
pub const BIT4: u32 = 16;
pub const BIT3: u32 = 8;
pub const BIT2: u32 = 4;
pub const BIT1: u32 = 2;
pub const BIT0: u32 = 1;
pub const XTHAL_RELEASE_MAJOR: u32 = 12000;
pub const XTHAL_RELEASE_MINOR: u32 = 9;
pub const XTHAL_RELEASE_NAME: &'static [u8; 7usize] = b"12.0.9\0";
pub const XTHAL_REL_12: u32 = 1;
pub const XTHAL_REL_12_0: u32 = 1;
pub const XTHAL_REL_12_0_9: u32 = 1;
pub const XTHAL_MAJOR_REV: u32 = 12000;
pub const XTHAL_MINOR_REV: u32 = 9;
pub const XTHAL_MAYBE: i32 = -1;
pub const XTHAL_MAX_CPS: u32 = 8;
pub const XTHAL_LITTLEENDIAN: u32 = 0;
pub const XTHAL_BIGENDIAN: u32 = 1;
pub const XTHAL_PREFETCH_ENABLE: i32 = -1;
pub const XTHAL_PREFETCH_DISABLE: u32 = 4294901760;
pub const XTHAL_DCACHE_PREFETCH_L1_OFF: u32 = 2415919104;
pub const XTHAL_DCACHE_PREFETCH_L1: u32 = 2415923200;
pub const XTHAL_ICACHE_PREFETCH_L1_OFF: u32 = 2684354560;
pub const XTHAL_ICACHE_PREFETCH_L1: u32 = 2684362752;
pub const XTHAL_DISASM_BUFSIZE: u32 = 80;
pub const XTHAL_DISASM_OPT_ADDR: u32 = 1;
pub const XTHAL_DISASM_OPT_OPHEX: u32 = 2;
pub const XTHAL_DISASM_OPT_OPCODE: u32 = 4;
pub const XTHAL_DISASM_OPT_PARMS: u32 = 8;
pub const XTHAL_DISASM_OPT_ALL: u32 = 4095;
pub const XTHAL_MAX_INTERRUPTS: u32 = 32;
pub const XTHAL_MAX_INTLEVELS: u32 = 16;
pub const XTHAL_MAX_TIMERS: u32 = 4;
pub const XTHAL_INTTYPE_UNCONFIGURED: u32 = 0;
pub const XTHAL_INTTYPE_SOFTWARE: u32 = 1;
pub const XTHAL_INTTYPE_EXTERN_EDGE: u32 = 2;
pub const XTHAL_INTTYPE_EXTERN_LEVEL: u32 = 3;
pub const XTHAL_INTTYPE_TIMER: u32 = 4;
pub const XTHAL_INTTYPE_NMI: u32 = 5;
pub const XTHAL_INTTYPE_WRITE_ERROR: u32 = 6;
pub const XTHAL_INTTYPE_PROFILING: u32 = 7;
pub const XTHAL_INTTYPE_IDMA_DONE: u32 = 8;
pub const XTHAL_INTTYPE_IDMA_ERR: u32 = 9;
pub const XTHAL_INTTYPE_GS_ERR: u32 = 10;
pub const XTHAL_INTTYPE_SG_ERR: u32 = 10;
pub const XTHAL_MAX_INTTYPES: u32 = 11;
pub const XTHAL_TIMER_UNCONFIGURED: i32 = -1;
pub const XTHAL_TIMER_UNASSIGNED: i32 = -1;
pub const XTHAL_MEMEP_PARITY: u32 = 1;
pub const XTHAL_MEMEP_ECC: u32 = 2;
pub const XTHAL_MEMEP_F_LOCAL: u32 = 0;
pub const XTHAL_MEMEP_F_DCACHE_DATA: u32 = 4;
pub const XTHAL_MEMEP_F_DCACHE_TAG: u32 = 5;
pub const XTHAL_MEMEP_F_ICACHE_DATA: u32 = 6;
pub const XTHAL_MEMEP_F_ICACHE_TAG: u32 = 7;
pub const XTHAL_MEMEP_F_CORRECTABLE: u32 = 16;
pub const XTHAL_AMB_EXCEPTION: u32 = 0;
pub const XTHAL_AMB_HITCACHE: u32 = 1;
pub const XTHAL_AMB_ALLOCATE: u32 = 2;
pub const XTHAL_AMB_WRITETHRU: u32 = 3;
pub const XTHAL_AMB_ISOLATE: u32 = 4;
pub const XTHAL_AMB_GUARD: u32 = 5;
pub const XTHAL_AMB_COHERENT: u32 = 6;
pub const XTHAL_AM_EXCEPTION: u32 = 1;
pub const XTHAL_AM_HITCACHE: u32 = 2;
pub const XTHAL_AM_ALLOCATE: u32 = 4;
pub const XTHAL_AM_WRITETHRU: u32 = 8;
pub const XTHAL_AM_ISOLATE: u32 = 16;
pub const XTHAL_AM_GUARD: u32 = 32;
pub const XTHAL_AM_COHERENT: u32 = 64;
pub const XTHAL_FAM_EXCEPTION: u32 = 1;
pub const XTHAL_FAM_BYPASS: u32 = 0;
pub const XTHAL_FAM_CACHED: u32 = 6;
pub const XTHAL_LAM_EXCEPTION: u32 = 1;
pub const XTHAL_LAM_ISOLATE: u32 = 18;
pub const XTHAL_LAM_BYPASS: u32 = 0;
pub const XTHAL_LAM_BYPASSG: u32 = 32;
pub const XTHAL_LAM_CACHED_NOALLOC: u32 = 2;
pub const XTHAL_LAM_NACACHED: u32 = 2;
pub const XTHAL_LAM_NACACHEDG: u32 = 34;
pub const XTHAL_LAM_CACHED: u32 = 6;
pub const XTHAL_LAM_COHCACHED: u32 = 70;
pub const XTHAL_SAM_EXCEPTION: u32 = 1;
pub const XTHAL_SAM_ISOLATE: u32 = 50;
pub const XTHAL_SAM_BYPASS: u32 = 40;
pub const XTHAL_SAM_WRITETHRU: u32 = 42;
pub const XTHAL_SAM_WRITEBACK: u32 = 38;
pub const XTHAL_SAM_WRITEBACK_NOALLOC: u32 = 34;
pub const XTHAL_SAM_COHWRITEBACK: u32 = 102;
pub const XTHAL_PAM_BYPASS: u32 = 0;
pub const XTHAL_PAM_BYPASS_BUF: u32 = 16;
pub const XTHAL_PAM_CACHED_NOALLOC: u32 = 48;
pub const XTHAL_PAM_WRITETHRU: u32 = 176;
pub const XTHAL_PAM_WRITEBACK_NOALLOC: u32 = 240;
pub const XTHAL_PAM_WRITEBACK: u32 = 496;
pub const XTHAL_CAFLAG_EXPAND: u32 = 256;
pub const XTHAL_CAFLAG_EXACT: u32 = 512;
pub const XTHAL_CAFLAG_NO_PARTIAL: u32 = 1024;
pub const XTHAL_CAFLAG_NO_AUTO_WB: u32 = 2048;
pub const XTHAL_CAFLAG_NO_AUTO_INV: u32 = 4096;
pub const XTHAL_SUCCESS: u32 = 0;
pub const XTHAL_NO_REGIONS_COVERED: i32 = -1;
pub const XTHAL_INEXACT: i32 = -2;
pub const XTHAL_INVALID_ADDRESS: i32 = -3;
pub const XTHAL_UNSUPPORTED: i32 = -4;
pub const XTHAL_ADDRESS_MISALIGNED: i32 = -5;
pub const XTHAL_NO_MAPPING: i32 = -6;
pub const XTHAL_BAD_ACCESS_RIGHTS: i32 = -7;
pub const XTHAL_BAD_MEMORY_TYPE: i32 = -8;
pub const XTHAL_MAP_NOT_ALIGNED: i32 = -9;
pub const XTHAL_OUT_OF_ENTRIES: i32 = -10;
pub const XTHAL_OUT_OF_ORDER_MAP: i32 = -11;
pub const XTHAL_INVALID: i32 = -12;
pub const XTHAL_ZERO_SIZED_REGION: i32 = -13;
pub const XTHAL_INVALID_ADDRESS_RANGE: i32 = -14;
pub const XCHAL_SUCCESS: u32 = 0;
pub const XCHAL_ADDRESS_MISALIGNED: i32 = -5;
pub const XCHAL_INEXACT: i32 = -2;
pub const XCHAL_INVALID_ADDRESS: i32 = -3;
pub const XCHAL_UNSUPPORTED_ON_THIS_ARCH: i32 = -4;
pub const XCHAL_NO_PAGES_MAPPED: i32 = -1;
pub const XTHAL_AR_NONE: u32 = 0;
pub const XTHAL_AR_R: u32 = 4;
pub const XTHAL_AR_RX: u32 = 5;
pub const XTHAL_AR_RW: u32 = 6;
pub const XTHAL_AR_RWX: u32 = 7;
pub const XTHAL_AR_Ww: u32 = 8;
pub const XTHAL_AR_RWrwx: u32 = 9;
pub const XTHAL_AR_RWr: u32 = 10;
pub const XTHAL_AR_RWXrx: u32 = 11;
pub const XTHAL_AR_Rr: u32 = 12;
pub const XTHAL_AR_RXrx: u32 = 13;
pub const XTHAL_AR_RWrw: u32 = 14;
pub const XTHAL_AR_RWXrwx: u32 = 15;
pub const XTHAL_AR_WIDTH: u32 = 4;
pub const XTHAL_MPU_USE_EXISTING_ACCESS_RIGHTS: u32 = 8192;
pub const XTHAL_MPU_USE_EXISTING_MEMORY_TYPE: u32 = 16384;
pub const XTHAL_MEM_DEVICE: u32 = 32768;
pub const XTHAL_MEM_NON_CACHEABLE: u32 = 589824;
pub const XTHAL_MEM_WRITETHRU_NOALLOC: u32 = 524288;
pub const XTHAL_MEM_WRITETHRU: u32 = 262144;
pub const XTHAL_MEM_WRITETHRU_WRITEALLOC: u32 = 393216;
pub const XTHAL_MEM_WRITEBACK_NOALLOC: u32 = 327680;
pub const XTHAL_MEM_WRITEBACK: u32 = 458752;
pub const XTHAL_MEM_INTERRUPTIBLE: u32 = 134217728;
pub const XTHAL_MEM_BUFFERABLE: u32 = 16777216;
pub const XTHAL_MEM_NON_SHAREABLE: u32 = 0;
pub const XTHAL_MEM_INNER_SHAREABLE: u32 = 33554432;
pub const XTHAL_MEM_OUTER_SHAREABLE: u32 = 67108864;
pub const XTHAL_MEM_SYSTEM_SHAREABLE: u32 = 100663296;
pub const _XTHAL_SYSTEM_CACHE_BITS: u32 = 983040;
pub const _XTHAL_LOCAL_CACHE_BITS: u32 = 15728640;
pub const _XTHAL_MEM_SYSTEM_RWC_MASK: u32 = 458752;
pub const _XTHAL_MEM_LOCAL_RWC_MASK: u32 = 7340032;
pub const _XTHAL_SHIFT_RWC: u32 = 16;
pub const XTHAL_MEM_NON_CACHED: u32 = 589824;
pub const XTHAL_MEM_NON_SHARED: u32 = 0;
pub const XTHAL_MEM_INNER_SHARED: u32 = 33554432;
pub const XTHAL_MEM_OUTER_SHARED: u32 = 67108864;
pub const XTHAL_MEM_SYSTEM_SHARED: u32 = 100663296;
pub const XTHAL_MEM_SW_SHAREABLE: u32 = 0;
pub const XCHAL_CP_NUM: u32 = 1;
pub const XCHAL_CP_MAX: u32 = 1;
pub const XCHAL_CP_MASK: u32 = 1;
pub const XCHAL_CP_PORT_MASK: u32 = 0;
pub const XCHAL_CP0_NAME: &'static [u8; 4usize] = b"FPU\0";
pub const XCHAL_CP0_SA_SIZE: u32 = 72;
pub const XCHAL_CP0_SA_ALIGN: u32 = 4;
pub const XCHAL_CP_ID_FPU: u32 = 0;
pub const XCHAL_CP1_SA_SIZE: u32 = 0;
pub const XCHAL_CP1_SA_ALIGN: u32 = 1;
pub const XCHAL_CP2_SA_SIZE: u32 = 0;
pub const XCHAL_CP2_SA_ALIGN: u32 = 1;
pub const XCHAL_CP3_SA_SIZE: u32 = 0;
pub const XCHAL_CP3_SA_ALIGN: u32 = 1;
pub const XCHAL_CP4_SA_SIZE: u32 = 0;
pub const XCHAL_CP4_SA_ALIGN: u32 = 1;
pub const XCHAL_CP5_SA_SIZE: u32 = 0;
pub const XCHAL_CP5_SA_ALIGN: u32 = 1;
pub const XCHAL_CP6_SA_SIZE: u32 = 0;
pub const XCHAL_CP6_SA_ALIGN: u32 = 1;
pub const XCHAL_CP7_SA_SIZE: u32 = 0;
pub const XCHAL_CP7_SA_ALIGN: u32 = 1;
pub const XCHAL_NCP_SA_SIZE: u32 = 48;
pub const XCHAL_NCP_SA_ALIGN: u32 = 4;
pub const XCHAL_TOTAL_SA_SIZE: u32 = 128;
pub const XCHAL_TOTAL_SA_ALIGN: u32 = 4;
pub const XCHAL_NCP_SA_NUM: u32 = 12;
pub const XCHAL_CP0_SA_NUM: u32 = 18;
pub const XCHAL_CP1_SA_NUM: u32 = 0;
pub const XCHAL_CP2_SA_NUM: u32 = 0;
pub const XCHAL_CP3_SA_NUM: u32 = 0;
pub const XCHAL_CP4_SA_NUM: u32 = 0;
pub const XCHAL_CP5_SA_NUM: u32 = 0;
pub const XCHAL_CP6_SA_NUM: u32 = 0;
pub const XCHAL_CP7_SA_NUM: u32 = 0;
pub const EXCCAUSE_EXCCAUSE_SHIFT: u32 = 0;
pub const EXCCAUSE_EXCCAUSE_MASK: u32 = 63;
pub const EXCCAUSE_ILLEGAL: u32 = 0;
pub const EXCCAUSE_SYSCALL: u32 = 1;
pub const EXCCAUSE_INSTR_ERROR: u32 = 2;
pub const EXCCAUSE_IFETCHERROR: u32 = 2;
pub const EXCCAUSE_LOAD_STORE_ERROR: u32 = 3;
pub const EXCCAUSE_LOADSTOREERROR: u32 = 3;
pub const EXCCAUSE_LEVEL1_INTERRUPT: u32 = 4;
pub const EXCCAUSE_LEVEL1INTERRUPT: u32 = 4;
pub const EXCCAUSE_ALLOCA: u32 = 5;
pub const EXCCAUSE_DIVIDE_BY_ZERO: u32 = 6;
pub const EXCCAUSE_SPECULATION: u32 = 7;
pub const EXCCAUSE_PC_ERROR: u32 = 7;
pub const EXCCAUSE_PRIVILEGED: u32 = 8;
pub const EXCCAUSE_UNALIGNED: u32 = 9;
pub const EXCCAUSE_EXTREG_PRIVILEGE: u32 = 10;
pub const EXCCAUSE_EXCLUSIVE_ERROR: u32 = 11;
pub const EXCCAUSE_INSTR_DATA_ERROR: u32 = 12;
pub const EXCCAUSE_LOAD_STORE_DATA_ERROR: u32 = 13;
pub const EXCCAUSE_INSTR_ADDR_ERROR: u32 = 14;
pub const EXCCAUSE_LOAD_STORE_ADDR_ERROR: u32 = 15;
pub const EXCCAUSE_ITLB_MISS: u32 = 16;
pub const EXCCAUSE_ITLB_MULTIHIT: u32 = 17;
pub const EXCCAUSE_INSTR_RING: u32 = 18;
pub const EXCCAUSE_INSTR_PROHIBITED: u32 = 20;
pub const EXCCAUSE_DTLB_MISS: u32 = 24;
pub const EXCCAUSE_DTLB_MULTIHIT: u32 = 25;
pub const EXCCAUSE_LOAD_STORE_RING: u32 = 26;
pub const EXCCAUSE_LOAD_PROHIBITED: u32 = 28;
pub const EXCCAUSE_STORE_PROHIBITED: u32 = 29;
pub const EXCCAUSE_CP0_DISABLED: u32 = 32;
pub const EXCCAUSE_CP1_DISABLED: u32 = 33;
pub const EXCCAUSE_CP2_DISABLED: u32 = 34;
pub const EXCCAUSE_CP3_DISABLED: u32 = 35;
pub const EXCCAUSE_CP4_DISABLED: u32 = 36;
pub const EXCCAUSE_CP5_DISABLED: u32 = 37;
pub const EXCCAUSE_CP6_DISABLED: u32 = 38;
pub const EXCCAUSE_CP7_DISABLED: u32 = 39;
pub const PS_WOE_SHIFT: u32 = 18;
pub const PS_WOE_MASK: u32 = 262144;
pub const PS_WOE: u32 = 262144;
pub const PS_CALLINC_SHIFT: u32 = 16;
pub const PS_CALLINC_MASK: u32 = 196608;
pub const PS_OWB_SHIFT: u32 = 8;
pub const PS_OWB_MASK: u32 = 3840;
pub const PS_RING_SHIFT: u32 = 6;
pub const PS_RING_MASK: u32 = 192;
pub const PS_UM_SHIFT: u32 = 5;
pub const PS_UM_MASK: u32 = 32;
pub const PS_UM: u32 = 32;
pub const PS_EXCM_SHIFT: u32 = 4;
pub const PS_EXCM_MASK: u32 = 16;
pub const PS_EXCM: u32 = 16;
pub const PS_INTLEVEL_SHIFT: u32 = 0;
pub const PS_INTLEVEL_MASK: u32 = 15;
pub const PS_WOE_ABI: u32 = 262144;
pub const PS_PROGSTACK_SHIFT: u32 = 5;
pub const PS_PROGSTACK_MASK: u32 = 32;
pub const PS_PROG_SHIFT: u32 = 5;
pub const PS_PROG_MASK: u32 = 32;
pub const PS_PROG: u32 = 32;
pub const DBREAKC_MASK_SHIFT: u32 = 0;
pub const DBREAKC_MASK_MASK: u32 = 63;
pub const DBREAKC_LOADBREAK_SHIFT: u32 = 30;
pub const DBREAKC_LOADBREAK_MASK: u32 = 1073741824;
pub const DBREAKC_STOREBREAK_SHIFT: u32 = 31;
pub const DBREAKC_STOREBREAK_MASK: u32 = 2147483648;
pub const DEBUGCAUSE_DEBUGINT_SHIFT: u32 = 5;
pub const DEBUGCAUSE_DEBUGINT_MASK: u32 = 32;
pub const DEBUGCAUSE_BREAKN_SHIFT: u32 = 4;
pub const DEBUGCAUSE_BREAKN_MASK: u32 = 16;
pub const DEBUGCAUSE_BREAK_SHIFT: u32 = 3;
pub const DEBUGCAUSE_BREAK_MASK: u32 = 8;
pub const DEBUGCAUSE_DBREAK_SHIFT: u32 = 2;
pub const DEBUGCAUSE_DBREAK_MASK: u32 = 4;
pub const DEBUGCAUSE_IBREAK_SHIFT: u32 = 1;
pub const DEBUGCAUSE_IBREAK_MASK: u32 = 2;
pub const DEBUGCAUSE_ICOUNT_SHIFT: u32 = 0;
pub const DEBUGCAUSE_ICOUNT_MASK: u32 = 1;
pub const MESR_MEME: u32 = 1;
pub const MESR_MEME_SHIFT: u32 = 0;
pub const MESR_DME: u32 = 2;
pub const MESR_DME_SHIFT: u32 = 1;
pub const MESR_RCE: u32 = 16;
pub const MESR_RCE_SHIFT: u32 = 4;
pub const MESR_ERRENAB: u32 = 256;
pub const MESR_ERRENAB_SHIFT: u32 = 8;
pub const MESR_ERRTEST: u32 = 512;
pub const MESR_ERRTEST_SHIFT: u32 = 9;
pub const MESR_DATEXC: u32 = 1024;
pub const MESR_DATEXC_SHIFT: u32 = 10;
pub const MESR_INSEXC: u32 = 2048;
pub const MESR_INSEXC_SHIFT: u32 = 11;
pub const MESR_WAYNUM_SHIFT: u32 = 16;
pub const MESR_ACCTYPE_SHIFT: u32 = 20;
pub const MESR_MEMTYPE_SHIFT: u32 = 24;
pub const MESR_ERRTYPE_SHIFT: u32 = 30;
pub const MEMCTL_SNOOP_EN_SHIFT: u32 = 1;
pub const MEMCTL_SNOOP_EN: u32 = 2;
pub const MEMCTL_L0IBUF_EN_SHIFT: u32 = 0;
pub const MEMCTL_L0IBUF_EN: u32 = 1;
pub const MEMCTL_INV_EN_SHIFT: u32 = 23;
pub const MEMCTL_INV_EN: u32 = 8388608;
pub const MEMCTL_DCWU_SHIFT: u32 = 8;
pub const MEMCTL_DCWU_BITS: u32 = 5;
pub const MEMCTL_DCWA_SHIFT: u32 = 13;
pub const MEMCTL_DCWA_BITS: u32 = 5;
pub const MEMCTL_ICWU_SHIFT: u32 = 18;
pub const MEMCTL_ICWU_BITS: u32 = 5;
pub const MEMCTL_DCWU_MASK: u32 = 7936;
pub const MEMCTL_DCWA_MASK: u32 = 253952;
pub const MEMCTL_ICWU_MASK: u32 = 8126464;
pub const MEMCTL_DCWU_CLR_MASK: i32 = -7937;
pub const MEMCTL_DCWA_CLR_MASK: i32 = -253953;
pub const MEMCTL_ICWU_CLR_MASK: i32 = -8126465;
pub const MEMCTL_DCW_CLR_MASK: i32 = -1;
pub const MEMCTL_IDCW_CLR_MASK: i32 = -1;
pub const XSHAL_USE_ABSOLUTE_LITERALS: u32 = 0;
pub const XSHAL_HAVE_TEXT_SECTION_LITERALS: u32 = 1;
pub const XTHAL_ABI_WINDOWED: u32 = 0;
pub const XTHAL_ABI_CALL0: u32 = 1;
pub const XTHAL_CLIB_NEWLIB: u32 = 0;
pub const XTHAL_CLIB_UCLIBC: u32 = 1;
pub const XTHAL_CLIB_XCLIB: u32 = 2;
pub const XSHAL_USE_FLOATING_POINT: u32 = 1;
pub const XSHAL_FLOATING_POINT_ABI: u32 = 0;
pub const XSHAL_IOBLOCK_CACHED_VADDR: u32 = 1879048192;
pub const XSHAL_IOBLOCK_CACHED_PADDR: u32 = 1879048192;
pub const XSHAL_IOBLOCK_CACHED_SIZE: u32 = 234881024;
pub const XSHAL_IOBLOCK_BYPASS_VADDR: u32 = 2415919104;
pub const XSHAL_IOBLOCK_BYPASS_PADDR: u32 = 2415919104;
pub const XSHAL_IOBLOCK_BYPASS_SIZE: u32 = 234881024;
pub const XSHAL_ROM_VADDR: u32 = 1342177280;
pub const XSHAL_ROM_PADDR: u32 = 1342177280;
pub const XSHAL_ROM_SIZE: u32 = 16777216;
pub const XSHAL_ROM_AVAIL_VADDR: u32 = 1342177280;
pub const XSHAL_ROM_AVAIL_VSIZE: u32 = 16777216;
pub const XSHAL_RAM_VADDR: u32 = 1610612736;
pub const XSHAL_RAM_PADDR: u32 = 1610612736;
pub const XSHAL_RAM_VSIZE: u32 = 536870912;
pub const XSHAL_RAM_PSIZE: u32 = 536870912;
pub const XSHAL_RAM_SIZE: u32 = 536870912;
pub const XSHAL_RAM_AVAIL_VADDR: u32 = 1610612736;
pub const XSHAL_RAM_AVAIL_VSIZE: u32 = 536870912;
pub const XSHAL_RAM_BYPASS_VADDR: u32 = 2684354560;
pub const XSHAL_RAM_BYPASS_PADDR: u32 = 2684354560;
pub const XSHAL_RAM_BYPASS_PSIZE: u32 = 536870912;
pub const XSHAL_SIMIO_CACHED_VADDR: u32 = 3221225472;
pub const XSHAL_SIMIO_BYPASS_VADDR: u32 = 3221225472;
pub const XSHAL_SIMIO_PADDR: u32 = 3221225472;
pub const XSHAL_SIMIO_SIZE: u32 = 536870912;
pub const XSHAL_MAGIC_EXIT: u32 = 0;
pub const XSHAL_ALLVALID_CACHEATTR_WRITEBACK: u32 = 572657938;
pub const XSHAL_ALLVALID_CACHEATTR_WRITEALLOC: u32 = 572657938;
pub const XSHAL_ALLVALID_CACHEATTR_WRITETHRU: u32 = 572657938;
pub const XSHAL_ALLVALID_CACHEATTR_BYPASS: u32 = 572662306;
pub const XSHAL_ALLVALID_CACHEATTR_DEFAULT: u32 = 572657938;
pub const XSHAL_STRICT_CACHEATTR_WRITEBACK: u32 = 4294906143;
pub const XSHAL_STRICT_CACHEATTR_WRITEALLOC: u32 = 4294906143;
pub const XSHAL_STRICT_CACHEATTR_WRITETHRU: u32 = 4294906143;
pub const XSHAL_STRICT_CACHEATTR_BYPASS: u32 = 4294910511;
pub const XSHAL_STRICT_CACHEATTR_DEFAULT: u32 = 4294906143;
pub const XSHAL_TRAPNULL_CACHEATTR_WRITEBACK: u32 = 572657951;
pub const XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC: u32 = 572657951;
pub const XSHAL_TRAPNULL_CACHEATTR_WRITETHRU: u32 = 572657951;
pub const XSHAL_TRAPNULL_CACHEATTR_BYPASS: u32 = 572662319;
pub const XSHAL_TRAPNULL_CACHEATTR_DEFAULT: u32 = 572657951;
pub const XSHAL_ISS_CACHEATTR_WRITEBACK: u32 = 572657951;
pub const XSHAL_ISS_CACHEATTR_WRITEALLOC: u32 = 572657951;
pub const XSHAL_ISS_CACHEATTR_WRITETHRU: u32 = 572657951;
pub const XSHAL_ISS_CACHEATTR_BYPASS: u32 = 572662319;
pub const XSHAL_ISS_CACHEATTR_DEFAULT: u32 = 572657951;
pub const XSHAL_ISS_PIPE_REGIONS: u32 = 0;
pub const XSHAL_ISS_SDRAM_REGIONS: u32 = 0;
pub const XSHAL_XT2000_CACHEATTR_WRITEBACK: u32 = 4280422687;
pub const XSHAL_XT2000_CACHEATTR_WRITEALLOC: u32 = 4280422687;
pub const XSHAL_XT2000_CACHEATTR_WRITETHRU: u32 = 4280422687;
pub const XSHAL_XT2000_CACHEATTR_BYPASS: u32 = 4280427055;
pub const XSHAL_XT2000_CACHEATTR_DEFAULT: u32 = 4280422687;
pub const XSHAL_XT2000_PIPE_REGIONS: u32 = 0;
pub const XSHAL_XT2000_SDRAM_REGIONS: u32 = 1088;
pub const XSHAL_VECTORS_PACKED: u32 = 0;
pub const XSHAL_STATIC_VECTOR_SELECT: u32 = 1;
pub const XSHAL_RESET_VECTOR_VADDR: u32 = 1073742848;
pub const XSHAL_RESET_VECTOR_PADDR: u32 = 1073742848;
pub const XSHAL_RESET_VECTOR_SIZE: u32 = 768;
pub const XSHAL_RESET_VECTOR_ISROM: u32 = 0;
pub const XSHAL_USER_VECTOR_SIZE: u32 = 56;
pub const XSHAL_USER_VECTOR_ISROM: u32 = 0;
pub const XSHAL_PROGRAMEXC_VECTOR_SIZE: u32 = 56;
pub const XSHAL_USEREXC_VECTOR_SIZE: u32 = 56;
pub const XSHAL_KERNEL_VECTOR_SIZE: u32 = 56;
pub const XSHAL_KERNEL_VECTOR_ISROM: u32 = 0;
pub const XSHAL_STACKEDEXC_VECTOR_SIZE: u32 = 56;
pub const XSHAL_KERNELEXC_VECTOR_SIZE: u32 = 56;
pub const XSHAL_DOUBLEEXC_VECTOR_SIZE: u32 = 64;
pub const XSHAL_DOUBLEEXC_VECTOR_ISROM: u32 = 0;
pub const XSHAL_WINDOW_VECTORS_SIZE: u32 = 376;
pub const XSHAL_WINDOW_VECTORS_ISROM: u32 = 0;
pub const XSHAL_INTLEVEL2_VECTOR_SIZE: u32 = 56;
pub const XSHAL_INTLEVEL2_VECTOR_ISROM: u32 = 0;
pub const XSHAL_INTLEVEL3_VECTOR_SIZE: u32 = 56;
pub const XSHAL_INTLEVEL3_VECTOR_ISROM: u32 = 0;
pub const XSHAL_INTLEVEL4_VECTOR_SIZE: u32 = 56;
pub const XSHAL_INTLEVEL4_VECTOR_ISROM: u32 = 0;
pub const XSHAL_INTLEVEL5_VECTOR_SIZE: u32 = 56;
pub const XSHAL_INTLEVEL5_VECTOR_ISROM: u32 = 0;
pub const XSHAL_INTLEVEL6_VECTOR_SIZE: u32 = 56;
pub const XSHAL_INTLEVEL6_VECTOR_ISROM: u32 = 0;
pub const XSHAL_DEBUG_VECTOR_SIZE: u32 = 56;
pub const XSHAL_DEBUG_VECTOR_ISROM: u32 = 0;
pub const XSHAL_NMI_VECTOR_SIZE: u32 = 56;
pub const XSHAL_NMI_VECTOR_ISROM: u32 = 0;
pub const XSHAL_INTLEVEL7_VECTOR_SIZE: u32 = 56;
pub const XTENSA_HWVERSION_T1020_0: u32 = 102000;
pub const XTENSA_HWCIDSCHEME_T1020_0: u32 = 10;
pub const XTENSA_HWCIDVERS_T1020_0: u32 = 2;
pub const XTENSA_HWVERSION_T1020_1: u32 = 102001;
pub const XTENSA_HWCIDSCHEME_T1020_1: u32 = 10;
pub const XTENSA_HWCIDVERS_T1020_1: u32 = 3;
pub const XTENSA_HWVERSION_T1020_2: u32 = 102002;
pub const XTENSA_HWCIDSCHEME_T1020_2: u32 = 10;
pub const XTENSA_HWCIDVERS_T1020_2: u32 = 4;
pub const XTENSA_HWVERSION_T1020_2B: u32 = 102002;
pub const XTENSA_HWCIDSCHEME_T1020_2B: u32 = 10;
pub const XTENSA_HWCIDVERS_T1020_2B: u32 = 5;
pub const XTENSA_HWVERSION_T1020_3: u32 = 102003;
pub const XTENSA_HWCIDSCHEME_T1020_3: u32 = 10;
pub const XTENSA_HWCIDVERS_T1020_3: u32 = 6;
pub const XTENSA_HWVERSION_T1020_4: u32 = 102004;
pub const XTENSA_HWCIDSCHEME_T1020_4: u32 = 10;
pub const XTENSA_HWCIDVERS_T1020_4: u32 = 7;
pub const XTENSA_HWVERSION_T1030_0: u32 = 103000;
pub const XTENSA_HWCIDSCHEME_T1030_0: u32 = 10;
pub const XTENSA_HWCIDVERS_T1030_0: u32 = 9;
pub const XTENSA_HWVERSION_T1030_1: u32 = 103001;
pub const XTENSA_HWCIDSCHEME_T1030_1: u32 = 10;
pub const XTENSA_HWCIDVERS_T1030_1: u32 = 10;
pub const XTENSA_HWVERSION_T1030_2: u32 = 103002;
pub const XTENSA_HWCIDSCHEME_T1030_2: u32 = 10;
pub const XTENSA_HWCIDVERS_T1030_2: u32 = 11;
pub const XTENSA_HWVERSION_T1030_3: u32 = 103003;
pub const XTENSA_HWCIDSCHEME_T1030_3: u32 = 10;
pub const XTENSA_HWCIDVERS_T1030_3: u32 = 12;
pub const XTENSA_HWVERSION_T1040_0: u32 = 104000;
pub const XTENSA_HWCIDSCHEME_T1040_0: u32 = 10;
pub const XTENSA_HWCIDVERS_T1040_0: u32 = 15;
pub const XTENSA_HWVERSION_T1040_1: u32 = 104001;
pub const XTENSA_HWCIDSCHEME_T1040_1: u32 = 1;
pub const XTENSA_HWCIDVERS_T1040_1: u32 = 32;
pub const XTENSA_HWVERSION_T1040_1P: u32 = 104001;
pub const XTENSA_HWCIDSCHEME_T1040_1P: u32 = 10;
pub const XTENSA_HWCIDVERS_T1040_1P: u32 = 16;
pub const XTENSA_HWVERSION_T1040_2: u32 = 104002;
pub const XTENSA_HWCIDSCHEME_T1040_2: u32 = 1;
pub const XTENSA_HWCIDVERS_T1040_2: u32 = 33;
pub const XTENSA_HWVERSION_T1040_3: u32 = 104003;
pub const XTENSA_HWCIDSCHEME_T1040_3: u32 = 1;
pub const XTENSA_HWCIDVERS_T1040_3: u32 = 34;
pub const XTENSA_HWVERSION_T1050_0: u32 = 105000;
pub const XTENSA_HWCIDSCHEME_T1050_0: u32 = 1100;
pub const XTENSA_HWCIDVERS_T1050_0: u32 = 1;
pub const XTENSA_HWVERSION_T1050_1: u32 = 105001;
pub const XTENSA_HWCIDSCHEME_T1050_1: u32 = 1100;
pub const XTENSA_HWCIDVERS_T1050_1: u32 = 2;
pub const XTENSA_HWVERSION_T1050_2: u32 = 105002;
pub const XTENSA_HWCIDSCHEME_T1050_2: u32 = 1100;
pub const XTENSA_HWCIDVERS_T1050_2: u32 = 4;
pub const XTENSA_HWVERSION_T1050_3: u32 = 105003;
pub const XTENSA_HWCIDSCHEME_T1050_3: u32 = 1100;
pub const XTENSA_HWCIDVERS_T1050_3: u32 = 6;
pub const XTENSA_HWVERSION_T1050_4: u32 = 105004;
pub const XTENSA_HWCIDSCHEME_T1050_4: u32 = 1100;
pub const XTENSA_HWCIDVERS_T1050_4: u32 = 7;
pub const XTENSA_HWVERSION_T1050_5: u32 = 105005;
pub const XTENSA_HWCIDSCHEME_T1050_5: u32 = 1100;
pub const XTENSA_HWCIDVERS_T1050_5: u32 = 8;
pub const XTENSA_HWVERSION_RA_2004_1: u32 = 210000;
pub const XTENSA_HWCIDSCHEME_RA_2004_1: u32 = 1100;
pub const XTENSA_HWCIDVERS_RA_2004_1: u32 = 3;
pub const XTENSA_HWVERSION_RA_2005_1: u32 = 210001;
pub const XTENSA_HWCIDSCHEME_RA_2005_1: u32 = 1100;
pub const XTENSA_HWCIDVERS_RA_2005_1: u32 = 20;
pub const XTENSA_HWVERSION_RA_2005_2: u32 = 210002;
pub const XTENSA_HWCIDSCHEME_RA_2005_2: u32 = 1100;
pub const XTENSA_HWCIDVERS_RA_2005_2: u32 = 21;
pub const XTENSA_HWVERSION_RA_2005_3: u32 = 210003;
pub const XTENSA_HWCIDSCHEME_RA_2005_3: u32 = 1100;
pub const XTENSA_HWCIDVERS_RA_2005_3: u32 = 22;
pub const XTENSA_HWVERSION_RA_2006_4: u32 = 210004;
pub const XTENSA_HWCIDSCHEME_RA_2006_4: u32 = 1100;
pub const XTENSA_HWCIDVERS_RA_2006_4: u32 = 23;
pub const XTENSA_HWVERSION_RA_2006_5: u32 = 210005;
pub const XTENSA_HWCIDSCHEME_RA_2006_5: u32 = 1100;
pub const XTENSA_HWCIDVERS_RA_2006_5: u32 = 24;
pub const XTENSA_HWVERSION_RA_2006_6: u32 = 210006;
pub const XTENSA_HWCIDSCHEME_RA_2006_6: u32 = 1100;
pub const XTENSA_HWCIDVERS_RA_2006_6: u32 = 25;
pub const XTENSA_HWVERSION_RA_2007_7: u32 = 210007;
pub const XTENSA_HWCIDSCHEME_RA_2007_7: u32 = 1100;
pub const XTENSA_HWCIDVERS_RA_2007_7: u32 = 26;
pub const XTENSA_HWVERSION_RA_2008_8: u32 = 210008;
pub const XTENSA_HWCIDSCHEME_RA_2008_8: u32 = 1100;
pub const XTENSA_HWCIDVERS_RA_2008_8: u32 = 27;
pub const XTENSA_HWVERSION_RB_2006_0: u32 = 220000;
pub const XTENSA_HWCIDSCHEME_RB_2006_0: u32 = 1100;
pub const XTENSA_HWCIDVERS_RB_2006_0: u32 = 48;
pub const XTENSA_HWVERSION_RB_2007_1: u32 = 220001;
pub const XTENSA_HWCIDSCHEME_RB_2007_1: u32 = 1100;
pub const XTENSA_HWCIDVERS_RB_2007_1: u32 = 49;
pub const XTENSA_HWVERSION_RB_2007_2: u32 = 221000;
pub const XTENSA_HWCIDSCHEME_RB_2007_2: u32 = 1100;
pub const XTENSA_HWCIDVERS_RB_2007_2: u32 = 52;
pub const XTENSA_HWVERSION_RB_2008_3: u32 = 221001;
pub const XTENSA_HWCIDSCHEME_RB_2008_3: u32 = 1100;
pub const XTENSA_HWCIDVERS_RB_2008_3: u32 = 53;
pub const XTENSA_HWVERSION_RB_2008_4: u32 = 221002;
pub const XTENSA_HWCIDSCHEME_RB_2008_4: u32 = 1100;
pub const XTENSA_HWCIDVERS_RB_2008_4: u32 = 54;
pub const XTENSA_HWVERSION_RB_2009_5: u32 = 221003;
pub const XTENSA_HWCIDSCHEME_RB_2009_5: u32 = 1100;
pub const XTENSA_HWCIDVERS_RB_2009_5: u32 = 55;
pub const XTENSA_HWVERSION_RB_2007_2_MP: u32 = 221100;
pub const XTENSA_HWCIDSCHEME_RB_2007_2_MP: u32 = 1100;
pub const XTENSA_HWCIDVERS_RB_2007_2_MP: u32 = 64;
pub const XTENSA_HWVERSION_RC_2009_0: u32 = 230000;
pub const XTENSA_HWCIDSCHEME_RC_2009_0: u32 = 1100;
pub const XTENSA_HWCIDVERS_RC_2009_0: u32 = 65;
pub const XTENSA_HWVERSION_RC_2010_1: u32 = 230001;
pub const XTENSA_HWCIDSCHEME_RC_2010_1: u32 = 1100;
pub const XTENSA_HWCIDVERS_RC_2010_1: u32 = 66;
pub const XTENSA_HWVERSION_RC_2010_2: u32 = 230002;
pub const XTENSA_HWCIDSCHEME_RC_2010_2: u32 = 1100;
pub const XTENSA_HWCIDVERS_RC_2010_2: u32 = 67;
pub const XTENSA_HWVERSION_RC_2011_3: u32 = 230003;
pub const XTENSA_HWCIDSCHEME_RC_2011_3: u32 = 1100;
pub const XTENSA_HWCIDVERS_RC_2011_3: u32 = 68;
pub const XTENSA_HWVERSION_RD_2010_0: u32 = 240000;
pub const XTENSA_HWCIDSCHEME_RD_2010_0: u32 = 1100;
pub const XTENSA_HWCIDVERS_RD_2010_0: u32 = 80;
pub const XTENSA_HWVERSION_RD_2011_1: u32 = 240001;
pub const XTENSA_HWCIDSCHEME_RD_2011_1: u32 = 1100;
pub const XTENSA_HWCIDVERS_RD_2011_1: u32 = 81;
pub const XTENSA_HWVERSION_RD_2011_2: u32 = 240002;
pub const XTENSA_HWCIDSCHEME_RD_2011_2: u32 = 1100;
pub const XTENSA_HWCIDVERS_RD_2011_2: u32 = 82;
pub const XTENSA_HWVERSION_RD_2011_3: u32 = 240003;
pub const XTENSA_HWCIDSCHEME_RD_2011_3: u32 = 1100;
pub const XTENSA_HWCIDVERS_RD_2011_3: u32 = 83;
pub const XTENSA_HWVERSION_RD_2012_4: u32 = 240004;
pub const XTENSA_HWCIDSCHEME_RD_2012_4: u32 = 1100;
pub const XTENSA_HWCIDVERS_RD_2012_4: u32 = 84;
pub const XTENSA_HWVERSION_RD_2012_5: u32 = 240005;
pub const XTENSA_HWCIDSCHEME_RD_2012_5: u32 = 1100;
pub const XTENSA_HWCIDVERS_RD_2012_5: u32 = 85;
pub const XTENSA_HWVERSION_RE_2012_0: u32 = 250000;
pub const XTENSA_HWCIDSCHEME_RE_2012_0: u32 = 1100;
pub const XTENSA_HWCIDVERS_RE_2012_0: u32 = 96;
pub const XTENSA_HWVERSION_RE_2012_1: u32 = 250001;
pub const XTENSA_HWCIDSCHEME_RE_2012_1: u32 = 1100;
pub const XTENSA_HWCIDVERS_RE_2012_1: u32 = 97;
pub const XTENSA_HWVERSION_RE_2013_2: u32 = 250002;
pub const XTENSA_HWCIDSCHEME_RE_2013_2: u32 = 1100;
pub const XTENSA_HWCIDVERS_RE_2013_2: u32 = 98;
pub const XTENSA_HWVERSION_RE_2013_3: u32 = 250003;
pub const XTENSA_HWCIDSCHEME_RE_2013_3: u32 = 1100;
pub const XTENSA_HWCIDVERS_RE_2013_3: u32 = 99;
pub const XTENSA_HWVERSION_RE_2013_4: u32 = 250004;
pub const XTENSA_HWCIDSCHEME_RE_2013_4: u32 = 1100;
pub const XTENSA_HWCIDVERS_RE_2013_4: u32 = 100;
pub const XTENSA_HWVERSION_RE_2014_5: u32 = 250005;
pub const XTENSA_HWCIDSCHEME_RE_2014_5: u32 = 1100;
pub const XTENSA_HWCIDVERS_RE_2014_5: u32 = 101;
pub const XTENSA_HWVERSION_RE_2015_6: u32 = 250006;
pub const XTENSA_HWCIDSCHEME_RE_2015_6: u32 = 1100;
pub const XTENSA_HWCIDVERS_RE_2015_6: u32 = 102;
pub const XTENSA_HWVERSION_RF_2014_0: u32 = 260000;
pub const XTENSA_HWCIDSCHEME_RF_2014_0: u32 = 1100;
pub const XTENSA_HWCIDVERS_RF_2014_0: u32 = 112;
pub const XTENSA_HWVERSION_RF_2014_1: u32 = 260001;
pub const XTENSA_HWCIDSCHEME_RF_2014_1: u32 = 1100;
pub const XTENSA_HWCIDVERS_RF_2014_1: u32 = 113;
pub const XTENSA_HWVERSION_RF_2015_2: u32 = 260002;
pub const XTENSA_HWCIDSCHEME_RF_2015_2: u32 = 1100;
pub const XTENSA_HWCIDVERS_RF_2015_2: u32 = 114;
pub const XTENSA_HWVERSION_RF_2015_3: u32 = 260003;
pub const XTENSA_HWCIDSCHEME_RF_2015_3: u32 = 1100;
pub const XTENSA_HWCIDVERS_RF_2015_3: u32 = 115;
pub const XTENSA_HWVERSION_RF_2016_4: u32 = 260004;
pub const XTENSA_HWCIDSCHEME_RF_2016_4: u32 = 1100;
pub const XTENSA_HWCIDVERS_RF_2016_4: u32 = 116;
pub const XTENSA_HWVERSION_RG_2015_0: u32 = 270000;
pub const XTENSA_HWCIDSCHEME_RG_2015_0: u32 = 1100;
pub const XTENSA_HWCIDVERS_RG_2015_0: u32 = 128;
pub const XTENSA_HWVERSION_RG_2015_1: u32 = 270001;
pub const XTENSA_HWCIDSCHEME_RG_2015_1: u32 = 1100;
pub const XTENSA_HWCIDVERS_RG_2015_1: u32 = 129;
pub const XTENSA_HWVERSION_RG_2015_2: u32 = 270002;
pub const XTENSA_HWCIDSCHEME_RG_2015_2: u32 = 1100;
pub const XTENSA_HWCIDVERS_RG_2015_2: u32 = 130;
pub const XTENSA_HWVERSION_RG_2016_3: u32 = 270003;
pub const XTENSA_HWCIDSCHEME_RG_2016_3: u32 = 1100;
pub const XTENSA_HWCIDVERS_RG_2016_3: u32 = 131;
pub const XTENSA_HWVERSION_RG_2016_4: u32 = 270004;
pub const XTENSA_HWCIDSCHEME_RG_2016_4: u32 = 1100;
pub const XTENSA_HWCIDVERS_RG_2016_4: u32 = 132;
pub const XTENSA_HWVERSION_RG_2017_5: u32 = 270005;
pub const XTENSA_HWCIDSCHEME_RG_2017_5: u32 = 1100;
pub const XTENSA_HWCIDVERS_RG_2017_5: u32 = 133;
pub const XTENSA_HWVERSION_RG_2017_6: u32 = 270006;
pub const XTENSA_HWCIDSCHEME_RG_2017_6: u32 = 1100;
pub const XTENSA_HWCIDVERS_RG_2017_6: u32 = 134;
pub const XTENSA_HWVERSION_RG_2017_7: u32 = 270007;
pub const XTENSA_HWCIDSCHEME_RG_2017_7: u32 = 1100;
pub const XTENSA_HWCIDVERS_RG_2017_7: u32 = 135;
pub const XTENSA_HWVERSION_RG_2017_8: u32 = 270008;
pub const XTENSA_HWCIDSCHEME_RG_2017_8: u32 = 1100;
pub const XTENSA_HWCIDVERS_RG_2017_8: u32 = 136;
pub const XTENSA_HWVERSION_RG_2018_9: u32 = 270009;
pub const XTENSA_HWCIDSCHEME_RG_2018_9: u32 = 1100;
pub const XTENSA_HWCIDVERS_RG_2018_9: u32 = 137;
pub const XTENSA_HWVERSION_RH_2016_0: u32 = 280000;
pub const XTENSA_HWCIDSCHEME_RH_2016_0: u32 = 1100;
pub const XTENSA_HWCIDVERS_RH_2016_0: u32 = 144;
pub const XTENSA_SWVERSION_T1020_0: u32 = 102000;
pub const XTENSA_SWVERSION_T1020_1: u32 = 102001;
pub const XTENSA_SWVERSION_T1020_2: u32 = 102002;
pub const XTENSA_SWVERSION_T1020_2B: u32 = 102002;
pub const XTENSA_SWVERSION_T1020_3: u32 = 102003;
pub const XTENSA_SWVERSION_T1020_4: u32 = 102004;
pub const XTENSA_SWVERSION_T1030_0: u32 = 103000;
pub const XTENSA_SWVERSION_T1030_1: u32 = 103001;
pub const XTENSA_SWVERSION_T1030_2: u32 = 103002;
pub const XTENSA_SWVERSION_T1030_3: u32 = 103003;
pub const XTENSA_SWVERSION_T1040_0: u32 = 104000;
pub const XTENSA_SWVERSION_T1040_1: u32 = 104001;
pub const XTENSA_SWVERSION_T1040_1P: u32 = 104001;
pub const XTENSA_SWVERSION_T1040_2: u32 = 104002;
pub const XTENSA_SWVERSION_T1040_3: u32 = 104003;
pub const XTENSA_SWVERSION_T1050_0: u32 = 105000;
pub const XTENSA_SWVERSION_T1050_1: u32 = 105001;
pub const XTENSA_SWVERSION_T1050_2: u32 = 105002;
pub const XTENSA_SWVERSION_T1050_3: u32 = 105003;
pub const XTENSA_SWVERSION_T1050_4: u32 = 105004;
pub const XTENSA_SWVERSION_T1050_5: u32 = 105005;
pub const XTENSA_SWVERSION_RA_2004_1: u32 = 600000;
pub const XTENSA_SWVERSION_RA_2005_1: u32 = 600001;
pub const XTENSA_SWVERSION_RA_2005_2: u32 = 600002;
pub const XTENSA_SWVERSION_RA_2005_3: u32 = 600003;
pub const XTENSA_SWVERSION_RA_2006_4: u32 = 600004;
pub const XTENSA_SWVERSION_RA_2006_5: u32 = 600005;
pub const XTENSA_SWVERSION_RA_2006_6: u32 = 600006;
pub const XTENSA_SWVERSION_RA_2007_7: u32 = 600007;
pub const XTENSA_SWVERSION_RA_2008_8: u32 = 600008;
pub const XTENSA_SWVERSION_RB_2006_0: u32 = 700000;
pub const XTENSA_SWVERSION_RB_2007_1: u32 = 700001;
pub const XTENSA_SWVERSION_RB_2007_2: u32 = 701000;
pub const XTENSA_SWVERSION_RB_2008_3: u32 = 701001;
pub const XTENSA_SWVERSION_RB_2008_4: u32 = 701002;
pub const XTENSA_SWVERSION_RB_2009_5: u32 = 701003;
pub const XTENSA_SWVERSION_RB_2007_2_MP: u32 = 701100;
pub const XTENSA_SWVERSION_RC_2009_0: u32 = 800000;
pub const XTENSA_SWVERSION_RC_2010_1: u32 = 800001;
pub const XTENSA_SWVERSION_RC_2010_2: u32 = 800002;
pub const XTENSA_SWVERSION_RC_2011_3: u32 = 800003;
pub const XTENSA_SWVERSION_RD_2010_0: u32 = 900000;
pub const XTENSA_SWVERSION_RD_2011_1: u32 = 900001;
pub const XTENSA_SWVERSION_RD_2011_2: u32 = 900002;
pub const XTENSA_SWVERSION_RD_2011_3: u32 = 900003;
pub const XTENSA_SWVERSION_RD_2012_4: u32 = 900004;
pub const XTENSA_SWVERSION_RD_2012_5: u32 = 900005;
pub const XTENSA_SWVERSION_RE_2012_0: u32 = 1000000;
pub const XTENSA_SWVERSION_RE_2012_1: u32 = 1000001;
pub const XTENSA_SWVERSION_RE_2013_2: u32 = 1000002;
pub const XTENSA_SWVERSION_RE_2013_3: u32 = 1000003;
pub const XTENSA_SWVERSION_RE_2013_4: u32 = 1000004;
pub const XTENSA_SWVERSION_RE_2014_5: u32 = 1000005;
pub const XTENSA_SWVERSION_RE_2015_6: u32 = 1000006;
pub const XTENSA_SWVERSION_RF_2014_0: u32 = 1100000;
pub const XTENSA_SWVERSION_RF_2014_1: u32 = 1100001;
pub const XTENSA_SWVERSION_RF_2015_2: u32 = 1100002;
pub const XTENSA_SWVERSION_RF_2015_3: u32 = 1100003;
pub const XTENSA_SWVERSION_RF_2016_4: u32 = 1100004;
pub const XTENSA_SWVERSION_RG_2015_0: u32 = 1200000;
pub const XTENSA_SWVERSION_RG_2015_1: u32 = 1200001;
pub const XTENSA_SWVERSION_RG_2015_2: u32 = 1200002;
pub const XTENSA_SWVERSION_RG_2016_3: u32 = 1200003;
pub const XTENSA_SWVERSION_RG_2016_4: u32 = 1200004;
pub const XTENSA_SWVERSION_RG_2017_5: u32 = 1200005;
pub const XTENSA_SWVERSION_RG_2017_6: u32 = 1200006;
pub const XTENSA_SWVERSION_RG_2017_7: u32 = 1200007;
pub const XTENSA_SWVERSION_RG_2017_8: u32 = 1200008;
pub const XTENSA_SWVERSION_RG_2018_9: u32 = 1200009;
pub const XTENSA_SWVERSION_RH_2016_0: u32 = 1300000;
pub const XTENSA_SWVERSION_T1040_1_PREHOTFIX: u32 = 104001;
pub const XTENSA_SWVERSION_6_0_0: u32 = 600000;
pub const XTENSA_SWVERSION_6_0_1: u32 = 600001;
pub const XTENSA_SWVERSION_6_0_2: u32 = 600002;
pub const XTENSA_SWVERSION_6_0_3: u32 = 600003;
pub const XTENSA_SWVERSION_6_0_4: u32 = 600004;
pub const XTENSA_SWVERSION_6_0_5: u32 = 600005;
pub const XTENSA_SWVERSION_6_0_6: u32 = 600006;
pub const XTENSA_SWVERSION_6_0_7: u32 = 600007;
pub const XTENSA_SWVERSION_6_0_8: u32 = 600008;
pub const XTENSA_SWVERSION_7_0_0: u32 = 700000;
pub const XTENSA_SWVERSION_7_0_1: u32 = 700001;
pub const XTENSA_SWVERSION_7_1_0: u32 = 701000;
pub const XTENSA_SWVERSION_7_1_1: u32 = 701001;
pub const XTENSA_SWVERSION_7_1_2: u32 = 701002;
pub const XTENSA_SWVERSION_7_1_3: u32 = 701003;
pub const XTENSA_SWVERSION_7_1_8_MP: u32 = 701100;
pub const XTENSA_SWVERSION_8_0_0: u32 = 800000;
pub const XTENSA_SWVERSION_8_0_1: u32 = 800001;
pub const XTENSA_SWVERSION_8_0_2: u32 = 800002;
pub const XTENSA_SWVERSION_8_0_3: u32 = 800003;
pub const XTENSA_SWVERSION_9_0_0: u32 = 900000;
pub const XTENSA_SWVERSION_9_0_1: u32 = 900001;
pub const XTENSA_SWVERSION_9_0_2: u32 = 900002;
pub const XTENSA_SWVERSION_9_0_3: u32 = 900003;
pub const XTENSA_SWVERSION_9_0_4: u32 = 900004;
pub const XTENSA_SWVERSION_9_0_5: u32 = 900005;
pub const XTENSA_SWVERSION_10_0_0: u32 = 1000000;
pub const XTENSA_SWVERSION_10_0_1: u32 = 1000001;
pub const XTENSA_SWVERSION_10_0_2: u32 = 1000002;
pub const XTENSA_SWVERSION_10_0_3: u32 = 1000003;
pub const XTENSA_SWVERSION_10_0_4: u32 = 1000004;
pub const XTENSA_SWVERSION_10_0_5: u32 = 1000005;
pub const XTENSA_SWVERSION_10_0_6: u32 = 1000006;
pub const XTENSA_SWVERSION_11_0_0: u32 = 1100000;
pub const XTENSA_SWVERSION_11_0_1: u32 = 1100001;
pub const XTENSA_SWVERSION_11_0_2: u32 = 1100002;
pub const XTENSA_SWVERSION_11_0_3: u32 = 1100003;
pub const XTENSA_SWVERSION_11_0_4: u32 = 1100004;
pub const XTENSA_SWVERSION_12_0_0: u32 = 1200000;
pub const XTENSA_SWVERSION_12_0_1: u32 = 1200001;
pub const XTENSA_SWVERSION_12_0_2: u32 = 1200002;
pub const XTENSA_SWVERSION_12_0_3: u32 = 1200003;
pub const XTENSA_SWVERSION_12_0_4: u32 = 1200004;
pub const XTENSA_SWVERSION_12_0_5: u32 = 1200005;
pub const XTENSA_SWVERSION_12_0_6: u32 = 1200006;
pub const XTENSA_SWVERSION_12_0_7: u32 = 1200007;
pub const XTENSA_SWVERSION_12_0_8: u32 = 1200008;
pub const XTENSA_SWVERSION_12_0_9: u32 = 1200009;
pub const XTENSA_SWVERSION_13_0_0: u32 = 1300000;
pub const XTENSA_RELEASE_NAME: &'static [u8; 10usize] = b"RG-2018.9\0";
pub const XTENSA_RELEASE_CANONICAL_NAME: &'static [u8; 10usize] = b"RG-2018.9\0";
pub const XTENSA_SWVERSION: u32 = 1200009;
pub const XTENSA_SWVERSION_NAME: &'static [u8; 7usize] = b"12.0.9\0";
pub const XTENSA_SWVERSION_CANONICAL_NAME: &'static [u8; 7usize] = b"12.0.9\0";
pub const XTENSA_SWVERSION_MAJORMID_NAME: &'static [u8; 5usize] = b"12.0\0";
pub const XTENSA_SWVERSION_MAJOR_NAME: &'static [u8; 3usize] = b"12\0";
pub const XTENSA_SWVERSION_LICENSE_NAME: &'static [u8; 5usize] = b"12.0\0";
pub const XCHAL_CA_BYPASS: u32 = 2;
pub const XCHAL_CA_BYPASSBUF: u32 = 6;
pub const XCHAL_CA_WRITETHRU: u32 = 2;
pub const XCHAL_CA_WRITEBACK: u32 = 2;
pub const XCHAL_HAVE_CA_WRITEBACK_NOALLOC: u32 = 0;
pub const XCHAL_CA_WRITEBACK_NOALLOC: u32 = 2;
pub const XCHAL_CA_BYPASS_RW: u32 = 0;
pub const XCHAL_CA_WRITETHRU_RW: u32 = 0;
pub const XCHAL_CA_WRITEBACK_RW: u32 = 0;
pub const XCHAL_CA_WRITEBACK_NOALLOC_RW: u32 = 0;
pub const XCHAL_CA_ILLEGAL: u32 = 15;
pub const XCHAL_CA_ISOLATE: u32 = 0;
pub const XCHAL_MMU_ASID_INVALID: u32 = 0;
pub const XCHAL_MMU_ASID_KERNEL: u32 = 0;
pub const XCHAL_MMU_SR_BITS: u32 = 0;
pub const XCHAL_MMU_CA_BITS: u32 = 4;
pub const XCHAL_MMU_MAX_PTE_PAGE_SIZE: u32 = 29;
pub const XCHAL_MMU_MIN_PTE_PAGE_SIZE: u32 = 29;
pub const XCHAL_ITLB_WAY_BITS: u32 = 0;
pub const XCHAL_ITLB_WAYS: u32 = 1;
pub const XCHAL_ITLB_ARF_WAYS: u32 = 0;
pub const XCHAL_ITLB_SETS: u32 = 1;
pub const XCHAL_ITLB_WAY0_SET: u32 = 0;
pub const XCHAL_ITLB_ARF_SETS: u32 = 0;
pub const XCHAL_ITLB_MINWIRED_SETS: u32 = 0;
pub const XCHAL_ITLB_SET0_WAY: u32 = 0;
pub const XCHAL_ITLB_SET0_WAYS: u32 = 1;
pub const XCHAL_ITLB_SET0_ENTRIES_LOG2: u32 = 3;
pub const XCHAL_ITLB_SET0_ENTRIES: u32 = 8;
pub const XCHAL_ITLB_SET0_ARF: u32 = 0;
pub const XCHAL_ITLB_SET0_PAGESIZES: u32 = 1;
pub const XCHAL_ITLB_SET0_PAGESZ_BITS: u32 = 0;
pub const XCHAL_ITLB_SET0_PAGESZ_LOG2_MIN: u32 = 29;
pub const XCHAL_ITLB_SET0_PAGESZ_LOG2_MAX: u32 = 29;
pub const XCHAL_ITLB_SET0_PAGESZ_LOG2_LIST: u32 = 29;
pub const XCHAL_ITLB_SET0_ASID_CONSTMASK: u32 = 0;
pub const XCHAL_ITLB_SET0_VPN_CONSTMASK: u32 = 0;
pub const XCHAL_ITLB_SET0_PPN_CONSTMASK: u32 = 3758096384;
pub const XCHAL_ITLB_SET0_CA_CONSTMASK: u32 = 0;
pub const XCHAL_ITLB_SET0_ASID_RESET: u32 = 0;
pub const XCHAL_ITLB_SET0_VPN_RESET: u32 = 0;
pub const XCHAL_ITLB_SET0_PPN_RESET: u32 = 0;
pub const XCHAL_ITLB_SET0_CA_RESET: u32 = 1;
pub const XCHAL_ITLB_SET0_E0_VPN_CONST: u32 = 0;
pub const XCHAL_ITLB_SET0_E1_VPN_CONST: u32 = 536870912;
pub const XCHAL_ITLB_SET0_E2_VPN_CONST: u32 = 1073741824;
pub const XCHAL_ITLB_SET0_E3_VPN_CONST: u32 = 1610612736;
pub const XCHAL_ITLB_SET0_E4_VPN_CONST: u32 = 2147483648;
pub const XCHAL_ITLB_SET0_E5_VPN_CONST: u32 = 2684354560;
pub const XCHAL_ITLB_SET0_E6_VPN_CONST: u32 = 3221225472;
pub const XCHAL_ITLB_SET0_E7_VPN_CONST: u32 = 3758096384;
pub const XCHAL_ITLB_SET0_E0_PPN_CONST: u32 = 0;
pub const XCHAL_ITLB_SET0_E1_PPN_CONST: u32 = 536870912;
pub const XCHAL_ITLB_SET0_E2_PPN_CONST: u32 = 1073741824;
pub const XCHAL_ITLB_SET0_E3_PPN_CONST: u32 = 1610612736;
pub const XCHAL_ITLB_SET0_E4_PPN_CONST: u32 = 2147483648;
pub const XCHAL_ITLB_SET0_E5_PPN_CONST: u32 = 2684354560;
pub const XCHAL_ITLB_SET0_E6_PPN_CONST: u32 = 3221225472;
pub const XCHAL_ITLB_SET0_E7_PPN_CONST: u32 = 3758096384;
pub const XCHAL_ITLB_SET0_E0_CA_RESET: u32 = 2;
pub const XCHAL_ITLB_SET0_E1_CA_RESET: u32 = 2;
pub const XCHAL_ITLB_SET0_E2_CA_RESET: u32 = 2;
pub const XCHAL_ITLB_SET0_E3_CA_RESET: u32 = 2;
pub const XCHAL_ITLB_SET0_E4_CA_RESET: u32 = 2;
pub const XCHAL_ITLB_SET0_E5_CA_RESET: u32 = 2;
pub const XCHAL_ITLB_SET0_E6_CA_RESET: u32 = 2;
pub const XCHAL_ITLB_SET0_E7_CA_RESET: u32 = 2;
pub const XCHAL_DTLB_WAY_BITS: u32 = 0;
pub const XCHAL_DTLB_WAYS: u32 = 1;
pub const XCHAL_DTLB_ARF_WAYS: u32 = 0;
pub const XCHAL_DTLB_SETS: u32 = 1;
pub const XCHAL_DTLB_WAY0_SET: u32 = 0;
pub const XCHAL_DTLB_ARF_SETS: u32 = 0;
pub const XCHAL_DTLB_MINWIRED_SETS: u32 = 0;
pub const XCHAL_DTLB_SET0_WAY: u32 = 0;
pub const XCHAL_DTLB_SET0_WAYS: u32 = 1;
pub const XCHAL_DTLB_SET0_ENTRIES_LOG2: u32 = 3;
pub const XCHAL_DTLB_SET0_ENTRIES: u32 = 8;
pub const XCHAL_DTLB_SET0_ARF: u32 = 0;
pub const XCHAL_DTLB_SET0_PAGESIZES: u32 = 1;
pub const XCHAL_DTLB_SET0_PAGESZ_BITS: u32 = 0;
pub const XCHAL_DTLB_SET0_PAGESZ_LOG2_MIN: u32 = 29;
pub const XCHAL_DTLB_SET0_PAGESZ_LOG2_MAX: u32 = 29;
pub const XCHAL_DTLB_SET0_PAGESZ_LOG2_LIST: u32 = 29;
pub const XCHAL_DTLB_SET0_ASID_CONSTMASK: u32 = 0;
pub const XCHAL_DTLB_SET0_VPN_CONSTMASK: u32 = 0;
pub const XCHAL_DTLB_SET0_PPN_CONSTMASK: u32 = 3758096384;
pub const XCHAL_DTLB_SET0_CA_CONSTMASK: u32 = 0;
pub const XCHAL_DTLB_SET0_ASID_RESET: u32 = 0;
pub const XCHAL_DTLB_SET0_VPN_RESET: u32 = 0;
pub const XCHAL_DTLB_SET0_PPN_RESET: u32 = 0;
pub const XCHAL_DTLB_SET0_CA_RESET: u32 = 1;
pub const XCHAL_DTLB_SET0_E0_VPN_CONST: u32 = 0;
pub const XCHAL_DTLB_SET0_E1_VPN_CONST: u32 = 536870912;
pub const XCHAL_DTLB_SET0_E2_VPN_CONST: u32 = 1073741824;
pub const XCHAL_DTLB_SET0_E3_VPN_CONST: u32 = 1610612736;
pub const XCHAL_DTLB_SET0_E4_VPN_CONST: u32 = 2147483648;
pub const XCHAL_DTLB_SET0_E5_VPN_CONST: u32 = 2684354560;
pub const XCHAL_DTLB_SET0_E6_VPN_CONST: u32 = 3221225472;
pub const XCHAL_DTLB_SET0_E7_VPN_CONST: u32 = 3758096384;
pub const XCHAL_DTLB_SET0_E0_PPN_CONST: u32 = 0;
pub const XCHAL_DTLB_SET0_E1_PPN_CONST: u32 = 536870912;
pub const XCHAL_DTLB_SET0_E2_PPN_CONST: u32 = 1073741824;
pub const XCHAL_DTLB_SET0_E3_PPN_CONST: u32 = 1610612736;
pub const XCHAL_DTLB_SET0_E4_PPN_CONST: u32 = 2147483648;
pub const XCHAL_DTLB_SET0_E5_PPN_CONST: u32 = 2684354560;
pub const XCHAL_DTLB_SET0_E6_PPN_CONST: u32 = 3221225472;
pub const XCHAL_DTLB_SET0_E7_PPN_CONST: u32 = 3758096384;
pub const XCHAL_DTLB_SET0_E0_CA_RESET: u32 = 2;
pub const XCHAL_DTLB_SET0_E1_CA_RESET: u32 = 2;
pub const XCHAL_DTLB_SET0_E2_CA_RESET: u32 = 2;
pub const XCHAL_DTLB_SET0_E3_CA_RESET: u32 = 2;
pub const XCHAL_DTLB_SET0_E4_CA_RESET: u32 = 2;
pub const XCHAL_DTLB_SET0_E5_CA_RESET: u32 = 2;
pub const XCHAL_DTLB_SET0_E6_CA_RESET: u32 = 2;
pub const XCHAL_DTLB_SET0_E7_CA_RESET: u32 = 2;
pub const XCHAL_HAVE_LE: u32 = 1;
pub const XCHAL_MEMORY_ORDER: u32 = 0;
pub const XCHAL_HAVE_HIGHLEVEL_INTERRUPTS: u32 = 1;
pub const XCHAL_NUM_LOWPRI_LEVELS: u32 = 1;
pub const XCHAL_FIRST_HIGHPRI_LEVEL: u32 = 2;
pub const XCHAL_INTLEVEL0_MASK: u32 = 0;
pub const XCHAL_INTLEVEL8_MASK: u32 = 0;
pub const XCHAL_INTLEVEL9_MASK: u32 = 0;
pub const XCHAL_INTLEVEL10_MASK: u32 = 0;
pub const XCHAL_INTLEVEL11_MASK: u32 = 0;
pub const XCHAL_INTLEVEL12_MASK: u32 = 0;
pub const XCHAL_INTLEVEL13_MASK: u32 = 0;
pub const XCHAL_INTLEVEL14_MASK: u32 = 0;
pub const XCHAL_INTLEVEL15_MASK: u32 = 0;
pub const XCHAL_INTLEVEL0_ANDBELOW_MASK: u32 = 0;
pub const XCHAL_INTLEVEL8_ANDBELOW_MASK: u32 = 4294967295;
pub const XCHAL_INTLEVEL9_ANDBELOW_MASK: u32 = 4294967295;
pub const XCHAL_INTLEVEL10_ANDBELOW_MASK: u32 = 4294967295;
pub const XCHAL_INTLEVEL11_ANDBELOW_MASK: u32 = 4294967295;
pub const XCHAL_INTLEVEL12_ANDBELOW_MASK: u32 = 4294967295;
pub const XCHAL_INTLEVEL13_ANDBELOW_MASK: u32 = 4294967295;
pub const XCHAL_INTLEVEL14_ANDBELOW_MASK: u32 = 4294967295;
pub const XCHAL_INTLEVEL15_ANDBELOW_MASK: u32 = 4294967295;
pub const XCHAL_LOWPRI_MASK: u32 = 407551;
pub const XCHAL_INTCLEARABLE_MASK: u32 = 1883243648;
pub const XCHAL_INTSETTABLE_MASK: u32 = 536871040;
pub const XCHAL_EXTINT0_MASK: u32 = 1;
pub const XCHAL_EXTINT1_MASK: u32 = 2;
pub const XCHAL_EXTINT2_MASK: u32 = 4;
pub const XCHAL_EXTINT3_MASK: u32 = 8;
pub const XCHAL_EXTINT4_MASK: u32 = 16;
pub const XCHAL_EXTINT5_MASK: u32 = 32;
pub const XCHAL_EXTINT6_MASK: u32 = 256;
pub const XCHAL_EXTINT7_MASK: u32 = 512;
pub const XCHAL_EXTINT8_MASK: u32 = 1024;
pub const XCHAL_EXTINT9_MASK: u32 = 4096;
pub const XCHAL_EXTINT10_MASK: u32 = 8192;
pub const XCHAL_EXTINT11_MASK: u32 = 16384;
pub const XCHAL_EXTINT12_MASK: u32 = 131072;
pub const XCHAL_EXTINT13_MASK: u32 = 262144;
pub const XCHAL_EXTINT14_MASK: u32 = 524288;
pub const XCHAL_EXTINT15_MASK: u32 = 1048576;
pub const XCHAL_EXTINT16_MASK: u32 = 2097152;
pub const XCHAL_EXTINT17_MASK: u32 = 4194304;
pub const XCHAL_EXTINT18_MASK: u32 = 8388608;
pub const XCHAL_EXTINT19_MASK: u32 = 16777216;
pub const XCHAL_EXTINT20_MASK: u32 = 33554432;
pub const XCHAL_EXTINT21_MASK: u32 = 67108864;
pub const XCHAL_EXTINT22_MASK: u32 = 134217728;
pub const XCHAL_EXTINT23_MASK: u32 = 268435456;
pub const XCHAL_EXTINT24_MASK: u32 = 1073741824;
pub const XCHAL_EXTINT25_MASK: u32 = 2147483648;
pub const XCHAL_HAVE_OLD_EXC_ARCH: u32 = 0;
pub const XCHAL_HAVE_EXCM: u32 = 1;
pub const XCHAL_PROGRAMEXC_VECTOR_VADDR: u32 = 1073742656;
pub const XCHAL_USEREXC_VECTOR_VADDR: u32 = 1073742656;
pub const XCHAL_PROGRAMEXC_VECTOR_PADDR: u32 = 1073742656;
pub const XCHAL_USEREXC_VECTOR_PADDR: u32 = 1073742656;
pub const XCHAL_STACKEDEXC_VECTOR_VADDR: u32 = 1073742592;
pub const XCHAL_KERNELEXC_VECTOR_VADDR: u32 = 1073742592;
pub const XCHAL_STACKEDEXC_VECTOR_PADDR: u32 = 1073742592;
pub const XCHAL_KERNELEXC_VECTOR_PADDR: u32 = 1073742592;
pub const XCHAL_EXCCAUSE_ILLEGAL_INSTRUCTION: u32 = 0;
pub const XCHAL_EXCCAUSE_SYSTEM_CALL: u32 = 1;
pub const XCHAL_EXCCAUSE_INSTRUCTION_FETCH_ERROR: u32 = 2;
pub const XCHAL_EXCCAUSE_LOAD_STORE_ERROR: u32 = 3;
pub const XCHAL_EXCCAUSE_LEVEL1_INTERRUPT: u32 = 4;
pub const XCHAL_EXCCAUSE_ALLOCA: u32 = 5;
pub const XCHAL_EXCCAUSE_INTEGER_DIVIDE_BY_ZERO: u32 = 6;
pub const XCHAL_EXCCAUSE_SPECULATION: u32 = 7;
pub const XCHAL_EXCCAUSE_PRIVILEGED: u32 = 8;
pub const XCHAL_EXCCAUSE_UNALIGNED: u32 = 9;
pub const XCHAL_EXCCAUSE_ITLB_MISS: u32 = 16;
pub const XCHAL_EXCCAUSE_ITLB_MULTIHIT: u32 = 17;
pub const XCHAL_EXCCAUSE_ITLB_PRIVILEGE: u32 = 18;
pub const XCHAL_EXCCAUSE_ITLB_SIZE_RESTRICTION: u32 = 19;
pub const XCHAL_EXCCAUSE_FETCH_CACHE_ATTRIBUTE: u32 = 20;
pub const XCHAL_EXCCAUSE_DTLB_MISS: u32 = 24;
pub const XCHAL_EXCCAUSE_DTLB_MULTIHIT: u32 = 25;
pub const XCHAL_EXCCAUSE_DTLB_PRIVILEGE: u32 = 26;
pub const XCHAL_EXCCAUSE_DTLB_SIZE_RESTRICTION: u32 = 27;
pub const XCHAL_EXCCAUSE_LOAD_CACHE_ATTRIBUTE: u32 = 28;
pub const XCHAL_EXCCAUSE_STORE_CACHE_ATTRIBUTE: u32 = 29;
pub const XCHAL_EXCCAUSE_COPROCESSOR0_DISABLED: u32 = 32;
pub const XCHAL_EXCCAUSE_COPROCESSOR1_DISABLED: u32 = 33;
pub const XCHAL_EXCCAUSE_COPROCESSOR2_DISABLED: u32 = 34;
pub const XCHAL_EXCCAUSE_COPROCESSOR3_DISABLED: u32 = 35;
pub const XCHAL_EXCCAUSE_COPROCESSOR4_DISABLED: u32 = 36;
pub const XCHAL_EXCCAUSE_COPROCESSOR5_DISABLED: u32 = 37;
pub const XCHAL_EXCCAUSE_COPROCESSOR6_DISABLED: u32 = 38;
pub const XCHAL_EXCCAUSE_COPROCESSOR7_DISABLED: u32 = 39;
pub const XCHAL_DBREAKC_VALIDMASK: u32 = 3221225535;
pub const XCHAL_DBREAKC_MASK_BITS: u32 = 6;
pub const XCHAL_DBREAKC_MASK_NUM: u32 = 64;
pub const XCHAL_DBREAKC_MASK_SHIFT: u32 = 0;
pub const XCHAL_DBREAKC_MASK_MASK: u32 = 63;
pub const XCHAL_DBREAKC_LOADBREAK_BITS: u32 = 1;
pub const XCHAL_DBREAKC_LOADBREAK_NUM: u32 = 2;
pub const XCHAL_DBREAKC_LOADBREAK_SHIFT: u32 = 30;
pub const XCHAL_DBREAKC_LOADBREAK_MASK: u32 = 1073741824;
pub const XCHAL_DBREAKC_STOREBREAK_BITS: u32 = 1;
pub const XCHAL_DBREAKC_STOREBREAK_NUM: u32 = 2;
pub const XCHAL_DBREAKC_STOREBREAK_SHIFT: u32 = 31;
pub const XCHAL_DBREAKC_STOREBREAK_MASK: u32 = 2147483648;
pub const XCHAL_PS_VALIDMASK: u32 = 462655;
pub const XCHAL_PS_INTLEVEL_BITS: u32 = 4;
pub const XCHAL_PS_INTLEVEL_NUM: u32 = 16;
pub const XCHAL_PS_INTLEVEL_SHIFT: u32 = 0;
pub const XCHAL_PS_INTLEVEL_MASK: u32 = 15;
pub const XCHAL_PS_EXCM_BITS: u32 = 1;
pub const XCHAL_PS_EXCM_NUM: u32 = 2;
pub const XCHAL_PS_EXCM_SHIFT: u32 = 4;
pub const XCHAL_PS_EXCM_MASK: u32 = 16;
pub const XCHAL_PS_UM_BITS: u32 = 1;
pub const XCHAL_PS_UM_NUM: u32 = 2;
pub const XCHAL_PS_UM_SHIFT: u32 = 5;
pub const XCHAL_PS_UM_MASK: u32 = 32;
pub const XCHAL_PS_RING_BITS: u32 = 2;
pub const XCHAL_PS_RING_NUM: u32 = 4;
pub const XCHAL_PS_RING_SHIFT: u32 = 6;
pub const XCHAL_PS_RING_MASK: u32 = 192;
pub const XCHAL_PS_OWB_BITS: u32 = 4;
pub const XCHAL_PS_OWB_NUM: u32 = 16;
pub const XCHAL_PS_OWB_SHIFT: u32 = 8;
pub const XCHAL_PS_OWB_MASK: u32 = 3840;
pub const XCHAL_PS_CALLINC_BITS: u32 = 2;
pub const XCHAL_PS_CALLINC_NUM: u32 = 4;
pub const XCHAL_PS_CALLINC_SHIFT: u32 = 16;
pub const XCHAL_PS_CALLINC_MASK: u32 = 196608;
pub const XCHAL_PS_WOE_BITS: u32 = 1;
pub const XCHAL_PS_WOE_NUM: u32 = 2;
pub const XCHAL_PS_WOE_SHIFT: u32 = 18;
pub const XCHAL_PS_WOE_MASK: u32 = 262144;
pub const XCHAL_EXCCAUSE_VALIDMASK: u32 = 63;
pub const XCHAL_EXCCAUSE_BITS: u32 = 6;
pub const XCHAL_EXCCAUSE_NUM: u32 = 64;
pub const XCHAL_EXCCAUSE_SHIFT: u32 = 0;
pub const XCHAL_EXCCAUSE_MASK: u32 = 63;
pub const XCHAL_DEBUGCAUSE_VALIDMASK: u32 = 63;
pub const XCHAL_DEBUGCAUSE_ICOUNT_BITS: u32 = 1;
pub const XCHAL_DEBUGCAUSE_ICOUNT_NUM: u32 = 2;
pub const XCHAL_DEBUGCAUSE_ICOUNT_SHIFT: u32 = 0;
pub const XCHAL_DEBUGCAUSE_ICOUNT_MASK: u32 = 1;
pub const XCHAL_DEBUGCAUSE_IBREAK_BITS: u32 = 1;
pub const XCHAL_DEBUGCAUSE_IBREAK_NUM: u32 = 2;
pub const XCHAL_DEBUGCAUSE_IBREAK_SHIFT: u32 = 1;
pub const XCHAL_DEBUGCAUSE_IBREAK_MASK: u32 = 2;
pub const XCHAL_DEBUGCAUSE_DBREAK_BITS: u32 = 1;
pub const XCHAL_DEBUGCAUSE_DBREAK_NUM: u32 = 2;
pub const XCHAL_DEBUGCAUSE_DBREAK_SHIFT: u32 = 2;
pub const XCHAL_DEBUGCAUSE_DBREAK_MASK: u32 = 4;
pub const XCHAL_DEBUGCAUSE_BREAK_BITS: u32 = 1;
pub const XCHAL_DEBUGCAUSE_BREAK_NUM: u32 = 2;
pub const XCHAL_DEBUGCAUSE_BREAK_SHIFT: u32 = 3;
pub const XCHAL_DEBUGCAUSE_BREAK_MASK: u32 = 8;
pub const XCHAL_DEBUGCAUSE_BREAKN_BITS: u32 = 1;
pub const XCHAL_DEBUGCAUSE_BREAKN_NUM: u32 = 2;
pub const XCHAL_DEBUGCAUSE_BREAKN_SHIFT: u32 = 4;
pub const XCHAL_DEBUGCAUSE_BREAKN_MASK: u32 = 16;
pub const XCHAL_DEBUGCAUSE_DEBUGINT_BITS: u32 = 1;
pub const XCHAL_DEBUGCAUSE_DEBUGINT_NUM: u32 = 2;
pub const XCHAL_DEBUGCAUSE_DEBUGINT_SHIFT: u32 = 5;
pub const XCHAL_DEBUGCAUSE_DEBUGINT_MASK: u32 = 32;
pub const XCHAL_NUM_IROM: u32 = 1;
pub const XCHAL_NUM_IRAM: u32 = 2;
pub const XCHAL_NUM_DROM: u32 = 1;
pub const XCHAL_NUM_DRAM: u32 = 2;
pub const XCHAL_IROM0_VADDR: u32 = 1082130432;
pub const XCHAL_IROM0_PADDR: u32 = 1082130432;
pub const XCHAL_IROM0_SIZE: u32 = 4194304;
pub const XCHAL_IRAM0_VADDR: u32 = 1073741824;
pub const XCHAL_IRAM0_PADDR: u32 = 1073741824;
pub const XCHAL_IRAM0_SIZE: u32 = 4194304;
pub const XCHAL_IRAM1_VADDR: u32 = 1077936128;
pub const XCHAL_IRAM1_PADDR: u32 = 1077936128;
pub const XCHAL_IRAM1_SIZE: u32 = 4194304;
pub const XCHAL_DROM0_VADDR: u32 = 1061158912;
pub const XCHAL_DROM0_PADDR: u32 = 1061158912;
pub const XCHAL_DROM0_SIZE: u32 = 4194304;
pub const XCHAL_DRAM0_VADDR: u32 = 1073217536;
pub const XCHAL_DRAM0_PADDR: u32 = 1073217536;
pub const XCHAL_DRAM0_SIZE: u32 = 524288;
pub const XCHAL_DRAM1_VADDR: u32 = 1065353216;
pub const XCHAL_DRAM1_PADDR: u32 = 1065353216;
pub const XCHAL_DRAM1_SIZE: u32 = 4194304;
pub const XCHAL_CACHE_PREFCTL_DEFAULT: u32 = 4164;
pub const XCHAL_CACHE_LINEWIDTH_MAX: u32 = 2;
pub const XCHAL_CACHE_LINESIZE_MAX: u32 = 4;
pub const XCHAL_ICACHE_SETSIZE: u32 = 1;
pub const XCHAL_DCACHE_SETSIZE: u32 = 1;
pub const XCHAL_CACHE_SETWIDTH_MAX: u32 = 0;
pub const XCHAL_CACHE_SETSIZE_MAX: u32 = 1;
pub const XCHAL_ICACHE_TAG_V_SHIFT: u32 = 0;
pub const XCHAL_ICACHE_TAG_V: u32 = 1;
pub const XCHAL_ICACHE_TAG_F_SHIFT: u32 = 0;
pub const XCHAL_ICACHE_TAG_F: u32 = 0;
pub const XCHAL_ICACHE_TAG_L_SHIFT: u32 = 0;
pub const XCHAL_ICACHE_TAG_L: u32 = 0;
pub const XCHAL_DCACHE_TAG_V_SHIFT: u32 = 0;
pub const XCHAL_DCACHE_TAG_V: u32 = 1;
pub const XCHAL_DCACHE_TAG_F_SHIFT: u32 = 0;
pub const XCHAL_DCACHE_TAG_F: u32 = 0;
pub const XCHAL_DCACHE_TAG_D_SHIFT: u32 = 0;
pub const XCHAL_DCACHE_TAG_D: u32 = 0;
pub const XCHAL_DCACHE_TAG_L_SHIFT: u32 = 0;
pub const XCHAL_DCACHE_TAG_L: u32 = 0;
pub const XCHAL_CACHE_MEMCTL_DEFAULT: u32 = 0;
pub const _MEMCTL_SNOOP_EN: u32 = 0;
pub const _MEMCTL_L0IBUF_EN: u32 = 1;
pub const XCHAL_SNOOP_LB_MEMCTL_DEFAULT: u32 = 1;
pub const XCHAL_ALIGN_MAX: u32 = 4;
pub const XCHAL_HW_RELEASE_MAJOR: u32 = 2600;
pub const XCHAL_HW_RELEASE_MINOR: u32 = 3;
pub const XCHAL_HW_RELEASE_NAME: &'static [u8; 8usize] = b"LX6.0.3\0";
pub const XCHAL_EXTRA_SA_SIZE: u32 = 48;
pub const XCHAL_EXTRA_SA_ALIGN: u32 = 4;
pub const XCHAL_CPEXTRA_SA_SIZE: u32 = 128;
pub const XCHAL_CPEXTRA_SA_ALIGN: u32 = 4;
pub const XCHAL_CP1_NAME: u32 = 0;
pub const XCHAL_CP1_SA_CONTENTS_LIBDB_NUM: u32 = 0;
pub const XCHAL_CP2_NAME: u32 = 0;
pub const XCHAL_CP2_SA_CONTENTS_LIBDB_NUM: u32 = 0;
pub const XCHAL_CP3_NAME: u32 = 0;
pub const XCHAL_CP3_SA_CONTENTS_LIBDB_NUM: u32 = 0;
pub const XCHAL_CP4_NAME: u32 = 0;
pub const XCHAL_CP4_SA_CONTENTS_LIBDB_NUM: u32 = 0;
pub const XCHAL_CP5_NAME: u32 = 0;
pub const XCHAL_CP5_SA_CONTENTS_LIBDB_NUM: u32 = 0;
pub const XCHAL_CP6_NAME: u32 = 0;
pub const XCHAL_CP6_SA_CONTENTS_LIBDB_NUM: u32 = 0;
pub const XCHAL_CP7_NAME: u32 = 0;
pub const XCHAL_CP7_SA_CONTENTS_LIBDB_NUM: u32 = 0;
pub const XCHAL_CPEXTRA_SA_SIZE_TOR2: u32 = 128;
pub const XCHAL_INST_ILLN: u32 = 61549;
pub const XCHAL_INST_ILLN_BYTE0: u32 = 109;
pub const XCHAL_INST_ILLN_BYTE1: u32 = 240;
pub const XTHAL_INST_ILL: u32 = 0;
pub const XCHAL_ERRATUM_453: u32 = 0;
pub const XCHAL_ERRATUM_497: u32 = 0;
pub const XCHAL_ERRATUM_572: u32 = 1;
pub const CALL0_ABI: u32 = 0;
pub const ALIGNPAD: u32 = 2;
pub const KERNELSTACKSIZE: u32 = 1024;
pub const XT_CP0_SA: u32 = 0;
pub const XT_CPENABLE: u32 = 0;
pub const XT_CPSTORED: u32 = 2;
pub const XT_CP_CS_ST: u32 = 4;
pub const XT_CP_ASA: u32 = 8;
pub const CORE_ID_REGVAL_PRO: u32 = 52685;
pub const CORE_ID_REGVAL_APP: u32 = 43947;
pub const CORE_ID_PRO: u32 = 52685;
pub const CORE_ID_APP: u32 = 43947;
pub const ESP_INTR_FLAG_LEVEL1: u32 = 2;
pub const ESP_INTR_FLAG_LEVEL2: u32 = 4;
pub const ESP_INTR_FLAG_LEVEL3: u32 = 8;
pub const ESP_INTR_FLAG_LEVEL4: u32 = 16;
pub const ESP_INTR_FLAG_LEVEL5: u32 = 32;
pub const ESP_INTR_FLAG_LEVEL6: u32 = 64;
pub const ESP_INTR_FLAG_NMI: u32 = 128;
pub const ESP_INTR_FLAG_SHARED: u32 = 256;
pub const ESP_INTR_FLAG_EDGE: u32 = 512;
pub const ESP_INTR_FLAG_IRAM: u32 = 1024;
pub const ESP_INTR_FLAG_INTRDISABLED: u32 = 2048;
pub const ESP_INTR_FLAG_LOWMED: u32 = 14;
pub const ESP_INTR_FLAG_HIGH: u32 = 240;
pub const ESP_INTR_FLAG_LEVELMASK: u32 = 254;
pub const ETS_INTERNAL_TIMER0_INTR_SOURCE: i32 = -1;
pub const ETS_INTERNAL_TIMER1_INTR_SOURCE: i32 = -2;
pub const ETS_INTERNAL_TIMER2_INTR_SOURCE: i32 = -3;
pub const ETS_INTERNAL_SW0_INTR_SOURCE: i32 = -4;
pub const ETS_INTERNAL_SW1_INTR_SOURCE: i32 = -5;
pub const ETS_INTERNAL_PROFILING_INTR_SOURCE: i32 = -6;
pub const ETS_INTERNAL_INTR_SOURCE_OFF: u32 = 6;
pub const PRO_CPU_NUM: u32 = 0;
pub const APP_CPU_NUM: u32 = 1;
pub const SOC_MAX_CONTIGUOUS_RAM_SIZE: u32 = 4194304;
pub const DR_REG_DPORT_BASE: u32 = 1072693248;
pub const DR_REG_AES_BASE: u32 = 1072697344;
pub const DR_REG_RSA_BASE: u32 = 1072701440;
pub const DR_REG_SHA_BASE: u32 = 1072705536;
pub const DR_REG_FLASH_MMU_TABLE_PRO: u32 = 1072758784;
pub const DR_REG_FLASH_MMU_TABLE_APP: u32 = 1072766976;
pub const DR_REG_DPORT_END: u32 = 1072775164;
pub const DR_REG_UART_BASE: u32 = 1072955392;
pub const DR_REG_SPI1_BASE: u32 = 1072963584;
pub const DR_REG_SPI0_BASE: u32 = 1072967680;
pub const DR_REG_GPIO_BASE: u32 = 1072971776;
pub const DR_REG_GPIO_SD_BASE: u32 = 1072975616;
pub const DR_REG_FE2_BASE: u32 = 1072975872;
pub const DR_REG_FE_BASE: u32 = 1072979968;
pub const DR_REG_FRC_TIMER_BASE: u32 = 1072984064;
pub const DR_REG_RTCCNTL_BASE: u32 = 1072988160;
pub const DR_REG_RTCIO_BASE: u32 = 1072989184;
pub const DR_REG_SENS_BASE: u32 = 1072990208;
pub const DR_REG_RTC_I2C_BASE: u32 = 1072991232;
pub const DR_REG_IO_MUX_BASE: u32 = 1072992256;
pub const DR_REG_HINF_BASE: u32 = 1073000448;
pub const DR_REG_UHCI1_BASE: u32 = 1073004544;
pub const DR_REG_I2S_BASE: u32 = 1073016832;
pub const DR_REG_UART1_BASE: u32 = 1073020928;
pub const DR_REG_BT_BASE: u32 = 1073025024;
pub const DR_REG_I2C_EXT_BASE: u32 = 1073033216;
pub const DR_REG_UHCI0_BASE: u32 = 1073037312;
pub const DR_REG_SLCHOST_BASE: u32 = 1073041408;
pub const DR_REG_RMT_BASE: u32 = 1073045504;
pub const DR_REG_PCNT_BASE: u32 = 1073049600;
pub const DR_REG_SLC_BASE: u32 = 1073053696;
pub const DR_REG_LEDC_BASE: u32 = 1073057792;
pub const DR_REG_EFUSE_BASE: u32 = 1073061888;
pub const DR_REG_SPI_ENCRYPT_BASE: u32 = 1073065984;
pub const DR_REG_NRX_BASE: u32 = 1073073152;
pub const DR_REG_BB_BASE: u32 = 1073074176;
pub const DR_REG_PWM_BASE: u32 = 1073078272;
pub const DR_REG_TIMERGROUP0_BASE: u32 = 1073082368;
pub const DR_REG_TIMERGROUP1_BASE: u32 = 1073086464;
pub const DR_REG_RTCMEM0_BASE: u32 = 1073090560;
pub const DR_REG_RTCMEM1_BASE: u32 = 1073094656;
pub const DR_REG_RTCMEM2_BASE: u32 = 1073098752;
pub const DR_REG_SPI2_BASE: u32 = 1073102848;
pub const DR_REG_SPI3_BASE: u32 = 1073106944;
pub const DR_REG_SYSCON_BASE: u32 = 1073111040;
pub const DR_REG_APB_CTRL_BASE: u32 = 1073111040;
pub const DR_REG_I2C1_EXT_BASE: u32 = 1073115136;
pub const DR_REG_SDMMC_BASE: u32 = 1073119232;
pub const DR_REG_EMAC_BASE: u32 = 1073123328;
pub const DR_REG_CAN_BASE: u32 = 1073131520;
pub const DR_REG_PWM1_BASE: u32 = 1073135616;
pub const DR_REG_I2S1_BASE: u32 = 1073139712;
pub const DR_REG_UART2_BASE: u32 = 1073143808;
pub const DR_REG_PWM2_BASE: u32 = 1073147904;
pub const DR_REG_PWM3_BASE: u32 = 1073152000;
pub const PERIPHS_SPI_ENCRYPT_BASEADDR: u32 = 1073065984;
pub const APB_CLK_FREQ_ROM: u32 = 26000000;
pub const CPU_CLK_FREQ_ROM: u32 = 26000000;
pub const APB_CLK_FREQ: u32 = 80000000;
pub const REF_CLK_FREQ: u32 = 1000000;
pub const UART_CLK_FREQ: u32 = 80000000;
pub const WDT_CLK_FREQ: u32 = 80000000;
pub const TIMER_CLK_FREQ: u32 = 5000000;
pub const SPI_CLK_DIV: u32 = 4;
pub const TICKS_PER_US_ROM: u32 = 26;
pub const GPIO_MATRIX_DELAY_NS: u32 = 25;
pub const SOC_DROM_LOW: u32 = 1061158912;
pub const SOC_DROM_HIGH: u32 = 1065353216;
pub const SOC_DRAM_LOW: u32 = 1073405952;
pub const SOC_DRAM_HIGH: u32 = 1073741824;
pub const SOC_IROM_LOW: u32 = 1074593792;
pub const SOC_IROM_HIGH: u32 = 1077936128;
pub const SOC_IROM_MASK_LOW: u32 = 1073741824;
pub const SOC_IROM_MASK_HIGH: u32 = 1074155264;
pub const SOC_CACHE_PRO_LOW: u32 = 1074200576;
pub const SOC_CACHE_PRO_HIGH: u32 = 1074233344;
pub const SOC_CACHE_APP_LOW: u32 = 1074233344;
pub const SOC_CACHE_APP_HIGH: u32 = 1074266112;
pub const SOC_IRAM_LOW: u32 = 1074266112;
pub const SOC_IRAM_HIGH: u32 = 1074397184;
pub const SOC_RTC_IRAM_LOW: u32 = 1074528256;
pub const SOC_RTC_IRAM_HIGH: u32 = 1074536448;
pub const SOC_RTC_DRAM_LOW: u32 = 1073217536;
pub const SOC_RTC_DRAM_HIGH: u32 = 1073225728;
pub const SOC_RTC_DATA_LOW: u32 = 1342177280;
pub const SOC_RTC_DATA_HIGH: u32 = 1342185472;
pub const SOC_EXTRAM_DATA_LOW: u32 = 1065353216;
pub const SOC_EXTRAM_DATA_HIGH: u32 = 1069547520;
pub const SOC_DIRAM_IRAM_LOW: u32 = 1074397184;
pub const SOC_DIRAM_IRAM_HIGH: u32 = 1074528256;
pub const SOC_DIRAM_DRAM_LOW: u32 = 1073610752;
pub const SOC_DIRAM_DRAM_HIGH: u32 = 1073741824;
pub const SOC_DIRAM_INVERTED: u32 = 1;
pub const SOC_DMA_LOW: u32 = 1073405952;
pub const SOC_DMA_HIGH: u32 = 1073741824;
pub const SOC_BYTE_ACCESSIBLE_LOW: u32 = 1073283072;
pub const SOC_BYTE_ACCESSIBLE_HIGH: u32 = 1073741824;
pub const SOC_MEM_INTERNAL_LOW: u32 = 1073283072;
pub const SOC_MEM_INTERNAL_HIGH: u32 = 1074536448;
pub const SOC_ROM_STACK_START: u32 = 1073626912;
pub const ETS_WIFI_MAC_INTR_SOURCE: u32 = 0;
pub const ETS_WIFI_MAC_NMI_SOURCE: u32 = 1;
pub const ETS_WIFI_BB_INTR_SOURCE: u32 = 2;
pub const ETS_BT_MAC_INTR_SOURCE: u32 = 3;
pub const ETS_BT_BB_INTR_SOURCE: u32 = 4;
pub const ETS_BT_BB_NMI_SOURCE: u32 = 5;
pub const ETS_RWBT_INTR_SOURCE: u32 = 6;
pub const ETS_RWBLE_INTR_SOURCE: u32 = 7;
pub const ETS_RWBT_NMI_SOURCE: u32 = 8;
pub const ETS_RWBLE_NMI_SOURCE: u32 = 9;
pub const ETS_SLC0_INTR_SOURCE: u32 = 10;
pub const ETS_SLC1_INTR_SOURCE: u32 = 11;
pub const ETS_UHCI0_INTR_SOURCE: u32 = 12;
pub const ETS_UHCI1_INTR_SOURCE: u32 = 13;
pub const ETS_TG0_T0_LEVEL_INTR_SOURCE: u32 = 14;
pub const ETS_TG0_T1_LEVEL_INTR_SOURCE: u32 = 15;
pub const ETS_TG0_WDT_LEVEL_INTR_SOURCE: u32 = 16;
pub const ETS_TG0_LACT_LEVEL_INTR_SOURCE: u32 = 17;
pub const ETS_TG1_T0_LEVEL_INTR_SOURCE: u32 = 18;
pub const ETS_TG1_T1_LEVEL_INTR_SOURCE: u32 = 19;
pub const ETS_TG1_WDT_LEVEL_INTR_SOURCE: u32 = 20;
pub const ETS_TG1_LACT_LEVEL_INTR_SOURCE: u32 = 21;
pub const ETS_GPIO_INTR_SOURCE: u32 = 22;
pub const ETS_GPIO_NMI_SOURCE: u32 = 23;
pub const ETS_FROM_CPU_INTR0_SOURCE: u32 = 24;
pub const ETS_FROM_CPU_INTR1_SOURCE: u32 = 25;
pub const ETS_FROM_CPU_INTR2_SOURCE: u32 = 26;
pub const ETS_FROM_CPU_INTR3_SOURCE: u32 = 27;
pub const ETS_SPI0_INTR_SOURCE: u32 = 28;
pub const ETS_SPI1_INTR_SOURCE: u32 = 29;
pub const ETS_SPI2_INTR_SOURCE: u32 = 30;
pub const ETS_SPI3_INTR_SOURCE: u32 = 31;
pub const ETS_I2S0_INTR_SOURCE: u32 = 32;
pub const ETS_I2S1_INTR_SOURCE: u32 = 33;
pub const ETS_UART0_INTR_SOURCE: u32 = 34;
pub const ETS_UART1_INTR_SOURCE: u32 = 35;
pub const ETS_UART2_INTR_SOURCE: u32 = 36;
pub const ETS_SDIO_HOST_INTR_SOURCE: u32 = 37;
pub const ETS_ETH_MAC_INTR_SOURCE: u32 = 38;
pub const ETS_PWM0_INTR_SOURCE: u32 = 39;
pub const ETS_PWM1_INTR_SOURCE: u32 = 40;
pub const ETS_PWM2_INTR_SOURCE: u32 = 41;
pub const ETS_PWM3_INTR_SOURCE: u32 = 42;
pub const ETS_LEDC_INTR_SOURCE: u32 = 43;
pub const ETS_EFUSE_INTR_SOURCE: u32 = 44;
pub const ETS_CAN_INTR_SOURCE: u32 = 45;
pub const ETS_RTC_CORE_INTR_SOURCE: u32 = 46;
pub const ETS_RMT_INTR_SOURCE: u32 = 47;
pub const ETS_PCNT_INTR_SOURCE: u32 = 48;
pub const ETS_I2C_EXT0_INTR_SOURCE: u32 = 49;
pub const ETS_I2C_EXT1_INTR_SOURCE: u32 = 50;
pub const ETS_RSA_INTR_SOURCE: u32 = 51;
pub const ETS_SPI1_DMA_INTR_SOURCE: u32 = 52;
pub const ETS_SPI2_DMA_INTR_SOURCE: u32 = 53;
pub const ETS_SPI3_DMA_INTR_SOURCE: u32 = 54;
pub const ETS_WDT_INTR_SOURCE: u32 = 55;
pub const ETS_TIMER1_INTR_SOURCE: u32 = 56;
pub const ETS_TIMER2_INTR_SOURCE: u32 = 57;
pub const ETS_TG0_T0_EDGE_INTR_SOURCE: u32 = 58;
pub const ETS_TG0_T1_EDGE_INTR_SOURCE: u32 = 59;
pub const ETS_TG0_WDT_EDGE_INTR_SOURCE: u32 = 60;
pub const ETS_TG0_LACT_EDGE_INTR_SOURCE: u32 = 61;
pub const ETS_TG1_T0_EDGE_INTR_SOURCE: u32 = 62;
pub const ETS_TG1_T1_EDGE_INTR_SOURCE: u32 = 63;
pub const ETS_TG1_WDT_EDGE_INTR_SOURCE: u32 = 64;
pub const ETS_TG1_LACT_EDGE_INTR_SOURCE: u32 = 65;
pub const ETS_MMU_IA_INTR_SOURCE: u32 = 66;
pub const ETS_MPU_IA_INTR_SOURCE: u32 = 67;
pub const ETS_CACHE_IA_INTR_SOURCE: u32 = 68;
pub const ETS_MAX_INTR_SOURCE: u32 = 69;
pub const ETS_WMAC_INUM: u32 = 0;
pub const ETS_BT_HOST_INUM: u32 = 1;
pub const ETS_WBB_INUM: u32 = 4;
pub const ETS_TG0_T1_INUM: u32 = 10;
pub const ETS_FRC1_INUM: u32 = 22;
pub const ETS_T1_WDT_INUM: u32 = 24;
pub const ETS_MEMACCESS_ERR_INUM: u32 = 25;
pub const ETS_CACHEERR_INUM: u32 = 25;
pub const ETS_DPORT_INUM: u32 = 28;
pub const ETS_SLC_INUM: u32 = 1;
pub const ETS_UART0_INUM: u32 = 5;
pub const ETS_UART1_INUM: u32 = 5;
pub const ETS_INVALID_INUM: u32 = 6;
pub const SLP_OE_V: u32 = 1;
pub const SLP_OE_S: u32 = 0;
pub const SLP_SEL_V: u32 = 1;
pub const SLP_SEL_S: u32 = 1;
pub const SLP_PD_V: u32 = 1;
pub const SLP_PD_S: u32 = 2;
pub const SLP_PU_V: u32 = 1;
pub const SLP_PU_S: u32 = 3;
pub const SLP_IE_V: u32 = 1;
pub const SLP_IE_S: u32 = 4;
pub const SLP_DRV: u32 = 3;
pub const SLP_DRV_V: u32 = 3;
pub const SLP_DRV_S: u32 = 5;
pub const FUN_PD_V: u32 = 1;
pub const FUN_PD_S: u32 = 7;
pub const FUN_PU_V: u32 = 1;
pub const FUN_PU_S: u32 = 8;
pub const FUN_IE_V: u32 = 1;
pub const FUN_IE_S: u32 = 9;
pub const FUN_DRV: u32 = 3;
pub const FUN_DRV_V: u32 = 3;
pub const FUN_DRV_S: u32 = 10;
pub const MCU_SEL: u32 = 7;
pub const MCU_SEL_V: u32 = 7;
pub const MCU_SEL_S: u32 = 12;
pub const PIN_FUNC_GPIO: u32 = 2;
pub const SPI_CLK_GPIO_NUM: u32 = 6;
pub const SPI_CS0_GPIO_NUM: u32 = 11;
pub const SPI_Q_GPIO_NUM: u32 = 7;
pub const SPI_D_GPIO_NUM: u32 = 8;
pub const SPI_WP_GPIO_NUM: u32 = 10;
pub const SPI_HD_GPIO_NUM: u32 = 9;
pub const PIN_CTRL: u32 = 1072992256;
pub const CLK_OUT3: u32 = 15;
pub const CLK_OUT3_V: u32 = 15;
pub const CLK_OUT3_S: u32 = 8;
pub const CLK_OUT3_M: u32 = 3840;
pub const CLK_OUT2: u32 = 15;
pub const CLK_OUT2_V: u32 = 15;
pub const CLK_OUT2_S: u32 = 4;
pub const CLK_OUT2_M: u32 = 240;
pub const CLK_OUT1: u32 = 15;
pub const CLK_OUT1_V: u32 = 15;
pub const CLK_OUT1_S: u32 = 0;
pub const CLK_OUT1_M: u32 = 15;
pub const PERIPHS_IO_MUX_GPIO0_U: u32 = 1072992324;
pub const IO_MUX_GPIO0_REG: u32 = 1072992324;
pub const FUNC_GPIO0_EMAC_TX_CLK: u32 = 5;
pub const FUNC_GPIO0_GPIO0: u32 = 2;
pub const FUNC_GPIO0_CLK_OUT1: u32 = 1;
pub const FUNC_GPIO0_GPIO0_0: u32 = 0;
pub const PERIPHS_IO_MUX_U0TXD_U: u32 = 1072992392;
pub const IO_MUX_GPIO1_REG: u32 = 1072992392;
pub const FUNC_U0TXD_EMAC_RXD2: u32 = 5;
pub const FUNC_U0TXD_GPIO1: u32 = 2;
pub const FUNC_U0TXD_CLK_OUT3: u32 = 1;
pub const FUNC_U0TXD_U0TXD: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO2_U: u32 = 1072992320;
pub const IO_MUX_GPIO2_REG: u32 = 1072992320;
pub const FUNC_GPIO2_SD_DATA0: u32 = 4;
pub const FUNC_GPIO2_HS2_DATA0: u32 = 3;
pub const FUNC_GPIO2_GPIO2: u32 = 2;
pub const FUNC_GPIO2_HSPIWP: u32 = 1;
pub const FUNC_GPIO2_GPIO2_0: u32 = 0;
pub const PERIPHS_IO_MUX_U0RXD_U: u32 = 1072992388;
pub const IO_MUX_GPIO3_REG: u32 = 1072992388;
pub const FUNC_U0RXD_GPIO3: u32 = 2;
pub const FUNC_U0RXD_CLK_OUT2: u32 = 1;
pub const FUNC_U0RXD_U0RXD: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO4_U: u32 = 1072992328;
pub const IO_MUX_GPIO4_REG: u32 = 1072992328;
pub const FUNC_GPIO4_EMAC_TX_ER: u32 = 5;
pub const FUNC_GPIO4_SD_DATA1: u32 = 4;
pub const FUNC_GPIO4_HS2_DATA1: u32 = 3;
pub const FUNC_GPIO4_GPIO4: u32 = 2;
pub const FUNC_GPIO4_HSPIHD: u32 = 1;
pub const FUNC_GPIO4_GPIO4_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO5_U: u32 = 1072992364;
pub const IO_MUX_GPIO5_REG: u32 = 1072992364;
pub const FUNC_GPIO5_EMAC_RX_CLK: u32 = 5;
pub const FUNC_GPIO5_HS1_DATA6: u32 = 3;
pub const FUNC_GPIO5_GPIO5: u32 = 2;
pub const FUNC_GPIO5_VSPICS0: u32 = 1;
pub const FUNC_GPIO5_GPIO5_0: u32 = 0;
pub const PERIPHS_IO_MUX_SD_CLK_U: u32 = 1072992352;
pub const IO_MUX_GPIO6_REG: u32 = 1072992352;
pub const FUNC_SD_CLK_U1CTS: u32 = 4;
pub const FUNC_SD_CLK_HS1_CLK: u32 = 3;
pub const FUNC_SD_CLK_GPIO6: u32 = 2;
pub const FUNC_SD_CLK_SPICLK: u32 = 1;
pub const FUNC_SD_CLK_SD_CLK: u32 = 0;
pub const PERIPHS_IO_MUX_SD_DATA0_U: u32 = 1072992356;
pub const IO_MUX_GPIO7_REG: u32 = 1072992356;
pub const FUNC_SD_DATA0_U2RTS: u32 = 4;
pub const FUNC_SD_DATA0_HS1_DATA0: u32 = 3;
pub const FUNC_SD_DATA0_GPIO7: u32 = 2;
pub const FUNC_SD_DATA0_SPIQ: u32 = 1;
pub const FUNC_SD_DATA0_SD_DATA0: u32 = 0;
pub const PERIPHS_IO_MUX_SD_DATA1_U: u32 = 1072992360;
pub const IO_MUX_GPIO8_REG: u32 = 1072992360;
pub const FUNC_SD_DATA1_U2CTS: u32 = 4;
pub const FUNC_SD_DATA1_HS1_DATA1: u32 = 3;
pub const FUNC_SD_DATA1_GPIO8: u32 = 2;
pub const FUNC_SD_DATA1_SPID: u32 = 1;
pub const FUNC_SD_DATA1_SD_DATA1: u32 = 0;
pub const PERIPHS_IO_MUX_SD_DATA2_U: u32 = 1072992340;
pub const IO_MUX_GPIO9_REG: u32 = 1072992340;
pub const FUNC_SD_DATA2_U1RXD: u32 = 4;
pub const FUNC_SD_DATA2_HS1_DATA2: u32 = 3;
pub const FUNC_SD_DATA2_GPIO9: u32 = 2;
pub const FUNC_SD_DATA2_SPIHD: u32 = 1;
pub const FUNC_SD_DATA2_SD_DATA2: u32 = 0;
pub const PERIPHS_IO_MUX_SD_DATA3_U: u32 = 1072992344;
pub const IO_MUX_GPIO10_REG: u32 = 1072992344;
pub const FUNC_SD_DATA3_U1TXD: u32 = 4;
pub const FUNC_SD_DATA3_HS1_DATA3: u32 = 3;
pub const FUNC_SD_DATA3_GPIO10: u32 = 2;
pub const FUNC_SD_DATA3_SPIWP: u32 = 1;
pub const FUNC_SD_DATA3_SD_DATA3: u32 = 0;
pub const PERIPHS_IO_MUX_SD_CMD_U: u32 = 1072992348;
pub const IO_MUX_GPIO11_REG: u32 = 1072992348;
pub const FUNC_SD_CMD_U1RTS: u32 = 4;
pub const FUNC_SD_CMD_HS1_CMD: u32 = 3;
pub const FUNC_SD_CMD_GPIO11: u32 = 2;
pub const FUNC_SD_CMD_SPICS0: u32 = 1;
pub const FUNC_SD_CMD_SD_CMD: u32 = 0;
pub const PERIPHS_IO_MUX_MTDI_U: u32 = 1072992308;
pub const IO_MUX_GPIO12_REG: u32 = 1072992308;
pub const FUNC_MTDI_EMAC_TXD3: u32 = 5;
pub const FUNC_MTDI_SD_DATA2: u32 = 4;
pub const FUNC_MTDI_HS2_DATA2: u32 = 3;
pub const FUNC_MTDI_GPIO12: u32 = 2;
pub const FUNC_MTDI_HSPIQ: u32 = 1;
pub const FUNC_MTDI_MTDI: u32 = 0;
pub const PERIPHS_IO_MUX_MTCK_U: u32 = 1072992312;
pub const IO_MUX_GPIO13_REG: u32 = 1072992312;
pub const FUNC_MTCK_EMAC_RX_ER: u32 = 5;
pub const FUNC_MTCK_SD_DATA3: u32 = 4;
pub const FUNC_MTCK_HS2_DATA3: u32 = 3;
pub const FUNC_MTCK_GPIO13: u32 = 2;
pub const FUNC_MTCK_HSPID: u32 = 1;
pub const FUNC_MTCK_MTCK: u32 = 0;
pub const PERIPHS_IO_MUX_MTMS_U: u32 = 1072992304;
pub const IO_MUX_GPIO14_REG: u32 = 1072992304;
pub const FUNC_MTMS_EMAC_TXD2: u32 = 5;
pub const FUNC_MTMS_SD_CLK: u32 = 4;
pub const FUNC_MTMS_HS2_CLK: u32 = 3;
pub const FUNC_MTMS_GPIO14: u32 = 2;
pub const FUNC_MTMS_HSPICLK: u32 = 1;
pub const FUNC_MTMS_MTMS: u32 = 0;
pub const PERIPHS_IO_MUX_MTDO_U: u32 = 1072992316;
pub const IO_MUX_GPIO15_REG: u32 = 1072992316;
pub const FUNC_MTDO_EMAC_RXD3: u32 = 5;
pub const FUNC_MTDO_SD_CMD: u32 = 4;
pub const FUNC_MTDO_HS2_CMD: u32 = 3;
pub const FUNC_MTDO_GPIO15: u32 = 2;
pub const FUNC_MTDO_HSPICS0: u32 = 1;
pub const FUNC_MTDO_MTDO: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO16_U: u32 = 1072992332;
pub const IO_MUX_GPIO16_REG: u32 = 1072992332;
pub const FUNC_GPIO16_EMAC_CLK_OUT: u32 = 5;
pub const FUNC_GPIO16_U2RXD: u32 = 4;
pub const FUNC_GPIO16_HS1_DATA4: u32 = 3;
pub const FUNC_GPIO16_GPIO16: u32 = 2;
pub const FUNC_GPIO16_GPIO16_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO17_U: u32 = 1072992336;
pub const IO_MUX_GPIO17_REG: u32 = 1072992336;
pub const FUNC_GPIO17_EMAC_CLK_OUT_180: u32 = 5;
pub const FUNC_GPIO17_U2TXD: u32 = 4;
pub const FUNC_GPIO17_HS1_DATA5: u32 = 3;
pub const FUNC_GPIO17_GPIO17: u32 = 2;
pub const FUNC_GPIO17_GPIO17_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO18_U: u32 = 1072992368;
pub const IO_MUX_GPIO18_REG: u32 = 1072992368;
pub const FUNC_GPIO18_HS1_DATA7: u32 = 3;
pub const FUNC_GPIO18_GPIO18: u32 = 2;
pub const FUNC_GPIO18_VSPICLK: u32 = 1;
pub const FUNC_GPIO18_GPIO18_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO19_U: u32 = 1072992372;
pub const IO_MUX_GPIO19_REG: u32 = 1072992372;
pub const FUNC_GPIO19_EMAC_TXD0: u32 = 5;
pub const FUNC_GPIO19_U0CTS: u32 = 3;
pub const FUNC_GPIO19_GPIO19: u32 = 2;
pub const FUNC_GPIO19_VSPIQ: u32 = 1;
pub const FUNC_GPIO19_GPIO19_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO20_U: u32 = 1072992376;
pub const IO_MUX_GPIO20_REG: u32 = 1072992376;
pub const FUNC_GPIO20_GPIO20: u32 = 2;
pub const FUNC_GPIO20_GPIO20_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO21_U: u32 = 1072992380;
pub const IO_MUX_GPIO21_REG: u32 = 1072992380;
pub const FUNC_GPIO21_EMAC_TX_EN: u32 = 5;
pub const FUNC_GPIO21_GPIO21: u32 = 2;
pub const FUNC_GPIO21_VSPIHD: u32 = 1;
pub const FUNC_GPIO21_GPIO21_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO22_U: u32 = 1072992384;
pub const IO_MUX_GPIO22_REG: u32 = 1072992384;
pub const FUNC_GPIO22_EMAC_TXD1: u32 = 5;
pub const FUNC_GPIO22_U0RTS: u32 = 3;
pub const FUNC_GPIO22_GPIO22: u32 = 2;
pub const FUNC_GPIO22_VSPIWP: u32 = 1;
pub const FUNC_GPIO22_GPIO22_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO23_U: u32 = 1072992396;
pub const IO_MUX_GPIO23_REG: u32 = 1072992396;
pub const FUNC_GPIO23_HS1_STROBE: u32 = 3;
pub const FUNC_GPIO23_GPIO23: u32 = 2;
pub const FUNC_GPIO23_VSPID: u32 = 1;
pub const FUNC_GPIO23_GPIO23_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO24_U: u32 = 1072992400;
pub const IO_MUX_GPIO24_REG: u32 = 1072992400;
pub const FUNC_GPIO24_GPIO24: u32 = 2;
pub const FUNC_GPIO24_GPIO24_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO25_U: u32 = 1072992292;
pub const IO_MUX_GPIO25_REG: u32 = 1072992292;
pub const FUNC_GPIO25_EMAC_RXD0: u32 = 5;
pub const FUNC_GPIO25_GPIO25: u32 = 2;
pub const FUNC_GPIO25_GPIO25_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO26_U: u32 = 1072992296;
pub const IO_MUX_GPIO26_REG: u32 = 1072992296;
pub const FUNC_GPIO26_EMAC_RXD1: u32 = 5;
pub const FUNC_GPIO26_GPIO26: u32 = 2;
pub const FUNC_GPIO26_GPIO26_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO27_U: u32 = 1072992300;
pub const IO_MUX_GPIO27_REG: u32 = 1072992300;
pub const FUNC_GPIO27_EMAC_RX_DV: u32 = 5;
pub const FUNC_GPIO27_GPIO27: u32 = 2;
pub const FUNC_GPIO27_GPIO27_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO32_U: u32 = 1072992284;
pub const IO_MUX_GPIO32_REG: u32 = 1072992284;
pub const FUNC_GPIO32_GPIO32: u32 = 2;
pub const FUNC_GPIO32_GPIO32_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO33_U: u32 = 1072992288;
pub const IO_MUX_GPIO33_REG: u32 = 1072992288;
pub const FUNC_GPIO33_GPIO33: u32 = 2;
pub const FUNC_GPIO33_GPIO33_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO34_U: u32 = 1072992276;
pub const IO_MUX_GPIO34_REG: u32 = 1072992276;
pub const FUNC_GPIO34_GPIO34: u32 = 2;
pub const FUNC_GPIO34_GPIO34_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO35_U: u32 = 1072992280;
pub const IO_MUX_GPIO35_REG: u32 = 1072992280;
pub const FUNC_GPIO35_GPIO35: u32 = 2;
pub const FUNC_GPIO35_GPIO35_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO36_U: u32 = 1072992260;
pub const IO_MUX_GPIO36_REG: u32 = 1072992260;
pub const FUNC_GPIO36_GPIO36: u32 = 2;
pub const FUNC_GPIO36_GPIO36_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO37_U: u32 = 1072992264;
pub const IO_MUX_GPIO37_REG: u32 = 1072992264;
pub const FUNC_GPIO37_GPIO37: u32 = 2;
pub const FUNC_GPIO37_GPIO37_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO38_U: u32 = 1072992268;
pub const IO_MUX_GPIO38_REG: u32 = 1072992268;
pub const FUNC_GPIO38_GPIO38: u32 = 2;
pub const FUNC_GPIO38_GPIO38_0: u32 = 0;
pub const PERIPHS_IO_MUX_GPIO39_U: u32 = 1072992272;
pub const IO_MUX_GPIO39_REG: u32 = 1072992272;
pub const FUNC_GPIO39_GPIO39: u32 = 2;
pub const FUNC_GPIO39_GPIO39_0: u32 = 0;
pub const GPIO_BT_SELECT_REG: u32 = 1072971776;
pub const GPIO_BT_SEL: u32 = 4294967295;
pub const GPIO_BT_SEL_V: u32 = 4294967295;
pub const GPIO_BT_SEL_S: u32 = 0;
pub const GPIO_OUT_REG: u32 = 1072971780;
pub const GPIO_OUT_DATA: u32 = 4294967295;
pub const GPIO_OUT_DATA_V: u32 = 4294967295;
pub const GPIO_OUT_DATA_S: u32 = 0;
pub const GPIO_OUT_W1TS_REG: u32 = 1072971784;
pub const GPIO_OUT_DATA_W1TS: u32 = 4294967295;
pub const GPIO_OUT_DATA_W1TS_V: u32 = 4294967295;
pub const GPIO_OUT_DATA_W1TS_S: u32 = 0;
pub const GPIO_OUT_W1TC_REG: u32 = 1072971788;
pub const GPIO_OUT_DATA_W1TC: u32 = 4294967295;
pub const GPIO_OUT_DATA_W1TC_V: u32 = 4294967295;
pub const GPIO_OUT_DATA_W1TC_S: u32 = 0;
pub const GPIO_OUT1_REG: u32 = 1072971792;
pub const GPIO_OUT1_DATA: u32 = 255;
pub const GPIO_OUT1_DATA_V: u32 = 255;
pub const GPIO_OUT1_DATA_S: u32 = 0;
pub const GPIO_OUT1_W1TS_REG: u32 = 1072971796;
pub const GPIO_OUT1_DATA_W1TS: u32 = 255;
pub const GPIO_OUT1_DATA_W1TS_V: u32 = 255;
pub const GPIO_OUT1_DATA_W1TS_S: u32 = 0;
pub const GPIO_OUT1_W1TC_REG: u32 = 1072971800;
pub const GPIO_OUT1_DATA_W1TC: u32 = 255;
pub const GPIO_OUT1_DATA_W1TC_V: u32 = 255;
pub const GPIO_OUT1_DATA_W1TC_S: u32 = 0;
pub const GPIO_SDIO_SELECT_REG: u32 = 1072971804;
pub const GPIO_SDIO_SEL: u32 = 255;
pub const GPIO_SDIO_SEL_V: u32 = 255;
pub const GPIO_SDIO_SEL_S: u32 = 0;
pub const GPIO_ENABLE_REG: u32 = 1072971808;
pub const GPIO_ENABLE_DATA: u32 = 4294967295;
pub const GPIO_ENABLE_DATA_V: u32 = 4294967295;
pub const GPIO_ENABLE_DATA_S: u32 = 0;
pub const GPIO_ENABLE_W1TS_REG: u32 = 1072971812;
pub const GPIO_ENABLE_DATA_W1TS: u32 = 4294967295;
pub const GPIO_ENABLE_DATA_W1TS_V: u32 = 4294967295;
pub const GPIO_ENABLE_DATA_W1TS_S: u32 = 0;
pub const GPIO_ENABLE_W1TC_REG: u32 = 1072971816;
pub const GPIO_ENABLE_DATA_W1TC: u32 = 4294967295;
pub const GPIO_ENABLE_DATA_W1TC_V: u32 = 4294967295;
pub const GPIO_ENABLE_DATA_W1TC_S: u32 = 0;
pub const GPIO_ENABLE1_REG: u32 = 1072971820;
pub const GPIO_ENABLE1_DATA: u32 = 255;
pub const GPIO_ENABLE1_DATA_V: u32 = 255;
pub const GPIO_ENABLE1_DATA_S: u32 = 0;
pub const GPIO_ENABLE1_W1TS_REG: u32 = 1072971824;
pub const GPIO_ENABLE1_DATA_W1TS: u32 = 255;
pub const GPIO_ENABLE1_DATA_W1TS_V: u32 = 255;
pub const GPIO_ENABLE1_DATA_W1TS_S: u32 = 0;
pub const GPIO_ENABLE1_W1TC_REG: u32 = 1072971828;
pub const GPIO_ENABLE1_DATA_W1TC: u32 = 255;
pub const GPIO_ENABLE1_DATA_W1TC_V: u32 = 255;
pub const GPIO_ENABLE1_DATA_W1TC_S: u32 = 0;
pub const GPIO_STRAP_REG: u32 = 1072971832;
pub const GPIO_STRAPPING: u32 = 65535;
pub const GPIO_STRAPPING_V: u32 = 65535;
pub const GPIO_STRAPPING_S: u32 = 0;
pub const GPIO_IN_REG: u32 = 1072971836;
pub const GPIO_IN_DATA: u32 = 4294967295;
pub const GPIO_IN_DATA_V: u32 = 4294967295;
pub const GPIO_IN_DATA_S: u32 = 0;
pub const GPIO_IN1_REG: u32 = 1072971840;
pub const GPIO_IN1_DATA: u32 = 255;
pub const GPIO_IN1_DATA_V: u32 = 255;
pub const GPIO_IN1_DATA_S: u32 = 0;
pub const GPIO_STATUS_REG: u32 = 1072971844;
pub const GPIO_STATUS_INT: u32 = 4294967295;
pub const GPIO_STATUS_INT_V: u32 = 4294967295;
pub const GPIO_STATUS_INT_S: u32 = 0;
pub const GPIO_STATUS_W1TS_REG: u32 = 1072971848;
pub const GPIO_STATUS_INT_W1TS: u32 = 4294967295;
pub const GPIO_STATUS_INT_W1TS_V: u32 = 4294967295;
pub const GPIO_STATUS_INT_W1TS_S: u32 = 0;
pub const GPIO_STATUS_W1TC_REG: u32 = 1072971852;
pub const GPIO_STATUS_INT_W1TC: u32 = 4294967295;
pub const GPIO_STATUS_INT_W1TC_V: u32 = 4294967295;
pub const GPIO_STATUS_INT_W1TC_S: u32 = 0;
pub const GPIO_STATUS1_REG: u32 = 1072971856;
pub const GPIO_STATUS1_INT: u32 = 255;
pub const GPIO_STATUS1_INT_V: u32 = 255;
pub const GPIO_STATUS1_INT_S: u32 = 0;
pub const GPIO_STATUS1_W1TS_REG: u32 = 1072971860;
pub const GPIO_STATUS1_INT_W1TS: u32 = 255;
pub const GPIO_STATUS1_INT_W1TS_V: u32 = 255;
pub const GPIO_STATUS1_INT_W1TS_S: u32 = 0;
pub const GPIO_STATUS1_W1TC_REG: u32 = 1072971864;
pub const GPIO_STATUS1_INT_W1TC: u32 = 255;
pub const GPIO_STATUS1_INT_W1TC_V: u32 = 255;
pub const GPIO_STATUS1_INT_W1TC_S: u32 = 0;
pub const GPIO_ACPU_INT_REG: u32 = 1072971872;
pub const GPIO_APPCPU_INT: u32 = 4294967295;
pub const GPIO_APPCPU_INT_V: u32 = 4294967295;
pub const GPIO_APPCPU_INT_S: u32 = 0;
pub const GPIO_ACPU_NMI_INT_REG: u32 = 1072971876;
pub const GPIO_APPCPU_NMI_INT: u32 = 4294967295;
pub const GPIO_APPCPU_NMI_INT_V: u32 = 4294967295;
pub const GPIO_APPCPU_NMI_INT_S: u32 = 0;
pub const GPIO_PCPU_INT_REG: u32 = 1072971880;
pub const GPIO_PROCPU_INT: u32 = 4294967295;
pub const GPIO_PROCPU_INT_V: u32 = 4294967295;
pub const GPIO_PROCPU_INT_S: u32 = 0;
pub const GPIO_PCPU_NMI_INT_REG: u32 = 1072971884;
pub const GPIO_PROCPU_NMI_INT: u32 = 4294967295;
pub const GPIO_PROCPU_NMI_INT_V: u32 = 4294967295;
pub const GPIO_PROCPU_NMI_INT_S: u32 = 0;
pub const GPIO_CPUSDIO_INT_REG: u32 = 1072971888;
pub const GPIO_SDIO_INT: u32 = 4294967295;
pub const GPIO_SDIO_INT_V: u32 = 4294967295;
pub const GPIO_SDIO_INT_S: u32 = 0;
pub const GPIO_ACPU_INT1_REG: u32 = 1072971892;
pub const GPIO_APPCPU_INT_H: u32 = 255;
pub const GPIO_APPCPU_INT_H_V: u32 = 255;
pub const GPIO_APPCPU_INT_H_S: u32 = 0;
pub const GPIO_ACPU_NMI_INT1_REG: u32 = 1072971896;
pub const GPIO_APPCPU_NMI_INT_H: u32 = 255;
pub const GPIO_APPCPU_NMI_INT_H_V: u32 = 255;
pub const GPIO_APPCPU_NMI_INT_H_S: u32 = 0;
pub const GPIO_PCPU_INT1_REG: u32 = 1072971900;
pub const GPIO_PROCPU_INT_H: u32 = 255;
pub const GPIO_PROCPU_INT_H_V: u32 = 255;
pub const GPIO_PROCPU_INT_H_S: u32 = 0;
pub const GPIO_PCPU_NMI_INT1_REG: u32 = 1072971904;
pub const GPIO_PROCPU_NMI_INT_H: u32 = 255;
pub const GPIO_PROCPU_NMI_INT_H_V: u32 = 255;
pub const GPIO_PROCPU_NMI_INT_H_S: u32 = 0;
pub const GPIO_CPUSDIO_INT1_REG: u32 = 1072971908;
pub const GPIO_SDIO_INT_H: u32 = 255;
pub const GPIO_SDIO_INT_H_V: u32 = 255;
pub const GPIO_SDIO_INT_H_S: u32 = 0;
pub const GPIO_PIN_INT_ENA: u32 = 31;
pub const GPIO_PIN_INT_ENA_V: u32 = 31;
pub const GPIO_PIN_INT_ENA_S: u32 = 13;
pub const GPIO_PIN_CONFIG: u32 = 3;
pub const GPIO_PIN_CONFIG_V: u32 = 3;
pub const GPIO_PIN_CONFIG_S: u32 = 11;
pub const GPIO_PIN_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN_INT_TYPE: u32 = 7;
pub const GPIO_PIN_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN0_REG: u32 = 1072971912;
pub const GPIO_PIN0_INT_ENA: u32 = 31;
pub const GPIO_PIN0_INT_ENA_V: u32 = 31;
pub const GPIO_PIN0_INT_ENA_S: u32 = 13;
pub const GPIO_PIN0_CONFIG: u32 = 3;
pub const GPIO_PIN0_CONFIG_V: u32 = 3;
pub const GPIO_PIN0_CONFIG_S: u32 = 11;
pub const GPIO_PIN0_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN0_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN0_INT_TYPE: u32 = 7;
pub const GPIO_PIN0_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN0_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN0_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN0_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN1_REG: u32 = 1072971916;
pub const GPIO_PIN1_INT_ENA: u32 = 31;
pub const GPIO_PIN1_INT_ENA_V: u32 = 31;
pub const GPIO_PIN1_INT_ENA_S: u32 = 13;
pub const GPIO_PIN1_CONFIG: u32 = 3;
pub const GPIO_PIN1_CONFIG_V: u32 = 3;
pub const GPIO_PIN1_CONFIG_S: u32 = 11;
pub const GPIO_PIN1_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN1_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN1_INT_TYPE: u32 = 7;
pub const GPIO_PIN1_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN1_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN1_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN1_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN2_REG: u32 = 1072971920;
pub const GPIO_PIN2_INT_ENA: u32 = 31;
pub const GPIO_PIN2_INT_ENA_V: u32 = 31;
pub const GPIO_PIN2_INT_ENA_S: u32 = 13;
pub const GPIO_PIN2_CONFIG: u32 = 3;
pub const GPIO_PIN2_CONFIG_V: u32 = 3;
pub const GPIO_PIN2_CONFIG_S: u32 = 11;
pub const GPIO_PIN2_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN2_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN2_INT_TYPE: u32 = 7;
pub const GPIO_PIN2_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN2_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN2_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN2_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN3_REG: u32 = 1072971924;
pub const GPIO_PIN3_INT_ENA: u32 = 31;
pub const GPIO_PIN3_INT_ENA_V: u32 = 31;
pub const GPIO_PIN3_INT_ENA_S: u32 = 13;
pub const GPIO_PIN3_CONFIG: u32 = 3;
pub const GPIO_PIN3_CONFIG_V: u32 = 3;
pub const GPIO_PIN3_CONFIG_S: u32 = 11;
pub const GPIO_PIN3_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN3_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN3_INT_TYPE: u32 = 7;
pub const GPIO_PIN3_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN3_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN3_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN3_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN4_REG: u32 = 1072971928;
pub const GPIO_PIN4_INT_ENA: u32 = 31;
pub const GPIO_PIN4_INT_ENA_V: u32 = 31;
pub const GPIO_PIN4_INT_ENA_S: u32 = 13;
pub const GPIO_PIN4_CONFIG: u32 = 3;
pub const GPIO_PIN4_CONFIG_V: u32 = 3;
pub const GPIO_PIN4_CONFIG_S: u32 = 11;
pub const GPIO_PIN4_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN4_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN4_INT_TYPE: u32 = 7;
pub const GPIO_PIN4_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN4_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN4_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN4_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN5_REG: u32 = 1072971932;
pub const GPIO_PIN5_INT_ENA: u32 = 31;
pub const GPIO_PIN5_INT_ENA_V: u32 = 31;
pub const GPIO_PIN5_INT_ENA_S: u32 = 13;
pub const GPIO_PIN5_CONFIG: u32 = 3;
pub const GPIO_PIN5_CONFIG_V: u32 = 3;
pub const GPIO_PIN5_CONFIG_S: u32 = 11;
pub const GPIO_PIN5_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN5_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN5_INT_TYPE: u32 = 7;
pub const GPIO_PIN5_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN5_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN5_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN5_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN6_REG: u32 = 1072971936;
pub const GPIO_PIN6_INT_ENA: u32 = 31;
pub const GPIO_PIN6_INT_ENA_V: u32 = 31;
pub const GPIO_PIN6_INT_ENA_S: u32 = 13;
pub const GPIO_PIN6_CONFIG: u32 = 3;
pub const GPIO_PIN6_CONFIG_V: u32 = 3;
pub const GPIO_PIN6_CONFIG_S: u32 = 11;
pub const GPIO_PIN6_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN6_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN6_INT_TYPE: u32 = 7;
pub const GPIO_PIN6_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN6_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN6_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN6_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN7_REG: u32 = 1072971940;
pub const GPIO_PIN7_INT_ENA: u32 = 31;
pub const GPIO_PIN7_INT_ENA_V: u32 = 31;
pub const GPIO_PIN7_INT_ENA_S: u32 = 13;
pub const GPIO_PIN7_CONFIG: u32 = 3;
pub const GPIO_PIN7_CONFIG_V: u32 = 3;
pub const GPIO_PIN7_CONFIG_S: u32 = 11;
pub const GPIO_PIN7_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN7_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN7_INT_TYPE: u32 = 7;
pub const GPIO_PIN7_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN7_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN7_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN7_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN8_REG: u32 = 1072971944;
pub const GPIO_PIN8_INT_ENA: u32 = 31;
pub const GPIO_PIN8_INT_ENA_V: u32 = 31;
pub const GPIO_PIN8_INT_ENA_S: u32 = 13;
pub const GPIO_PIN8_CONFIG: u32 = 3;
pub const GPIO_PIN8_CONFIG_V: u32 = 3;
pub const GPIO_PIN8_CONFIG_S: u32 = 11;
pub const GPIO_PIN8_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN8_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN8_INT_TYPE: u32 = 7;
pub const GPIO_PIN8_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN8_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN8_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN8_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN9_REG: u32 = 1072971948;
pub const GPIO_PIN9_INT_ENA: u32 = 31;
pub const GPIO_PIN9_INT_ENA_V: u32 = 31;
pub const GPIO_PIN9_INT_ENA_S: u32 = 13;
pub const GPIO_PIN9_CONFIG: u32 = 3;
pub const GPIO_PIN9_CONFIG_V: u32 = 3;
pub const GPIO_PIN9_CONFIG_S: u32 = 11;
pub const GPIO_PIN9_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN9_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN9_INT_TYPE: u32 = 7;
pub const GPIO_PIN9_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN9_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN9_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN9_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN10_REG: u32 = 1072971952;
pub const GPIO_PIN10_INT_ENA: u32 = 31;
pub const GPIO_PIN10_INT_ENA_V: u32 = 31;
pub const GPIO_PIN10_INT_ENA_S: u32 = 13;
pub const GPIO_PIN10_CONFIG: u32 = 3;
pub const GPIO_PIN10_CONFIG_V: u32 = 3;
pub const GPIO_PIN10_CONFIG_S: u32 = 11;
pub const GPIO_PIN10_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN10_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN10_INT_TYPE: u32 = 7;
pub const GPIO_PIN10_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN10_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN10_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN10_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN11_REG: u32 = 1072971956;
pub const GPIO_PIN11_INT_ENA: u32 = 31;
pub const GPIO_PIN11_INT_ENA_V: u32 = 31;
pub const GPIO_PIN11_INT_ENA_S: u32 = 13;
pub const GPIO_PIN11_CONFIG: u32 = 3;
pub const GPIO_PIN11_CONFIG_V: u32 = 3;
pub const GPIO_PIN11_CONFIG_S: u32 = 11;
pub const GPIO_PIN11_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN11_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN11_INT_TYPE: u32 = 7;
pub const GPIO_PIN11_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN11_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN11_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN11_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN12_REG: u32 = 1072971960;
pub const GPIO_PIN12_INT_ENA: u32 = 31;
pub const GPIO_PIN12_INT_ENA_V: u32 = 31;
pub const GPIO_PIN12_INT_ENA_S: u32 = 13;
pub const GPIO_PIN12_CONFIG: u32 = 3;
pub const GPIO_PIN12_CONFIG_V: u32 = 3;
pub const GPIO_PIN12_CONFIG_S: u32 = 11;
pub const GPIO_PIN12_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN12_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN12_INT_TYPE: u32 = 7;
pub const GPIO_PIN12_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN12_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN12_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN12_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN13_REG: u32 = 1072971964;
pub const GPIO_PIN13_INT_ENA: u32 = 31;
pub const GPIO_PIN13_INT_ENA_V: u32 = 31;
pub const GPIO_PIN13_INT_ENA_S: u32 = 13;
pub const GPIO_PIN13_CONFIG: u32 = 3;
pub const GPIO_PIN13_CONFIG_V: u32 = 3;
pub const GPIO_PIN13_CONFIG_S: u32 = 11;
pub const GPIO_PIN13_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN13_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN13_INT_TYPE: u32 = 7;
pub const GPIO_PIN13_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN13_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN13_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN13_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN14_REG: u32 = 1072971968;
pub const GPIO_PIN14_INT_ENA: u32 = 31;
pub const GPIO_PIN14_INT_ENA_V: u32 = 31;
pub const GPIO_PIN14_INT_ENA_S: u32 = 13;
pub const GPIO_PIN14_CONFIG: u32 = 3;
pub const GPIO_PIN14_CONFIG_V: u32 = 3;
pub const GPIO_PIN14_CONFIG_S: u32 = 11;
pub const GPIO_PIN14_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN14_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN14_INT_TYPE: u32 = 7;
pub const GPIO_PIN14_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN14_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN14_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN14_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN15_REG: u32 = 1072971972;
pub const GPIO_PIN15_INT_ENA: u32 = 31;
pub const GPIO_PIN15_INT_ENA_V: u32 = 31;
pub const GPIO_PIN15_INT_ENA_S: u32 = 13;
pub const GPIO_PIN15_CONFIG: u32 = 3;
pub const GPIO_PIN15_CONFIG_V: u32 = 3;
pub const GPIO_PIN15_CONFIG_S: u32 = 11;
pub const GPIO_PIN15_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN15_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN15_INT_TYPE: u32 = 7;
pub const GPIO_PIN15_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN15_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN15_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN15_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN16_REG: u32 = 1072971976;
pub const GPIO_PIN16_INT_ENA: u32 = 31;
pub const GPIO_PIN16_INT_ENA_V: u32 = 31;
pub const GPIO_PIN16_INT_ENA_S: u32 = 13;
pub const GPIO_PIN16_CONFIG: u32 = 3;
pub const GPIO_PIN16_CONFIG_V: u32 = 3;
pub const GPIO_PIN16_CONFIG_S: u32 = 11;
pub const GPIO_PIN16_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN16_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN16_INT_TYPE: u32 = 7;
pub const GPIO_PIN16_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN16_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN16_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN16_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN17_REG: u32 = 1072971980;
pub const GPIO_PIN17_INT_ENA: u32 = 31;
pub const GPIO_PIN17_INT_ENA_V: u32 = 31;
pub const GPIO_PIN17_INT_ENA_S: u32 = 13;
pub const GPIO_PIN17_CONFIG: u32 = 3;
pub const GPIO_PIN17_CONFIG_V: u32 = 3;
pub const GPIO_PIN17_CONFIG_S: u32 = 11;
pub const GPIO_PIN17_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN17_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN17_INT_TYPE: u32 = 7;
pub const GPIO_PIN17_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN17_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN17_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN17_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN18_REG: u32 = 1072971984;
pub const GPIO_PIN18_INT_ENA: u32 = 31;
pub const GPIO_PIN18_INT_ENA_V: u32 = 31;
pub const GPIO_PIN18_INT_ENA_S: u32 = 13;
pub const GPIO_PIN18_CONFIG: u32 = 3;
pub const GPIO_PIN18_CONFIG_V: u32 = 3;
pub const GPIO_PIN18_CONFIG_S: u32 = 11;
pub const GPIO_PIN18_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN18_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN18_INT_TYPE: u32 = 7;
pub const GPIO_PIN18_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN18_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN18_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN18_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN19_REG: u32 = 1072971988;
pub const GPIO_PIN19_INT_ENA: u32 = 31;
pub const GPIO_PIN19_INT_ENA_V: u32 = 31;
pub const GPIO_PIN19_INT_ENA_S: u32 = 13;
pub const GPIO_PIN19_CONFIG: u32 = 3;
pub const GPIO_PIN19_CONFIG_V: u32 = 3;
pub const GPIO_PIN19_CONFIG_S: u32 = 11;
pub const GPIO_PIN19_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN19_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN19_INT_TYPE: u32 = 7;
pub const GPIO_PIN19_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN19_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN19_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN19_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN20_REG: u32 = 1072971992;
pub const GPIO_PIN20_INT_ENA: u32 = 31;
pub const GPIO_PIN20_INT_ENA_V: u32 = 31;
pub const GPIO_PIN20_INT_ENA_S: u32 = 13;
pub const GPIO_PIN20_CONFIG: u32 = 3;
pub const GPIO_PIN20_CONFIG_V: u32 = 3;
pub const GPIO_PIN20_CONFIG_S: u32 = 11;
pub const GPIO_PIN20_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN20_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN20_INT_TYPE: u32 = 7;
pub const GPIO_PIN20_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN20_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN20_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN20_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN21_REG: u32 = 1072971996;
pub const GPIO_PIN21_INT_ENA: u32 = 31;
pub const GPIO_PIN21_INT_ENA_V: u32 = 31;
pub const GPIO_PIN21_INT_ENA_S: u32 = 13;
pub const GPIO_PIN21_CONFIG: u32 = 3;
pub const GPIO_PIN21_CONFIG_V: u32 = 3;
pub const GPIO_PIN21_CONFIG_S: u32 = 11;
pub const GPIO_PIN21_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN21_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN21_INT_TYPE: u32 = 7;
pub const GPIO_PIN21_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN21_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN21_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN21_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN22_REG: u32 = 1072972000;
pub const GPIO_PIN22_INT_ENA: u32 = 31;
pub const GPIO_PIN22_INT_ENA_V: u32 = 31;
pub const GPIO_PIN22_INT_ENA_S: u32 = 13;
pub const GPIO_PIN22_CONFIG: u32 = 3;
pub const GPIO_PIN22_CONFIG_V: u32 = 3;
pub const GPIO_PIN22_CONFIG_S: u32 = 11;
pub const GPIO_PIN22_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN22_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN22_INT_TYPE: u32 = 7;
pub const GPIO_PIN22_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN22_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN22_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN22_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN23_REG: u32 = 1072972004;
pub const GPIO_PIN23_INT_ENA: u32 = 31;
pub const GPIO_PIN23_INT_ENA_V: u32 = 31;
pub const GPIO_PIN23_INT_ENA_S: u32 = 13;
pub const GPIO_PIN23_CONFIG: u32 = 3;
pub const GPIO_PIN23_CONFIG_V: u32 = 3;
pub const GPIO_PIN23_CONFIG_S: u32 = 11;
pub const GPIO_PIN23_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN23_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN23_INT_TYPE: u32 = 7;
pub const GPIO_PIN23_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN23_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN23_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN23_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN24_REG: u32 = 1072972008;
pub const GPIO_PIN24_INT_ENA: u32 = 31;
pub const GPIO_PIN24_INT_ENA_V: u32 = 31;
pub const GPIO_PIN24_INT_ENA_S: u32 = 13;
pub const GPIO_PIN24_CONFIG: u32 = 3;
pub const GPIO_PIN24_CONFIG_V: u32 = 3;
pub const GPIO_PIN24_CONFIG_S: u32 = 11;
pub const GPIO_PIN24_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN24_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN24_INT_TYPE: u32 = 7;
pub const GPIO_PIN24_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN24_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN24_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN24_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN25_REG: u32 = 1072972012;
pub const GPIO_PIN25_INT_ENA: u32 = 31;
pub const GPIO_PIN25_INT_ENA_V: u32 = 31;
pub const GPIO_PIN25_INT_ENA_S: u32 = 13;
pub const GPIO_PIN25_CONFIG: u32 = 3;
pub const GPIO_PIN25_CONFIG_V: u32 = 3;
pub const GPIO_PIN25_CONFIG_S: u32 = 11;
pub const GPIO_PIN25_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN25_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN25_INT_TYPE: u32 = 7;
pub const GPIO_PIN25_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN25_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN25_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN25_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN26_REG: u32 = 1072972016;
pub const GPIO_PIN26_INT_ENA: u32 = 31;
pub const GPIO_PIN26_INT_ENA_V: u32 = 31;
pub const GPIO_PIN26_INT_ENA_S: u32 = 13;
pub const GPIO_PIN26_CONFIG: u32 = 3;
pub const GPIO_PIN26_CONFIG_V: u32 = 3;
pub const GPIO_PIN26_CONFIG_S: u32 = 11;
pub const GPIO_PIN26_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN26_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN26_INT_TYPE: u32 = 7;
pub const GPIO_PIN26_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN26_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN26_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN26_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN27_REG: u32 = 1072972020;
pub const GPIO_PIN27_INT_ENA: u32 = 31;
pub const GPIO_PIN27_INT_ENA_V: u32 = 31;
pub const GPIO_PIN27_INT_ENA_S: u32 = 13;
pub const GPIO_PIN27_CONFIG: u32 = 3;
pub const GPIO_PIN27_CONFIG_V: u32 = 3;
pub const GPIO_PIN27_CONFIG_S: u32 = 11;
pub const GPIO_PIN27_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN27_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN27_INT_TYPE: u32 = 7;
pub const GPIO_PIN27_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN27_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN27_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN27_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN28_REG: u32 = 1072972024;
pub const GPIO_PIN28_INT_ENA: u32 = 31;
pub const GPIO_PIN28_INT_ENA_V: u32 = 31;
pub const GPIO_PIN28_INT_ENA_S: u32 = 13;
pub const GPIO_PIN28_CONFIG: u32 = 3;
pub const GPIO_PIN28_CONFIG_V: u32 = 3;
pub const GPIO_PIN28_CONFIG_S: u32 = 11;
pub const GPIO_PIN28_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN28_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN28_INT_TYPE: u32 = 7;
pub const GPIO_PIN28_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN28_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN28_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN28_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN29_REG: u32 = 1072972028;
pub const GPIO_PIN29_INT_ENA: u32 = 31;
pub const GPIO_PIN29_INT_ENA_V: u32 = 31;
pub const GPIO_PIN29_INT_ENA_S: u32 = 13;
pub const GPIO_PIN29_CONFIG: u32 = 3;
pub const GPIO_PIN29_CONFIG_V: u32 = 3;
pub const GPIO_PIN29_CONFIG_S: u32 = 11;
pub const GPIO_PIN29_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN29_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN29_INT_TYPE: u32 = 7;
pub const GPIO_PIN29_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN29_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN29_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN29_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN30_REG: u32 = 1072972032;
pub const GPIO_PIN30_INT_ENA: u32 = 31;
pub const GPIO_PIN30_INT_ENA_V: u32 = 31;
pub const GPIO_PIN30_INT_ENA_S: u32 = 13;
pub const GPIO_PIN30_CONFIG: u32 = 3;
pub const GPIO_PIN30_CONFIG_V: u32 = 3;
pub const GPIO_PIN30_CONFIG_S: u32 = 11;
pub const GPIO_PIN30_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN30_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN30_INT_TYPE: u32 = 7;
pub const GPIO_PIN30_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN30_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN30_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN30_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN31_REG: u32 = 1072972036;
pub const GPIO_PIN31_INT_ENA: u32 = 31;
pub const GPIO_PIN31_INT_ENA_V: u32 = 31;
pub const GPIO_PIN31_INT_ENA_S: u32 = 13;
pub const GPIO_PIN31_CONFIG: u32 = 3;
pub const GPIO_PIN31_CONFIG_V: u32 = 3;
pub const GPIO_PIN31_CONFIG_S: u32 = 11;
pub const GPIO_PIN31_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN31_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN31_INT_TYPE: u32 = 7;
pub const GPIO_PIN31_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN31_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN31_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN31_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN32_REG: u32 = 1072972040;
pub const GPIO_PIN32_INT_ENA: u32 = 31;
pub const GPIO_PIN32_INT_ENA_V: u32 = 31;
pub const GPIO_PIN32_INT_ENA_S: u32 = 13;
pub const GPIO_PIN32_CONFIG: u32 = 3;
pub const GPIO_PIN32_CONFIG_V: u32 = 3;
pub const GPIO_PIN32_CONFIG_S: u32 = 11;
pub const GPIO_PIN32_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN32_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN32_INT_TYPE: u32 = 7;
pub const GPIO_PIN32_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN32_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN32_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN32_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN33_REG: u32 = 1072972044;
pub const GPIO_PIN33_INT_ENA: u32 = 31;
pub const GPIO_PIN33_INT_ENA_V: u32 = 31;
pub const GPIO_PIN33_INT_ENA_S: u32 = 13;
pub const GPIO_PIN33_CONFIG: u32 = 3;
pub const GPIO_PIN33_CONFIG_V: u32 = 3;
pub const GPIO_PIN33_CONFIG_S: u32 = 11;
pub const GPIO_PIN33_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN33_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN33_INT_TYPE: u32 = 7;
pub const GPIO_PIN33_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN33_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN33_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN33_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN34_REG: u32 = 1072972048;
pub const GPIO_PIN34_INT_ENA: u32 = 31;
pub const GPIO_PIN34_INT_ENA_V: u32 = 31;
pub const GPIO_PIN34_INT_ENA_S: u32 = 13;
pub const GPIO_PIN34_CONFIG: u32 = 3;
pub const GPIO_PIN34_CONFIG_V: u32 = 3;
pub const GPIO_PIN34_CONFIG_S: u32 = 11;
pub const GPIO_PIN34_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN34_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN34_INT_TYPE: u32 = 7;
pub const GPIO_PIN34_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN34_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN34_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN34_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN35_REG: u32 = 1072972052;
pub const GPIO_PIN35_INT_ENA: u32 = 31;
pub const GPIO_PIN35_INT_ENA_V: u32 = 31;
pub const GPIO_PIN35_INT_ENA_S: u32 = 13;
pub const GPIO_PIN35_CONFIG: u32 = 3;
pub const GPIO_PIN35_CONFIG_V: u32 = 3;
pub const GPIO_PIN35_CONFIG_S: u32 = 11;
pub const GPIO_PIN35_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN35_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN35_INT_TYPE: u32 = 7;
pub const GPIO_PIN35_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN35_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN35_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN35_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN36_REG: u32 = 1072972056;
pub const GPIO_PIN36_INT_ENA: u32 = 31;
pub const GPIO_PIN36_INT_ENA_V: u32 = 31;
pub const GPIO_PIN36_INT_ENA_S: u32 = 13;
pub const GPIO_PIN36_CONFIG: u32 = 3;
pub const GPIO_PIN36_CONFIG_V: u32 = 3;
pub const GPIO_PIN36_CONFIG_S: u32 = 11;
pub const GPIO_PIN36_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN36_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN36_INT_TYPE: u32 = 7;
pub const GPIO_PIN36_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN36_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN36_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN36_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN37_REG: u32 = 1072972060;
pub const GPIO_PIN37_INT_ENA: u32 = 31;
pub const GPIO_PIN37_INT_ENA_V: u32 = 31;
pub const GPIO_PIN37_INT_ENA_S: u32 = 13;
pub const GPIO_PIN37_CONFIG: u32 = 3;
pub const GPIO_PIN37_CONFIG_V: u32 = 3;
pub const GPIO_PIN37_CONFIG_S: u32 = 11;
pub const GPIO_PIN37_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN37_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN37_INT_TYPE: u32 = 7;
pub const GPIO_PIN37_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN37_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN37_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN37_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN38_REG: u32 = 1072972064;
pub const GPIO_PIN38_INT_ENA: u32 = 31;
pub const GPIO_PIN38_INT_ENA_V: u32 = 31;
pub const GPIO_PIN38_INT_ENA_S: u32 = 13;
pub const GPIO_PIN38_CONFIG: u32 = 3;
pub const GPIO_PIN38_CONFIG_V: u32 = 3;
pub const GPIO_PIN38_CONFIG_S: u32 = 11;
pub const GPIO_PIN38_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN38_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN38_INT_TYPE: u32 = 7;
pub const GPIO_PIN38_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN38_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN38_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN38_PAD_DRIVER_S: u32 = 2;
pub const GPIO_PIN39_REG: u32 = 1072972068;
pub const GPIO_PIN39_INT_ENA: u32 = 31;
pub const GPIO_PIN39_INT_ENA_V: u32 = 31;
pub const GPIO_PIN39_INT_ENA_S: u32 = 13;
pub const GPIO_PIN39_CONFIG: u32 = 3;
pub const GPIO_PIN39_CONFIG_V: u32 = 3;
pub const GPIO_PIN39_CONFIG_S: u32 = 11;
pub const GPIO_PIN39_WAKEUP_ENABLE_V: u32 = 1;
pub const GPIO_PIN39_WAKEUP_ENABLE_S: u32 = 10;
pub const GPIO_PIN39_INT_TYPE: u32 = 7;
pub const GPIO_PIN39_INT_TYPE_V: u32 = 7;
pub const GPIO_PIN39_INT_TYPE_S: u32 = 7;
pub const GPIO_PIN39_PAD_DRIVER_V: u32 = 1;
pub const GPIO_PIN39_PAD_DRIVER_S: u32 = 2;
pub const GPIO_cali_conf_REG: u32 = 1072972072;
pub const GPIO_CALI_START_V: u32 = 1;
pub const GPIO_CALI_START_S: u32 = 31;
pub const GPIO_CALI_RTC_MAX: u32 = 1023;
pub const GPIO_CALI_RTC_MAX_V: u32 = 1023;
pub const GPIO_CALI_RTC_MAX_S: u32 = 0;
pub const GPIO_cali_data_REG: u32 = 1072972076;
pub const GPIO_CALI_RDY_SYNC2_V: u32 = 1;
pub const GPIO_CALI_RDY_SYNC2_S: u32 = 31;
pub const GPIO_CALI_RDY_REAL_V: u32 = 1;
pub const GPIO_CALI_RDY_REAL_S: u32 = 30;
pub const GPIO_CALI_VALUE_SYNC2: u32 = 1048575;
pub const GPIO_CALI_VALUE_SYNC2_V: u32 = 1048575;
pub const GPIO_CALI_VALUE_SYNC2_S: u32 = 0;
pub const GPIO_FUNC0_IN_SEL_CFG_REG: u32 = 1072972080;
pub const GPIO_SIG0_IN_SEL_V: u32 = 1;
pub const GPIO_SIG0_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC0_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC0_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC0_IN_SEL: u32 = 63;
pub const GPIO_FUNC0_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC0_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC1_IN_SEL_CFG_REG: u32 = 1072972084;
pub const GPIO_SIG1_IN_SEL_V: u32 = 1;
pub const GPIO_SIG1_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC1_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC1_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC1_IN_SEL: u32 = 63;
pub const GPIO_FUNC1_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC1_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC2_IN_SEL_CFG_REG: u32 = 1072972088;
pub const GPIO_SIG2_IN_SEL_V: u32 = 1;
pub const GPIO_SIG2_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC2_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC2_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC2_IN_SEL: u32 = 63;
pub const GPIO_FUNC2_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC2_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC3_IN_SEL_CFG_REG: u32 = 1072972092;
pub const GPIO_SIG3_IN_SEL_V: u32 = 1;
pub const GPIO_SIG3_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC3_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC3_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC3_IN_SEL: u32 = 63;
pub const GPIO_FUNC3_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC3_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC4_IN_SEL_CFG_REG: u32 = 1072972096;
pub const GPIO_SIG4_IN_SEL_V: u32 = 1;
pub const GPIO_SIG4_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC4_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC4_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC4_IN_SEL: u32 = 63;
pub const GPIO_FUNC4_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC4_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC5_IN_SEL_CFG_REG: u32 = 1072972100;
pub const GPIO_SIG5_IN_SEL_V: u32 = 1;
pub const GPIO_SIG5_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC5_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC5_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC5_IN_SEL: u32 = 63;
pub const GPIO_FUNC5_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC5_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC6_IN_SEL_CFG_REG: u32 = 1072972104;
pub const GPIO_SIG6_IN_SEL_V: u32 = 1;
pub const GPIO_SIG6_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC6_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC6_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC6_IN_SEL: u32 = 63;
pub const GPIO_FUNC6_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC6_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC7_IN_SEL_CFG_REG: u32 = 1072972108;
pub const GPIO_SIG7_IN_SEL_V: u32 = 1;
pub const GPIO_SIG7_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC7_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC7_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC7_IN_SEL: u32 = 63;
pub const GPIO_FUNC7_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC7_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC8_IN_SEL_CFG_REG: u32 = 1072972112;
pub const GPIO_SIG8_IN_SEL_V: u32 = 1;
pub const GPIO_SIG8_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC8_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC8_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC8_IN_SEL: u32 = 63;
pub const GPIO_FUNC8_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC8_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC9_IN_SEL_CFG_REG: u32 = 1072972116;
pub const GPIO_SIG9_IN_SEL_V: u32 = 1;
pub const GPIO_SIG9_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC9_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC9_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC9_IN_SEL: u32 = 63;
pub const GPIO_FUNC9_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC9_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC10_IN_SEL_CFG_REG: u32 = 1072972120;
pub const GPIO_SIG10_IN_SEL_V: u32 = 1;
pub const GPIO_SIG10_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC10_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC10_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC10_IN_SEL: u32 = 63;
pub const GPIO_FUNC10_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC10_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC11_IN_SEL_CFG_REG: u32 = 1072972124;
pub const GPIO_SIG11_IN_SEL_V: u32 = 1;
pub const GPIO_SIG11_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC11_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC11_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC11_IN_SEL: u32 = 63;
pub const GPIO_FUNC11_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC11_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC12_IN_SEL_CFG_REG: u32 = 1072972128;
pub const GPIO_SIG12_IN_SEL_V: u32 = 1;
pub const GPIO_SIG12_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC12_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC12_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC12_IN_SEL: u32 = 63;
pub const GPIO_FUNC12_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC12_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC13_IN_SEL_CFG_REG: u32 = 1072972132;
pub const GPIO_SIG13_IN_SEL_V: u32 = 1;
pub const GPIO_SIG13_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC13_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC13_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC13_IN_SEL: u32 = 63;
pub const GPIO_FUNC13_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC13_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC14_IN_SEL_CFG_REG: u32 = 1072972136;
pub const GPIO_SIG14_IN_SEL_V: u32 = 1;
pub const GPIO_SIG14_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC14_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC14_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC14_IN_SEL: u32 = 63;
pub const GPIO_FUNC14_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC14_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC15_IN_SEL_CFG_REG: u32 = 1072972140;
pub const GPIO_SIG15_IN_SEL_V: u32 = 1;
pub const GPIO_SIG15_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC15_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC15_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC15_IN_SEL: u32 = 63;
pub const GPIO_FUNC15_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC15_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC16_IN_SEL_CFG_REG: u32 = 1072972144;
pub const GPIO_SIG16_IN_SEL_V: u32 = 1;
pub const GPIO_SIG16_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC16_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC16_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC16_IN_SEL: u32 = 63;
pub const GPIO_FUNC16_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC16_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC17_IN_SEL_CFG_REG: u32 = 1072972148;
pub const GPIO_SIG17_IN_SEL_V: u32 = 1;
pub const GPIO_SIG17_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC17_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC17_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC17_IN_SEL: u32 = 63;
pub const GPIO_FUNC17_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC17_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC18_IN_SEL_CFG_REG: u32 = 1072972152;
pub const GPIO_SIG18_IN_SEL_V: u32 = 1;
pub const GPIO_SIG18_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC18_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC18_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC18_IN_SEL: u32 = 63;
pub const GPIO_FUNC18_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC18_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC19_IN_SEL_CFG_REG: u32 = 1072972156;
pub const GPIO_SIG19_IN_SEL_V: u32 = 1;
pub const GPIO_SIG19_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC19_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC19_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC19_IN_SEL: u32 = 63;
pub const GPIO_FUNC19_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC19_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC20_IN_SEL_CFG_REG: u32 = 1072972160;
pub const GPIO_SIG20_IN_SEL_V: u32 = 1;
pub const GPIO_SIG20_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC20_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC20_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC20_IN_SEL: u32 = 63;
pub const GPIO_FUNC20_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC20_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC21_IN_SEL_CFG_REG: u32 = 1072972164;
pub const GPIO_SIG21_IN_SEL_V: u32 = 1;
pub const GPIO_SIG21_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC21_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC21_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC21_IN_SEL: u32 = 63;
pub const GPIO_FUNC21_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC21_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC22_IN_SEL_CFG_REG: u32 = 1072972168;
pub const GPIO_SIG22_IN_SEL_V: u32 = 1;
pub const GPIO_SIG22_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC22_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC22_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC22_IN_SEL: u32 = 63;
pub const GPIO_FUNC22_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC22_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC23_IN_SEL_CFG_REG: u32 = 1072972172;
pub const GPIO_SIG23_IN_SEL_V: u32 = 1;
pub const GPIO_SIG23_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC23_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC23_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC23_IN_SEL: u32 = 63;
pub const GPIO_FUNC23_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC23_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC24_IN_SEL_CFG_REG: u32 = 1072972176;
pub const GPIO_SIG24_IN_SEL_V: u32 = 1;
pub const GPIO_SIG24_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC24_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC24_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC24_IN_SEL: u32 = 63;
pub const GPIO_FUNC24_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC24_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC25_IN_SEL_CFG_REG: u32 = 1072972180;
pub const GPIO_SIG25_IN_SEL_V: u32 = 1;
pub const GPIO_SIG25_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC25_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC25_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC25_IN_SEL: u32 = 63;
pub const GPIO_FUNC25_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC25_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC26_IN_SEL_CFG_REG: u32 = 1072972184;
pub const GPIO_SIG26_IN_SEL_V: u32 = 1;
pub const GPIO_SIG26_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC26_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC26_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC26_IN_SEL: u32 = 63;
pub const GPIO_FUNC26_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC26_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC27_IN_SEL_CFG_REG: u32 = 1072972188;
pub const GPIO_SIG27_IN_SEL_V: u32 = 1;
pub const GPIO_SIG27_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC27_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC27_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC27_IN_SEL: u32 = 63;
pub const GPIO_FUNC27_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC27_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC28_IN_SEL_CFG_REG: u32 = 1072972192;
pub const GPIO_SIG28_IN_SEL_V: u32 = 1;
pub const GPIO_SIG28_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC28_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC28_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC28_IN_SEL: u32 = 63;
pub const GPIO_FUNC28_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC28_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC29_IN_SEL_CFG_REG: u32 = 1072972196;
pub const GPIO_SIG29_IN_SEL_V: u32 = 1;
pub const GPIO_SIG29_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC29_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC29_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC29_IN_SEL: u32 = 63;
pub const GPIO_FUNC29_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC29_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC30_IN_SEL_CFG_REG: u32 = 1072972200;
pub const GPIO_SIG30_IN_SEL_V: u32 = 1;
pub const GPIO_SIG30_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC30_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC30_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC30_IN_SEL: u32 = 63;
pub const GPIO_FUNC30_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC30_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC31_IN_SEL_CFG_REG: u32 = 1072972204;
pub const GPIO_SIG31_IN_SEL_V: u32 = 1;
pub const GPIO_SIG31_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC31_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC31_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC31_IN_SEL: u32 = 63;
pub const GPIO_FUNC31_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC31_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC32_IN_SEL_CFG_REG: u32 = 1072972208;
pub const GPIO_SIG32_IN_SEL_V: u32 = 1;
pub const GPIO_SIG32_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC32_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC32_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC32_IN_SEL: u32 = 63;
pub const GPIO_FUNC32_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC32_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC33_IN_SEL_CFG_REG: u32 = 1072972212;
pub const GPIO_SIG33_IN_SEL_V: u32 = 1;
pub const GPIO_SIG33_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC33_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC33_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC33_IN_SEL: u32 = 63;
pub const GPIO_FUNC33_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC33_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC34_IN_SEL_CFG_REG: u32 = 1072972216;
pub const GPIO_SIG34_IN_SEL_V: u32 = 1;
pub const GPIO_SIG34_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC34_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC34_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC34_IN_SEL: u32 = 63;
pub const GPIO_FUNC34_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC34_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC35_IN_SEL_CFG_REG: u32 = 1072972220;
pub const GPIO_SIG35_IN_SEL_V: u32 = 1;
pub const GPIO_SIG35_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC35_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC35_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC35_IN_SEL: u32 = 63;
pub const GPIO_FUNC35_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC35_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC36_IN_SEL_CFG_REG: u32 = 1072972224;
pub const GPIO_SIG36_IN_SEL_V: u32 = 1;
pub const GPIO_SIG36_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC36_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC36_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC36_IN_SEL: u32 = 63;
pub const GPIO_FUNC36_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC36_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC37_IN_SEL_CFG_REG: u32 = 1072972228;
pub const GPIO_SIG37_IN_SEL_V: u32 = 1;
pub const GPIO_SIG37_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC37_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC37_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC37_IN_SEL: u32 = 63;
pub const GPIO_FUNC37_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC37_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC38_IN_SEL_CFG_REG: u32 = 1072972232;
pub const GPIO_SIG38_IN_SEL_V: u32 = 1;
pub const GPIO_SIG38_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC38_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC38_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC38_IN_SEL: u32 = 63;
pub const GPIO_FUNC38_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC38_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC39_IN_SEL_CFG_REG: u32 = 1072972236;
pub const GPIO_SIG39_IN_SEL_V: u32 = 1;
pub const GPIO_SIG39_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC39_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC39_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC39_IN_SEL: u32 = 63;
pub const GPIO_FUNC39_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC39_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC40_IN_SEL_CFG_REG: u32 = 1072972240;
pub const GPIO_SIG40_IN_SEL_V: u32 = 1;
pub const GPIO_SIG40_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC40_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC40_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC40_IN_SEL: u32 = 63;
pub const GPIO_FUNC40_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC40_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC41_IN_SEL_CFG_REG: u32 = 1072972244;
pub const GPIO_SIG41_IN_SEL_V: u32 = 1;
pub const GPIO_SIG41_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC41_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC41_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC41_IN_SEL: u32 = 63;
pub const GPIO_FUNC41_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC41_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC42_IN_SEL_CFG_REG: u32 = 1072972248;
pub const GPIO_SIG42_IN_SEL_V: u32 = 1;
pub const GPIO_SIG42_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC42_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC42_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC42_IN_SEL: u32 = 63;
pub const GPIO_FUNC42_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC42_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC43_IN_SEL_CFG_REG: u32 = 1072972252;
pub const GPIO_SIG43_IN_SEL_V: u32 = 1;
pub const GPIO_SIG43_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC43_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC43_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC43_IN_SEL: u32 = 63;
pub const GPIO_FUNC43_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC43_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC44_IN_SEL_CFG_REG: u32 = 1072972256;
pub const GPIO_SIG44_IN_SEL_V: u32 = 1;
pub const GPIO_SIG44_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC44_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC44_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC44_IN_SEL: u32 = 63;
pub const GPIO_FUNC44_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC44_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC45_IN_SEL_CFG_REG: u32 = 1072972260;
pub const GPIO_SIG45_IN_SEL_V: u32 = 1;
pub const GPIO_SIG45_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC45_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC45_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC45_IN_SEL: u32 = 63;
pub const GPIO_FUNC45_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC45_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC46_IN_SEL_CFG_REG: u32 = 1072972264;
pub const GPIO_SIG46_IN_SEL_V: u32 = 1;
pub const GPIO_SIG46_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC46_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC46_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC46_IN_SEL: u32 = 63;
pub const GPIO_FUNC46_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC46_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC47_IN_SEL_CFG_REG: u32 = 1072972268;
pub const GPIO_SIG47_IN_SEL_V: u32 = 1;
pub const GPIO_SIG47_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC47_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC47_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC47_IN_SEL: u32 = 63;
pub const GPIO_FUNC47_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC47_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC48_IN_SEL_CFG_REG: u32 = 1072972272;
pub const GPIO_SIG48_IN_SEL_V: u32 = 1;
pub const GPIO_SIG48_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC48_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC48_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC48_IN_SEL: u32 = 63;
pub const GPIO_FUNC48_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC48_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC49_IN_SEL_CFG_REG: u32 = 1072972276;
pub const GPIO_SIG49_IN_SEL_V: u32 = 1;
pub const GPIO_SIG49_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC49_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC49_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC49_IN_SEL: u32 = 63;
pub const GPIO_FUNC49_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC49_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC50_IN_SEL_CFG_REG: u32 = 1072972280;
pub const GPIO_SIG50_IN_SEL_V: u32 = 1;
pub const GPIO_SIG50_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC50_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC50_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC50_IN_SEL: u32 = 63;
pub const GPIO_FUNC50_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC50_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC51_IN_SEL_CFG_REG: u32 = 1072972284;
pub const GPIO_SIG51_IN_SEL_V: u32 = 1;
pub const GPIO_SIG51_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC51_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC51_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC51_IN_SEL: u32 = 63;
pub const GPIO_FUNC51_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC51_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC52_IN_SEL_CFG_REG: u32 = 1072972288;
pub const GPIO_SIG52_IN_SEL_V: u32 = 1;
pub const GPIO_SIG52_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC52_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC52_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC52_IN_SEL: u32 = 63;
pub const GPIO_FUNC52_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC52_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC53_IN_SEL_CFG_REG: u32 = 1072972292;
pub const GPIO_SIG53_IN_SEL_V: u32 = 1;
pub const GPIO_SIG53_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC53_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC53_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC53_IN_SEL: u32 = 63;
pub const GPIO_FUNC53_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC53_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC54_IN_SEL_CFG_REG: u32 = 1072972296;
pub const GPIO_SIG54_IN_SEL_V: u32 = 1;
pub const GPIO_SIG54_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC54_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC54_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC54_IN_SEL: u32 = 63;
pub const GPIO_FUNC54_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC54_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC55_IN_SEL_CFG_REG: u32 = 1072972300;
pub const GPIO_SIG55_IN_SEL_V: u32 = 1;
pub const GPIO_SIG55_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC55_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC55_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC55_IN_SEL: u32 = 63;
pub const GPIO_FUNC55_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC55_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC56_IN_SEL_CFG_REG: u32 = 1072972304;
pub const GPIO_SIG56_IN_SEL_V: u32 = 1;
pub const GPIO_SIG56_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC56_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC56_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC56_IN_SEL: u32 = 63;
pub const GPIO_FUNC56_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC56_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC57_IN_SEL_CFG_REG: u32 = 1072972308;
pub const GPIO_SIG57_IN_SEL_V: u32 = 1;
pub const GPIO_SIG57_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC57_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC57_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC57_IN_SEL: u32 = 63;
pub const GPIO_FUNC57_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC57_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC58_IN_SEL_CFG_REG: u32 = 1072972312;
pub const GPIO_SIG58_IN_SEL_V: u32 = 1;
pub const GPIO_SIG58_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC58_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC58_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC58_IN_SEL: u32 = 63;
pub const GPIO_FUNC58_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC58_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC59_IN_SEL_CFG_REG: u32 = 1072972316;
pub const GPIO_SIG59_IN_SEL_V: u32 = 1;
pub const GPIO_SIG59_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC59_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC59_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC59_IN_SEL: u32 = 63;
pub const GPIO_FUNC59_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC59_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC60_IN_SEL_CFG_REG: u32 = 1072972320;
pub const GPIO_SIG60_IN_SEL_V: u32 = 1;
pub const GPIO_SIG60_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC60_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC60_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC60_IN_SEL: u32 = 63;
pub const GPIO_FUNC60_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC60_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC61_IN_SEL_CFG_REG: u32 = 1072972324;
pub const GPIO_SIG61_IN_SEL_V: u32 = 1;
pub const GPIO_SIG61_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC61_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC61_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC61_IN_SEL: u32 = 63;
pub const GPIO_FUNC61_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC61_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC62_IN_SEL_CFG_REG: u32 = 1072972328;
pub const GPIO_SIG62_IN_SEL_V: u32 = 1;
pub const GPIO_SIG62_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC62_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC62_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC62_IN_SEL: u32 = 63;
pub const GPIO_FUNC62_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC62_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC63_IN_SEL_CFG_REG: u32 = 1072972332;
pub const GPIO_SIG63_IN_SEL_V: u32 = 1;
pub const GPIO_SIG63_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC63_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC63_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC63_IN_SEL: u32 = 63;
pub const GPIO_FUNC63_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC63_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC64_IN_SEL_CFG_REG: u32 = 1072972336;
pub const GPIO_SIG64_IN_SEL_V: u32 = 1;
pub const GPIO_SIG64_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC64_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC64_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC64_IN_SEL: u32 = 63;
pub const GPIO_FUNC64_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC64_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC65_IN_SEL_CFG_REG: u32 = 1072972340;
pub const GPIO_SIG65_IN_SEL_V: u32 = 1;
pub const GPIO_SIG65_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC65_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC65_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC65_IN_SEL: u32 = 63;
pub const GPIO_FUNC65_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC65_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC66_IN_SEL_CFG_REG: u32 = 1072972344;
pub const GPIO_SIG66_IN_SEL_V: u32 = 1;
pub const GPIO_SIG66_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC66_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC66_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC66_IN_SEL: u32 = 63;
pub const GPIO_FUNC66_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC66_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC67_IN_SEL_CFG_REG: u32 = 1072972348;
pub const GPIO_SIG67_IN_SEL_V: u32 = 1;
pub const GPIO_SIG67_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC67_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC67_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC67_IN_SEL: u32 = 63;
pub const GPIO_FUNC67_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC67_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC68_IN_SEL_CFG_REG: u32 = 1072972352;
pub const GPIO_SIG68_IN_SEL_V: u32 = 1;
pub const GPIO_SIG68_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC68_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC68_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC68_IN_SEL: u32 = 63;
pub const GPIO_FUNC68_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC68_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC69_IN_SEL_CFG_REG: u32 = 1072972356;
pub const GPIO_SIG69_IN_SEL_V: u32 = 1;
pub const GPIO_SIG69_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC69_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC69_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC69_IN_SEL: u32 = 63;
pub const GPIO_FUNC69_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC69_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC70_IN_SEL_CFG_REG: u32 = 1072972360;
pub const GPIO_SIG70_IN_SEL_V: u32 = 1;
pub const GPIO_SIG70_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC70_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC70_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC70_IN_SEL: u32 = 63;
pub const GPIO_FUNC70_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC70_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC71_IN_SEL_CFG_REG: u32 = 1072972364;
pub const GPIO_SIG71_IN_SEL_V: u32 = 1;
pub const GPIO_SIG71_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC71_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC71_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC71_IN_SEL: u32 = 63;
pub const GPIO_FUNC71_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC71_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC72_IN_SEL_CFG_REG: u32 = 1072972368;
pub const GPIO_SIG72_IN_SEL_V: u32 = 1;
pub const GPIO_SIG72_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC72_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC72_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC72_IN_SEL: u32 = 63;
pub const GPIO_FUNC72_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC72_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC73_IN_SEL_CFG_REG: u32 = 1072972372;
pub const GPIO_SIG73_IN_SEL_V: u32 = 1;
pub const GPIO_SIG73_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC73_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC73_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC73_IN_SEL: u32 = 63;
pub const GPIO_FUNC73_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC73_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC74_IN_SEL_CFG_REG: u32 = 1072972376;
pub const GPIO_SIG74_IN_SEL_V: u32 = 1;
pub const GPIO_SIG74_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC74_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC74_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC74_IN_SEL: u32 = 63;
pub const GPIO_FUNC74_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC74_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC75_IN_SEL_CFG_REG: u32 = 1072972380;
pub const GPIO_SIG75_IN_SEL_V: u32 = 1;
pub const GPIO_SIG75_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC75_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC75_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC75_IN_SEL: u32 = 63;
pub const GPIO_FUNC75_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC75_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC76_IN_SEL_CFG_REG: u32 = 1072972384;
pub const GPIO_SIG76_IN_SEL_V: u32 = 1;
pub const GPIO_SIG76_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC76_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC76_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC76_IN_SEL: u32 = 63;
pub const GPIO_FUNC76_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC76_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC77_IN_SEL_CFG_REG: u32 = 1072972388;
pub const GPIO_SIG77_IN_SEL_V: u32 = 1;
pub const GPIO_SIG77_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC77_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC77_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC77_IN_SEL: u32 = 63;
pub const GPIO_FUNC77_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC77_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC78_IN_SEL_CFG_REG: u32 = 1072972392;
pub const GPIO_SIG78_IN_SEL_V: u32 = 1;
pub const GPIO_SIG78_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC78_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC78_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC78_IN_SEL: u32 = 63;
pub const GPIO_FUNC78_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC78_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC79_IN_SEL_CFG_REG: u32 = 1072972396;
pub const GPIO_SIG79_IN_SEL_V: u32 = 1;
pub const GPIO_SIG79_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC79_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC79_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC79_IN_SEL: u32 = 63;
pub const GPIO_FUNC79_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC79_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC80_IN_SEL_CFG_REG: u32 = 1072972400;
pub const GPIO_SIG80_IN_SEL_V: u32 = 1;
pub const GPIO_SIG80_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC80_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC80_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC80_IN_SEL: u32 = 63;
pub const GPIO_FUNC80_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC80_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC81_IN_SEL_CFG_REG: u32 = 1072972404;
pub const GPIO_SIG81_IN_SEL_V: u32 = 1;
pub const GPIO_SIG81_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC81_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC81_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC81_IN_SEL: u32 = 63;
pub const GPIO_FUNC81_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC81_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC82_IN_SEL_CFG_REG: u32 = 1072972408;
pub const GPIO_SIG82_IN_SEL_V: u32 = 1;
pub const GPIO_SIG82_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC82_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC82_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC82_IN_SEL: u32 = 63;
pub const GPIO_FUNC82_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC82_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC83_IN_SEL_CFG_REG: u32 = 1072972412;
pub const GPIO_SIG83_IN_SEL_V: u32 = 1;
pub const GPIO_SIG83_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC83_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC83_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC83_IN_SEL: u32 = 63;
pub const GPIO_FUNC83_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC83_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC84_IN_SEL_CFG_REG: u32 = 1072972416;
pub const GPIO_SIG84_IN_SEL_V: u32 = 1;
pub const GPIO_SIG84_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC84_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC84_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC84_IN_SEL: u32 = 63;
pub const GPIO_FUNC84_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC84_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC85_IN_SEL_CFG_REG: u32 = 1072972420;
pub const GPIO_SIG85_IN_SEL_V: u32 = 1;
pub const GPIO_SIG85_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC85_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC85_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC85_IN_SEL: u32 = 63;
pub const GPIO_FUNC85_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC85_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC86_IN_SEL_CFG_REG: u32 = 1072972424;
pub const GPIO_SIG86_IN_SEL_V: u32 = 1;
pub const GPIO_SIG86_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC86_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC86_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC86_IN_SEL: u32 = 63;
pub const GPIO_FUNC86_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC86_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC87_IN_SEL_CFG_REG: u32 = 1072972428;
pub const GPIO_SIG87_IN_SEL_V: u32 = 1;
pub const GPIO_SIG87_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC87_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC87_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC87_IN_SEL: u32 = 63;
pub const GPIO_FUNC87_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC87_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC88_IN_SEL_CFG_REG: u32 = 1072972432;
pub const GPIO_SIG88_IN_SEL_V: u32 = 1;
pub const GPIO_SIG88_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC88_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC88_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC88_IN_SEL: u32 = 63;
pub const GPIO_FUNC88_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC88_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC89_IN_SEL_CFG_REG: u32 = 1072972436;
pub const GPIO_SIG89_IN_SEL_V: u32 = 1;
pub const GPIO_SIG89_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC89_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC89_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC89_IN_SEL: u32 = 63;
pub const GPIO_FUNC89_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC89_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC90_IN_SEL_CFG_REG: u32 = 1072972440;
pub const GPIO_SIG90_IN_SEL_V: u32 = 1;
pub const GPIO_SIG90_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC90_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC90_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC90_IN_SEL: u32 = 63;
pub const GPIO_FUNC90_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC90_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC91_IN_SEL_CFG_REG: u32 = 1072972444;
pub const GPIO_SIG91_IN_SEL_V: u32 = 1;
pub const GPIO_SIG91_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC91_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC91_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC91_IN_SEL: u32 = 63;
pub const GPIO_FUNC91_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC91_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC92_IN_SEL_CFG_REG: u32 = 1072972448;
pub const GPIO_SIG92_IN_SEL_V: u32 = 1;
pub const GPIO_SIG92_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC92_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC92_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC92_IN_SEL: u32 = 63;
pub const GPIO_FUNC92_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC92_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC93_IN_SEL_CFG_REG: u32 = 1072972452;
pub const GPIO_SIG93_IN_SEL_V: u32 = 1;
pub const GPIO_SIG93_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC93_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC93_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC93_IN_SEL: u32 = 63;
pub const GPIO_FUNC93_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC93_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC94_IN_SEL_CFG_REG: u32 = 1072972456;
pub const GPIO_SIG94_IN_SEL_V: u32 = 1;
pub const GPIO_SIG94_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC94_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC94_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC94_IN_SEL: u32 = 63;
pub const GPIO_FUNC94_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC94_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC95_IN_SEL_CFG_REG: u32 = 1072972460;
pub const GPIO_SIG95_IN_SEL_V: u32 = 1;
pub const GPIO_SIG95_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC95_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC95_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC95_IN_SEL: u32 = 63;
pub const GPIO_FUNC95_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC95_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC96_IN_SEL_CFG_REG: u32 = 1072972464;
pub const GPIO_SIG96_IN_SEL_V: u32 = 1;
pub const GPIO_SIG96_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC96_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC96_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC96_IN_SEL: u32 = 63;
pub const GPIO_FUNC96_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC96_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC97_IN_SEL_CFG_REG: u32 = 1072972468;
pub const GPIO_SIG97_IN_SEL_V: u32 = 1;
pub const GPIO_SIG97_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC97_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC97_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC97_IN_SEL: u32 = 63;
pub const GPIO_FUNC97_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC97_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC98_IN_SEL_CFG_REG: u32 = 1072972472;
pub const GPIO_SIG98_IN_SEL_V: u32 = 1;
pub const GPIO_SIG98_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC98_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC98_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC98_IN_SEL: u32 = 63;
pub const GPIO_FUNC98_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC98_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC99_IN_SEL_CFG_REG: u32 = 1072972476;
pub const GPIO_SIG99_IN_SEL_V: u32 = 1;
pub const GPIO_SIG99_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC99_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC99_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC99_IN_SEL: u32 = 63;
pub const GPIO_FUNC99_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC99_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC100_IN_SEL_CFG_REG: u32 = 1072972480;
pub const GPIO_SIG100_IN_SEL_V: u32 = 1;
pub const GPIO_SIG100_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC100_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC100_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC100_IN_SEL: u32 = 63;
pub const GPIO_FUNC100_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC100_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC101_IN_SEL_CFG_REG: u32 = 1072972484;
pub const GPIO_SIG101_IN_SEL_V: u32 = 1;
pub const GPIO_SIG101_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC101_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC101_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC101_IN_SEL: u32 = 63;
pub const GPIO_FUNC101_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC101_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC102_IN_SEL_CFG_REG: u32 = 1072972488;
pub const GPIO_SIG102_IN_SEL_V: u32 = 1;
pub const GPIO_SIG102_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC102_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC102_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC102_IN_SEL: u32 = 63;
pub const GPIO_FUNC102_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC102_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC103_IN_SEL_CFG_REG: u32 = 1072972492;
pub const GPIO_SIG103_IN_SEL_V: u32 = 1;
pub const GPIO_SIG103_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC103_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC103_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC103_IN_SEL: u32 = 63;
pub const GPIO_FUNC103_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC103_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC104_IN_SEL_CFG_REG: u32 = 1072972496;
pub const GPIO_SIG104_IN_SEL_V: u32 = 1;
pub const GPIO_SIG104_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC104_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC104_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC104_IN_SEL: u32 = 63;
pub const GPIO_FUNC104_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC104_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC105_IN_SEL_CFG_REG: u32 = 1072972500;
pub const GPIO_SIG105_IN_SEL_V: u32 = 1;
pub const GPIO_SIG105_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC105_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC105_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC105_IN_SEL: u32 = 63;
pub const GPIO_FUNC105_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC105_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC106_IN_SEL_CFG_REG: u32 = 1072972504;
pub const GPIO_SIG106_IN_SEL_V: u32 = 1;
pub const GPIO_SIG106_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC106_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC106_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC106_IN_SEL: u32 = 63;
pub const GPIO_FUNC106_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC106_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC107_IN_SEL_CFG_REG: u32 = 1072972508;
pub const GPIO_SIG107_IN_SEL_V: u32 = 1;
pub const GPIO_SIG107_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC107_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC107_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC107_IN_SEL: u32 = 63;
pub const GPIO_FUNC107_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC107_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC108_IN_SEL_CFG_REG: u32 = 1072972512;
pub const GPIO_SIG108_IN_SEL_V: u32 = 1;
pub const GPIO_SIG108_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC108_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC108_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC108_IN_SEL: u32 = 63;
pub const GPIO_FUNC108_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC108_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC109_IN_SEL_CFG_REG: u32 = 1072972516;
pub const GPIO_SIG109_IN_SEL_V: u32 = 1;
pub const GPIO_SIG109_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC109_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC109_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC109_IN_SEL: u32 = 63;
pub const GPIO_FUNC109_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC109_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC110_IN_SEL_CFG_REG: u32 = 1072972520;
pub const GPIO_SIG110_IN_SEL_V: u32 = 1;
pub const GPIO_SIG110_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC110_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC110_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC110_IN_SEL: u32 = 63;
pub const GPIO_FUNC110_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC110_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC111_IN_SEL_CFG_REG: u32 = 1072972524;
pub const GPIO_SIG111_IN_SEL_V: u32 = 1;
pub const GPIO_SIG111_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC111_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC111_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC111_IN_SEL: u32 = 63;
pub const GPIO_FUNC111_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC111_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC112_IN_SEL_CFG_REG: u32 = 1072972528;
pub const GPIO_SIG112_IN_SEL_V: u32 = 1;
pub const GPIO_SIG112_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC112_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC112_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC112_IN_SEL: u32 = 63;
pub const GPIO_FUNC112_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC112_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC113_IN_SEL_CFG_REG: u32 = 1072972532;
pub const GPIO_SIG113_IN_SEL_V: u32 = 1;
pub const GPIO_SIG113_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC113_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC113_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC113_IN_SEL: u32 = 63;
pub const GPIO_FUNC113_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC113_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC114_IN_SEL_CFG_REG: u32 = 1072972536;
pub const GPIO_SIG114_IN_SEL_V: u32 = 1;
pub const GPIO_SIG114_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC114_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC114_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC114_IN_SEL: u32 = 63;
pub const GPIO_FUNC114_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC114_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC115_IN_SEL_CFG_REG: u32 = 1072972540;
pub const GPIO_SIG115_IN_SEL_V: u32 = 1;
pub const GPIO_SIG115_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC115_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC115_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC115_IN_SEL: u32 = 63;
pub const GPIO_FUNC115_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC115_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC116_IN_SEL_CFG_REG: u32 = 1072972544;
pub const GPIO_SIG116_IN_SEL_V: u32 = 1;
pub const GPIO_SIG116_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC116_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC116_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC116_IN_SEL: u32 = 63;
pub const GPIO_FUNC116_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC116_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC117_IN_SEL_CFG_REG: u32 = 1072972548;
pub const GPIO_SIG117_IN_SEL_V: u32 = 1;
pub const GPIO_SIG117_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC117_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC117_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC117_IN_SEL: u32 = 63;
pub const GPIO_FUNC117_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC117_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC118_IN_SEL_CFG_REG: u32 = 1072972552;
pub const GPIO_SIG118_IN_SEL_V: u32 = 1;
pub const GPIO_SIG118_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC118_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC118_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC118_IN_SEL: u32 = 63;
pub const GPIO_FUNC118_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC118_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC119_IN_SEL_CFG_REG: u32 = 1072972556;
pub const GPIO_SIG119_IN_SEL_V: u32 = 1;
pub const GPIO_SIG119_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC119_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC119_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC119_IN_SEL: u32 = 63;
pub const GPIO_FUNC119_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC119_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC120_IN_SEL_CFG_REG: u32 = 1072972560;
pub const GPIO_SIG120_IN_SEL_V: u32 = 1;
pub const GPIO_SIG120_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC120_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC120_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC120_IN_SEL: u32 = 63;
pub const GPIO_FUNC120_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC120_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC121_IN_SEL_CFG_REG: u32 = 1072972564;
pub const GPIO_SIG121_IN_SEL_V: u32 = 1;
pub const GPIO_SIG121_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC121_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC121_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC121_IN_SEL: u32 = 63;
pub const GPIO_FUNC121_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC121_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC122_IN_SEL_CFG_REG: u32 = 1072972568;
pub const GPIO_SIG122_IN_SEL_V: u32 = 1;
pub const GPIO_SIG122_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC122_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC122_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC122_IN_SEL: u32 = 63;
pub const GPIO_FUNC122_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC122_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC123_IN_SEL_CFG_REG: u32 = 1072972572;
pub const GPIO_SIG123_IN_SEL_V: u32 = 1;
pub const GPIO_SIG123_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC123_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC123_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC123_IN_SEL: u32 = 63;
pub const GPIO_FUNC123_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC123_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC124_IN_SEL_CFG_REG: u32 = 1072972576;
pub const GPIO_SIG124_IN_SEL_V: u32 = 1;
pub const GPIO_SIG124_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC124_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC124_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC124_IN_SEL: u32 = 63;
pub const GPIO_FUNC124_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC124_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC125_IN_SEL_CFG_REG: u32 = 1072972580;
pub const GPIO_SIG125_IN_SEL_V: u32 = 1;
pub const GPIO_SIG125_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC125_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC125_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC125_IN_SEL: u32 = 63;
pub const GPIO_FUNC125_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC125_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC126_IN_SEL_CFG_REG: u32 = 1072972584;
pub const GPIO_SIG126_IN_SEL_V: u32 = 1;
pub const GPIO_SIG126_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC126_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC126_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC126_IN_SEL: u32 = 63;
pub const GPIO_FUNC126_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC126_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC127_IN_SEL_CFG_REG: u32 = 1072972588;
pub const GPIO_SIG127_IN_SEL_V: u32 = 1;
pub const GPIO_SIG127_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC127_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC127_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC127_IN_SEL: u32 = 63;
pub const GPIO_FUNC127_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC127_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC128_IN_SEL_CFG_REG: u32 = 1072972592;
pub const GPIO_SIG128_IN_SEL_V: u32 = 1;
pub const GPIO_SIG128_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC128_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC128_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC128_IN_SEL: u32 = 63;
pub const GPIO_FUNC128_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC128_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC129_IN_SEL_CFG_REG: u32 = 1072972596;
pub const GPIO_SIG129_IN_SEL_V: u32 = 1;
pub const GPIO_SIG129_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC129_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC129_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC129_IN_SEL: u32 = 63;
pub const GPIO_FUNC129_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC129_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC130_IN_SEL_CFG_REG: u32 = 1072972600;
pub const GPIO_SIG130_IN_SEL_V: u32 = 1;
pub const GPIO_SIG130_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC130_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC130_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC130_IN_SEL: u32 = 63;
pub const GPIO_FUNC130_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC130_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC131_IN_SEL_CFG_REG: u32 = 1072972604;
pub const GPIO_SIG131_IN_SEL_V: u32 = 1;
pub const GPIO_SIG131_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC131_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC131_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC131_IN_SEL: u32 = 63;
pub const GPIO_FUNC131_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC131_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC132_IN_SEL_CFG_REG: u32 = 1072972608;
pub const GPIO_SIG132_IN_SEL_V: u32 = 1;
pub const GPIO_SIG132_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC132_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC132_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC132_IN_SEL: u32 = 63;
pub const GPIO_FUNC132_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC132_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC133_IN_SEL_CFG_REG: u32 = 1072972612;
pub const GPIO_SIG133_IN_SEL_V: u32 = 1;
pub const GPIO_SIG133_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC133_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC133_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC133_IN_SEL: u32 = 63;
pub const GPIO_FUNC133_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC133_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC134_IN_SEL_CFG_REG: u32 = 1072972616;
pub const GPIO_SIG134_IN_SEL_V: u32 = 1;
pub const GPIO_SIG134_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC134_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC134_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC134_IN_SEL: u32 = 63;
pub const GPIO_FUNC134_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC134_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC135_IN_SEL_CFG_REG: u32 = 1072972620;
pub const GPIO_SIG135_IN_SEL_V: u32 = 1;
pub const GPIO_SIG135_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC135_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC135_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC135_IN_SEL: u32 = 63;
pub const GPIO_FUNC135_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC135_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC136_IN_SEL_CFG_REG: u32 = 1072972624;
pub const GPIO_SIG136_IN_SEL_V: u32 = 1;
pub const GPIO_SIG136_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC136_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC136_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC136_IN_SEL: u32 = 63;
pub const GPIO_FUNC136_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC136_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC137_IN_SEL_CFG_REG: u32 = 1072972628;
pub const GPIO_SIG137_IN_SEL_V: u32 = 1;
pub const GPIO_SIG137_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC137_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC137_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC137_IN_SEL: u32 = 63;
pub const GPIO_FUNC137_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC137_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC138_IN_SEL_CFG_REG: u32 = 1072972632;
pub const GPIO_SIG138_IN_SEL_V: u32 = 1;
pub const GPIO_SIG138_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC138_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC138_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC138_IN_SEL: u32 = 63;
pub const GPIO_FUNC138_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC138_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC139_IN_SEL_CFG_REG: u32 = 1072972636;
pub const GPIO_SIG139_IN_SEL_V: u32 = 1;
pub const GPIO_SIG139_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC139_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC139_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC139_IN_SEL: u32 = 63;
pub const GPIO_FUNC139_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC139_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC140_IN_SEL_CFG_REG: u32 = 1072972640;
pub const GPIO_SIG140_IN_SEL_V: u32 = 1;
pub const GPIO_SIG140_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC140_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC140_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC140_IN_SEL: u32 = 63;
pub const GPIO_FUNC140_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC140_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC141_IN_SEL_CFG_REG: u32 = 1072972644;
pub const GPIO_SIG141_IN_SEL_V: u32 = 1;
pub const GPIO_SIG141_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC141_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC141_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC141_IN_SEL: u32 = 63;
pub const GPIO_FUNC141_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC141_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC142_IN_SEL_CFG_REG: u32 = 1072972648;
pub const GPIO_SIG142_IN_SEL_V: u32 = 1;
pub const GPIO_SIG142_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC142_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC142_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC142_IN_SEL: u32 = 63;
pub const GPIO_FUNC142_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC142_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC143_IN_SEL_CFG_REG: u32 = 1072972652;
pub const GPIO_SIG143_IN_SEL_V: u32 = 1;
pub const GPIO_SIG143_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC143_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC143_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC143_IN_SEL: u32 = 63;
pub const GPIO_FUNC143_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC143_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC144_IN_SEL_CFG_REG: u32 = 1072972656;
pub const GPIO_SIG144_IN_SEL_V: u32 = 1;
pub const GPIO_SIG144_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC144_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC144_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC144_IN_SEL: u32 = 63;
pub const GPIO_FUNC144_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC144_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC145_IN_SEL_CFG_REG: u32 = 1072972660;
pub const GPIO_SIG145_IN_SEL_V: u32 = 1;
pub const GPIO_SIG145_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC145_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC145_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC145_IN_SEL: u32 = 63;
pub const GPIO_FUNC145_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC145_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC146_IN_SEL_CFG_REG: u32 = 1072972664;
pub const GPIO_SIG146_IN_SEL_V: u32 = 1;
pub const GPIO_SIG146_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC146_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC146_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC146_IN_SEL: u32 = 63;
pub const GPIO_FUNC146_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC146_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC147_IN_SEL_CFG_REG: u32 = 1072972668;
pub const GPIO_SIG147_IN_SEL_V: u32 = 1;
pub const GPIO_SIG147_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC147_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC147_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC147_IN_SEL: u32 = 63;
pub const GPIO_FUNC147_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC147_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC148_IN_SEL_CFG_REG: u32 = 1072972672;
pub const GPIO_SIG148_IN_SEL_V: u32 = 1;
pub const GPIO_SIG148_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC148_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC148_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC148_IN_SEL: u32 = 63;
pub const GPIO_FUNC148_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC148_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC149_IN_SEL_CFG_REG: u32 = 1072972676;
pub const GPIO_SIG149_IN_SEL_V: u32 = 1;
pub const GPIO_SIG149_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC149_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC149_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC149_IN_SEL: u32 = 63;
pub const GPIO_FUNC149_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC149_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC150_IN_SEL_CFG_REG: u32 = 1072972680;
pub const GPIO_SIG150_IN_SEL_V: u32 = 1;
pub const GPIO_SIG150_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC150_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC150_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC150_IN_SEL: u32 = 63;
pub const GPIO_FUNC150_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC150_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC151_IN_SEL_CFG_REG: u32 = 1072972684;
pub const GPIO_SIG151_IN_SEL_V: u32 = 1;
pub const GPIO_SIG151_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC151_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC151_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC151_IN_SEL: u32 = 63;
pub const GPIO_FUNC151_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC151_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC152_IN_SEL_CFG_REG: u32 = 1072972688;
pub const GPIO_SIG152_IN_SEL_V: u32 = 1;
pub const GPIO_SIG152_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC152_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC152_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC152_IN_SEL: u32 = 63;
pub const GPIO_FUNC152_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC152_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC153_IN_SEL_CFG_REG: u32 = 1072972692;
pub const GPIO_SIG153_IN_SEL_V: u32 = 1;
pub const GPIO_SIG153_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC153_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC153_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC153_IN_SEL: u32 = 63;
pub const GPIO_FUNC153_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC153_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC154_IN_SEL_CFG_REG: u32 = 1072972696;
pub const GPIO_SIG154_IN_SEL_V: u32 = 1;
pub const GPIO_SIG154_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC154_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC154_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC154_IN_SEL: u32 = 63;
pub const GPIO_FUNC154_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC154_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC155_IN_SEL_CFG_REG: u32 = 1072972700;
pub const GPIO_SIG155_IN_SEL_V: u32 = 1;
pub const GPIO_SIG155_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC155_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC155_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC155_IN_SEL: u32 = 63;
pub const GPIO_FUNC155_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC155_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC156_IN_SEL_CFG_REG: u32 = 1072972704;
pub const GPIO_SIG156_IN_SEL_V: u32 = 1;
pub const GPIO_SIG156_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC156_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC156_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC156_IN_SEL: u32 = 63;
pub const GPIO_FUNC156_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC156_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC157_IN_SEL_CFG_REG: u32 = 1072972708;
pub const GPIO_SIG157_IN_SEL_V: u32 = 1;
pub const GPIO_SIG157_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC157_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC157_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC157_IN_SEL: u32 = 63;
pub const GPIO_FUNC157_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC157_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC158_IN_SEL_CFG_REG: u32 = 1072972712;
pub const GPIO_SIG158_IN_SEL_V: u32 = 1;
pub const GPIO_SIG158_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC158_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC158_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC158_IN_SEL: u32 = 63;
pub const GPIO_FUNC158_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC158_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC159_IN_SEL_CFG_REG: u32 = 1072972716;
pub const GPIO_SIG159_IN_SEL_V: u32 = 1;
pub const GPIO_SIG159_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC159_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC159_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC159_IN_SEL: u32 = 63;
pub const GPIO_FUNC159_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC159_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC160_IN_SEL_CFG_REG: u32 = 1072972720;
pub const GPIO_SIG160_IN_SEL_V: u32 = 1;
pub const GPIO_SIG160_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC160_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC160_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC160_IN_SEL: u32 = 63;
pub const GPIO_FUNC160_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC160_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC161_IN_SEL_CFG_REG: u32 = 1072972724;
pub const GPIO_SIG161_IN_SEL_V: u32 = 1;
pub const GPIO_SIG161_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC161_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC161_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC161_IN_SEL: u32 = 63;
pub const GPIO_FUNC161_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC161_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC162_IN_SEL_CFG_REG: u32 = 1072972728;
pub const GPIO_SIG162_IN_SEL_V: u32 = 1;
pub const GPIO_SIG162_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC162_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC162_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC162_IN_SEL: u32 = 63;
pub const GPIO_FUNC162_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC162_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC163_IN_SEL_CFG_REG: u32 = 1072972732;
pub const GPIO_SIG163_IN_SEL_V: u32 = 1;
pub const GPIO_SIG163_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC163_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC163_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC163_IN_SEL: u32 = 63;
pub const GPIO_FUNC163_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC163_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC164_IN_SEL_CFG_REG: u32 = 1072972736;
pub const GPIO_SIG164_IN_SEL_V: u32 = 1;
pub const GPIO_SIG164_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC164_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC164_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC164_IN_SEL: u32 = 63;
pub const GPIO_FUNC164_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC164_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC165_IN_SEL_CFG_REG: u32 = 1072972740;
pub const GPIO_SIG165_IN_SEL_V: u32 = 1;
pub const GPIO_SIG165_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC165_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC165_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC165_IN_SEL: u32 = 63;
pub const GPIO_FUNC165_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC165_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC166_IN_SEL_CFG_REG: u32 = 1072972744;
pub const GPIO_SIG166_IN_SEL_V: u32 = 1;
pub const GPIO_SIG166_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC166_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC166_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC166_IN_SEL: u32 = 63;
pub const GPIO_FUNC166_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC166_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC167_IN_SEL_CFG_REG: u32 = 1072972748;
pub const GPIO_SIG167_IN_SEL_V: u32 = 1;
pub const GPIO_SIG167_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC167_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC167_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC167_IN_SEL: u32 = 63;
pub const GPIO_FUNC167_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC167_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC168_IN_SEL_CFG_REG: u32 = 1072972752;
pub const GPIO_SIG168_IN_SEL_V: u32 = 1;
pub const GPIO_SIG168_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC168_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC168_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC168_IN_SEL: u32 = 63;
pub const GPIO_FUNC168_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC168_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC169_IN_SEL_CFG_REG: u32 = 1072972756;
pub const GPIO_SIG169_IN_SEL_V: u32 = 1;
pub const GPIO_SIG169_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC169_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC169_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC169_IN_SEL: u32 = 63;
pub const GPIO_FUNC169_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC169_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC170_IN_SEL_CFG_REG: u32 = 1072972760;
pub const GPIO_SIG170_IN_SEL_V: u32 = 1;
pub const GPIO_SIG170_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC170_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC170_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC170_IN_SEL: u32 = 63;
pub const GPIO_FUNC170_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC170_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC171_IN_SEL_CFG_REG: u32 = 1072972764;
pub const GPIO_SIG171_IN_SEL_V: u32 = 1;
pub const GPIO_SIG171_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC171_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC171_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC171_IN_SEL: u32 = 63;
pub const GPIO_FUNC171_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC171_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC172_IN_SEL_CFG_REG: u32 = 1072972768;
pub const GPIO_SIG172_IN_SEL_V: u32 = 1;
pub const GPIO_SIG172_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC172_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC172_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC172_IN_SEL: u32 = 63;
pub const GPIO_FUNC172_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC172_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC173_IN_SEL_CFG_REG: u32 = 1072972772;
pub const GPIO_SIG173_IN_SEL_V: u32 = 1;
pub const GPIO_SIG173_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC173_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC173_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC173_IN_SEL: u32 = 63;
pub const GPIO_FUNC173_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC173_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC174_IN_SEL_CFG_REG: u32 = 1072972776;
pub const GPIO_SIG174_IN_SEL_V: u32 = 1;
pub const GPIO_SIG174_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC174_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC174_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC174_IN_SEL: u32 = 63;
pub const GPIO_FUNC174_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC174_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC175_IN_SEL_CFG_REG: u32 = 1072972780;
pub const GPIO_SIG175_IN_SEL_V: u32 = 1;
pub const GPIO_SIG175_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC175_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC175_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC175_IN_SEL: u32 = 63;
pub const GPIO_FUNC175_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC175_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC176_IN_SEL_CFG_REG: u32 = 1072972784;
pub const GPIO_SIG176_IN_SEL_V: u32 = 1;
pub const GPIO_SIG176_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC176_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC176_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC176_IN_SEL: u32 = 63;
pub const GPIO_FUNC176_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC176_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC177_IN_SEL_CFG_REG: u32 = 1072972788;
pub const GPIO_SIG177_IN_SEL_V: u32 = 1;
pub const GPIO_SIG177_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC177_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC177_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC177_IN_SEL: u32 = 63;
pub const GPIO_FUNC177_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC177_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC178_IN_SEL_CFG_REG: u32 = 1072972792;
pub const GPIO_SIG178_IN_SEL_V: u32 = 1;
pub const GPIO_SIG178_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC178_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC178_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC178_IN_SEL: u32 = 63;
pub const GPIO_FUNC178_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC178_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC179_IN_SEL_CFG_REG: u32 = 1072972796;
pub const GPIO_SIG179_IN_SEL_V: u32 = 1;
pub const GPIO_SIG179_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC179_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC179_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC179_IN_SEL: u32 = 63;
pub const GPIO_FUNC179_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC179_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC180_IN_SEL_CFG_REG: u32 = 1072972800;
pub const GPIO_SIG180_IN_SEL_V: u32 = 1;
pub const GPIO_SIG180_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC180_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC180_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC180_IN_SEL: u32 = 63;
pub const GPIO_FUNC180_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC180_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC181_IN_SEL_CFG_REG: u32 = 1072972804;
pub const GPIO_SIG181_IN_SEL_V: u32 = 1;
pub const GPIO_SIG181_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC181_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC181_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC181_IN_SEL: u32 = 63;
pub const GPIO_FUNC181_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC181_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC182_IN_SEL_CFG_REG: u32 = 1072972808;
pub const GPIO_SIG182_IN_SEL_V: u32 = 1;
pub const GPIO_SIG182_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC182_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC182_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC182_IN_SEL: u32 = 63;
pub const GPIO_FUNC182_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC182_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC183_IN_SEL_CFG_REG: u32 = 1072972812;
pub const GPIO_SIG183_IN_SEL_V: u32 = 1;
pub const GPIO_SIG183_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC183_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC183_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC183_IN_SEL: u32 = 63;
pub const GPIO_FUNC183_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC183_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC184_IN_SEL_CFG_REG: u32 = 1072972816;
pub const GPIO_SIG184_IN_SEL_V: u32 = 1;
pub const GPIO_SIG184_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC184_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC184_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC184_IN_SEL: u32 = 63;
pub const GPIO_FUNC184_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC184_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC185_IN_SEL_CFG_REG: u32 = 1072972820;
pub const GPIO_SIG185_IN_SEL_V: u32 = 1;
pub const GPIO_SIG185_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC185_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC185_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC185_IN_SEL: u32 = 63;
pub const GPIO_FUNC185_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC185_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC186_IN_SEL_CFG_REG: u32 = 1072972824;
pub const GPIO_SIG186_IN_SEL_V: u32 = 1;
pub const GPIO_SIG186_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC186_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC186_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC186_IN_SEL: u32 = 63;
pub const GPIO_FUNC186_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC186_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC187_IN_SEL_CFG_REG: u32 = 1072972828;
pub const GPIO_SIG187_IN_SEL_V: u32 = 1;
pub const GPIO_SIG187_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC187_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC187_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC187_IN_SEL: u32 = 63;
pub const GPIO_FUNC187_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC187_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC188_IN_SEL_CFG_REG: u32 = 1072972832;
pub const GPIO_SIG188_IN_SEL_V: u32 = 1;
pub const GPIO_SIG188_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC188_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC188_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC188_IN_SEL: u32 = 63;
pub const GPIO_FUNC188_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC188_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC189_IN_SEL_CFG_REG: u32 = 1072972836;
pub const GPIO_SIG189_IN_SEL_V: u32 = 1;
pub const GPIO_SIG189_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC189_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC189_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC189_IN_SEL: u32 = 63;
pub const GPIO_FUNC189_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC189_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC190_IN_SEL_CFG_REG: u32 = 1072972840;
pub const GPIO_SIG190_IN_SEL_V: u32 = 1;
pub const GPIO_SIG190_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC190_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC190_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC190_IN_SEL: u32 = 63;
pub const GPIO_FUNC190_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC190_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC191_IN_SEL_CFG_REG: u32 = 1072972844;
pub const GPIO_SIG191_IN_SEL_V: u32 = 1;
pub const GPIO_SIG191_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC191_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC191_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC191_IN_SEL: u32 = 63;
pub const GPIO_FUNC191_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC191_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC192_IN_SEL_CFG_REG: u32 = 1072972848;
pub const GPIO_SIG192_IN_SEL_V: u32 = 1;
pub const GPIO_SIG192_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC192_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC192_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC192_IN_SEL: u32 = 63;
pub const GPIO_FUNC192_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC192_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC193_IN_SEL_CFG_REG: u32 = 1072972852;
pub const GPIO_SIG193_IN_SEL_V: u32 = 1;
pub const GPIO_SIG193_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC193_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC193_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC193_IN_SEL: u32 = 63;
pub const GPIO_FUNC193_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC193_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC194_IN_SEL_CFG_REG: u32 = 1072972856;
pub const GPIO_SIG194_IN_SEL_V: u32 = 1;
pub const GPIO_SIG194_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC194_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC194_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC194_IN_SEL: u32 = 63;
pub const GPIO_FUNC194_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC194_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC195_IN_SEL_CFG_REG: u32 = 1072972860;
pub const GPIO_SIG195_IN_SEL_V: u32 = 1;
pub const GPIO_SIG195_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC195_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC195_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC195_IN_SEL: u32 = 63;
pub const GPIO_FUNC195_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC195_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC196_IN_SEL_CFG_REG: u32 = 1072972864;
pub const GPIO_SIG196_IN_SEL_V: u32 = 1;
pub const GPIO_SIG196_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC196_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC196_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC196_IN_SEL: u32 = 63;
pub const GPIO_FUNC196_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC196_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC197_IN_SEL_CFG_REG: u32 = 1072972868;
pub const GPIO_SIG197_IN_SEL_V: u32 = 1;
pub const GPIO_SIG197_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC197_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC197_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC197_IN_SEL: u32 = 63;
pub const GPIO_FUNC197_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC197_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC198_IN_SEL_CFG_REG: u32 = 1072972872;
pub const GPIO_SIG198_IN_SEL_V: u32 = 1;
pub const GPIO_SIG198_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC198_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC198_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC198_IN_SEL: u32 = 63;
pub const GPIO_FUNC198_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC198_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC199_IN_SEL_CFG_REG: u32 = 1072972876;
pub const GPIO_SIG199_IN_SEL_V: u32 = 1;
pub const GPIO_SIG199_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC199_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC199_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC199_IN_SEL: u32 = 63;
pub const GPIO_FUNC199_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC199_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC200_IN_SEL_CFG_REG: u32 = 1072972880;
pub const GPIO_SIG200_IN_SEL_V: u32 = 1;
pub const GPIO_SIG200_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC200_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC200_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC200_IN_SEL: u32 = 63;
pub const GPIO_FUNC200_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC200_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC201_IN_SEL_CFG_REG: u32 = 1072972884;
pub const GPIO_SIG201_IN_SEL_V: u32 = 1;
pub const GPIO_SIG201_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC201_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC201_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC201_IN_SEL: u32 = 63;
pub const GPIO_FUNC201_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC201_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC202_IN_SEL_CFG_REG: u32 = 1072972888;
pub const GPIO_SIG202_IN_SEL_V: u32 = 1;
pub const GPIO_SIG202_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC202_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC202_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC202_IN_SEL: u32 = 63;
pub const GPIO_FUNC202_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC202_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC203_IN_SEL_CFG_REG: u32 = 1072972892;
pub const GPIO_SIG203_IN_SEL_V: u32 = 1;
pub const GPIO_SIG203_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC203_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC203_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC203_IN_SEL: u32 = 63;
pub const GPIO_FUNC203_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC203_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC204_IN_SEL_CFG_REG: u32 = 1072972896;
pub const GPIO_SIG204_IN_SEL_V: u32 = 1;
pub const GPIO_SIG204_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC204_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC204_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC204_IN_SEL: u32 = 63;
pub const GPIO_FUNC204_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC204_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC205_IN_SEL_CFG_REG: u32 = 1072972900;
pub const GPIO_SIG205_IN_SEL_V: u32 = 1;
pub const GPIO_SIG205_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC205_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC205_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC205_IN_SEL: u32 = 63;
pub const GPIO_FUNC205_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC205_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC206_IN_SEL_CFG_REG: u32 = 1072972904;
pub const GPIO_SIG206_IN_SEL_V: u32 = 1;
pub const GPIO_SIG206_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC206_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC206_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC206_IN_SEL: u32 = 63;
pub const GPIO_FUNC206_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC206_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC207_IN_SEL_CFG_REG: u32 = 1072972908;
pub const GPIO_SIG207_IN_SEL_V: u32 = 1;
pub const GPIO_SIG207_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC207_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC207_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC207_IN_SEL: u32 = 63;
pub const GPIO_FUNC207_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC207_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC208_IN_SEL_CFG_REG: u32 = 1072972912;
pub const GPIO_SIG208_IN_SEL_V: u32 = 1;
pub const GPIO_SIG208_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC208_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC208_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC208_IN_SEL: u32 = 63;
pub const GPIO_FUNC208_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC208_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC209_IN_SEL_CFG_REG: u32 = 1072972916;
pub const GPIO_SIG209_IN_SEL_V: u32 = 1;
pub const GPIO_SIG209_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC209_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC209_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC209_IN_SEL: u32 = 63;
pub const GPIO_FUNC209_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC209_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC210_IN_SEL_CFG_REG: u32 = 1072972920;
pub const GPIO_SIG210_IN_SEL_V: u32 = 1;
pub const GPIO_SIG210_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC210_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC210_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC210_IN_SEL: u32 = 63;
pub const GPIO_FUNC210_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC210_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC211_IN_SEL_CFG_REG: u32 = 1072972924;
pub const GPIO_SIG211_IN_SEL_V: u32 = 1;
pub const GPIO_SIG211_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC211_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC211_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC211_IN_SEL: u32 = 63;
pub const GPIO_FUNC211_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC211_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC212_IN_SEL_CFG_REG: u32 = 1072972928;
pub const GPIO_SIG212_IN_SEL_V: u32 = 1;
pub const GPIO_SIG212_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC212_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC212_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC212_IN_SEL: u32 = 63;
pub const GPIO_FUNC212_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC212_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC213_IN_SEL_CFG_REG: u32 = 1072972932;
pub const GPIO_SIG213_IN_SEL_V: u32 = 1;
pub const GPIO_SIG213_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC213_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC213_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC213_IN_SEL: u32 = 63;
pub const GPIO_FUNC213_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC213_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC214_IN_SEL_CFG_REG: u32 = 1072972936;
pub const GPIO_SIG214_IN_SEL_V: u32 = 1;
pub const GPIO_SIG214_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC214_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC214_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC214_IN_SEL: u32 = 63;
pub const GPIO_FUNC214_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC214_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC215_IN_SEL_CFG_REG: u32 = 1072972940;
pub const GPIO_SIG215_IN_SEL_V: u32 = 1;
pub const GPIO_SIG215_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC215_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC215_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC215_IN_SEL: u32 = 63;
pub const GPIO_FUNC215_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC215_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC216_IN_SEL_CFG_REG: u32 = 1072972944;
pub const GPIO_SIG216_IN_SEL_V: u32 = 1;
pub const GPIO_SIG216_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC216_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC216_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC216_IN_SEL: u32 = 63;
pub const GPIO_FUNC216_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC216_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC217_IN_SEL_CFG_REG: u32 = 1072972948;
pub const GPIO_SIG217_IN_SEL_V: u32 = 1;
pub const GPIO_SIG217_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC217_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC217_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC217_IN_SEL: u32 = 63;
pub const GPIO_FUNC217_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC217_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC218_IN_SEL_CFG_REG: u32 = 1072972952;
pub const GPIO_SIG218_IN_SEL_V: u32 = 1;
pub const GPIO_SIG218_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC218_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC218_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC218_IN_SEL: u32 = 63;
pub const GPIO_FUNC218_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC218_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC219_IN_SEL_CFG_REG: u32 = 1072972956;
pub const GPIO_SIG219_IN_SEL_V: u32 = 1;
pub const GPIO_SIG219_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC219_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC219_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC219_IN_SEL: u32 = 63;
pub const GPIO_FUNC219_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC219_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC220_IN_SEL_CFG_REG: u32 = 1072972960;
pub const GPIO_SIG220_IN_SEL_V: u32 = 1;
pub const GPIO_SIG220_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC220_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC220_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC220_IN_SEL: u32 = 63;
pub const GPIO_FUNC220_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC220_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC221_IN_SEL_CFG_REG: u32 = 1072972964;
pub const GPIO_SIG221_IN_SEL_V: u32 = 1;
pub const GPIO_SIG221_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC221_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC221_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC221_IN_SEL: u32 = 63;
pub const GPIO_FUNC221_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC221_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC222_IN_SEL_CFG_REG: u32 = 1072972968;
pub const GPIO_SIG222_IN_SEL_V: u32 = 1;
pub const GPIO_SIG222_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC222_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC222_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC222_IN_SEL: u32 = 63;
pub const GPIO_FUNC222_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC222_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC223_IN_SEL_CFG_REG: u32 = 1072972972;
pub const GPIO_SIG223_IN_SEL_V: u32 = 1;
pub const GPIO_SIG223_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC223_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC223_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC223_IN_SEL: u32 = 63;
pub const GPIO_FUNC223_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC223_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC224_IN_SEL_CFG_REG: u32 = 1072972976;
pub const GPIO_SIG224_IN_SEL_V: u32 = 1;
pub const GPIO_SIG224_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC224_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC224_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC224_IN_SEL: u32 = 63;
pub const GPIO_FUNC224_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC224_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC225_IN_SEL_CFG_REG: u32 = 1072972980;
pub const GPIO_SIG225_IN_SEL_V: u32 = 1;
pub const GPIO_SIG225_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC225_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC225_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC225_IN_SEL: u32 = 63;
pub const GPIO_FUNC225_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC225_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC226_IN_SEL_CFG_REG: u32 = 1072972984;
pub const GPIO_SIG226_IN_SEL_V: u32 = 1;
pub const GPIO_SIG226_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC226_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC226_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC226_IN_SEL: u32 = 63;
pub const GPIO_FUNC226_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC226_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC227_IN_SEL_CFG_REG: u32 = 1072972988;
pub const GPIO_SIG227_IN_SEL_V: u32 = 1;
pub const GPIO_SIG227_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC227_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC227_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC227_IN_SEL: u32 = 63;
pub const GPIO_FUNC227_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC227_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC228_IN_SEL_CFG_REG: u32 = 1072972992;
pub const GPIO_SIG228_IN_SEL_V: u32 = 1;
pub const GPIO_SIG228_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC228_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC228_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC228_IN_SEL: u32 = 63;
pub const GPIO_FUNC228_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC228_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC229_IN_SEL_CFG_REG: u32 = 1072972996;
pub const GPIO_SIG229_IN_SEL_V: u32 = 1;
pub const GPIO_SIG229_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC229_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC229_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC229_IN_SEL: u32 = 63;
pub const GPIO_FUNC229_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC229_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC230_IN_SEL_CFG_REG: u32 = 1072973000;
pub const GPIO_SIG230_IN_SEL_V: u32 = 1;
pub const GPIO_SIG230_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC230_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC230_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC230_IN_SEL: u32 = 63;
pub const GPIO_FUNC230_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC230_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC231_IN_SEL_CFG_REG: u32 = 1072973004;
pub const GPIO_SIG231_IN_SEL_V: u32 = 1;
pub const GPIO_SIG231_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC231_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC231_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC231_IN_SEL: u32 = 63;
pub const GPIO_FUNC231_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC231_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC232_IN_SEL_CFG_REG: u32 = 1072973008;
pub const GPIO_SIG232_IN_SEL_V: u32 = 1;
pub const GPIO_SIG232_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC232_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC232_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC232_IN_SEL: u32 = 63;
pub const GPIO_FUNC232_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC232_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC233_IN_SEL_CFG_REG: u32 = 1072973012;
pub const GPIO_SIG233_IN_SEL_V: u32 = 1;
pub const GPIO_SIG233_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC233_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC233_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC233_IN_SEL: u32 = 63;
pub const GPIO_FUNC233_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC233_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC234_IN_SEL_CFG_REG: u32 = 1072973016;
pub const GPIO_SIG234_IN_SEL_V: u32 = 1;
pub const GPIO_SIG234_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC234_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC234_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC234_IN_SEL: u32 = 63;
pub const GPIO_FUNC234_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC234_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC235_IN_SEL_CFG_REG: u32 = 1072973020;
pub const GPIO_SIG235_IN_SEL_V: u32 = 1;
pub const GPIO_SIG235_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC235_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC235_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC235_IN_SEL: u32 = 63;
pub const GPIO_FUNC235_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC235_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC236_IN_SEL_CFG_REG: u32 = 1072973024;
pub const GPIO_SIG236_IN_SEL_V: u32 = 1;
pub const GPIO_SIG236_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC236_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC236_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC236_IN_SEL: u32 = 63;
pub const GPIO_FUNC236_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC236_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC237_IN_SEL_CFG_REG: u32 = 1072973028;
pub const GPIO_SIG237_IN_SEL_V: u32 = 1;
pub const GPIO_SIG237_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC237_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC237_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC237_IN_SEL: u32 = 63;
pub const GPIO_FUNC237_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC237_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC238_IN_SEL_CFG_REG: u32 = 1072973032;
pub const GPIO_SIG238_IN_SEL_V: u32 = 1;
pub const GPIO_SIG238_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC238_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC238_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC238_IN_SEL: u32 = 63;
pub const GPIO_FUNC238_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC238_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC239_IN_SEL_CFG_REG: u32 = 1072973036;
pub const GPIO_SIG239_IN_SEL_V: u32 = 1;
pub const GPIO_SIG239_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC239_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC239_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC239_IN_SEL: u32 = 63;
pub const GPIO_FUNC239_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC239_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC240_IN_SEL_CFG_REG: u32 = 1072973040;
pub const GPIO_SIG240_IN_SEL_V: u32 = 1;
pub const GPIO_SIG240_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC240_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC240_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC240_IN_SEL: u32 = 63;
pub const GPIO_FUNC240_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC240_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC241_IN_SEL_CFG_REG: u32 = 1072973044;
pub const GPIO_SIG241_IN_SEL_V: u32 = 1;
pub const GPIO_SIG241_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC241_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC241_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC241_IN_SEL: u32 = 63;
pub const GPIO_FUNC241_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC241_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC242_IN_SEL_CFG_REG: u32 = 1072973048;
pub const GPIO_SIG242_IN_SEL_V: u32 = 1;
pub const GPIO_SIG242_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC242_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC242_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC242_IN_SEL: u32 = 63;
pub const GPIO_FUNC242_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC242_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC243_IN_SEL_CFG_REG: u32 = 1072973052;
pub const GPIO_SIG243_IN_SEL_V: u32 = 1;
pub const GPIO_SIG243_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC243_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC243_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC243_IN_SEL: u32 = 63;
pub const GPIO_FUNC243_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC243_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC244_IN_SEL_CFG_REG: u32 = 1072973056;
pub const GPIO_SIG244_IN_SEL_V: u32 = 1;
pub const GPIO_SIG244_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC244_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC244_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC244_IN_SEL: u32 = 63;
pub const GPIO_FUNC244_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC244_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC245_IN_SEL_CFG_REG: u32 = 1072973060;
pub const GPIO_SIG245_IN_SEL_V: u32 = 1;
pub const GPIO_SIG245_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC245_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC245_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC245_IN_SEL: u32 = 63;
pub const GPIO_FUNC245_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC245_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC246_IN_SEL_CFG_REG: u32 = 1072973064;
pub const GPIO_SIG246_IN_SEL_V: u32 = 1;
pub const GPIO_SIG246_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC246_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC246_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC246_IN_SEL: u32 = 63;
pub const GPIO_FUNC246_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC246_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC247_IN_SEL_CFG_REG: u32 = 1072973068;
pub const GPIO_SIG247_IN_SEL_V: u32 = 1;
pub const GPIO_SIG247_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC247_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC247_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC247_IN_SEL: u32 = 63;
pub const GPIO_FUNC247_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC247_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC248_IN_SEL_CFG_REG: u32 = 1072973072;
pub const GPIO_SIG248_IN_SEL_V: u32 = 1;
pub const GPIO_SIG248_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC248_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC248_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC248_IN_SEL: u32 = 63;
pub const GPIO_FUNC248_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC248_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC249_IN_SEL_CFG_REG: u32 = 1072973076;
pub const GPIO_SIG249_IN_SEL_V: u32 = 1;
pub const GPIO_SIG249_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC249_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC249_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC249_IN_SEL: u32 = 63;
pub const GPIO_FUNC249_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC249_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC250_IN_SEL_CFG_REG: u32 = 1072973080;
pub const GPIO_SIG250_IN_SEL_V: u32 = 1;
pub const GPIO_SIG250_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC250_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC250_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC250_IN_SEL: u32 = 63;
pub const GPIO_FUNC250_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC250_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC251_IN_SEL_CFG_REG: u32 = 1072973084;
pub const GPIO_SIG251_IN_SEL_V: u32 = 1;
pub const GPIO_SIG251_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC251_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC251_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC251_IN_SEL: u32 = 63;
pub const GPIO_FUNC251_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC251_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC252_IN_SEL_CFG_REG: u32 = 1072973088;
pub const GPIO_SIG252_IN_SEL_V: u32 = 1;
pub const GPIO_SIG252_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC252_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC252_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC252_IN_SEL: u32 = 63;
pub const GPIO_FUNC252_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC252_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC253_IN_SEL_CFG_REG: u32 = 1072973092;
pub const GPIO_SIG253_IN_SEL_V: u32 = 1;
pub const GPIO_SIG253_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC253_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC253_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC253_IN_SEL: u32 = 63;
pub const GPIO_FUNC253_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC253_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC254_IN_SEL_CFG_REG: u32 = 1072973096;
pub const GPIO_SIG254_IN_SEL_V: u32 = 1;
pub const GPIO_SIG254_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC254_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC254_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC254_IN_SEL: u32 = 63;
pub const GPIO_FUNC254_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC254_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC255_IN_SEL_CFG_REG: u32 = 1072973100;
pub const GPIO_SIG255_IN_SEL_V: u32 = 1;
pub const GPIO_SIG255_IN_SEL_S: u32 = 7;
pub const GPIO_FUNC255_IN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC255_IN_INV_SEL_S: u32 = 6;
pub const GPIO_FUNC255_IN_SEL: u32 = 63;
pub const GPIO_FUNC255_IN_SEL_V: u32 = 63;
pub const GPIO_FUNC255_IN_SEL_S: u32 = 0;
pub const GPIO_FUNC0_OUT_SEL_CFG_REG: u32 = 1072973104;
pub const GPIO_FUNC0_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC0_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC0_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC0_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC0_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC0_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC0_OUT_SEL: u32 = 511;
pub const GPIO_FUNC0_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC0_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC1_OUT_SEL_CFG_REG: u32 = 1072973108;
pub const GPIO_FUNC1_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC1_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC1_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC1_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC1_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC1_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC1_OUT_SEL: u32 = 511;
pub const GPIO_FUNC1_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC1_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC2_OUT_SEL_CFG_REG: u32 = 1072973112;
pub const GPIO_FUNC2_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC2_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC2_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC2_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC2_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC2_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC2_OUT_SEL: u32 = 511;
pub const GPIO_FUNC2_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC2_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC3_OUT_SEL_CFG_REG: u32 = 1072973116;
pub const GPIO_FUNC3_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC3_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC3_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC3_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC3_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC3_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC3_OUT_SEL: u32 = 511;
pub const GPIO_FUNC3_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC3_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC4_OUT_SEL_CFG_REG: u32 = 1072973120;
pub const GPIO_FUNC4_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC4_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC4_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC4_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC4_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC4_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC4_OUT_SEL: u32 = 511;
pub const GPIO_FUNC4_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC4_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC5_OUT_SEL_CFG_REG: u32 = 1072973124;
pub const GPIO_FUNC5_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC5_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC5_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC5_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC5_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC5_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC5_OUT_SEL: u32 = 511;
pub const GPIO_FUNC5_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC5_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC6_OUT_SEL_CFG_REG: u32 = 1072973128;
pub const GPIO_FUNC6_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC6_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC6_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC6_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC6_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC6_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC6_OUT_SEL: u32 = 511;
pub const GPIO_FUNC6_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC6_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC7_OUT_SEL_CFG_REG: u32 = 1072973132;
pub const GPIO_FUNC7_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC7_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC7_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC7_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC7_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC7_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC7_OUT_SEL: u32 = 511;
pub const GPIO_FUNC7_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC7_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC8_OUT_SEL_CFG_REG: u32 = 1072973136;
pub const GPIO_FUNC8_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC8_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC8_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC8_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC8_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC8_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC8_OUT_SEL: u32 = 511;
pub const GPIO_FUNC8_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC8_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC9_OUT_SEL_CFG_REG: u32 = 1072973140;
pub const GPIO_FUNC9_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC9_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC9_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC9_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC9_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC9_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC9_OUT_SEL: u32 = 511;
pub const GPIO_FUNC9_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC9_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC10_OUT_SEL_CFG_REG: u32 = 1072973144;
pub const GPIO_FUNC10_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC10_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC10_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC10_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC10_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC10_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC10_OUT_SEL: u32 = 511;
pub const GPIO_FUNC10_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC10_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC11_OUT_SEL_CFG_REG: u32 = 1072973148;
pub const GPIO_FUNC11_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC11_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC11_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC11_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC11_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC11_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC11_OUT_SEL: u32 = 511;
pub const GPIO_FUNC11_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC11_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC12_OUT_SEL_CFG_REG: u32 = 1072973152;
pub const GPIO_FUNC12_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC12_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC12_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC12_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC12_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC12_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC12_OUT_SEL: u32 = 511;
pub const GPIO_FUNC12_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC12_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC13_OUT_SEL_CFG_REG: u32 = 1072973156;
pub const GPIO_FUNC13_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC13_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC13_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC13_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC13_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC13_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC13_OUT_SEL: u32 = 511;
pub const GPIO_FUNC13_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC13_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC14_OUT_SEL_CFG_REG: u32 = 1072973160;
pub const GPIO_FUNC14_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC14_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC14_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC14_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC14_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC14_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC14_OUT_SEL: u32 = 511;
pub const GPIO_FUNC14_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC14_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC15_OUT_SEL_CFG_REG: u32 = 1072973164;
pub const GPIO_FUNC15_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC15_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC15_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC15_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC15_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC15_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC15_OUT_SEL: u32 = 511;
pub const GPIO_FUNC15_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC15_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC16_OUT_SEL_CFG_REG: u32 = 1072973168;
pub const GPIO_FUNC16_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC16_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC16_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC16_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC16_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC16_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC16_OUT_SEL: u32 = 511;
pub const GPIO_FUNC16_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC16_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC17_OUT_SEL_CFG_REG: u32 = 1072973172;
pub const GPIO_FUNC17_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC17_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC17_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC17_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC17_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC17_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC17_OUT_SEL: u32 = 511;
pub const GPIO_FUNC17_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC17_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC18_OUT_SEL_CFG_REG: u32 = 1072973176;
pub const GPIO_FUNC18_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC18_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC18_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC18_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC18_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC18_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC18_OUT_SEL: u32 = 511;
pub const GPIO_FUNC18_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC18_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC19_OUT_SEL_CFG_REG: u32 = 1072973180;
pub const GPIO_FUNC19_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC19_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC19_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC19_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC19_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC19_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC19_OUT_SEL: u32 = 511;
pub const GPIO_FUNC19_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC19_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC20_OUT_SEL_CFG_REG: u32 = 1072973184;
pub const GPIO_FUNC20_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC20_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC20_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC20_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC20_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC20_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC20_OUT_SEL: u32 = 511;
pub const GPIO_FUNC20_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC20_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC21_OUT_SEL_CFG_REG: u32 = 1072973188;
pub const GPIO_FUNC21_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC21_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC21_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC21_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC21_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC21_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC21_OUT_SEL: u32 = 511;
pub const GPIO_FUNC21_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC21_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC22_OUT_SEL_CFG_REG: u32 = 1072973192;
pub const GPIO_FUNC22_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC22_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC22_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC22_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC22_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC22_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC22_OUT_SEL: u32 = 511;
pub const GPIO_FUNC22_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC22_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC23_OUT_SEL_CFG_REG: u32 = 1072973196;
pub const GPIO_FUNC23_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC23_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC23_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC23_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC23_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC23_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC23_OUT_SEL: u32 = 511;
pub const GPIO_FUNC23_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC23_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC24_OUT_SEL_CFG_REG: u32 = 1072973200;
pub const GPIO_FUNC24_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC24_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC24_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC24_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC24_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC24_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC24_OUT_SEL: u32 = 511;
pub const GPIO_FUNC24_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC24_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC25_OUT_SEL_CFG_REG: u32 = 1072973204;
pub const GPIO_FUNC25_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC25_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC25_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC25_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC25_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC25_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC25_OUT_SEL: u32 = 511;
pub const GPIO_FUNC25_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC25_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC26_OUT_SEL_CFG_REG: u32 = 1072973208;
pub const GPIO_FUNC26_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC26_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC26_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC26_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC26_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC26_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC26_OUT_SEL: u32 = 511;
pub const GPIO_FUNC26_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC26_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC27_OUT_SEL_CFG_REG: u32 = 1072973212;
pub const GPIO_FUNC27_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC27_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC27_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC27_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC27_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC27_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC27_OUT_SEL: u32 = 511;
pub const GPIO_FUNC27_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC27_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC28_OUT_SEL_CFG_REG: u32 = 1072973216;
pub const GPIO_FUNC28_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC28_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC28_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC28_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC28_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC28_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC28_OUT_SEL: u32 = 511;
pub const GPIO_FUNC28_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC28_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC29_OUT_SEL_CFG_REG: u32 = 1072973220;
pub const GPIO_FUNC29_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC29_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC29_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC29_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC29_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC29_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC29_OUT_SEL: u32 = 511;
pub const GPIO_FUNC29_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC29_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC30_OUT_SEL_CFG_REG: u32 = 1072973224;
pub const GPIO_FUNC30_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC30_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC30_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC30_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC30_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC30_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC30_OUT_SEL: u32 = 511;
pub const GPIO_FUNC30_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC30_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC31_OUT_SEL_CFG_REG: u32 = 1072973228;
pub const GPIO_FUNC31_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC31_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC31_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC31_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC31_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC31_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC31_OUT_SEL: u32 = 511;
pub const GPIO_FUNC31_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC31_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC32_OUT_SEL_CFG_REG: u32 = 1072973232;
pub const GPIO_FUNC32_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC32_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC32_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC32_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC32_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC32_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC32_OUT_SEL: u32 = 511;
pub const GPIO_FUNC32_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC32_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC33_OUT_SEL_CFG_REG: u32 = 1072973236;
pub const GPIO_FUNC33_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC33_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC33_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC33_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC33_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC33_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC33_OUT_SEL: u32 = 511;
pub const GPIO_FUNC33_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC33_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC34_OUT_SEL_CFG_REG: u32 = 1072973240;
pub const GPIO_FUNC34_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC34_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC34_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC34_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC34_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC34_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC34_OUT_SEL: u32 = 511;
pub const GPIO_FUNC34_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC34_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC35_OUT_SEL_CFG_REG: u32 = 1072973244;
pub const GPIO_FUNC35_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC35_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC35_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC35_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC35_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC35_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC35_OUT_SEL: u32 = 511;
pub const GPIO_FUNC35_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC35_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC36_OUT_SEL_CFG_REG: u32 = 1072973248;
pub const GPIO_FUNC36_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC36_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC36_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC36_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC36_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC36_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC36_OUT_SEL: u32 = 511;
pub const GPIO_FUNC36_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC36_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC37_OUT_SEL_CFG_REG: u32 = 1072973252;
pub const GPIO_FUNC37_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC37_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC37_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC37_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC37_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC37_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC37_OUT_SEL: u32 = 511;
pub const GPIO_FUNC37_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC37_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC38_OUT_SEL_CFG_REG: u32 = 1072973256;
pub const GPIO_FUNC38_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC38_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC38_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC38_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC38_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC38_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC38_OUT_SEL: u32 = 511;
pub const GPIO_FUNC38_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC38_OUT_SEL_S: u32 = 0;
pub const GPIO_FUNC39_OUT_SEL_CFG_REG: u32 = 1072973260;
pub const GPIO_FUNC39_OEN_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC39_OEN_INV_SEL_S: u32 = 11;
pub const GPIO_FUNC39_OEN_SEL_V: u32 = 1;
pub const GPIO_FUNC39_OEN_SEL_S: u32 = 10;
pub const GPIO_FUNC39_OUT_INV_SEL_V: u32 = 1;
pub const GPIO_FUNC39_OUT_INV_SEL_S: u32 = 9;
pub const GPIO_FUNC39_OUT_SEL: u32 = 511;
pub const GPIO_FUNC39_OUT_SEL_V: u32 = 511;
pub const GPIO_FUNC39_OUT_SEL_S: u32 = 0;
pub const SOC_GPIO_PORT: u32 = 1;
pub const GPIO_PIN_COUNT: u32 = 40;
pub const GPIO_SUPPORTS_RTC_INDEPENDENT: u32 = 0;
pub const GPIO_SUPPORTS_FORCE_HOLD: u32 = 0;
pub const GPIO_MODE_DEF_DISABLE: u32 = 0;
pub const GPIO_MODE_DEF_INPUT: u32 = 1;
pub const GPIO_MODE_DEF_OUTPUT: u32 = 2;
pub const GPIO_MODE_DEF_OD: u32 = 4;
pub const SPICLK_IN_IDX: u32 = 0;
pub const SPICLK_OUT_IDX: u32 = 0;
pub const SPIQ_IN_IDX: u32 = 1;
pub const SPIQ_OUT_IDX: u32 = 1;
pub const SPID_IN_IDX: u32 = 2;
pub const SPID_OUT_IDX: u32 = 2;
pub const SPIHD_IN_IDX: u32 = 3;
pub const SPIHD_OUT_IDX: u32 = 3;
pub const SPIWP_IN_IDX: u32 = 4;
pub const SPIWP_OUT_IDX: u32 = 4;
pub const SPICS0_IN_IDX: u32 = 5;
pub const SPICS0_OUT_IDX: u32 = 5;
pub const SPICS1_IN_IDX: u32 = 6;
pub const SPICS1_OUT_IDX: u32 = 6;
pub const SPICS2_IN_IDX: u32 = 7;
pub const SPICS2_OUT_IDX: u32 = 7;
pub const HSPICLK_IN_IDX: u32 = 8;
pub const HSPICLK_OUT_IDX: u32 = 8;
pub const HSPIQ_IN_IDX: u32 = 9;
pub const HSPIQ_OUT_IDX: u32 = 9;
pub const HSPID_IN_IDX: u32 = 10;
pub const HSPID_OUT_IDX: u32 = 10;
pub const HSPICS0_IN_IDX: u32 = 11;
pub const HSPICS0_OUT_IDX: u32 = 11;
pub const HSPIHD_IN_IDX: u32 = 12;
pub const HSPIHD_OUT_IDX: u32 = 12;
pub const HSPIWP_IN_IDX: u32 = 13;
pub const HSPIWP_OUT_IDX: u32 = 13;
pub const U0RXD_IN_IDX: u32 = 14;
pub const U0TXD_OUT_IDX: u32 = 14;
pub const U0CTS_IN_IDX: u32 = 15;
pub const U0RTS_OUT_IDX: u32 = 15;
pub const U0DSR_IN_IDX: u32 = 16;
pub const U0DTR_OUT_IDX: u32 = 16;
pub const U1RXD_IN_IDX: u32 = 17;
pub const U1TXD_OUT_IDX: u32 = 17;
pub const U1CTS_IN_IDX: u32 = 18;
pub const U1RTS_OUT_IDX: u32 = 18;
pub const I2CM_SCL_O_IDX: u32 = 19;
pub const I2CM_SDA_I_IDX: u32 = 20;
pub const I2CM_SDA_O_IDX: u32 = 20;
pub const EXT_I2C_SCL_O_IDX: u32 = 21;
pub const EXT_I2C_SDA_O_IDX: u32 = 22;
pub const EXT_I2C_SDA_I_IDX: u32 = 22;
pub const I2S0O_BCK_IN_IDX: u32 = 23;
pub const I2S0O_BCK_OUT_IDX: u32 = 23;
pub const I2S1O_BCK_IN_IDX: u32 = 24;
pub const I2S1O_BCK_OUT_IDX: u32 = 24;
pub const I2S0O_WS_IN_IDX: u32 = 25;
pub const I2S0O_WS_OUT_IDX: u32 = 25;
pub const I2S1O_WS_IN_IDX: u32 = 26;
pub const I2S1O_WS_OUT_IDX: u32 = 26;
pub const I2S0I_BCK_IN_IDX: u32 = 27;
pub const I2S0I_BCK_OUT_IDX: u32 = 27;
pub const I2S0I_WS_IN_IDX: u32 = 28;
pub const I2S0I_WS_OUT_IDX: u32 = 28;
pub const I2CEXT0_SCL_IN_IDX: u32 = 29;
pub const I2CEXT0_SCL_OUT_IDX: u32 = 29;
pub const I2CEXT0_SDA_IN_IDX: u32 = 30;
pub const I2CEXT0_SDA_OUT_IDX: u32 = 30;
pub const PWM0_SYNC0_IN_IDX: u32 = 31;
pub const SDIO_TOHOST_INT_OUT_IDX: u32 = 31;
pub const PWM0_SYNC1_IN_IDX: u32 = 32;
pub const PWM0_OUT0A_IDX: u32 = 32;
pub const PWM0_SYNC2_IN_IDX: u32 = 33;
pub const PWM0_OUT0B_IDX: u32 = 33;
pub const PWM0_F0_IN_IDX: u32 = 34;
pub const PWM0_OUT1A_IDX: u32 = 34;
pub const PWM0_F1_IN_IDX: u32 = 35;
pub const PWM0_OUT1B_IDX: u32 = 35;
pub const PWM0_F2_IN_IDX: u32 = 36;
pub const PWM0_OUT2A_IDX: u32 = 36;
pub const GPIO_BT_ACTIVE_IDX: u32 = 37;
pub const PWM0_OUT2B_IDX: u32 = 37;
pub const GPIO_BT_PRIORITY_IDX: u32 = 38;
pub const PCNT_SIG_CH0_IN0_IDX: u32 = 39;
pub const PCNT_SIG_CH1_IN0_IDX: u32 = 40;
pub const GPIO_WLAN_ACTIVE_IDX: u32 = 40;
pub const PCNT_CTRL_CH0_IN0_IDX: u32 = 41;
pub const BB_DIAG0_IDX: u32 = 41;
pub const PCNT_CTRL_CH1_IN0_IDX: u32 = 42;
pub const BB_DIAG1_IDX: u32 = 42;
pub const PCNT_SIG_CH0_IN1_IDX: u32 = 43;
pub const BB_DIAG2_IDX: u32 = 43;
pub const PCNT_SIG_CH1_IN1_IDX: u32 = 44;
pub const BB_DIAG3_IDX: u32 = 44;
pub const PCNT_CTRL_CH0_IN1_IDX: u32 = 45;
pub const BB_DIAG4_IDX: u32 = 45;
pub const PCNT_CTRL_CH1_IN1_IDX: u32 = 46;
pub const BB_DIAG5_IDX: u32 = 46;
pub const PCNT_SIG_CH0_IN2_IDX: u32 = 47;
pub const BB_DIAG6_IDX: u32 = 47;
pub const PCNT_SIG_CH1_IN2_IDX: u32 = 48;
pub const BB_DIAG7_IDX: u32 = 48;
pub const PCNT_CTRL_CH0_IN2_IDX: u32 = 49;
pub const BB_DIAG8_IDX: u32 = 49;
pub const PCNT_CTRL_CH1_IN2_IDX: u32 = 50;
pub const BB_DIAG9_IDX: u32 = 50;
pub const PCNT_SIG_CH0_IN3_IDX: u32 = 51;
pub const BB_DIAG10_IDX: u32 = 51;
pub const PCNT_SIG_CH1_IN3_IDX: u32 = 52;
pub const BB_DIAG11_IDX: u32 = 52;
pub const PCNT_CTRL_CH0_IN3_IDX: u32 = 53;
pub const BB_DIAG12_IDX: u32 = 53;
pub const PCNT_CTRL_CH1_IN3_IDX: u32 = 54;
pub const BB_DIAG13_IDX: u32 = 54;
pub const PCNT_SIG_CH0_IN4_IDX: u32 = 55;
pub const BB_DIAG14_IDX: u32 = 55;
pub const PCNT_SIG_CH1_IN4_IDX: u32 = 56;
pub const BB_DIAG15_IDX: u32 = 56;
pub const PCNT_CTRL_CH0_IN4_IDX: u32 = 57;
pub const BB_DIAG16_IDX: u32 = 57;
pub const PCNT_CTRL_CH1_IN4_IDX: u32 = 58;
pub const BB_DIAG17_IDX: u32 = 58;
pub const BB_DIAG18_IDX: u32 = 59;
pub const BB_DIAG19_IDX: u32 = 60;
pub const HSPICS1_IN_IDX: u32 = 61;
pub const HSPICS1_OUT_IDX: u32 = 61;
pub const HSPICS2_IN_IDX: u32 = 62;
pub const HSPICS2_OUT_IDX: u32 = 62;
pub const VSPICLK_IN_IDX: u32 = 63;
pub const VSPICLK_OUT_IDX: u32 = 63;
pub const VSPIQ_IN_IDX: u32 = 64;
pub const VSPIQ_OUT_IDX: u32 = 64;
pub const VSPID_IN_IDX: u32 = 65;
pub const VSPID_OUT_IDX: u32 = 65;
pub const VSPIHD_IN_IDX: u32 = 66;
pub const VSPIHD_OUT_IDX: u32 = 66;
pub const VSPIWP_IN_IDX: u32 = 67;
pub const VSPIWP_OUT_IDX: u32 = 67;
pub const VSPICS0_IN_IDX: u32 = 68;
pub const VSPICS0_OUT_IDX: u32 = 68;
pub const VSPICS1_IN_IDX: u32 = 69;
pub const VSPICS1_OUT_IDX: u32 = 69;
pub const VSPICS2_IN_IDX: u32 = 70;
pub const VSPICS2_OUT_IDX: u32 = 70;
pub const PCNT_SIG_CH0_IN5_IDX: u32 = 71;
pub const LEDC_HS_SIG_OUT0_IDX: u32 = 71;
pub const PCNT_SIG_CH1_IN5_IDX: u32 = 72;
pub const LEDC_HS_SIG_OUT1_IDX: u32 = 72;
pub const PCNT_CTRL_CH0_IN5_IDX: u32 = 73;
pub const LEDC_HS_SIG_OUT2_IDX: u32 = 73;
pub const PCNT_CTRL_CH1_IN5_IDX: u32 = 74;
pub const LEDC_HS_SIG_OUT3_IDX: u32 = 74;
pub const PCNT_SIG_CH0_IN6_IDX: u32 = 75;
pub const LEDC_HS_SIG_OUT4_IDX: u32 = 75;
pub const PCNT_SIG_CH1_IN6_IDX: u32 = 76;
pub const LEDC_HS_SIG_OUT5_IDX: u32 = 76;
pub const PCNT_CTRL_CH0_IN6_IDX: u32 = 77;
pub const LEDC_HS_SIG_OUT6_IDX: u32 = 77;
pub const PCNT_CTRL_CH1_IN6_IDX: u32 = 78;
pub const LEDC_HS_SIG_OUT7_IDX: u32 = 78;
pub const PCNT_SIG_CH0_IN7_IDX: u32 = 79;
pub const LEDC_LS_SIG_OUT0_IDX: u32 = 79;
pub const PCNT_SIG_CH1_IN7_IDX: u32 = 80;
pub const LEDC_LS_SIG_OUT1_IDX: u32 = 80;
pub const PCNT_CTRL_CH0_IN7_IDX: u32 = 81;
pub const LEDC_LS_SIG_OUT2_IDX: u32 = 81;
pub const PCNT_CTRL_CH1_IN7_IDX: u32 = 82;
pub const LEDC_LS_SIG_OUT3_IDX: u32 = 82;
pub const RMT_SIG_IN0_IDX: u32 = 83;
pub const LEDC_LS_SIG_OUT4_IDX: u32 = 83;
pub const RMT_SIG_IN1_IDX: u32 = 84;
pub const LEDC_LS_SIG_OUT5_IDX: u32 = 84;
pub const RMT_SIG_IN2_IDX: u32 = 85;
pub const LEDC_LS_SIG_OUT6_IDX: u32 = 85;
pub const RMT_SIG_IN3_IDX: u32 = 86;
pub const LEDC_LS_SIG_OUT7_IDX: u32 = 86;
pub const RMT_SIG_IN4_IDX: u32 = 87;
pub const RMT_SIG_OUT0_IDX: u32 = 87;
pub const RMT_SIG_IN5_IDX: u32 = 88;
pub const RMT_SIG_OUT1_IDX: u32 = 88;
pub const RMT_SIG_IN6_IDX: u32 = 89;
pub const RMT_SIG_OUT2_IDX: u32 = 89;
pub const RMT_SIG_IN7_IDX: u32 = 90;
pub const RMT_SIG_OUT3_IDX: u32 = 90;
pub const RMT_SIG_OUT4_IDX: u32 = 91;
pub const RMT_SIG_OUT5_IDX: u32 = 92;
pub const EXT_ADC_START_IDX: u32 = 93;
pub const RMT_SIG_OUT6_IDX: u32 = 93;
pub const CAN_RX_IDX: u32 = 94;
pub const RMT_SIG_OUT7_IDX: u32 = 94;
pub const I2CEXT1_SCL_IN_IDX: u32 = 95;
pub const I2CEXT1_SCL_OUT_IDX: u32 = 95;
pub const I2CEXT1_SDA_IN_IDX: u32 = 96;
pub const I2CEXT1_SDA_OUT_IDX: u32 = 96;
pub const HOST_CARD_DETECT_N_1_IDX: u32 = 97;
pub const HOST_CCMD_OD_PULLUP_EN_N_IDX: u32 = 97;
pub const HOST_CARD_DETECT_N_2_IDX: u32 = 98;
pub const HOST_RST_N_1_IDX: u32 = 98;
pub const HOST_CARD_WRITE_PRT_1_IDX: u32 = 99;
pub const HOST_RST_N_2_IDX: u32 = 99;
pub const HOST_CARD_WRITE_PRT_2_IDX: u32 = 100;
pub const GPIO_SD0_OUT_IDX: u32 = 100;
pub const HOST_CARD_INT_N_1_IDX: u32 = 101;
pub const GPIO_SD1_OUT_IDX: u32 = 101;
pub const HOST_CARD_INT_N_2_IDX: u32 = 102;
pub const GPIO_SD2_OUT_IDX: u32 = 102;
pub const PWM1_SYNC0_IN_IDX: u32 = 103;
pub const GPIO_SD3_OUT_IDX: u32 = 103;
pub const PWM1_SYNC1_IN_IDX: u32 = 104;
pub const GPIO_SD4_OUT_IDX: u32 = 104;
pub const PWM1_SYNC2_IN_IDX: u32 = 105;
pub const GPIO_SD5_OUT_IDX: u32 = 105;
pub const PWM1_F0_IN_IDX: u32 = 106;
pub const GPIO_SD6_OUT_IDX: u32 = 106;
pub const PWM1_F1_IN_IDX: u32 = 107;
pub const GPIO_SD7_OUT_IDX: u32 = 107;
pub const PWM1_F2_IN_IDX: u32 = 108;
pub const PWM1_OUT0A_IDX: u32 = 108;
pub const PWM0_CAP0_IN_IDX: u32 = 109;
pub const PWM1_OUT0B_IDX: u32 = 109;
pub const PWM0_CAP1_IN_IDX: u32 = 110;
pub const PWM1_OUT1A_IDX: u32 = 110;
pub const PWM0_CAP2_IN_IDX: u32 = 111;
pub const PWM1_OUT1B_IDX: u32 = 111;
pub const PWM1_CAP0_IN_IDX: u32 = 112;
pub const PWM1_OUT2A_IDX: u32 = 112;
pub const PWM1_CAP1_IN_IDX: u32 = 113;
pub const PWM1_OUT2B_IDX: u32 = 113;
pub const PWM1_CAP2_IN_IDX: u32 = 114;
pub const PWM2_OUT1H_IDX: u32 = 114;
pub const PWM2_FLTA_IDX: u32 = 115;
pub const PWM2_OUT1L_IDX: u32 = 115;
pub const PWM2_FLTB_IDX: u32 = 116;
pub const PWM2_OUT2H_IDX: u32 = 116;
pub const PWM2_CAP1_IN_IDX: u32 = 117;
pub const PWM2_OUT2L_IDX: u32 = 117;
pub const PWM2_CAP2_IN_IDX: u32 = 118;
pub const PWM2_OUT3H_IDX: u32 = 118;
pub const PWM2_CAP3_IN_IDX: u32 = 119;
pub const PWM2_OUT3L_IDX: u32 = 119;
pub const PWM3_FLTA_IDX: u32 = 120;
pub const PWM2_OUT4H_IDX: u32 = 120;
pub const PWM3_FLTB_IDX: u32 = 121;
pub const PWM2_OUT4L_IDX: u32 = 121;
pub const PWM3_CAP1_IN_IDX: u32 = 122;
pub const PWM3_CAP2_IN_IDX: u32 = 123;
pub const CAN_TX_IDX: u32 = 123;
pub const PWM3_CAP3_IN_IDX: u32 = 124;
pub const CAN_BUS_OFF_ON_IDX: u32 = 124;
pub const CAN_CLKOUT_IDX: u32 = 125;
pub const SPID4_IN_IDX: u32 = 128;
pub const SPID4_OUT_IDX: u32 = 128;
pub const SPID5_IN_IDX: u32 = 129;
pub const SPID5_OUT_IDX: u32 = 129;
pub const SPID6_IN_IDX: u32 = 130;
pub const SPID6_OUT_IDX: u32 = 130;
pub const SPID7_IN_IDX: u32 = 131;
pub const SPID7_OUT_IDX: u32 = 131;
pub const HSPID4_IN_IDX: u32 = 132;
pub const HSPID4_OUT_IDX: u32 = 132;
pub const HSPID5_IN_IDX: u32 = 133;
pub const HSPID5_OUT_IDX: u32 = 133;
pub const HSPID6_IN_IDX: u32 = 134;
pub const HSPID6_OUT_IDX: u32 = 134;
pub const HSPID7_IN_IDX: u32 = 135;
pub const HSPID7_OUT_IDX: u32 = 135;
pub const VSPID4_IN_IDX: u32 = 136;
pub const VSPID4_OUT_IDX: u32 = 136;
pub const VSPID5_IN_IDX: u32 = 137;
pub const VSPID5_OUT_IDX: u32 = 137;
pub const VSPID6_IN_IDX: u32 = 138;
pub const VSPID6_OUT_IDX: u32 = 138;
pub const VSPID7_IN_IDX: u32 = 139;
pub const VSPID7_OUT_IDX: u32 = 139;
pub const I2S0I_DATA_IN0_IDX: u32 = 140;
pub const I2S0O_DATA_OUT0_IDX: u32 = 140;
pub const I2S0I_DATA_IN1_IDX: u32 = 141;
pub const I2S0O_DATA_OUT1_IDX: u32 = 141;
pub const I2S0I_DATA_IN2_IDX: u32 = 142;
pub const I2S0O_DATA_OUT2_IDX: u32 = 142;
pub const I2S0I_DATA_IN3_IDX: u32 = 143;
pub const I2S0O_DATA_OUT3_IDX: u32 = 143;
pub const I2S0I_DATA_IN4_IDX: u32 = 144;
pub const I2S0O_DATA_OUT4_IDX: u32 = 144;
pub const I2S0I_DATA_IN5_IDX: u32 = 145;
pub const I2S0O_DATA_OUT5_IDX: u32 = 145;
pub const I2S0I_DATA_IN6_IDX: u32 = 146;
pub const I2S0O_DATA_OUT6_IDX: u32 = 146;
pub const I2S0I_DATA_IN7_IDX: u32 = 147;
pub const I2S0O_DATA_OUT7_IDX: u32 = 147;
pub const I2S0I_DATA_IN8_IDX: u32 = 148;
pub const I2S0O_DATA_OUT8_IDX: u32 = 148;
pub const I2S0I_DATA_IN9_IDX: u32 = 149;
pub const I2S0O_DATA_OUT9_IDX: u32 = 149;
pub const I2S0I_DATA_IN10_IDX: u32 = 150;
pub const I2S0O_DATA_OUT10_IDX: u32 = 150;
pub const I2S0I_DATA_IN11_IDX: u32 = 151;
pub const I2S0O_DATA_OUT11_IDX: u32 = 151;
pub const I2S0I_DATA_IN12_IDX: u32 = 152;
pub const I2S0O_DATA_OUT12_IDX: u32 = 152;
pub const I2S0I_DATA_IN13_IDX: u32 = 153;
pub const I2S0O_DATA_OUT13_IDX: u32 = 153;
pub const I2S0I_DATA_IN14_IDX: u32 = 154;
pub const I2S0O_DATA_OUT14_IDX: u32 = 154;
pub const I2S0I_DATA_IN15_IDX: u32 = 155;
pub const I2S0O_DATA_OUT15_IDX: u32 = 155;
pub const I2S0O_DATA_OUT16_IDX: u32 = 156;
pub const I2S0O_DATA_OUT17_IDX: u32 = 157;
pub const I2S0O_DATA_OUT18_IDX: u32 = 158;
pub const I2S0O_DATA_OUT19_IDX: u32 = 159;
pub const I2S0O_DATA_OUT20_IDX: u32 = 160;
pub const I2S0O_DATA_OUT21_IDX: u32 = 161;
pub const I2S0O_DATA_OUT22_IDX: u32 = 162;
pub const I2S0O_DATA_OUT23_IDX: u32 = 163;
pub const I2S1I_BCK_IN_IDX: u32 = 164;
pub const I2S1I_BCK_OUT_IDX: u32 = 164;
pub const I2S1I_WS_IN_IDX: u32 = 165;
pub const I2S1I_WS_OUT_IDX: u32 = 165;
pub const I2S1I_DATA_IN0_IDX: u32 = 166;
pub const I2S1O_DATA_OUT0_IDX: u32 = 166;
pub const I2S1I_DATA_IN1_IDX: u32 = 167;
pub const I2S1O_DATA_OUT1_IDX: u32 = 167;
pub const I2S1I_DATA_IN2_IDX: u32 = 168;
pub const I2S1O_DATA_OUT2_IDX: u32 = 168;
pub const I2S1I_DATA_IN3_IDX: u32 = 169;
pub const I2S1O_DATA_OUT3_IDX: u32 = 169;
pub const I2S1I_DATA_IN4_IDX: u32 = 170;
pub const I2S1O_DATA_OUT4_IDX: u32 = 170;
pub const I2S1I_DATA_IN5_IDX: u32 = 171;
pub const I2S1O_DATA_OUT5_IDX: u32 = 171;
pub const I2S1I_DATA_IN6_IDX: u32 = 172;
pub const I2S1O_DATA_OUT6_IDX: u32 = 172;
pub const I2S1I_DATA_IN7_IDX: u32 = 173;
pub const I2S1O_DATA_OUT7_IDX: u32 = 173;
pub const I2S1I_DATA_IN8_IDX: u32 = 174;
pub const I2S1O_DATA_OUT8_IDX: u32 = 174;
pub const I2S1I_DATA_IN9_IDX: u32 = 175;
pub const I2S1O_DATA_OUT9_IDX: u32 = 175;
pub const I2S1I_DATA_IN10_IDX: u32 = 176;
pub const I2S1O_DATA_OUT10_IDX: u32 = 176;
pub const I2S1I_DATA_IN11_IDX: u32 = 177;
pub const I2S1O_DATA_OUT11_IDX: u32 = 177;
pub const I2S1I_DATA_IN12_IDX: u32 = 178;
pub const I2S1O_DATA_OUT12_IDX: u32 = 178;
pub const I2S1I_DATA_IN13_IDX: u32 = 179;
pub const I2S1O_DATA_OUT13_IDX: u32 = 179;
pub const I2S1I_DATA_IN14_IDX: u32 = 180;
pub const I2S1O_DATA_OUT14_IDX: u32 = 180;
pub const I2S1I_DATA_IN15_IDX: u32 = 181;
pub const I2S1O_DATA_OUT15_IDX: u32 = 181;
pub const I2S1O_DATA_OUT16_IDX: u32 = 182;
pub const I2S1O_DATA_OUT17_IDX: u32 = 183;
pub const I2S1O_DATA_OUT18_IDX: u32 = 184;
pub const I2S1O_DATA_OUT19_IDX: u32 = 185;
pub const I2S1O_DATA_OUT20_IDX: u32 = 186;
pub const I2S1O_DATA_OUT21_IDX: u32 = 187;
pub const I2S1O_DATA_OUT22_IDX: u32 = 188;
pub const I2S1O_DATA_OUT23_IDX: u32 = 189;
pub const I2S0I_H_SYNC_IDX: u32 = 190;
pub const PWM3_OUT1H_IDX: u32 = 190;
pub const I2S0I_V_SYNC_IDX: u32 = 191;
pub const PWM3_OUT1L_IDX: u32 = 191;
pub const I2S0I_H_ENABLE_IDX: u32 = 192;
pub const PWM3_OUT2H_IDX: u32 = 192;
pub const I2S1I_H_SYNC_IDX: u32 = 193;
pub const PWM3_OUT2L_IDX: u32 = 193;
pub const I2S1I_V_SYNC_IDX: u32 = 194;
pub const PWM3_OUT3H_IDX: u32 = 194;
pub const I2S1I_H_ENABLE_IDX: u32 = 195;
pub const PWM3_OUT3L_IDX: u32 = 195;
pub const PWM3_OUT4H_IDX: u32 = 196;
pub const PWM3_OUT4L_IDX: u32 = 197;
pub const U2RXD_IN_IDX: u32 = 198;
pub const U2TXD_OUT_IDX: u32 = 198;
pub const U2CTS_IN_IDX: u32 = 199;
pub const U2RTS_OUT_IDX: u32 = 199;
pub const EMAC_MDC_I_IDX: u32 = 200;
pub const EMAC_MDC_O_IDX: u32 = 200;
pub const EMAC_MDI_I_IDX: u32 = 201;
pub const EMAC_MDO_O_IDX: u32 = 201;
pub const EMAC_CRS_I_IDX: u32 = 202;
pub const EMAC_CRS_O_IDX: u32 = 202;
pub const EMAC_COL_I_IDX: u32 = 203;
pub const EMAC_COL_O_IDX: u32 = 203;
pub const PCMFSYNC_IN_IDX: u32 = 204;
pub const BT_AUDIO0_IRQ_IDX: u32 = 204;
pub const PCMCLK_IN_IDX: u32 = 205;
pub const BT_AUDIO1_IRQ_IDX: u32 = 205;
pub const PCMDIN_IDX: u32 = 206;
pub const BT_AUDIO2_IRQ_IDX: u32 = 206;
pub const BLE_AUDIO0_IRQ_IDX: u32 = 207;
pub const BLE_AUDIO1_IRQ_IDX: u32 = 208;
pub const BLE_AUDIO2_IRQ_IDX: u32 = 209;
pub const PCMFSYNC_OUT_IDX: u32 = 210;
pub const PCMCLK_OUT_IDX: u32 = 211;
pub const PCMDOUT_IDX: u32 = 212;
pub const BLE_AUDIO_SYNC0_P_IDX: u32 = 213;
pub const BLE_AUDIO_SYNC1_P_IDX: u32 = 214;
pub const BLE_AUDIO_SYNC2_P_IDX: u32 = 215;
pub const ANT_SEL0_IDX: u32 = 216;
pub const ANT_SEL1_IDX: u32 = 217;
pub const ANT_SEL2_IDX: u32 = 218;
pub const ANT_SEL3_IDX: u32 = 219;
pub const ANT_SEL4_IDX: u32 = 220;
pub const ANT_SEL5_IDX: u32 = 221;
pub const ANT_SEL6_IDX: u32 = 222;
pub const ANT_SEL7_IDX: u32 = 223;
pub const SIG_IN_FUNC224_IDX: u32 = 224;
pub const SIG_IN_FUNC225_IDX: u32 = 225;
pub const SIG_IN_FUNC226_IDX: u32 = 226;
pub const SIG_IN_FUNC227_IDX: u32 = 227;
pub const SIG_IN_FUNC228_IDX: u32 = 228;
pub const SIG_GPIO_OUT_IDX: u32 = 256;
pub const GPIO_PIN_REG_0: u32 = 1072992324;
pub const GPIO_PIN_REG_1: u32 = 1072992392;
pub const GPIO_PIN_REG_2: u32 = 1072992320;
pub const GPIO_PIN_REG_3: u32 = 1072992388;
pub const GPIO_PIN_REG_4: u32 = 1072992328;
pub const GPIO_PIN_REG_5: u32 = 1072992364;
pub const GPIO_PIN_REG_6: u32 = 1072992352;
pub const GPIO_PIN_REG_7: u32 = 1072992356;
pub const GPIO_PIN_REG_8: u32 = 1072992360;
pub const GPIO_PIN_REG_9: u32 = 1072992340;
pub const GPIO_PIN_REG_10: u32 = 1072992344;
pub const GPIO_PIN_REG_11: u32 = 1072992348;
pub const GPIO_PIN_REG_12: u32 = 1072992308;
pub const GPIO_PIN_REG_13: u32 = 1072992312;
pub const GPIO_PIN_REG_14: u32 = 1072992304;
pub const GPIO_PIN_REG_15: u32 = 1072992316;
pub const GPIO_PIN_REG_16: u32 = 1072992332;
pub const GPIO_PIN_REG_17: u32 = 1072992336;
pub const GPIO_PIN_REG_18: u32 = 1072992368;
pub const GPIO_PIN_REG_19: u32 = 1072992372;
pub const GPIO_PIN_REG_20: u32 = 1072992376;
pub const GPIO_PIN_REG_21: u32 = 1072992380;
pub const GPIO_PIN_REG_22: u32 = 1072992384;
pub const GPIO_PIN_REG_23: u32 = 1072992396;
pub const GPIO_PIN_REG_24: u32 = 1072992400;
pub const GPIO_PIN_REG_25: u32 = 1072992292;
pub const GPIO_PIN_REG_26: u32 = 1072992296;
pub const GPIO_PIN_REG_27: u32 = 1072992300;
pub const GPIO_PIN_REG_32: u32 = 1072992284;
pub const GPIO_PIN_REG_33: u32 = 1072992288;
pub const GPIO_PIN_REG_34: u32 = 1072992276;
pub const GPIO_PIN_REG_35: u32 = 1072992280;
pub const GPIO_PIN_REG_36: u32 = 1072992260;
pub const GPIO_PIN_REG_37: u32 = 1072992264;
pub const GPIO_PIN_REG_38: u32 = 1072992268;
pub const GPIO_PIN_REG_39: u32 = 1072992272;
pub const GPIO_ID_PIN0: u32 = 0;
pub const GPIO_FUNC_IN_HIGH: u32 = 56;
pub const GPIO_FUNC_IN_LOW: u32 = 48;
pub const SOC_ADC_PERIPH_NUM: u32 = 2;
pub const SOC_ADC_PATT_LEN_MAX: u32 = 16;
pub const SOC_ADC_MAX_CHANNEL_NUM: u32 = 10;
pub const SOC_ADC1_DATA_INVERT_DEFAULT: u32 = 1;
pub const SOC_ADC2_DATA_INVERT_DEFAULT: u32 = 1;
pub const SOC_ADC_FSM_RSTB_WAIT_DEFAULT: u32 = 8;
pub const SOC_ADC_FSM_START_WAIT_DEFAULT: u32 = 5;
pub const SOC_ADC_FSM_STANDBY_WAIT_DEFAULT: u32 = 100;
pub const ADC_FSM_SAMPLE_CYCLE_DEFAULT: u32 = 2;
pub const SOC_ADC_PWDET_CCT_DEFAULT: u32 = 4;
pub const ESP_ERR_FLASH_NOT_INITIALISED: u32 = 24579;
pub const ESP_ERR_FLASH_UNSUPPORTED_HOST: u32 = 24580;
pub const ESP_ERR_FLASH_UNSUPPORTED_CHIP: u32 = 24581;
pub const ESP_ERR_FLASH_PROTECTED: u32 = 24582;
pub const ESP_ERR_FLASH_OP_FAIL: u32 = 24577;
pub const ESP_ERR_FLASH_OP_TIMEOUT: u32 = 24578;
pub const SPI_FLASH_SEC_SIZE: u32 = 4096;
pub const SPI_FLASH_MMU_PAGE_SIZE: u32 = 65536;
pub const ESP_PARTITION_MAGIC: u32 = 20650;
pub const ESP_PARTITION_MAGIC_MD5: u32 = 60395;
pub const PART_TYPE_APP: u32 = 0;
pub const PART_SUBTYPE_FACTORY: u32 = 0;
pub const PART_SUBTYPE_OTA_FLAG: u32 = 16;
pub const PART_SUBTYPE_OTA_MASK: u32 = 15;
pub const PART_SUBTYPE_TEST: u32 = 32;
pub const PART_TYPE_DATA: u32 = 1;
pub const PART_SUBTYPE_DATA_OTA: u32 = 0;
pub const PART_SUBTYPE_DATA_RF: u32 = 1;
pub const PART_SUBTYPE_DATA_WIFI: u32 = 2;
pub const PART_SUBTYPE_DATA_NVS_KEYS: u32 = 4;
pub const PART_SUBTYPE_DATA_EFUSE_EM: u32 = 5;
pub const PART_TYPE_END: u32 = 255;
pub const PART_SUBTYPE_END: u32 = 255;
pub const PART_FLAG_ENCRYPTED: u32 = 1;
pub const ESP_BOOTLOADER_DIGEST_OFFSET: u32 = 0;
pub const ESP_BOOTLOADER_OFFSET: u32 = 4096;
pub const ESP_PARTITION_TABLE_OFFSET: u32 = 32768;
pub const ESP_PARTITION_TABLE_MAX_LEN: u32 = 3072;
pub const ESP_IMAGE_HEADER_MAGIC: u32 = 233;
pub const ESP_IMAGE_MAX_SEGMENTS: u32 = 16;
pub const ESP_APP_DESC_MAGIC_WORD: u32 = 2882360370;
pub const ESP_ERR_IMAGE_BASE: u32 = 8192;
pub const ESP_ERR_IMAGE_FLASH_FAIL: u32 = 8193;
pub const ESP_ERR_IMAGE_INVALID: u32 = 8194;
pub const ESP_IMAGE_HASH_LEN: u32 = 32;
pub const OTA_SIZE_UNKNOWN: u32 = 4294967295;
pub const ESP_ERR_OTA_BASE: u32 = 5376;
pub const ESP_ERR_OTA_PARTITION_CONFLICT: u32 = 5377;
pub const ESP_ERR_OTA_SELECT_INFO_INVALID: u32 = 5378;
pub const ESP_ERR_OTA_VALIDATE_FAILED: u32 = 5379;
pub const ESP_ERR_OTA_SMALL_SEC_VER: u32 = 5380;
pub const ESP_ERR_OTA_ROLLBACK_FAILED: u32 = 5381;
pub const ESP_ERR_OTA_ROLLBACK_INVALID_STATE: u32 = 5382;
pub const portNUM_PROCESSORS: u32 = 2;
pub const XT_USE_THREAD_SAFE_CLIB: u32 = 0;
pub const configASSERT_2: u32 = 0;
pub const portUSING_MPU_WRAPPERS: u32 = 0;
pub const configUSE_MUTEX: u32 = 1;
pub const XT_TIMER_INDEX: u32 = 0;
pub const configNUM_THREAD_LOCAL_STORAGE_POINTERS: u32 = 1;
pub const configTHREAD_LOCAL_STORAGE_DELETE_CALLBACKS: u32 = 1;
pub const STK_INTEXC_EXTRA: u32 = 0;
pub const XT_CLIB_CONTEXT_AREA_SIZE: u32 = 0;
pub const XT_USER_SIZE: u32 = 1024;
pub const EXIT_FAILURE: u32 = 1;
pub const EXIT_SUCCESS: u32 = 0;
pub const RAND_MAX: u32 = 2147483647;
pub const MACSTR: &'static [u8; 30usize] = b"%02x:%02x:%02x:%02x:%02x:%02x\0";
pub const configUSE_PREEMPTION: u32 = 1;
pub const configUSE_IDLE_HOOK: u32 = 1;
pub const configUSE_TICK_HOOK: u32 = 1;
pub const configTICK_RATE_HZ: u32 = 1000;
pub const configMAX_PRIORITIES: u32 = 25;
pub const configMINIMAL_STACK_SIZE: u32 = 768;
pub const configIDLE_TASK_STACK_SIZE: u32 = 1536;
pub const configISR_STACK_SIZE: u32 = 1536;
pub const configAPPLICATION_ALLOCATED_HEAP: u32 = 1;
pub const configMAX_TASK_NAME_LEN: u32 = 16;
pub const configUSE_TRACE_FACILITY_2: u32 = 0;
pub const configBENCHMARK: u32 = 0;
pub const configUSE_16_BIT_TICKS: u32 = 0;
pub const configIDLE_SHOULD_YIELD: u32 = 0;
pub const configQUEUE_REGISTRY_SIZE: u32 = 0;
pub const configUSE_MUTEXES: u32 = 1;
pub const configUSE_RECURSIVE_MUTEXES: u32 = 1;
pub const configUSE_COUNTING_SEMAPHORES: u32 = 1;
pub const configCHECK_FOR_STACK_OVERFLOW: u32 = 2;
pub const configUSE_CO_ROUTINES: u32 = 0;
pub const configMAX_CO_ROUTINE_PRIORITIES: u32 = 2;
pub const INCLUDE_vTaskPrioritySet: u32 = 1;
pub const INCLUDE_uxTaskPriorityGet: u32 = 1;
pub const INCLUDE_vTaskDelete: u32 = 1;
pub const INCLUDE_vTaskCleanUpResources: u32 = 0;
pub const INCLUDE_vTaskSuspend: u32 = 1;
pub const INCLUDE_vTaskDelayUntil: u32 = 1;
pub const INCLUDE_vTaskDelay: u32 = 1;
pub const INCLUDE_uxTaskGetStackHighWaterMark: u32 = 1;
pub const INCLUDE_pcTaskGetTaskName: u32 = 1;
pub const INCLUDE_xTaskGetIdleTaskHandle: u32 = 1;
pub const INCLUDE_pxTaskGetStackStart: u32 = 1;
pub const INCLUDE_xSemaphoreGetMutexHolder: u32 = 1;
pub const configKERNEL_INTERRUPT_PRIORITY: u32 = 1;
pub const configMAX_SYSCALL_INTERRUPT_PRIORITY: u32 = 3;
pub const configUSE_NEWLIB_REENTRANT: u32 = 1;
pub const configSUPPORT_DYNAMIC_ALLOCATION: u32 = 1;
pub const configUSE_TIMERS: u32 = 1;
pub const INCLUDE_xTimerPendFunctionCall: u32 = 1;
pub const INCLUDE_eTaskGetState: u32 = 1;
pub const configUSE_QUEUE_SETS: u32 = 1;
pub const configXT_BOARD: u32 = 1;
pub const configXT_SIMULATOR: u32 = 0;
pub const configENABLE_TASK_SNAPSHOT: u32 = 1;
pub const configCHECK_MUTEX_GIVEN_BY_OWNER: u32 = 1;
pub const errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY: i32 = -1;
pub const errQUEUE_BLOCKED: i32 = -4;
pub const errQUEUE_YIELD: i32 = -5;
pub const configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES: u32 = 0;
pub const pdINTEGRITY_CHECK_VALUE: u32 = 1515870810;
pub const LBEG: u32 = 0;
pub const LEND: u32 = 1;
pub const LCOUNT: u32 = 2;
pub const SAR: u32 = 3;
pub const BR: u32 = 4;
pub const SCOMPARE1: u32 = 12;
pub const ACCLO: u32 = 16;
pub const ACCHI: u32 = 17;
pub const MR_0: u32 = 32;
pub const MR_1: u32 = 33;
pub const MR_2: u32 = 34;
pub const MR_3: u32 = 35;
pub const WINDOWBASE: u32 = 72;
pub const WINDOWSTART: u32 = 73;
pub const IBREAKENABLE: u32 = 96;
pub const MEMCTL: u32 = 97;
pub const ATOMCTL: u32 = 99;
pub const DDR: u32 = 104;
pub const IBREAKA_0: u32 = 128;
pub const IBREAKA_1: u32 = 129;
pub const DBREAKA_0: u32 = 144;
pub const DBREAKA_1: u32 = 145;
pub const DBREAKC_0: u32 = 160;
pub const DBREAKC_1: u32 = 161;
pub const CONFIGID0: u32 = 176;
pub const EPC_1: u32 = 177;
pub const EPC_2: u32 = 178;
pub const EPC_3: u32 = 179;
pub const EPC_4: u32 = 180;
pub const EPC_5: u32 = 181;
pub const EPC_6: u32 = 182;
pub const EPC_7: u32 = 183;
pub const DEPC: u32 = 192;
pub const EPS_2: u32 = 194;
pub const EPS_3: u32 = 195;
pub const EPS_4: u32 = 196;
pub const EPS_5: u32 = 197;
pub const EPS_6: u32 = 198;
pub const EPS_7: u32 = 199;
pub const CONFIGID1: u32 = 208;
pub const EXCSAVE_1: u32 = 209;
pub const EXCSAVE_2: u32 = 210;
pub const EXCSAVE_3: u32 = 211;
pub const EXCSAVE_4: u32 = 212;
pub const EXCSAVE_5: u32 = 213;
pub const EXCSAVE_6: u32 = 214;
pub const EXCSAVE_7: u32 = 215;
pub const CPENABLE: u32 = 224;
pub const INTERRUPT: u32 = 226;
pub const INTENABLE: u32 = 228;
pub const PS: u32 = 230;
pub const VECBASE: u32 = 231;
pub const EXCCAUSE: u32 = 232;
pub const DEBUGCAUSE: u32 = 233;
pub const CCOUNT: u32 = 234;
pub const PRID: u32 = 235;
pub const ICOUNT: u32 = 236;
pub const ICOUNTLEVEL: u32 = 237;
pub const EXCVADDR: u32 = 238;
pub const CCOMPARE_0: u32 = 240;
pub const CCOMPARE_1: u32 = 241;
pub const CCOMPARE_2: u32 = 242;
pub const MISC_REG_0: u32 = 244;
pub const MISC_REG_1: u32 = 245;
pub const MISC_REG_2: u32 = 246;
pub const MISC_REG_3: u32 = 247;
pub const MR: u32 = 32;
pub const IBREAKA: u32 = 128;
pub const DBREAKA: u32 = 144;
pub const DBREAKC: u32 = 160;
pub const EPC: u32 = 176;
pub const EPS: u32 = 192;
pub const EXCSAVE: u32 = 208;
pub const CCOMPARE: u32 = 240;
pub const INTREAD: u32 = 226;
pub const INTSET: u32 = 226;
pub const INTCLEAR: u32 = 227;
pub const CORE_STATE_SIGNATURE: u32 = 2982522861;
pub const XTOS_KEEPON_MEM: u32 = 256;
pub const XTOS_KEEPON_MEM_SHIFT: u32 = 8;
pub const XTOS_KEEPON_DEBUG: u32 = 4096;
pub const XTOS_KEEPON_DEBUG_SHIFT: u32 = 12;
pub const XTOS_IDMA_NO_WAIT: u32 = 65536;
pub const XTOS_IDMA_WAIT_STANDBY: u32 = 131072;
pub const XTOS_COREF_PSO: u32 = 1;
pub const XTOS_COREF_PSO_SHIFT: u32 = 0;
pub const SOC_CPU_BREAKPOINTS_NUM: u32 = 2;
pub const SOC_CPU_WATCHPOINTS_NUM: u32 = 2;
pub const SOC_CPU_WATCHPOINT_SIZE: u32 = 64;
pub const DSRSET: u32 = 1056780;
pub const SOC_MEMORY_TYPE_NO_PRIOS: u32 = 3;
pub const SPINLOCK_FREE: u32 = 3007315967;
pub const SPINLOCK_WAIT_FOREVER: i32 = -1;
pub const SPINLOCK_NO_WAIT: u32 = 0;
pub const CORE_ID_REGVAL_XOR_SWAP: u32 = 26214;
pub const MALLOC_CAP_EXEC: u32 = 1;
pub const MALLOC_CAP_32BIT: u32 = 2;
pub const MALLOC_CAP_8BIT: u32 = 4;
pub const MALLOC_CAP_DMA: u32 = 8;
pub const MALLOC_CAP_PID2: u32 = 16;
pub const MALLOC_CAP_PID3: u32 = 32;
pub const MALLOC_CAP_PID4: u32 = 64;
pub const MALLOC_CAP_PID5: u32 = 128;
pub const MALLOC_CAP_PID6: u32 = 256;
pub const MALLOC_CAP_PID7: u32 = 512;
pub const MALLOC_CAP_SPIRAM: u32 = 1024;
pub const MALLOC_CAP_INTERNAL: u32 = 2048;
pub const MALLOC_CAP_DEFAULT: u32 = 4096;
pub const MALLOC_CAP_IRAM_8BIT: u32 = 8192;
pub const MALLOC_CAP_INVALID: u32 = 2147483648;
pub const portMUX_FREE_VAL: u32 = 3007315967;
pub const portMUX_NO_TIMEOUT: i32 = -1;
pub const portMUX_TRY_LOCK: u32 = 0;
pub const portCRITICAL_NESTING_IN_TCB: u32 = 0;
pub const portTcbMemoryCaps: u32 = 2052;
pub const portStackMemoryCaps: u32 = 2052;
pub const portSTACK_GROWTH: i32 = -1;
pub const portBYTE_ALIGNMENT: u32 = 4;
pub const portBYTE_ALIGNMENT_MASK: u32 = 3;
pub const portNUM_CONFIGURABLE_REGIONS: u32 = 1;
pub const ESP_IDF_VERSION_MAJOR: u32 = 4;
pub const ESP_IDF_VERSION_MINOR: u32 = 2;
pub const ESP_IDF_VERSION_PATCH: u32 = 0;
pub const TWO_UNIVERSAL_MAC_ADDR: u32 = 2;
pub const FOUR_UNIVERSAL_MAC_ADDR: u32 = 4;
pub const INCLUDE_xTimerGetTimerDaemonTaskHandle: u32 = 0;
pub const INCLUDE_xQueueGetMutexHolder: u32 = 0;
pub const configUSE_APPLICATION_TASK_TAG: u32 = 0;
pub const configUSE_ALTERNATIVE_API: u32 = 0;
pub const INCLUDE_xTaskResumeFromISR: u32 = 1;
pub const INCLUDE_xEventGroupSetBitFromISR: u32 = 0;
pub const configASSERT_DEFINED: u32 = 1;
pub const INCLUDE_xTaskGetSchedulerState: u32 = 0;
pub const INCLUDE_xTaskGetCurrentTaskHandle: u32 = 0;
pub const configGENERATE_RUN_TIME_STATS: u32 = 0;
pub const configUSE_MALLOC_FAILED_HOOK: u32 = 0;
pub const configEXPECTED_IDLE_TIME_BEFORE_SLEEP: u32 = 2;
pub const configUSE_TIME_SLICING: u32 = 1;
pub const configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS: u32 = 0;
pub const configUSE_STATS_FORMATTING_FUNCTIONS: u32 = 0;
pub const configTASKLIST_INCLUDE_COREID: u32 = 0;
pub const configUSE_TRACE_FACILITY: u32 = 0;
pub const configUSE_PORT_OPTIMISED_TASK_SELECTION: u32 = 0;
pub const configUSE_TASK_NOTIFICATIONS: u32 = 1;
pub const portTICK_TYPE_IS_ATOMIC: u32 = 0;
pub const configENABLE_BACKWARD_COMPATIBILITY: u32 = 1;
pub const configESP32_PER_TASK_DATA: u32 = 1;
pub const _LIBC_LIMITS_H_: u32 = 1;
pub const MB_LEN_MAX: u32 = 1;
pub const NL_ARGMAX: u32 = 32;
pub const _POSIX2_RE_DUP_MAX: u32 = 255;
pub const ARG_MAX: u32 = 4096;
pub const PATH_MAX: u32 = 1024;
pub const tskKERNEL_VERSION_NUMBER: &'static [u8; 7usize] = b"V8.2.0\0";
pub const tskKERNEL_VERSION_MAJOR: u32 = 8;
pub const tskKERNEL_VERSION_MINOR: u32 = 2;
pub const tskKERNEL_VERSION_BUILD: u32 = 0;
pub const SOC_I2C_NUM: u32 = 2;
pub const SOC_I2C_FIFO_LEN: u32 = 32;
pub const I2C_INTR_MASK: u32 = 16383;
pub const I2C_SUPPORT_HW_FSM_RST: u32 = 0;
pub const I2C_SUPPORT_HW_CLR_BUS: u32 = 0;
pub const I2C_APB_CLK_FREQ: u32 = 80000000;
pub const I2C_NUM_0: u32 = 0;
pub const I2C_NUM_1: u32 = 1;
pub const I2C_NUM_MAX: u32 = 2;
pub const I2S_SIG_LOOPBACK_V: u32 = 1;
pub const I2S_SIG_LOOPBACK_S: u32 = 18;
pub const I2S_RX_MSB_RIGHT_V: u32 = 1;
pub const I2S_RX_MSB_RIGHT_S: u32 = 17;
pub const I2S_TX_MSB_RIGHT_V: u32 = 1;
pub const I2S_TX_MSB_RIGHT_S: u32 = 16;
pub const I2S_RX_MONO_V: u32 = 1;
pub const I2S_RX_MONO_S: u32 = 15;
pub const I2S_TX_MONO_V: u32 = 1;
pub const I2S_TX_MONO_S: u32 = 14;
pub const I2S_RX_SHORT_SYNC_V: u32 = 1;
pub const I2S_RX_SHORT_SYNC_S: u32 = 13;
pub const I2S_TX_SHORT_SYNC_V: u32 = 1;
pub const I2S_TX_SHORT_SYNC_S: u32 = 12;
pub const I2S_RX_MSB_SHIFT_V: u32 = 1;
pub const I2S_RX_MSB_SHIFT_S: u32 = 11;
pub const I2S_TX_MSB_SHIFT_V: u32 = 1;
pub const I2S_TX_MSB_SHIFT_S: u32 = 10;
pub const I2S_RX_RIGHT_FIRST_V: u32 = 1;
pub const I2S_RX_RIGHT_FIRST_S: u32 = 9;
pub const I2S_TX_RIGHT_FIRST_V: u32 = 1;
pub const I2S_TX_RIGHT_FIRST_S: u32 = 8;
pub const I2S_RX_SLAVE_MOD_V: u32 = 1;
pub const I2S_RX_SLAVE_MOD_S: u32 = 7;
pub const I2S_TX_SLAVE_MOD_V: u32 = 1;
pub const I2S_TX_SLAVE_MOD_S: u32 = 6;
pub const I2S_RX_START_V: u32 = 1;
pub const I2S_RX_START_S: u32 = 5;
pub const I2S_TX_START_V: u32 = 1;
pub const I2S_TX_START_S: u32 = 4;
pub const I2S_RX_FIFO_RESET_V: u32 = 1;
pub const I2S_RX_FIFO_RESET_S: u32 = 3;
pub const I2S_TX_FIFO_RESET_V: u32 = 1;
pub const I2S_TX_FIFO_RESET_S: u32 = 2;
pub const I2S_RX_RESET_V: u32 = 1;
pub const I2S_RX_RESET_S: u32 = 1;
pub const I2S_TX_RESET_V: u32 = 1;
pub const I2S_TX_RESET_S: u32 = 0;
pub const I2S_OUT_TOTAL_EOF_INT_RAW_V: u32 = 1;
pub const I2S_OUT_TOTAL_EOF_INT_RAW_S: u32 = 16;
pub const I2S_IN_DSCR_EMPTY_INT_RAW_V: u32 = 1;
pub const I2S_IN_DSCR_EMPTY_INT_RAW_S: u32 = 15;
pub const I2S_OUT_DSCR_ERR_INT_RAW_V: u32 = 1;
pub const I2S_OUT_DSCR_ERR_INT_RAW_S: u32 = 14;
pub const I2S_IN_DSCR_ERR_INT_RAW_V: u32 = 1;
pub const I2S_IN_DSCR_ERR_INT_RAW_S: u32 = 13;
pub const I2S_OUT_EOF_INT_RAW_V: u32 = 1;
pub const I2S_OUT_EOF_INT_RAW_S: u32 = 12;
pub const I2S_OUT_DONE_INT_RAW_V: u32 = 1;
pub const I2S_OUT_DONE_INT_RAW_S: u32 = 11;
pub const I2S_IN_ERR_EOF_INT_RAW_V: u32 = 1;
pub const I2S_IN_ERR_EOF_INT_RAW_S: u32 = 10;
pub const I2S_IN_SUC_EOF_INT_RAW_V: u32 = 1;
pub const I2S_IN_SUC_EOF_INT_RAW_S: u32 = 9;
pub const I2S_IN_DONE_INT_RAW_V: u32 = 1;
pub const I2S_IN_DONE_INT_RAW_S: u32 = 8;
pub const I2S_TX_HUNG_INT_RAW_V: u32 = 1;
pub const I2S_TX_HUNG_INT_RAW_S: u32 = 7;
pub const I2S_RX_HUNG_INT_RAW_V: u32 = 1;
pub const I2S_RX_HUNG_INT_RAW_S: u32 = 6;
pub const I2S_TX_REMPTY_INT_RAW_V: u32 = 1;
pub const I2S_TX_REMPTY_INT_RAW_S: u32 = 5;
pub const I2S_TX_WFULL_INT_RAW_V: u32 = 1;
pub const I2S_TX_WFULL_INT_RAW_S: u32 = 4;
pub const I2S_RX_REMPTY_INT_RAW_V: u32 = 1;
pub const I2S_RX_REMPTY_INT_RAW_S: u32 = 3;
pub const I2S_RX_WFULL_INT_RAW_V: u32 = 1;
pub const I2S_RX_WFULL_INT_RAW_S: u32 = 2;
pub const I2S_TX_PUT_DATA_INT_RAW_V: u32 = 1;
pub const I2S_TX_PUT_DATA_INT_RAW_S: u32 = 1;
pub const I2S_RX_TAKE_DATA_INT_RAW_V: u32 = 1;
pub const I2S_RX_TAKE_DATA_INT_RAW_S: u32 = 0;
pub const I2S_OUT_TOTAL_EOF_INT_ST_V: u32 = 1;
pub const I2S_OUT_TOTAL_EOF_INT_ST_S: u32 = 16;
pub const I2S_IN_DSCR_EMPTY_INT_ST_V: u32 = 1;
pub const I2S_IN_DSCR_EMPTY_INT_ST_S: u32 = 15;
pub const I2S_OUT_DSCR_ERR_INT_ST_V: u32 = 1;
pub const I2S_OUT_DSCR_ERR_INT_ST_S: u32 = 14;
pub const I2S_IN_DSCR_ERR_INT_ST_V: u32 = 1;
pub const I2S_IN_DSCR_ERR_INT_ST_S: u32 = 13;
pub const I2S_OUT_EOF_INT_ST_V: u32 = 1;
pub const I2S_OUT_EOF_INT_ST_S: u32 = 12;
pub const I2S_OUT_DONE_INT_ST_V: u32 = 1;
pub const I2S_OUT_DONE_INT_ST_S: u32 = 11;
pub const I2S_IN_ERR_EOF_INT_ST_V: u32 = 1;
pub const I2S_IN_ERR_EOF_INT_ST_S: u32 = 10;
pub const I2S_IN_SUC_EOF_INT_ST_V: u32 = 1;
pub const I2S_IN_SUC_EOF_INT_ST_S: u32 = 9;
pub const I2S_IN_DONE_INT_ST_V: u32 = 1;
pub const I2S_IN_DONE_INT_ST_S: u32 = 8;
pub const I2S_TX_HUNG_INT_ST_V: u32 = 1;
pub const I2S_TX_HUNG_INT_ST_S: u32 = 7;
pub const I2S_RX_HUNG_INT_ST_V: u32 = 1;
pub const I2S_RX_HUNG_INT_ST_S: u32 = 6;
pub const I2S_TX_REMPTY_INT_ST_V: u32 = 1;
pub const I2S_TX_REMPTY_INT_ST_S: u32 = 5;
pub const I2S_TX_WFULL_INT_ST_V: u32 = 1;
pub const I2S_TX_WFULL_INT_ST_S: u32 = 4;
pub const I2S_RX_REMPTY_INT_ST_V: u32 = 1;
pub const I2S_RX_REMPTY_INT_ST_S: u32 = 3;
pub const I2S_RX_WFULL_INT_ST_V: u32 = 1;
pub const I2S_RX_WFULL_INT_ST_S: u32 = 2;
pub const I2S_TX_PUT_DATA_INT_ST_V: u32 = 1;
pub const I2S_TX_PUT_DATA_INT_ST_S: u32 = 1;
pub const I2S_RX_TAKE_DATA_INT_ST_V: u32 = 1;
pub const I2S_RX_TAKE_DATA_INT_ST_S: u32 = 0;
pub const I2S_OUT_TOTAL_EOF_INT_ENA_V: u32 = 1;
pub const I2S_OUT_TOTAL_EOF_INT_ENA_S: u32 = 16;
pub const I2S_IN_DSCR_EMPTY_INT_ENA_V: u32 = 1;
pub const I2S_IN_DSCR_EMPTY_INT_ENA_S: u32 = 15;
pub const I2S_OUT_DSCR_ERR_INT_ENA_V: u32 = 1;
pub const I2S_OUT_DSCR_ERR_INT_ENA_S: u32 = 14;
pub const I2S_IN_DSCR_ERR_INT_ENA_V: u32 = 1;
pub const I2S_IN_DSCR_ERR_INT_ENA_S: u32 = 13;
pub const I2S_OUT_EOF_INT_ENA_V: u32 = 1;
pub const I2S_OUT_EOF_INT_ENA_S: u32 = 12;
pub const I2S_OUT_DONE_INT_ENA_V: u32 = 1;
pub const I2S_OUT_DONE_INT_ENA_S: u32 = 11;
pub const I2S_IN_ERR_EOF_INT_ENA_V: u32 = 1;
pub const I2S_IN_ERR_EOF_INT_ENA_S: u32 = 10;
pub const I2S_IN_SUC_EOF_INT_ENA_V: u32 = 1;
pub const I2S_IN_SUC_EOF_INT_ENA_S: u32 = 9;
pub const I2S_IN_DONE_INT_ENA_V: u32 = 1;
pub const I2S_IN_DONE_INT_ENA_S: u32 = 8;
pub const I2S_TX_HUNG_INT_ENA_V: u32 = 1;
pub const I2S_TX_HUNG_INT_ENA_S: u32 = 7;
pub const I2S_RX_HUNG_INT_ENA_V: u32 = 1;
pub const I2S_RX_HUNG_INT_ENA_S: u32 = 6;
pub const I2S_TX_REMPTY_INT_ENA_V: u32 = 1;
pub const I2S_TX_REMPTY_INT_ENA_S: u32 = 5;
pub const I2S_TX_WFULL_INT_ENA_V: u32 = 1;
pub const I2S_TX_WFULL_INT_ENA_S: u32 = 4;
pub const I2S_RX_REMPTY_INT_ENA_V: u32 = 1;
pub const I2S_RX_REMPTY_INT_ENA_S: u32 = 3;
pub const I2S_RX_WFULL_INT_ENA_V: u32 = 1;
pub const I2S_RX_WFULL_INT_ENA_S: u32 = 2;
pub const I2S_TX_PUT_DATA_INT_ENA_V: u32 = 1;
pub const I2S_TX_PUT_DATA_INT_ENA_S: u32 = 1;
pub const I2S_RX_TAKE_DATA_INT_ENA_V: u32 = 1;
pub const I2S_RX_TAKE_DATA_INT_ENA_S: u32 = 0;
pub const I2S_OUT_TOTAL_EOF_INT_CLR_V: u32 = 1;
pub const I2S_OUT_TOTAL_EOF_INT_CLR_S: u32 = 16;
pub const I2S_IN_DSCR_EMPTY_INT_CLR_V: u32 = 1;
pub const I2S_IN_DSCR_EMPTY_INT_CLR_S: u32 = 15;
pub const I2S_OUT_DSCR_ERR_INT_CLR_V: u32 = 1;
pub const I2S_OUT_DSCR_ERR_INT_CLR_S: u32 = 14;
pub const I2S_IN_DSCR_ERR_INT_CLR_V: u32 = 1;
pub const I2S_IN_DSCR_ERR_INT_CLR_S: u32 = 13;
pub const I2S_OUT_EOF_INT_CLR_V: u32 = 1;
pub const I2S_OUT_EOF_INT_CLR_S: u32 = 12;
pub const I2S_OUT_DONE_INT_CLR_V: u32 = 1;
pub const I2S_OUT_DONE_INT_CLR_S: u32 = 11;
pub const I2S_IN_ERR_EOF_INT_CLR_V: u32 = 1;
pub const I2S_IN_ERR_EOF_INT_CLR_S: u32 = 10;
pub const I2S_IN_SUC_EOF_INT_CLR_V: u32 = 1;
pub const I2S_IN_SUC_EOF_INT_CLR_S: u32 = 9;
pub const I2S_IN_DONE_INT_CLR_V: u32 = 1;
pub const I2S_IN_DONE_INT_CLR_S: u32 = 8;
pub const I2S_TX_HUNG_INT_CLR_V: u32 = 1;
pub const I2S_TX_HUNG_INT_CLR_S: u32 = 7;
pub const I2S_RX_HUNG_INT_CLR_V: u32 = 1;
pub const I2S_RX_HUNG_INT_CLR_S: u32 = 6;
pub const I2S_TX_REMPTY_INT_CLR_V: u32 = 1;
pub const I2S_TX_REMPTY_INT_CLR_S: u32 = 5;
pub const I2S_TX_WFULL_INT_CLR_V: u32 = 1;
pub const I2S_TX_WFULL_INT_CLR_S: u32 = 4;
pub const I2S_RX_REMPTY_INT_CLR_V: u32 = 1;
pub const I2S_RX_REMPTY_INT_CLR_S: u32 = 3;
pub const I2S_RX_WFULL_INT_CLR_V: u32 = 1;
pub const I2S_RX_WFULL_INT_CLR_S: u32 = 2;
pub const I2S_PUT_DATA_INT_CLR_V: u32 = 1;
pub const I2S_PUT_DATA_INT_CLR_S: u32 = 1;
pub const I2S_TAKE_DATA_INT_CLR_V: u32 = 1;
pub const I2S_TAKE_DATA_INT_CLR_S: u32 = 0;
pub const I2S_TX_BCK_IN_INV_V: u32 = 1;
pub const I2S_TX_BCK_IN_INV_S: u32 = 24;
pub const I2S_DATA_ENABLE_DELAY: u32 = 3;
pub const I2S_DATA_ENABLE_DELAY_V: u32 = 3;
pub const I2S_DATA_ENABLE_DELAY_S: u32 = 22;
pub const I2S_RX_DSYNC_SW_V: u32 = 1;
pub const I2S_RX_DSYNC_SW_S: u32 = 21;
pub const I2S_TX_DSYNC_SW_V: u32 = 1;
pub const I2S_TX_DSYNC_SW_S: u32 = 20;
pub const I2S_RX_BCK_OUT_DELAY: u32 = 3;
pub const I2S_RX_BCK_OUT_DELAY_V: u32 = 3;
pub const I2S_RX_BCK_OUT_DELAY_S: u32 = 18;
pub const I2S_RX_WS_OUT_DELAY: u32 = 3;
pub const I2S_RX_WS_OUT_DELAY_V: u32 = 3;
pub const I2S_RX_WS_OUT_DELAY_S: u32 = 16;
pub const I2S_TX_SD_OUT_DELAY: u32 = 3;
pub const I2S_TX_SD_OUT_DELAY_V: u32 = 3;
pub const I2S_TX_SD_OUT_DELAY_S: u32 = 14;
pub const I2S_TX_WS_OUT_DELAY: u32 = 3;
pub const I2S_TX_WS_OUT_DELAY_V: u32 = 3;
pub const I2S_TX_WS_OUT_DELAY_S: u32 = 12;
pub const I2S_TX_BCK_OUT_DELAY: u32 = 3;
pub const I2S_TX_BCK_OUT_DELAY_V: u32 = 3;
pub const I2S_TX_BCK_OUT_DELAY_S: u32 = 10;
pub const I2S_RX_SD_IN_DELAY: u32 = 3;
pub const I2S_RX_SD_IN_DELAY_V: u32 = 3;
pub const I2S_RX_SD_IN_DELAY_S: u32 = 8;
pub const I2S_RX_WS_IN_DELAY: u32 = 3;
pub const I2S_RX_WS_IN_DELAY_V: u32 = 3;
pub const I2S_RX_WS_IN_DELAY_S: u32 = 6;
pub const I2S_RX_BCK_IN_DELAY: u32 = 3;
pub const I2S_RX_BCK_IN_DELAY_V: u32 = 3;
pub const I2S_RX_BCK_IN_DELAY_S: u32 = 4;
pub const I2S_TX_WS_IN_DELAY: u32 = 3;
pub const I2S_TX_WS_IN_DELAY_V: u32 = 3;
pub const I2S_TX_WS_IN_DELAY_S: u32 = 2;
pub const I2S_TX_BCK_IN_DELAY: u32 = 3;
pub const I2S_TX_BCK_IN_DELAY_V: u32 = 3;
pub const I2S_TX_BCK_IN_DELAY_S: u32 = 0;
pub const I2S_RX_FIFO_MOD_FORCE_EN_V: u32 = 1;
pub const I2S_RX_FIFO_MOD_FORCE_EN_S: u32 = 20;
pub const I2S_TX_FIFO_MOD_FORCE_EN_V: u32 = 1;
pub const I2S_TX_FIFO_MOD_FORCE_EN_S: u32 = 19;
pub const I2S_RX_FIFO_MOD: u32 = 7;
pub const I2S_RX_FIFO_MOD_V: u32 = 7;
pub const I2S_RX_FIFO_MOD_S: u32 = 16;
pub const I2S_TX_FIFO_MOD: u32 = 7;
pub const I2S_TX_FIFO_MOD_V: u32 = 7;
pub const I2S_TX_FIFO_MOD_S: u32 = 13;
pub const I2S_DSCR_EN_V: u32 = 1;
pub const I2S_DSCR_EN_S: u32 = 12;
pub const I2S_TX_DATA_NUM: u32 = 63;
pub const I2S_TX_DATA_NUM_V: u32 = 63;
pub const I2S_TX_DATA_NUM_S: u32 = 6;
pub const I2S_RX_DATA_NUM: u32 = 63;
pub const I2S_RX_DATA_NUM_V: u32 = 63;
pub const I2S_RX_DATA_NUM_S: u32 = 0;
pub const I2S_RX_EOF_NUM: u32 = 4294967295;
pub const I2S_RX_EOF_NUM_V: u32 = 4294967295;
pub const I2S_RX_EOF_NUM_S: u32 = 0;
pub const I2S_SIGLE_DATA: u32 = 4294967295;
pub const I2S_SIGLE_DATA_V: u32 = 4294967295;
pub const I2S_SIGLE_DATA_S: u32 = 0;
pub const I2S_RX_CHAN_MOD: u32 = 3;
pub const I2S_RX_CHAN_MOD_V: u32 = 3;
pub const I2S_RX_CHAN_MOD_S: u32 = 3;
pub const I2S_TX_CHAN_MOD: u32 = 7;
pub const I2S_TX_CHAN_MOD_V: u32 = 7;
pub const I2S_TX_CHAN_MOD_S: u32 = 0;
pub const I2S_OUTLINK_PARK_V: u32 = 1;
pub const I2S_OUTLINK_PARK_S: u32 = 31;
pub const I2S_OUTLINK_RESTART_V: u32 = 1;
pub const I2S_OUTLINK_RESTART_S: u32 = 30;
pub const I2S_OUTLINK_START_V: u32 = 1;
pub const I2S_OUTLINK_START_S: u32 = 29;
pub const I2S_OUTLINK_STOP_V: u32 = 1;
pub const I2S_OUTLINK_STOP_S: u32 = 28;
pub const I2S_OUTLINK_ADDR: u32 = 1048575;
pub const I2S_OUTLINK_ADDR_V: u32 = 1048575;
pub const I2S_OUTLINK_ADDR_S: u32 = 0;
pub const I2S_INLINK_PARK_V: u32 = 1;
pub const I2S_INLINK_PARK_S: u32 = 31;
pub const I2S_INLINK_RESTART_V: u32 = 1;
pub const I2S_INLINK_RESTART_S: u32 = 30;
pub const I2S_INLINK_START_V: u32 = 1;
pub const I2S_INLINK_START_S: u32 = 29;
pub const I2S_INLINK_STOP_V: u32 = 1;
pub const I2S_INLINK_STOP_S: u32 = 28;
pub const I2S_INLINK_ADDR: u32 = 1048575;
pub const I2S_INLINK_ADDR_V: u32 = 1048575;
pub const I2S_INLINK_ADDR_S: u32 = 0;
pub const I2S_OUT_EOF_DES_ADDR: u32 = 4294967295;
pub const I2S_OUT_EOF_DES_ADDR_V: u32 = 4294967295;
pub const I2S_OUT_EOF_DES_ADDR_S: u32 = 0;
pub const I2S_IN_SUC_EOF_DES_ADDR: u32 = 4294967295;
pub const I2S_IN_SUC_EOF_DES_ADDR_V: u32 = 4294967295;
pub const I2S_IN_SUC_EOF_DES_ADDR_S: u32 = 0;
pub const I2S_OUT_EOF_BFR_DES_ADDR: u32 = 4294967295;
pub const I2S_OUT_EOF_BFR_DES_ADDR_V: u32 = 4294967295;
pub const I2S_OUT_EOF_BFR_DES_ADDR_S: u32 = 0;
pub const I2S_AHB_TESTADDR: u32 = 3;
pub const I2S_AHB_TESTADDR_V: u32 = 3;
pub const I2S_AHB_TESTADDR_S: u32 = 4;
pub const I2S_AHB_TESTMODE: u32 = 7;
pub const I2S_AHB_TESTMODE_V: u32 = 7;
pub const I2S_AHB_TESTMODE_S: u32 = 0;
pub const I2S_INLINK_DSCR: u32 = 4294967295;
pub const I2S_INLINK_DSCR_V: u32 = 4294967295;
pub const I2S_INLINK_DSCR_S: u32 = 0;
pub const I2S_INLINK_DSCR_BF0: u32 = 4294967295;
pub const I2S_INLINK_DSCR_BF0_V: u32 = 4294967295;
pub const I2S_INLINK_DSCR_BF0_S: u32 = 0;
pub const I2S_INLINK_DSCR_BF1: u32 = 4294967295;
pub const I2S_INLINK_DSCR_BF1_V: u32 = 4294967295;
pub const I2S_INLINK_DSCR_BF1_S: u32 = 0;
pub const I2S_OUTLINK_DSCR: u32 = 4294967295;
pub const I2S_OUTLINK_DSCR_V: u32 = 4294967295;
pub const I2S_OUTLINK_DSCR_S: u32 = 0;
pub const I2S_OUTLINK_DSCR_BF0: u32 = 4294967295;
pub const I2S_OUTLINK_DSCR_BF0_V: u32 = 4294967295;
pub const I2S_OUTLINK_DSCR_BF0_S: u32 = 0;
pub const I2S_OUTLINK_DSCR_BF1: u32 = 4294967295;
pub const I2S_OUTLINK_DSCR_BF1_V: u32 = 4294967295;
pub const I2S_OUTLINK_DSCR_BF1_S: u32 = 0;
pub const I2S_MEM_TRANS_EN_V: u32 = 1;
pub const I2S_MEM_TRANS_EN_S: u32 = 13;
pub const I2S_CHECK_OWNER_V: u32 = 1;
pub const I2S_CHECK_OWNER_S: u32 = 12;
pub const I2S_OUT_DATA_BURST_EN_V: u32 = 1;
pub const I2S_OUT_DATA_BURST_EN_S: u32 = 11;
pub const I2S_INDSCR_BURST_EN_V: u32 = 1;
pub const I2S_INDSCR_BURST_EN_S: u32 = 10;
pub const I2S_OUTDSCR_BURST_EN_V: u32 = 1;
pub const I2S_OUTDSCR_BURST_EN_S: u32 = 9;
pub const I2S_OUT_EOF_MODE_V: u32 = 1;
pub const I2S_OUT_EOF_MODE_S: u32 = 8;
pub const I2S_OUT_NO_RESTART_CLR_V: u32 = 1;
pub const I2S_OUT_NO_RESTART_CLR_S: u32 = 7;
pub const I2S_OUT_AUTO_WRBACK_V: u32 = 1;
pub const I2S_OUT_AUTO_WRBACK_S: u32 = 6;
pub const I2S_IN_LOOP_TEST_V: u32 = 1;
pub const I2S_IN_LOOP_TEST_S: u32 = 5;
pub const I2S_OUT_LOOP_TEST_V: u32 = 1;
pub const I2S_OUT_LOOP_TEST_S: u32 = 4;
pub const I2S_AHBM_RST_V: u32 = 1;
pub const I2S_AHBM_RST_S: u32 = 3;
pub const I2S_AHBM_FIFO_RST_V: u32 = 1;
pub const I2S_AHBM_FIFO_RST_S: u32 = 2;
pub const I2S_OUT_RST_V: u32 = 1;
pub const I2S_OUT_RST_S: u32 = 1;
pub const I2S_IN_RST_V: u32 = 1;
pub const I2S_IN_RST_S: u32 = 0;
pub const I2S_OUTFIFO_PUSH_V: u32 = 1;
pub const I2S_OUTFIFO_PUSH_S: u32 = 16;
pub const I2S_OUTFIFO_WDATA: u32 = 511;
pub const I2S_OUTFIFO_WDATA_V: u32 = 511;
pub const I2S_OUTFIFO_WDATA_S: u32 = 0;
pub const I2S_INFIFO_POP_V: u32 = 1;
pub const I2S_INFIFO_POP_S: u32 = 16;
pub const I2S_INFIFO_RDATA: u32 = 4095;
pub const I2S_INFIFO_RDATA_V: u32 = 4095;
pub const I2S_INFIFO_RDATA_S: u32 = 0;
pub const I2S_LC_STATE0: u32 = 4294967295;
pub const I2S_LC_STATE0_V: u32 = 4294967295;
pub const I2S_LC_STATE0_S: u32 = 0;
pub const I2S_LC_STATE1: u32 = 4294967295;
pub const I2S_LC_STATE1_V: u32 = 4294967295;
pub const I2S_LC_STATE1_S: u32 = 0;
pub const I2S_LC_FIFO_TIMEOUT_ENA_V: u32 = 1;
pub const I2S_LC_FIFO_TIMEOUT_ENA_S: u32 = 11;
pub const I2S_LC_FIFO_TIMEOUT_SHIFT: u32 = 7;
pub const I2S_LC_FIFO_TIMEOUT_SHIFT_V: u32 = 7;
pub const I2S_LC_FIFO_TIMEOUT_SHIFT_S: u32 = 8;
pub const I2S_LC_FIFO_TIMEOUT: u32 = 255;
pub const I2S_LC_FIFO_TIMEOUT_V: u32 = 255;
pub const I2S_LC_FIFO_TIMEOUT_S: u32 = 0;
pub const I2S_CVSD_Y_MIN: u32 = 65535;
pub const I2S_CVSD_Y_MIN_V: u32 = 65535;
pub const I2S_CVSD_Y_MIN_S: u32 = 16;
pub const I2S_CVSD_Y_MAX: u32 = 65535;
pub const I2S_CVSD_Y_MAX_V: u32 = 65535;
pub const I2S_CVSD_Y_MAX_S: u32 = 0;
pub const I2S_CVSD_SIGMA_MIN: u32 = 65535;
pub const I2S_CVSD_SIGMA_MIN_V: u32 = 65535;
pub const I2S_CVSD_SIGMA_MIN_S: u32 = 16;
pub const I2S_CVSD_SIGMA_MAX: u32 = 65535;
pub const I2S_CVSD_SIGMA_MAX_V: u32 = 65535;
pub const I2S_CVSD_SIGMA_MAX_S: u32 = 0;
pub const I2S_CVSD_H: u32 = 7;
pub const I2S_CVSD_H_V: u32 = 7;
pub const I2S_CVSD_H_S: u32 = 16;
pub const I2S_CVSD_BETA: u32 = 1023;
pub const I2S_CVSD_BETA_V: u32 = 1023;
pub const I2S_CVSD_BETA_S: u32 = 6;
pub const I2S_CVSD_J: u32 = 7;
pub const I2S_CVSD_J_V: u32 = 7;
pub const I2S_CVSD_J_S: u32 = 3;
pub const I2S_CVSD_K: u32 = 7;
pub const I2S_CVSD_K_V: u32 = 7;
pub const I2S_CVSD_K_S: u32 = 0;
pub const I2S_N_MIN_ERR: u32 = 7;
pub const I2S_N_MIN_ERR_V: u32 = 7;
pub const I2S_N_MIN_ERR_S: u32 = 25;
pub const I2S_PACK_LEN_8K: u32 = 31;
pub const I2S_PACK_LEN_8K_V: u32 = 31;
pub const I2S_PACK_LEN_8K_S: u32 = 20;
pub const I2S_MAX_SLIDE_SAMPLE: u32 = 255;
pub const I2S_MAX_SLIDE_SAMPLE_V: u32 = 255;
pub const I2S_MAX_SLIDE_SAMPLE_S: u32 = 12;
pub const I2S_SHIFT_RATE: u32 = 7;
pub const I2S_SHIFT_RATE_V: u32 = 7;
pub const I2S_SHIFT_RATE_S: u32 = 9;
pub const I2S_N_ERR_SEG: u32 = 7;
pub const I2S_N_ERR_SEG_V: u32 = 7;
pub const I2S_N_ERR_SEG_S: u32 = 6;
pub const I2S_GOOD_PACK_MAX: u32 = 63;
pub const I2S_GOOD_PACK_MAX_V: u32 = 63;
pub const I2S_GOOD_PACK_MAX_S: u32 = 0;
pub const I2S_SLIDE_WIN_LEN: u32 = 255;
pub const I2S_SLIDE_WIN_LEN_V: u32 = 255;
pub const I2S_SLIDE_WIN_LEN_S: u32 = 24;
pub const I2S_BAD_OLA_WIN2_PARA: u32 = 255;
pub const I2S_BAD_OLA_WIN2_PARA_V: u32 = 255;
pub const I2S_BAD_OLA_WIN2_PARA_S: u32 = 16;
pub const I2S_BAD_OLA_WIN2_PARA_SHIFT: u32 = 15;
pub const I2S_BAD_OLA_WIN2_PARA_SHIFT_V: u32 = 15;
pub const I2S_BAD_OLA_WIN2_PARA_SHIFT_S: u32 = 12;
pub const I2S_BAD_CEF_ATTEN_PARA_SHIFT: u32 = 15;
pub const I2S_BAD_CEF_ATTEN_PARA_SHIFT_V: u32 = 15;
pub const I2S_BAD_CEF_ATTEN_PARA_SHIFT_S: u32 = 8;
pub const I2S_BAD_CEF_ATTEN_PARA: u32 = 255;
pub const I2S_BAD_CEF_ATTEN_PARA_V: u32 = 255;
pub const I2S_BAD_CEF_ATTEN_PARA_S: u32 = 0;
pub const I2S_MIN_PERIOD: u32 = 31;
pub const I2S_MIN_PERIOD_V: u32 = 31;
pub const I2S_MIN_PERIOD_S: u32 = 2;
pub const I2S_CVSD_SEG_MOD: u32 = 3;
pub const I2S_CVSD_SEG_MOD_V: u32 = 3;
pub const I2S_CVSD_SEG_MOD_S: u32 = 0;
pub const I2S_PLC2DMA_EN_V: u32 = 1;
pub const I2S_PLC2DMA_EN_S: u32 = 12;
pub const I2S_PLC_EN_V: u32 = 1;
pub const I2S_PLC_EN_S: u32 = 11;
pub const I2S_CVSD_DEC_RESET_V: u32 = 1;
pub const I2S_CVSD_DEC_RESET_S: u32 = 10;
pub const I2S_CVSD_DEC_START_V: u32 = 1;
pub const I2S_CVSD_DEC_START_S: u32 = 9;
pub const I2S_ESCO_CVSD_INF_EN_V: u32 = 1;
pub const I2S_ESCO_CVSD_INF_EN_S: u32 = 8;
pub const I2S_ESCO_CVSD_PACK_LEN_8K: u32 = 31;
pub const I2S_ESCO_CVSD_PACK_LEN_8K_V: u32 = 31;
pub const I2S_ESCO_CVSD_PACK_LEN_8K_S: u32 = 3;
pub const I2S_ESCO_CVSD_DEC_PACK_ERR_V: u32 = 1;
pub const I2S_ESCO_CVSD_DEC_PACK_ERR_S: u32 = 2;
pub const I2S_ESCO_CHAN_MOD_V: u32 = 1;
pub const I2S_ESCO_CHAN_MOD_S: u32 = 1;
pub const I2S_ESCO_EN_V: u32 = 1;
pub const I2S_ESCO_EN_S: u32 = 0;
pub const I2S_CVSD_ENC_RESET_V: u32 = 1;
pub const I2S_CVSD_ENC_RESET_S: u32 = 3;
pub const I2S_CVSD_ENC_START_V: u32 = 1;
pub const I2S_CVSD_ENC_START_S: u32 = 2;
pub const I2S_SCO_NO_I2S_EN_V: u32 = 1;
pub const I2S_SCO_NO_I2S_EN_S: u32 = 1;
pub const I2S_SCO_WITH_I2S_EN_V: u32 = 1;
pub const I2S_SCO_WITH_I2S_EN_S: u32 = 0;
pub const I2S_TX_ZEROS_RM_EN_V: u32 = 1;
pub const I2S_TX_ZEROS_RM_EN_S: u32 = 9;
pub const I2S_TX_STOP_EN_V: u32 = 1;
pub const I2S_TX_STOP_EN_S: u32 = 8;
pub const I2S_RX_PCM_BYPASS_V: u32 = 1;
pub const I2S_RX_PCM_BYPASS_S: u32 = 7;
pub const I2S_RX_PCM_CONF: u32 = 7;
pub const I2S_RX_PCM_CONF_V: u32 = 7;
pub const I2S_RX_PCM_CONF_S: u32 = 4;
pub const I2S_TX_PCM_BYPASS_V: u32 = 1;
pub const I2S_TX_PCM_BYPASS_S: u32 = 3;
pub const I2S_TX_PCM_CONF: u32 = 7;
pub const I2S_TX_PCM_CONF_V: u32 = 7;
pub const I2S_TX_PCM_CONF_S: u32 = 0;
pub const I2S_PLC_MEM_FORCE_PU_V: u32 = 1;
pub const I2S_PLC_MEM_FORCE_PU_S: u32 = 3;
pub const I2S_PLC_MEM_FORCE_PD_V: u32 = 1;
pub const I2S_PLC_MEM_FORCE_PD_S: u32 = 2;
pub const I2S_FIFO_FORCE_PU_V: u32 = 1;
pub const I2S_FIFO_FORCE_PU_S: u32 = 1;
pub const I2S_FIFO_FORCE_PD_V: u32 = 1;
pub const I2S_FIFO_FORCE_PD_S: u32 = 0;
pub const I2S_INTER_VALID_EN_V: u32 = 1;
pub const I2S_INTER_VALID_EN_S: u32 = 7;
pub const I2S_EXT_ADC_START_EN_V: u32 = 1;
pub const I2S_EXT_ADC_START_EN_S: u32 = 6;
pub const I2S_LCD_EN_V: u32 = 1;
pub const I2S_LCD_EN_S: u32 = 5;
pub const I2S_DATA_ENABLE_V: u32 = 1;
pub const I2S_DATA_ENABLE_S: u32 = 4;
pub const I2S_DATA_ENABLE_TEST_EN_V: u32 = 1;
pub const I2S_DATA_ENABLE_TEST_EN_S: u32 = 3;
pub const I2S_LCD_TX_SDX2_EN_V: u32 = 1;
pub const I2S_LCD_TX_SDX2_EN_S: u32 = 2;
pub const I2S_LCD_TX_WRX2_EN_V: u32 = 1;
pub const I2S_LCD_TX_WRX2_EN_S: u32 = 1;
pub const I2S_CAMERA_EN_V: u32 = 1;
pub const I2S_CAMERA_EN_S: u32 = 0;
pub const I2S_CLKA_ENA_V: u32 = 1;
pub const I2S_CLKA_ENA_S: u32 = 21;
pub const I2S_CLK_EN_V: u32 = 1;
pub const I2S_CLK_EN_S: u32 = 20;
pub const I2S_CLKM_DIV_A: u32 = 63;
pub const I2S_CLKM_DIV_A_V: u32 = 63;
pub const I2S_CLKM_DIV_A_S: u32 = 14;
pub const I2S_CLKM_DIV_B: u32 = 63;
pub const I2S_CLKM_DIV_B_V: u32 = 63;
pub const I2S_CLKM_DIV_B_S: u32 = 8;
pub const I2S_CLKM_DIV_NUM: u32 = 255;
pub const I2S_CLKM_DIV_NUM_V: u32 = 255;
pub const I2S_CLKM_DIV_NUM_S: u32 = 0;
pub const I2S_RX_BITS_MOD: u32 = 63;
pub const I2S_RX_BITS_MOD_V: u32 = 63;
pub const I2S_RX_BITS_MOD_S: u32 = 18;
pub const I2S_TX_BITS_MOD: u32 = 63;
pub const I2S_TX_BITS_MOD_V: u32 = 63;
pub const I2S_TX_BITS_MOD_S: u32 = 12;
pub const I2S_RX_BCK_DIV_NUM: u32 = 63;
pub const I2S_RX_BCK_DIV_NUM_V: u32 = 63;
pub const I2S_RX_BCK_DIV_NUM_S: u32 = 6;
pub const I2S_TX_BCK_DIV_NUM: u32 = 63;
pub const I2S_TX_BCK_DIV_NUM_V: u32 = 63;
pub const I2S_TX_BCK_DIV_NUM_S: u32 = 0;
pub const I2S_TX_PDM_HP_BYPASS_V: u32 = 1;
pub const I2S_TX_PDM_HP_BYPASS_S: u32 = 25;
pub const I2S_RX_PDM_SINC_DSR_16_EN_V: u32 = 1;
pub const I2S_RX_PDM_SINC_DSR_16_EN_S: u32 = 24;
pub const I2S_TX_PDM_SIGMADELTA_IN_SHIFT: u32 = 3;
pub const I2S_TX_PDM_SIGMADELTA_IN_SHIFT_V: u32 = 3;
pub const I2S_TX_PDM_SIGMADELTA_IN_SHIFT_S: u32 = 22;
pub const I2S_TX_PDM_SINC_IN_SHIFT: u32 = 3;
pub const I2S_TX_PDM_SINC_IN_SHIFT_V: u32 = 3;
pub const I2S_TX_PDM_SINC_IN_SHIFT_S: u32 = 20;
pub const I2S_TX_PDM_LP_IN_SHIFT: u32 = 3;
pub const I2S_TX_PDM_LP_IN_SHIFT_V: u32 = 3;
pub const I2S_TX_PDM_LP_IN_SHIFT_S: u32 = 18;
pub const I2S_TX_PDM_HP_IN_SHIFT: u32 = 3;
pub const I2S_TX_PDM_HP_IN_SHIFT_V: u32 = 3;
pub const I2S_TX_PDM_HP_IN_SHIFT_S: u32 = 16;
pub const I2S_TX_PDM_PRESCALE: u32 = 255;
pub const I2S_TX_PDM_PRESCALE_V: u32 = 255;
pub const I2S_TX_PDM_PRESCALE_S: u32 = 8;
pub const I2S_TX_PDM_SINC_OSR2: u32 = 15;
pub const I2S_TX_PDM_SINC_OSR2_V: u32 = 15;
pub const I2S_TX_PDM_SINC_OSR2_S: u32 = 4;
pub const I2S_PDM2PCM_CONV_EN_V: u32 = 1;
pub const I2S_PDM2PCM_CONV_EN_S: u32 = 3;
pub const I2S_PCM2PDM_CONV_EN_V: u32 = 1;
pub const I2S_PCM2PDM_CONV_EN_S: u32 = 2;
pub const I2S_RX_PDM_EN_V: u32 = 1;
pub const I2S_RX_PDM_EN_S: u32 = 1;
pub const I2S_TX_PDM_EN_V: u32 = 1;
pub const I2S_TX_PDM_EN_S: u32 = 0;
pub const I2S_TX_PDM_FP: u32 = 1023;
pub const I2S_TX_PDM_FP_V: u32 = 1023;
pub const I2S_TX_PDM_FP_S: u32 = 10;
pub const I2S_TX_PDM_FS: u32 = 1023;
pub const I2S_TX_PDM_FS_V: u32 = 1023;
pub const I2S_TX_PDM_FS_S: u32 = 0;
pub const I2S_RX_FIFO_RESET_BACK_V: u32 = 1;
pub const I2S_RX_FIFO_RESET_BACK_S: u32 = 2;
pub const I2S_TX_FIFO_RESET_BACK_V: u32 = 1;
pub const I2S_TX_FIFO_RESET_BACK_S: u32 = 1;
pub const I2S_TX_IDLE_V: u32 = 1;
pub const I2S_TX_IDLE_S: u32 = 0;
pub const I2S_I2SDATE: u32 = 4294967295;
pub const I2S_I2SDATE_V: u32 = 4294967295;
pub const I2S_I2SDATE_S: u32 = 0;
pub const APLL_MIN_FREQ: u32 = 250000000;
pub const APLL_MAX_FREQ: u32 = 500000000;
pub const APLL_I2S_MIN_RATE: u32 = 10675;
pub const I2S_AD_BCK_FACTOR: u32 = 2;
pub const I2S_PDM_BCK_FACTOR: u32 = 64;
pub const I2S_MAX_BUFFER_SIZE: u32 = 4194304;
pub const I2S_BASE_CLK: u32 = 160000000;
pub const SOC_I2S_NUM: u32 = 2;
pub const SOC_I2S_SUPPORTS_PDM: u32 = 1;
pub const SOC_I2S_SUPPORTS_DMA_EQUAL: u32 = 0;
pub const SOC_I2S_SUPPORTS_ADC_DAC: u32 = 1;
pub const SOC_RTC_IO_PIN_COUNT: u32 = 18;
pub const SOC_PIN_FUNC_RTC_IO: u32 = 0;
pub const RTC_GPIO_NUMBER: u32 = 18;
pub const RTCIO_GPIO36_CHANNEL: u32 = 0;
pub const RTCIO_CHANNEL_0_GPIO_NUM: u32 = 36;
pub const RTCIO_GPIO37_CHANNEL: u32 = 1;
pub const RTCIO_CHANNEL_1_GPIO_NUM: u32 = 37;
pub const RTCIO_GPIO38_CHANNEL: u32 = 2;
pub const RTCIO_CHANNEL_2_GPIO_NUM: u32 = 38;
pub const RTCIO_GPIO39_CHANNEL: u32 = 3;
pub const RTCIO_CHANNEL_3_GPIO_NUM: u32 = 39;
pub const RTCIO_GPIO34_CHANNEL: u32 = 4;
pub const RTCIO_CHANNEL_4_GPIO_NUM: u32 = 34;
pub const RTCIO_GPIO35_CHANNEL: u32 = 5;
pub const RTCIO_CHANNEL_5_GPIO_NUM: u32 = 35;
pub const RTCIO_GPIO25_CHANNEL: u32 = 6;
pub const RTCIO_CHANNEL_6_GPIO_NUM: u32 = 25;
pub const RTCIO_GPIO26_CHANNEL: u32 = 7;
pub const RTCIO_CHANNEL_7_GPIO_NUM: u32 = 26;
pub const RTCIO_GPIO33_CHANNEL: u32 = 8;
pub const RTCIO_CHANNEL_8_GPIO_NUM: u32 = 33;
pub const RTCIO_GPIO32_CHANNEL: u32 = 9;
pub const RTCIO_CHANNEL_9_GPIO_NUM: u32 = 32;
pub const RTCIO_GPIO4_CHANNEL: u32 = 10;
pub const RTCIO_CHANNEL_10_GPIO_NUM: u32 = 4;
pub const RTCIO_GPIO0_CHANNEL: u32 = 11;
pub const RTCIO_CHANNEL_11_GPIO_NUM: u32 = 0;
pub const RTCIO_GPIO2_CHANNEL: u32 = 12;
pub const RTCIO_CHANNEL_12_GPIO_NUM: u32 = 2;
pub const RTCIO_GPIO15_CHANNEL: u32 = 13;
pub const RTCIO_CHANNEL_13_GPIO_NUM: u32 = 15;
pub const RTCIO_GPIO13_CHANNEL: u32 = 14;
pub const RTCIO_CHANNEL_14_GPIO_NUM: u32 = 13;
pub const RTCIO_GPIO12_CHANNEL: u32 = 15;
pub const RTCIO_CHANNEL_15_GPIO_NUM: u32 = 12;
pub const RTCIO_GPIO14_CHANNEL: u32 = 16;
pub const RTCIO_CHANNEL_16_GPIO_NUM: u32 = 14;
pub const RTCIO_GPIO27_CHANNEL: u32 = 17;
pub const RTCIO_CHANNEL_17_GPIO_NUM: u32 = 27;
pub const RTC_GPIO_OUT_REG: u32 = 1072989184;
pub const RTC_GPIO_OUT_DATA: u32 = 262143;
pub const RTC_GPIO_OUT_DATA_V: u32 = 262143;
pub const RTC_GPIO_OUT_DATA_S: u32 = 14;
pub const RTC_GPIO_OUT_W1TS_REG: u32 = 1072989188;
pub const RTC_GPIO_OUT_DATA_W1TS: u32 = 262143;
pub const RTC_GPIO_OUT_DATA_W1TS_V: u32 = 262143;
pub const RTC_GPIO_OUT_DATA_W1TS_S: u32 = 14;
pub const RTC_GPIO_OUT_W1TC_REG: u32 = 1072989192;
pub const RTC_GPIO_OUT_DATA_W1TC: u32 = 262143;
pub const RTC_GPIO_OUT_DATA_W1TC_V: u32 = 262143;
pub const RTC_GPIO_OUT_DATA_W1TC_S: u32 = 14;
pub const RTC_GPIO_ENABLE_REG: u32 = 1072989196;
pub const RTC_GPIO_ENABLE: u32 = 262143;
pub const RTC_GPIO_ENABLE_V: u32 = 262143;
pub const RTC_GPIO_ENABLE_S: u32 = 14;
pub const RTC_GPIO_ENABLE_W1TS_REG: u32 = 1072989200;
pub const RTC_GPIO_ENABLE_W1TS: u32 = 262143;
pub const RTC_GPIO_ENABLE_W1TS_V: u32 = 262143;
pub const RTC_GPIO_ENABLE_W1TS_S: u32 = 14;
pub const RTC_GPIO_ENABLE_W1TC_REG: u32 = 1072989204;
pub const RTC_GPIO_ENABLE_W1TC: u32 = 262143;
pub const RTC_GPIO_ENABLE_W1TC_V: u32 = 262143;
pub const RTC_GPIO_ENABLE_W1TC_S: u32 = 14;
pub const RTC_GPIO_STATUS_REG: u32 = 1072989208;
pub const RTC_GPIO_STATUS_INT: u32 = 262143;
pub const RTC_GPIO_STATUS_INT_V: u32 = 262143;
pub const RTC_GPIO_STATUS_INT_S: u32 = 14;
pub const RTC_GPIO_STATUS_W1TS_REG: u32 = 1072989212;
pub const RTC_GPIO_STATUS_INT_W1TS: u32 = 262143;
pub const RTC_GPIO_STATUS_INT_W1TS_V: u32 = 262143;
pub const RTC_GPIO_STATUS_INT_W1TS_S: u32 = 14;
pub const RTC_GPIO_STATUS_W1TC_REG: u32 = 1072989216;
pub const RTC_GPIO_STATUS_INT_W1TC: u32 = 262143;
pub const RTC_GPIO_STATUS_INT_W1TC_V: u32 = 262143;
pub const RTC_GPIO_STATUS_INT_W1TC_S: u32 = 14;
pub const RTC_GPIO_IN_REG: u32 = 1072989220;
pub const RTC_GPIO_IN_NEXT: u32 = 262143;
pub const RTC_GPIO_IN_NEXT_V: u32 = 262143;
pub const RTC_GPIO_IN_NEXT_S: u32 = 14;
pub const RTC_GPIO_PIN0_REG: u32 = 1072989224;
pub const RTC_GPIO_PIN0_WAKEUP_ENABLE_V: u32 = 1;
pub const RTC_GPIO_PIN0_WAKEUP_ENABLE_S: u32 = 10;
pub const RTC_GPIO_PIN0_INT_TYPE: u32 = 7;
pub const RTC_GPIO_PIN0_INT_TYPE_V: u32 = 7;
pub const RTC_GPIO_PIN0_INT_TYPE_S: u32 = 7;
pub const RTC_GPIO_PIN0_PAD_DRIVER_V: u32 = 1;
pub const RTC_GPIO_PIN0_PAD_DRIVER_S: u32 = 2;
pub const RTC_GPIO_PIN1_REG: u32 = 1072989228;
pub const RTC_GPIO_PIN1_WAKEUP_ENABLE_V: u32 = 1;
pub const RTC_GPIO_PIN1_WAKEUP_ENABLE_S: u32 = 10;
pub const RTC_GPIO_PIN1_INT_TYPE: u32 = 7;
pub const RTC_GPIO_PIN1_INT_TYPE_V: u32 = 7;
pub const RTC_GPIO_PIN1_INT_TYPE_S: u32 = 7;
pub const RTC_GPIO_PIN1_PAD_DRIVER_V: u32 = 1;
pub const RTC_GPIO_PIN1_PAD_DRIVER_S: u32 = 2;
pub const RTC_GPIO_PIN2_REG: u32 = 1072989232;
pub const RTC_GPIO_PIN2_WAKEUP_ENABLE_V: u32 = 1;
pub const RTC_GPIO_PIN2_WAKEUP_ENABLE_S: u32 = 10;
pub const RTC_GPIO_PIN2_INT_TYPE: u32 = 7;
pub const RTC_GPIO_PIN2_INT_TYPE_V: u32 = 7;
pub const RTC_GPIO_PIN2_INT_TYPE_S: u32 = 7;
pub const RTC_GPIO_PIN2_PAD_DRIVER_V: u32 = 1;
pub const RTC_GPIO_PIN2_PAD_DRIVER_S: u32 = 2;
pub const RTC_GPIO_PIN3_REG: u32 = 1072989236;
pub const RTC_GPIO_PIN3_WAKEUP_ENABLE_V: u32 = 1;
pub const RTC_GPIO_PIN3_WAKEUP_ENABLE_S: u32 = 10;
pub const RTC_GPIO_PIN3_INT_TYPE: u32 = 7;
pub const RTC_GPIO_PIN3_INT_TYPE_V: u32 = 7;
pub const RTC_GPIO_PIN3_INT_TYPE_S: u32 = 7;
pub const RTC_GPIO_PIN3_PAD_DRIVER_V: u32 = 1;
pub const RTC_GPIO_PIN3_PAD_DRIVER_S: u32 = 2;
pub const RTC_GPIO_PIN4_REG: u32 = 1072989240;
pub const RTC_GPIO_PIN4_WAKEUP_ENABLE_V: u32 = 1;
pub const RTC_GPIO_PIN4_WAKEUP_ENABLE_S: u32 = 10;
pub const RTC_GPIO_PIN4_INT_TYPE: u32 = 7;
pub const RTC_GPIO_PIN4_INT_TYPE_V: u32 = 7;
pub const RTC_GPIO_PIN4_INT_TYPE_S: u32 = 7;
pub const RTC_GPIO_PIN4_PAD_DRIVER_V: u32 = 1;
pub const RTC_GPIO_PIN4_PAD_DRIVER_S: u32 = 2;
pub const RTC_GPIO_PIN5_REG: u32 = 1072989244;
pub const RTC_GPIO_PIN5_WAKEUP_ENABLE_V: u32 = 1;
pub const RTC_GPIO_PIN5_WAKEUP_ENABLE_S: u32 = 10;
pub const RTC_GPIO_PIN5_INT_TYPE: u32 = 7;
pub const RTC_GPIO_PIN5_INT_TYPE_V: u32 = 7;
pub const RTC_GPIO_PIN5_INT_TYPE_S: u32 = 7;
pub const RTC_GPIO_PIN5_PAD_DRIVER_V: u32 = 1;
pub const RTC_GPIO_PIN5_PAD_DRIVER_S: u32 = 2;
pub const RTC_GPIO_PIN6_REG: u32 = 1072989248;
pub const RTC_GPIO_PIN6_WAKEUP_ENABLE_V: u32 = 1;
pub const RTC_GPIO_PIN6_WAKEUP_ENABLE_S: u32 = 10;
pub const RTC_GPIO_PIN6_INT_TYPE: u32 = 7;
pub const RTC_GPIO_PIN6_INT_TYPE_V: u32 = 7;
pub const RTC_GPIO_PIN6_INT_TYPE_S: u32 = 7;
pub const RTC_GPIO_PIN6_PAD_DRIVER_V: u32 = 1;
pub const RTC_GPIO_PIN6_PAD_DRIVER_S: u32 = 2;
pub const RTC_GPIO_PIN7_REG: u32 = 1072989252;
pub const RTC_GPIO_PIN7_WAKEUP_ENABLE_V: u32 = 1;
pub const RTC_GPIO_PIN7_WAKEUP_ENABLE_S: u32 = 10;
pub const RTC_GPIO_PIN7_INT_TYPE: u32 = 7;
pub const RTC_GPIO_PIN7_INT_TYPE_V: u32 = 7;
pub const RTC_GPIO_PIN7_INT_TYPE_S: u32 = 7;
pub const RTC_GPIO_PIN7_PAD_DRIVER_V: u32 = 1;
pub const RTC_GPIO_PIN7_PAD_DRIVER_S: u32 = 2;
pub const RTC_GPIO_PIN8_REG: u32 = 1072989256;
pub const RTC_GPIO_PIN8_WAKEUP_ENABLE_V: u32 = 1;
pub const RTC_GPIO_PIN8_WAKEUP_ENABLE_S: u32 = 10;
pub const RTC_GPIO_PIN8_INT_TYPE: u32 = 7;
pub const RTC_GPIO_PIN8_INT_TYPE_V: u32 = 7;
pub const RTC_GPIO_PIN8_INT_TYPE_S: u32 = 7;
pub const RTC_GPIO_PIN8_PAD_DRIVER_V: u32 = 1;
pub const RTC_GPIO_PIN8_PAD_DRIVER_S: u32 = 2;
pub const RTC_GPIO_PIN9_REG: u32 = 1072989260;
pub const RTC_GPIO_PIN9_WAKEUP_ENABLE_V: u32 = 1;
pub const RTC_GPIO_PIN9_WAKEUP_ENABLE_S: u32 = 10;
pub const RTC_GPIO_PIN9_INT_TYPE: u32 = 7;
pub const RTC_GPIO_PIN9_INT_TYPE_V: u32 = 7;
pub const RTC_GPIO_PIN9_INT_TYPE_S: u32 = 7;
pub const RTC_GPIO_PIN9_PAD_DRIVER_V: u32 = 1;
pub const RTC_GPIO_PIN9_PAD_DRIVER_S: u32 = 2;
pub const RTC_GPIO_PIN10_REG: u32 = 1072989264;
pub const RTC_GPIO_PIN10_WAKEUP_ENABLE_V: u32 = 1;
pub const RTC_GPIO_PIN10_WAKEUP_ENABLE_S: u32 = 10;
pub const RTC_GPIO_PIN10_INT_TYPE: u32 = 7;
pub const RTC_GPIO_PIN10_INT_TYPE_V: u32 = 7;
pub const RTC_GPIO_PIN10_INT_TYPE_S: u32 = 7;
pub const RTC_GPIO_PIN10_PAD_DRIVER_V: u32 = 1;
pub const RTC_GPIO_PIN10_PAD_DRIVER_S: u32 = 2;
pub const RTC_GPIO_PIN11_REG: u32 = 1072989268;
pub const RTC_GPIO_PIN11_WAKEUP_ENABLE_V: u32 = 1;
pub const RTC_GPIO_PIN11_WAKEUP_ENABLE_S: u32 = 10;
pub const RTC_GPIO_PIN11_INT_TYPE: u32 = 7;
pub const RTC_GPIO_PIN11_INT_TYPE_V: u32 = 7;
pub const RTC_GPIO_PIN11_INT_TYPE_S: u32 = 7;
pub const RTC_GPIO_PIN11_PAD_DRIVER_V: u32 = 1;
pub const RTC_GPIO_PIN11_PAD_DRIVER_S: u32 = 2;
pub const RTC_GPIO_PIN12_REG: u32 = 1072989272;
pub const RTC_GPIO_PIN12_WAKEUP_ENABLE_V: u32 = 1;
pub const RTC_GPIO_PIN12_WAKEUP_ENABLE_S: u32 = 10;
pub const RTC_GPIO_PIN12_INT_TYPE: u32 = 7;
pub const RTC_GPIO_PIN12_INT_TYPE_V: u32 = 7;
pub const RTC_GPIO_PIN12_INT_TYPE_S: u32 = 7;
pub const RTC_GPIO_PIN12_PAD_DRIVER_V: u32 = 1;
pub const RTC_GPIO_PIN12_PAD_DRIVER_S: u32 = 2;
pub const RTC_GPIO_PIN13_REG: u32 = 1072989276;
pub const RTC_GPIO_PIN13_WAKEUP_ENABLE_V: u32 = 1;
pub const RTC_GPIO_PIN13_WAKEUP_ENABLE_S: u32 = 10;
pub const RTC_GPIO_PIN13_INT_TYPE: u32 = 7;
pub const RTC_GPIO_PIN13_INT_TYPE_V: u32 = 7;
pub const RTC_GPIO_PIN13_INT_TYPE_S: u32 = 7;
pub const RTC_GPIO_PIN13_PAD_DRIVER_V: u32 = 1;
pub const RTC_GPIO_PIN13_PAD_DRIVER_S: u32 = 2;
pub const RTC_GPIO_PIN14_REG: u32 = 1072989280;
pub const RTC_GPIO_PIN14_WAKEUP_ENABLE_V: u32 = 1;
pub const RTC_GPIO_PIN14_WAKEUP_ENABLE_S: u32 = 10;
pub const RTC_GPIO_PIN14_INT_TYPE: u32 = 7;
pub const RTC_GPIO_PIN14_INT_TYPE_V: u32 = 7;
pub const RTC_GPIO_PIN14_INT_TYPE_S: u32 = 7;
pub const RTC_GPIO_PIN14_PAD_DRIVER_V: u32 = 1;
pub const RTC_GPIO_PIN14_PAD_DRIVER_S: u32 = 2;
pub const RTC_GPIO_PIN15_REG: u32 = 1072989284;
pub const RTC_GPIO_PIN15_WAKEUP_ENABLE_V: u32 = 1;
pub const RTC_GPIO_PIN15_WAKEUP_ENABLE_S: u32 = 10;
pub const RTC_GPIO_PIN15_INT_TYPE: u32 = 7;
pub const RTC_GPIO_PIN15_INT_TYPE_V: u32 = 7;
pub const RTC_GPIO_PIN15_INT_TYPE_S: u32 = 7;
pub const RTC_GPIO_PIN15_PAD_DRIVER_V: u32 = 1;
pub const RTC_GPIO_PIN15_PAD_DRIVER_S: u32 = 2;
pub const RTC_GPIO_PIN16_REG: u32 = 1072989288;
pub const RTC_GPIO_PIN16_WAKEUP_ENABLE_V: u32 = 1;
pub const RTC_GPIO_PIN16_WAKEUP_ENABLE_S: u32 = 10;
pub const RTC_GPIO_PIN16_INT_TYPE: u32 = 7;
pub const RTC_GPIO_PIN16_INT_TYPE_V: u32 = 7;
pub const RTC_GPIO_PIN16_INT_TYPE_S: u32 = 7;
pub const RTC_GPIO_PIN16_PAD_DRIVER_V: u32 = 1;
pub const RTC_GPIO_PIN16_PAD_DRIVER_S: u32 = 2;
pub const RTC_GPIO_PIN17_REG: u32 = 1072989292;
pub const RTC_GPIO_PIN17_WAKEUP_ENABLE_V: u32 = 1;
pub const RTC_GPIO_PIN17_WAKEUP_ENABLE_S: u32 = 10;
pub const RTC_GPIO_PIN17_INT_TYPE: u32 = 7;
pub const RTC_GPIO_PIN17_INT_TYPE_V: u32 = 7;
pub const RTC_GPIO_PIN17_INT_TYPE_S: u32 = 7;
pub const RTC_GPIO_PIN17_PAD_DRIVER_V: u32 = 1;
pub const RTC_GPIO_PIN17_PAD_DRIVER_S: u32 = 2;
pub const RTC_IO_RTC_DEBUG_SEL_REG: u32 = 1072989296;
pub const RTC_IO_DEBUG_12M_NO_GATING_V: u32 = 1;
pub const RTC_IO_DEBUG_12M_NO_GATING_S: u32 = 25;
pub const RTC_IO_DEBUG_SEL4: u32 = 31;
pub const RTC_IO_DEBUG_SEL4_V: u32 = 31;
pub const RTC_IO_DEBUG_SEL4_S: u32 = 20;
pub const RTC_IO_DEBUG_SEL3: u32 = 31;
pub const RTC_IO_DEBUG_SEL3_V: u32 = 31;
pub const RTC_IO_DEBUG_SEL3_S: u32 = 15;
pub const RTC_IO_DEBUG_SEL2: u32 = 31;
pub const RTC_IO_DEBUG_SEL2_V: u32 = 31;
pub const RTC_IO_DEBUG_SEL2_S: u32 = 10;
pub const RTC_IO_DEBUG_SEL1: u32 = 31;
pub const RTC_IO_DEBUG_SEL1_V: u32 = 31;
pub const RTC_IO_DEBUG_SEL1_S: u32 = 5;
pub const RTC_IO_DEBUG_SEL0: u32 = 31;
pub const RTC_IO_DEBUG_SEL0_V: u32 = 31;
pub const RTC_IO_DEBUG_SEL0_S: u32 = 0;
pub const RTC_IO_DEBUG_SEL0_8M: u32 = 1;
pub const RTC_IO_DEBUG_SEL0_32K_XTAL: u32 = 4;
pub const RTC_IO_DEBUG_SEL0_150K_OSC: u32 = 5;
pub const RTC_IO_DIG_PAD_HOLD_REG: u32 = 1072989300;
pub const RTC_IO_DIG_PAD_HOLD: u32 = 4294967295;
pub const RTC_IO_DIG_PAD_HOLD_V: u32 = 4294967295;
pub const RTC_IO_DIG_PAD_HOLD_S: u32 = 0;
pub const RTC_IO_HALL_SENS_REG: u32 = 1072989304;
pub const RTC_IO_XPD_HALL_V: u32 = 1;
pub const RTC_IO_XPD_HALL_S: u32 = 31;
pub const RTC_IO_HALL_PHASE_V: u32 = 1;
pub const RTC_IO_HALL_PHASE_S: u32 = 30;
pub const RTC_IO_SENSOR_PADS_REG: u32 = 1072989308;
pub const RTC_IO_SENSE1_HOLD_V: u32 = 1;
pub const RTC_IO_SENSE1_HOLD_S: u32 = 31;
pub const RTC_IO_SENSE2_HOLD_V: u32 = 1;
pub const RTC_IO_SENSE2_HOLD_S: u32 = 30;
pub const RTC_IO_SENSE3_HOLD_V: u32 = 1;
pub const RTC_IO_SENSE3_HOLD_S: u32 = 29;
pub const RTC_IO_SENSE4_HOLD_V: u32 = 1;
pub const RTC_IO_SENSE4_HOLD_S: u32 = 28;
pub const RTC_IO_SENSE1_MUX_SEL_V: u32 = 1;
pub const RTC_IO_SENSE1_MUX_SEL_S: u32 = 27;
pub const RTC_IO_SENSE2_MUX_SEL_V: u32 = 1;
pub const RTC_IO_SENSE2_MUX_SEL_S: u32 = 26;
pub const RTC_IO_SENSE3_MUX_SEL_V: u32 = 1;
pub const RTC_IO_SENSE3_MUX_SEL_S: u32 = 25;
pub const RTC_IO_SENSE4_MUX_SEL_V: u32 = 1;
pub const RTC_IO_SENSE4_MUX_SEL_S: u32 = 24;
pub const RTC_IO_SENSE1_FUN_SEL: u32 = 3;
pub const RTC_IO_SENSE1_FUN_SEL_V: u32 = 3;
pub const RTC_IO_SENSE1_FUN_SEL_S: u32 = 22;
pub const RTC_IO_SENSE1_SLP_SEL_V: u32 = 1;
pub const RTC_IO_SENSE1_SLP_SEL_S: u32 = 21;
pub const RTC_IO_SENSE1_SLP_IE_V: u32 = 1;
pub const RTC_IO_SENSE1_SLP_IE_S: u32 = 20;
pub const RTC_IO_SENSE1_FUN_IE_V: u32 = 1;
pub const RTC_IO_SENSE1_FUN_IE_S: u32 = 19;
pub const RTC_IO_SENSE2_FUN_SEL: u32 = 3;
pub const RTC_IO_SENSE2_FUN_SEL_V: u32 = 3;
pub const RTC_IO_SENSE2_FUN_SEL_S: u32 = 17;
pub const RTC_IO_SENSE2_SLP_SEL_V: u32 = 1;
pub const RTC_IO_SENSE2_SLP_SEL_S: u32 = 16;
pub const RTC_IO_SENSE2_SLP_IE_V: u32 = 1;
pub const RTC_IO_SENSE2_SLP_IE_S: u32 = 15;
pub const RTC_IO_SENSE2_FUN_IE_V: u32 = 1;
pub const RTC_IO_SENSE2_FUN_IE_S: u32 = 14;
pub const RTC_IO_SENSE3_FUN_SEL: u32 = 3;
pub const RTC_IO_SENSE3_FUN_SEL_V: u32 = 3;
pub const RTC_IO_SENSE3_FUN_SEL_S: u32 = 12;
pub const RTC_IO_SENSE3_SLP_SEL_V: u32 = 1;
pub const RTC_IO_SENSE3_SLP_SEL_S: u32 = 11;
pub const RTC_IO_SENSE3_SLP_IE_V: u32 = 1;
pub const RTC_IO_SENSE3_SLP_IE_S: u32 = 10;
pub const RTC_IO_SENSE3_FUN_IE_V: u32 = 1;
pub const RTC_IO_SENSE3_FUN_IE_S: u32 = 9;
pub const RTC_IO_SENSE4_FUN_SEL: u32 = 3;
pub const RTC_IO_SENSE4_FUN_SEL_V: u32 = 3;
pub const RTC_IO_SENSE4_FUN_SEL_S: u32 = 7;
pub const RTC_IO_SENSE4_SLP_SEL_V: u32 = 1;
pub const RTC_IO_SENSE4_SLP_SEL_S: u32 = 6;
pub const RTC_IO_SENSE4_SLP_IE_V: u32 = 1;
pub const RTC_IO_SENSE4_SLP_IE_S: u32 = 5;
pub const RTC_IO_SENSE4_FUN_IE_V: u32 = 1;
pub const RTC_IO_SENSE4_FUN_IE_S: u32 = 4;
pub const RTC_IO_ADC_PAD_REG: u32 = 1072989312;
pub const RTC_IO_ADC1_HOLD_V: u32 = 1;
pub const RTC_IO_ADC1_HOLD_S: u32 = 31;
pub const RTC_IO_ADC2_HOLD_V: u32 = 1;
pub const RTC_IO_ADC2_HOLD_S: u32 = 30;
pub const RTC_IO_ADC1_MUX_SEL_V: u32 = 1;
pub const RTC_IO_ADC1_MUX_SEL_S: u32 = 29;
pub const RTC_IO_ADC2_MUX_SEL_V: u32 = 1;
pub const RTC_IO_ADC2_MUX_SEL_S: u32 = 28;
pub const RTC_IO_ADC1_FUN_SEL: u32 = 3;
pub const RTC_IO_ADC1_FUN_SEL_V: u32 = 3;
pub const RTC_IO_ADC1_FUN_SEL_S: u32 = 26;
pub const RTC_IO_ADC1_SLP_SEL_V: u32 = 1;
pub const RTC_IO_ADC1_SLP_SEL_S: u32 = 25;
pub const RTC_IO_ADC1_SLP_IE_V: u32 = 1;
pub const RTC_IO_ADC1_SLP_IE_S: u32 = 24;
pub const RTC_IO_ADC1_FUN_IE_V: u32 = 1;
pub const RTC_IO_ADC1_FUN_IE_S: u32 = 23;
pub const RTC_IO_ADC2_FUN_SEL: u32 = 3;
pub const RTC_IO_ADC2_FUN_SEL_V: u32 = 3;
pub const RTC_IO_ADC2_FUN_SEL_S: u32 = 21;
pub const RTC_IO_ADC2_SLP_SEL_V: u32 = 1;
pub const RTC_IO_ADC2_SLP_SEL_S: u32 = 20;
pub const RTC_IO_ADC2_SLP_IE_V: u32 = 1;
pub const RTC_IO_ADC2_SLP_IE_S: u32 = 19;
pub const RTC_IO_ADC2_FUN_IE_V: u32 = 1;
pub const RTC_IO_ADC2_FUN_IE_S: u32 = 18;
pub const RTC_IO_PAD_DAC1_REG: u32 = 1072989316;
pub const RTC_IO_PDAC1_DRV: u32 = 3;
pub const RTC_IO_PDAC1_DRV_V: u32 = 3;
pub const RTC_IO_PDAC1_DRV_S: u32 = 30;
pub const RTC_IO_PDAC1_HOLD_V: u32 = 1;
pub const RTC_IO_PDAC1_HOLD_S: u32 = 29;
pub const RTC_IO_PDAC1_RDE_V: u32 = 1;
pub const RTC_IO_PDAC1_RDE_S: u32 = 28;
pub const RTC_IO_PDAC1_RUE_V: u32 = 1;
pub const RTC_IO_PDAC1_RUE_S: u32 = 27;
pub const RTC_IO_PDAC1_DAC: u32 = 255;
pub const RTC_IO_PDAC1_DAC_V: u32 = 255;
pub const RTC_IO_PDAC1_DAC_S: u32 = 19;
pub const RTC_IO_PDAC1_XPD_DAC_V: u32 = 1;
pub const RTC_IO_PDAC1_XPD_DAC_S: u32 = 18;
pub const RTC_IO_PDAC1_MUX_SEL_V: u32 = 1;
pub const RTC_IO_PDAC1_MUX_SEL_S: u32 = 17;
pub const RTC_IO_PDAC1_FUN_SEL: u32 = 3;
pub const RTC_IO_PDAC1_FUN_SEL_V: u32 = 3;
pub const RTC_IO_PDAC1_FUN_SEL_S: u32 = 15;
pub const RTC_IO_PDAC1_SLP_SEL_V: u32 = 1;
pub const RTC_IO_PDAC1_SLP_SEL_S: u32 = 14;
pub const RTC_IO_PDAC1_SLP_IE_V: u32 = 1;
pub const RTC_IO_PDAC1_SLP_IE_S: u32 = 13;
pub const RTC_IO_PDAC1_SLP_OE_V: u32 = 1;
pub const RTC_IO_PDAC1_SLP_OE_S: u32 = 12;
pub const RTC_IO_PDAC1_FUN_IE_V: u32 = 1;
pub const RTC_IO_PDAC1_FUN_IE_S: u32 = 11;
pub const RTC_IO_PDAC1_DAC_XPD_FORCE_V: u32 = 1;
pub const RTC_IO_PDAC1_DAC_XPD_FORCE_S: u32 = 10;
pub const RTC_IO_PAD_DAC2_REG: u32 = 1072989320;
pub const RTC_IO_PDAC2_DRV: u32 = 3;
pub const RTC_IO_PDAC2_DRV_V: u32 = 3;
pub const RTC_IO_PDAC2_DRV_S: u32 = 30;
pub const RTC_IO_PDAC2_HOLD_V: u32 = 1;
pub const RTC_IO_PDAC2_HOLD_S: u32 = 29;
pub const RTC_IO_PDAC2_RDE_V: u32 = 1;
pub const RTC_IO_PDAC2_RDE_S: u32 = 28;
pub const RTC_IO_PDAC2_RUE_V: u32 = 1;
pub const RTC_IO_PDAC2_RUE_S: u32 = 27;
pub const RTC_IO_PDAC2_DAC: u32 = 255;
pub const RTC_IO_PDAC2_DAC_V: u32 = 255;
pub const RTC_IO_PDAC2_DAC_S: u32 = 19;
pub const RTC_IO_PDAC2_XPD_DAC_V: u32 = 1;
pub const RTC_IO_PDAC2_XPD_DAC_S: u32 = 18;
pub const RTC_IO_PDAC2_MUX_SEL_V: u32 = 1;
pub const RTC_IO_PDAC2_MUX_SEL_S: u32 = 17;
pub const RTC_IO_PDAC2_FUN_SEL: u32 = 3;
pub const RTC_IO_PDAC2_FUN_SEL_V: u32 = 3;
pub const RTC_IO_PDAC2_FUN_SEL_S: u32 = 15;
pub const RTC_IO_PDAC2_SLP_SEL_V: u32 = 1;
pub const RTC_IO_PDAC2_SLP_SEL_S: u32 = 14;
pub const RTC_IO_PDAC2_SLP_IE_V: u32 = 1;
pub const RTC_IO_PDAC2_SLP_IE_S: u32 = 13;
pub const RTC_IO_PDAC2_SLP_OE_V: u32 = 1;
pub const RTC_IO_PDAC2_SLP_OE_S: u32 = 12;
pub const RTC_IO_PDAC2_FUN_IE_V: u32 = 1;
pub const RTC_IO_PDAC2_FUN_IE_S: u32 = 11;
pub const RTC_IO_PDAC2_DAC_XPD_FORCE_V: u32 = 1;
pub const RTC_IO_PDAC2_DAC_XPD_FORCE_S: u32 = 10;
pub const RTC_IO_XTAL_32K_PAD_REG: u32 = 1072989324;
pub const RTC_IO_X32N_DRV: u32 = 3;
pub const RTC_IO_X32N_DRV_V: u32 = 3;
pub const RTC_IO_X32N_DRV_S: u32 = 30;
pub const RTC_IO_X32N_HOLD_V: u32 = 1;
pub const RTC_IO_X32N_HOLD_S: u32 = 29;
pub const RTC_IO_X32N_RDE_V: u32 = 1;
pub const RTC_IO_X32N_RDE_S: u32 = 28;
pub const RTC_IO_X32N_RUE_V: u32 = 1;
pub const RTC_IO_X32N_RUE_S: u32 = 27;
pub const RTC_IO_X32P_DRV: u32 = 3;
pub const RTC_IO_X32P_DRV_V: u32 = 3;
pub const RTC_IO_X32P_DRV_S: u32 = 25;
pub const RTC_IO_X32P_HOLD_V: u32 = 1;
pub const RTC_IO_X32P_HOLD_S: u32 = 24;
pub const RTC_IO_X32P_RDE_V: u32 = 1;
pub const RTC_IO_X32P_RDE_S: u32 = 23;
pub const RTC_IO_X32P_RUE_V: u32 = 1;
pub const RTC_IO_X32P_RUE_S: u32 = 22;
pub const RTC_IO_DAC_XTAL_32K: u32 = 3;
pub const RTC_IO_DAC_XTAL_32K_V: u32 = 3;
pub const RTC_IO_DAC_XTAL_32K_S: u32 = 20;
pub const RTC_IO_XPD_XTAL_32K_V: u32 = 1;
pub const RTC_IO_XPD_XTAL_32K_S: u32 = 19;
pub const RTC_IO_X32N_MUX_SEL_V: u32 = 1;
pub const RTC_IO_X32N_MUX_SEL_S: u32 = 18;
pub const RTC_IO_X32P_MUX_SEL_V: u32 = 1;
pub const RTC_IO_X32P_MUX_SEL_S: u32 = 17;
pub const RTC_IO_X32N_FUN_SEL: u32 = 3;
pub const RTC_IO_X32N_FUN_SEL_V: u32 = 3;
pub const RTC_IO_X32N_FUN_SEL_S: u32 = 15;
pub const RTC_IO_X32N_SLP_SEL_V: u32 = 1;
pub const RTC_IO_X32N_SLP_SEL_S: u32 = 14;
pub const RTC_IO_X32N_SLP_IE_V: u32 = 1;
pub const RTC_IO_X32N_SLP_IE_S: u32 = 13;
pub const RTC_IO_X32N_SLP_OE_V: u32 = 1;
pub const RTC_IO_X32N_SLP_OE_S: u32 = 12;
pub const RTC_IO_X32N_FUN_IE_V: u32 = 1;
pub const RTC_IO_X32N_FUN_IE_S: u32 = 11;
pub const RTC_IO_X32P_FUN_SEL: u32 = 3;
pub const RTC_IO_X32P_FUN_SEL_V: u32 = 3;
pub const RTC_IO_X32P_FUN_SEL_S: u32 = 9;
pub const RTC_IO_X32P_SLP_SEL_V: u32 = 1;
pub const RTC_IO_X32P_SLP_SEL_S: u32 = 8;
pub const RTC_IO_X32P_SLP_IE_V: u32 = 1;
pub const RTC_IO_X32P_SLP_IE_S: u32 = 7;
pub const RTC_IO_X32P_SLP_OE_V: u32 = 1;
pub const RTC_IO_X32P_SLP_OE_S: u32 = 6;
pub const RTC_IO_X32P_FUN_IE_V: u32 = 1;
pub const RTC_IO_X32P_FUN_IE_S: u32 = 5;
pub const RTC_IO_DRES_XTAL_32K: u32 = 3;
pub const RTC_IO_DRES_XTAL_32K_V: u32 = 3;
pub const RTC_IO_DRES_XTAL_32K_S: u32 = 3;
pub const RTC_IO_DBIAS_XTAL_32K: u32 = 3;
pub const RTC_IO_DBIAS_XTAL_32K_V: u32 = 3;
pub const RTC_IO_DBIAS_XTAL_32K_S: u32 = 1;
pub const RTC_IO_TOUCH_CFG_REG: u32 = 1072989328;
pub const RTC_IO_TOUCH_XPD_BIAS_V: u32 = 1;
pub const RTC_IO_TOUCH_XPD_BIAS_S: u32 = 31;
pub const RTC_IO_TOUCH_DREFH: u32 = 3;
pub const RTC_IO_TOUCH_DREFH_V: u32 = 3;
pub const RTC_IO_TOUCH_DREFH_S: u32 = 29;
pub const RTC_IO_TOUCH_DREFL: u32 = 3;
pub const RTC_IO_TOUCH_DREFL_V: u32 = 3;
pub const RTC_IO_TOUCH_DREFL_S: u32 = 27;
pub const RTC_IO_TOUCH_DRANGE: u32 = 3;
pub const RTC_IO_TOUCH_DRANGE_V: u32 = 3;
pub const RTC_IO_TOUCH_DRANGE_S: u32 = 25;
pub const RTC_IO_TOUCH_DCUR: u32 = 3;
pub const RTC_IO_TOUCH_DCUR_V: u32 = 3;
pub const RTC_IO_TOUCH_DCUR_S: u32 = 23;
pub const RTC_IO_TOUCH_PAD0_REG: u32 = 1072989332;
pub const RTC_IO_TOUCH_PAD0_HOLD_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD0_HOLD_S: u32 = 31;
pub const RTC_IO_TOUCH_PAD0_DRV: u32 = 3;
pub const RTC_IO_TOUCH_PAD0_DRV_V: u32 = 3;
pub const RTC_IO_TOUCH_PAD0_DRV_S: u32 = 29;
pub const RTC_IO_TOUCH_PAD0_RDE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD0_RDE_S: u32 = 28;
pub const RTC_IO_TOUCH_PAD0_RUE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD0_RUE_S: u32 = 27;
pub const RTC_IO_TOUCH_PAD0_DAC: u32 = 7;
pub const RTC_IO_TOUCH_PAD0_DAC_V: u32 = 7;
pub const RTC_IO_TOUCH_PAD0_DAC_S: u32 = 23;
pub const RTC_IO_TOUCH_PAD0_START_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD0_START_S: u32 = 22;
pub const RTC_IO_TOUCH_PAD0_TIE_OPT_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD0_TIE_OPT_S: u32 = 21;
pub const RTC_IO_TOUCH_PAD0_XPD_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD0_XPD_S: u32 = 20;
pub const RTC_IO_TOUCH_PAD0_MUX_SEL_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD0_MUX_SEL_S: u32 = 19;
pub const RTC_IO_TOUCH_PAD0_FUN_SEL: u32 = 3;
pub const RTC_IO_TOUCH_PAD0_FUN_SEL_V: u32 = 3;
pub const RTC_IO_TOUCH_PAD0_FUN_SEL_S: u32 = 17;
pub const RTC_IO_TOUCH_PAD0_SLP_SEL_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD0_SLP_SEL_S: u32 = 16;
pub const RTC_IO_TOUCH_PAD0_SLP_IE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD0_SLP_IE_S: u32 = 15;
pub const RTC_IO_TOUCH_PAD0_SLP_OE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD0_SLP_OE_S: u32 = 14;
pub const RTC_IO_TOUCH_PAD0_FUN_IE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD0_FUN_IE_S: u32 = 13;
pub const RTC_IO_TOUCH_PAD0_TO_GPIO_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD0_TO_GPIO_S: u32 = 12;
pub const RTC_IO_TOUCH_PAD1_REG: u32 = 1072989336;
pub const RTC_IO_TOUCH_PAD1_HOLD_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD1_HOLD_S: u32 = 31;
pub const RTC_IO_TOUCH_PAD1_DRV: u32 = 3;
pub const RTC_IO_TOUCH_PAD1_DRV_V: u32 = 3;
pub const RTC_IO_TOUCH_PAD1_DRV_S: u32 = 29;
pub const RTC_IO_TOUCH_PAD1_RDE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD1_RDE_S: u32 = 28;
pub const RTC_IO_TOUCH_PAD1_RUE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD1_RUE_S: u32 = 27;
pub const RTC_IO_TOUCH_PAD1_DAC: u32 = 7;
pub const RTC_IO_TOUCH_PAD1_DAC_V: u32 = 7;
pub const RTC_IO_TOUCH_PAD1_DAC_S: u32 = 23;
pub const RTC_IO_TOUCH_PAD1_START_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD1_START_S: u32 = 22;
pub const RTC_IO_TOUCH_PAD1_TIE_OPT_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD1_TIE_OPT_S: u32 = 21;
pub const RTC_IO_TOUCH_PAD1_XPD_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD1_XPD_S: u32 = 20;
pub const RTC_IO_TOUCH_PAD1_MUX_SEL_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD1_MUX_SEL_S: u32 = 19;
pub const RTC_IO_TOUCH_PAD1_FUN_SEL: u32 = 3;
pub const RTC_IO_TOUCH_PAD1_FUN_SEL_V: u32 = 3;
pub const RTC_IO_TOUCH_PAD1_FUN_SEL_S: u32 = 17;
pub const RTC_IO_TOUCH_PAD1_SLP_SEL_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD1_SLP_SEL_S: u32 = 16;
pub const RTC_IO_TOUCH_PAD1_SLP_IE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD1_SLP_IE_S: u32 = 15;
pub const RTC_IO_TOUCH_PAD1_SLP_OE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD1_SLP_OE_S: u32 = 14;
pub const RTC_IO_TOUCH_PAD1_FUN_IE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD1_FUN_IE_S: u32 = 13;
pub const RTC_IO_TOUCH_PAD1_TO_GPIO_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD1_TO_GPIO_S: u32 = 12;
pub const RTC_IO_TOUCH_PAD2_REG: u32 = 1072989340;
pub const RTC_IO_TOUCH_PAD2_HOLD_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD2_HOLD_S: u32 = 31;
pub const RTC_IO_TOUCH_PAD2_DRV: u32 = 3;
pub const RTC_IO_TOUCH_PAD2_DRV_V: u32 = 3;
pub const RTC_IO_TOUCH_PAD2_DRV_S: u32 = 29;
pub const RTC_IO_TOUCH_PAD2_RDE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD2_RDE_S: u32 = 28;
pub const RTC_IO_TOUCH_PAD2_RUE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD2_RUE_S: u32 = 27;
pub const RTC_IO_TOUCH_PAD2_DAC: u32 = 7;
pub const RTC_IO_TOUCH_PAD2_DAC_V: u32 = 7;
pub const RTC_IO_TOUCH_PAD2_DAC_S: u32 = 23;
pub const RTC_IO_TOUCH_PAD2_START_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD2_START_S: u32 = 22;
pub const RTC_IO_TOUCH_PAD2_TIE_OPT_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD2_TIE_OPT_S: u32 = 21;
pub const RTC_IO_TOUCH_PAD2_XPD_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD2_XPD_S: u32 = 20;
pub const RTC_IO_TOUCH_PAD2_MUX_SEL_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD2_MUX_SEL_S: u32 = 19;
pub const RTC_IO_TOUCH_PAD2_FUN_SEL: u32 = 3;
pub const RTC_IO_TOUCH_PAD2_FUN_SEL_V: u32 = 3;
pub const RTC_IO_TOUCH_PAD2_FUN_SEL_S: u32 = 17;
pub const RTC_IO_TOUCH_PAD2_SLP_SEL_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD2_SLP_SEL_S: u32 = 16;
pub const RTC_IO_TOUCH_PAD2_SLP_IE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD2_SLP_IE_S: u32 = 15;
pub const RTC_IO_TOUCH_PAD2_SLP_OE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD2_SLP_OE_S: u32 = 14;
pub const RTC_IO_TOUCH_PAD2_FUN_IE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD2_FUN_IE_S: u32 = 13;
pub const RTC_IO_TOUCH_PAD2_TO_GPIO_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD2_TO_GPIO_S: u32 = 12;
pub const RTC_IO_TOUCH_PAD3_REG: u32 = 1072989344;
pub const RTC_IO_TOUCH_PAD3_HOLD_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD3_HOLD_S: u32 = 31;
pub const RTC_IO_TOUCH_PAD3_DRV: u32 = 3;
pub const RTC_IO_TOUCH_PAD3_DRV_V: u32 = 3;
pub const RTC_IO_TOUCH_PAD3_DRV_S: u32 = 29;
pub const RTC_IO_TOUCH_PAD3_RDE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD3_RDE_S: u32 = 28;
pub const RTC_IO_TOUCH_PAD3_RUE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD3_RUE_S: u32 = 27;
pub const RTC_IO_TOUCH_PAD3_DAC: u32 = 7;
pub const RTC_IO_TOUCH_PAD3_DAC_V: u32 = 7;
pub const RTC_IO_TOUCH_PAD3_DAC_S: u32 = 23;
pub const RTC_IO_TOUCH_PAD3_START_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD3_START_S: u32 = 22;
pub const RTC_IO_TOUCH_PAD3_TIE_OPT_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD3_TIE_OPT_S: u32 = 21;
pub const RTC_IO_TOUCH_PAD3_XPD_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD3_XPD_S: u32 = 20;
pub const RTC_IO_TOUCH_PAD3_MUX_SEL_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD3_MUX_SEL_S: u32 = 19;
pub const RTC_IO_TOUCH_PAD3_FUN_SEL: u32 = 3;
pub const RTC_IO_TOUCH_PAD3_FUN_SEL_V: u32 = 3;
pub const RTC_IO_TOUCH_PAD3_FUN_SEL_S: u32 = 17;
pub const RTC_IO_TOUCH_PAD3_SLP_SEL_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD3_SLP_SEL_S: u32 = 16;
pub const RTC_IO_TOUCH_PAD3_SLP_IE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD3_SLP_IE_S: u32 = 15;
pub const RTC_IO_TOUCH_PAD3_SLP_OE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD3_SLP_OE_S: u32 = 14;
pub const RTC_IO_TOUCH_PAD3_FUN_IE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD3_FUN_IE_S: u32 = 13;
pub const RTC_IO_TOUCH_PAD3_TO_GPIO_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD3_TO_GPIO_S: u32 = 12;
pub const RTC_IO_TOUCH_PAD4_REG: u32 = 1072989348;
pub const RTC_IO_TOUCH_PAD4_HOLD_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD4_HOLD_S: u32 = 31;
pub const RTC_IO_TOUCH_PAD4_DRV: u32 = 3;
pub const RTC_IO_TOUCH_PAD4_DRV_V: u32 = 3;
pub const RTC_IO_TOUCH_PAD4_DRV_S: u32 = 29;
pub const RTC_IO_TOUCH_PAD4_RDE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD4_RDE_S: u32 = 28;
pub const RTC_IO_TOUCH_PAD4_RUE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD4_RUE_S: u32 = 27;
pub const RTC_IO_TOUCH_PAD4_DAC: u32 = 7;
pub const RTC_IO_TOUCH_PAD4_DAC_V: u32 = 7;
pub const RTC_IO_TOUCH_PAD4_DAC_S: u32 = 23;
pub const RTC_IO_TOUCH_PAD4_START_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD4_START_S: u32 = 22;
pub const RTC_IO_TOUCH_PAD4_TIE_OPT_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD4_TIE_OPT_S: u32 = 21;
pub const RTC_IO_TOUCH_PAD4_XPD_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD4_XPD_S: u32 = 20;
pub const RTC_IO_TOUCH_PAD4_MUX_SEL_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD4_MUX_SEL_S: u32 = 19;
pub const RTC_IO_TOUCH_PAD4_FUN_SEL: u32 = 3;
pub const RTC_IO_TOUCH_PAD4_FUN_SEL_V: u32 = 3;
pub const RTC_IO_TOUCH_PAD4_FUN_SEL_S: u32 = 17;
pub const RTC_IO_TOUCH_PAD4_SLP_SEL_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD4_SLP_SEL_S: u32 = 16;
pub const RTC_IO_TOUCH_PAD4_SLP_IE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD4_SLP_IE_S: u32 = 15;
pub const RTC_IO_TOUCH_PAD4_SLP_OE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD4_SLP_OE_S: u32 = 14;
pub const RTC_IO_TOUCH_PAD4_FUN_IE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD4_FUN_IE_S: u32 = 13;
pub const RTC_IO_TOUCH_PAD4_TO_GPIO_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD4_TO_GPIO_S: u32 = 12;
pub const RTC_IO_TOUCH_PAD5_REG: u32 = 1072989352;
pub const RTC_IO_TOUCH_PAD5_HOLD_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD5_HOLD_S: u32 = 31;
pub const RTC_IO_TOUCH_PAD5_DRV: u32 = 3;
pub const RTC_IO_TOUCH_PAD5_DRV_V: u32 = 3;
pub const RTC_IO_TOUCH_PAD5_DRV_S: u32 = 29;
pub const RTC_IO_TOUCH_PAD5_RDE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD5_RDE_S: u32 = 28;
pub const RTC_IO_TOUCH_PAD5_RUE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD5_RUE_S: u32 = 27;
pub const RTC_IO_TOUCH_PAD5_DAC: u32 = 7;
pub const RTC_IO_TOUCH_PAD5_DAC_V: u32 = 7;
pub const RTC_IO_TOUCH_PAD5_DAC_S: u32 = 23;
pub const RTC_IO_TOUCH_PAD5_START_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD5_START_S: u32 = 22;
pub const RTC_IO_TOUCH_PAD5_TIE_OPT_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD5_TIE_OPT_S: u32 = 21;
pub const RTC_IO_TOUCH_PAD5_XPD_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD5_XPD_S: u32 = 20;
pub const RTC_IO_TOUCH_PAD5_MUX_SEL_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD5_MUX_SEL_S: u32 = 19;
pub const RTC_IO_TOUCH_PAD5_FUN_SEL: u32 = 3;
pub const RTC_IO_TOUCH_PAD5_FUN_SEL_V: u32 = 3;
pub const RTC_IO_TOUCH_PAD5_FUN_SEL_S: u32 = 17;
pub const RTC_IO_TOUCH_PAD5_SLP_SEL_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD5_SLP_SEL_S: u32 = 16;
pub const RTC_IO_TOUCH_PAD5_SLP_IE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD5_SLP_IE_S: u32 = 15;
pub const RTC_IO_TOUCH_PAD5_SLP_OE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD5_SLP_OE_S: u32 = 14;
pub const RTC_IO_TOUCH_PAD5_FUN_IE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD5_FUN_IE_S: u32 = 13;
pub const RTC_IO_TOUCH_PAD5_TO_GPIO_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD5_TO_GPIO_S: u32 = 12;
pub const RTC_IO_TOUCH_PAD6_REG: u32 = 1072989356;
pub const RTC_IO_TOUCH_PAD6_HOLD_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD6_HOLD_S: u32 = 31;
pub const RTC_IO_TOUCH_PAD6_DRV: u32 = 3;
pub const RTC_IO_TOUCH_PAD6_DRV_V: u32 = 3;
pub const RTC_IO_TOUCH_PAD6_DRV_S: u32 = 29;
pub const RTC_IO_TOUCH_PAD6_RDE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD6_RDE_S: u32 = 28;
pub const RTC_IO_TOUCH_PAD6_RUE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD6_RUE_S: u32 = 27;
pub const RTC_IO_TOUCH_PAD6_DAC: u32 = 7;
pub const RTC_IO_TOUCH_PAD6_DAC_V: u32 = 7;
pub const RTC_IO_TOUCH_PAD6_DAC_S: u32 = 23;
pub const RTC_IO_TOUCH_PAD6_START_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD6_START_S: u32 = 22;
pub const RTC_IO_TOUCH_PAD6_TIE_OPT_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD6_TIE_OPT_S: u32 = 21;
pub const RTC_IO_TOUCH_PAD6_XPD_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD6_XPD_S: u32 = 20;
pub const RTC_IO_TOUCH_PAD6_MUX_SEL_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD6_MUX_SEL_S: u32 = 19;
pub const RTC_IO_TOUCH_PAD6_FUN_SEL: u32 = 3;
pub const RTC_IO_TOUCH_PAD6_FUN_SEL_V: u32 = 3;
pub const RTC_IO_TOUCH_PAD6_FUN_SEL_S: u32 = 17;
pub const RTC_IO_TOUCH_PAD6_SLP_SEL_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD6_SLP_SEL_S: u32 = 16;
pub const RTC_IO_TOUCH_PAD6_SLP_IE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD6_SLP_IE_S: u32 = 15;
pub const RTC_IO_TOUCH_PAD6_SLP_OE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD6_SLP_OE_S: u32 = 14;
pub const RTC_IO_TOUCH_PAD6_FUN_IE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD6_FUN_IE_S: u32 = 13;
pub const RTC_IO_TOUCH_PAD6_TO_GPIO_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD6_TO_GPIO_S: u32 = 12;
pub const RTC_IO_TOUCH_PAD7_REG: u32 = 1072989360;
pub const RTC_IO_TOUCH_PAD7_HOLD_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD7_HOLD_S: u32 = 31;
pub const RTC_IO_TOUCH_PAD7_DRV: u32 = 3;
pub const RTC_IO_TOUCH_PAD7_DRV_V: u32 = 3;
pub const RTC_IO_TOUCH_PAD7_DRV_S: u32 = 29;
pub const RTC_IO_TOUCH_PAD7_RDE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD7_RDE_S: u32 = 28;
pub const RTC_IO_TOUCH_PAD7_RUE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD7_RUE_S: u32 = 27;
pub const RTC_IO_TOUCH_PAD7_DAC: u32 = 7;
pub const RTC_IO_TOUCH_PAD7_DAC_V: u32 = 7;
pub const RTC_IO_TOUCH_PAD7_DAC_S: u32 = 23;
pub const RTC_IO_TOUCH_PAD7_START_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD7_START_S: u32 = 22;
pub const RTC_IO_TOUCH_PAD7_TIE_OPT_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD7_TIE_OPT_S: u32 = 21;
pub const RTC_IO_TOUCH_PAD7_XPD_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD7_XPD_S: u32 = 20;
pub const RTC_IO_TOUCH_PAD7_MUX_SEL_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD7_MUX_SEL_S: u32 = 19;
pub const RTC_IO_TOUCH_PAD7_FUN_SEL: u32 = 3;
pub const RTC_IO_TOUCH_PAD7_FUN_SEL_V: u32 = 3;
pub const RTC_IO_TOUCH_PAD7_FUN_SEL_S: u32 = 17;
pub const RTC_IO_TOUCH_PAD7_SLP_SEL_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD7_SLP_SEL_S: u32 = 16;
pub const RTC_IO_TOUCH_PAD7_SLP_IE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD7_SLP_IE_S: u32 = 15;
pub const RTC_IO_TOUCH_PAD7_SLP_OE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD7_SLP_OE_S: u32 = 14;
pub const RTC_IO_TOUCH_PAD7_FUN_IE_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD7_FUN_IE_S: u32 = 13;
pub const RTC_IO_TOUCH_PAD7_TO_GPIO_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD7_TO_GPIO_S: u32 = 12;
pub const RTC_IO_TOUCH_PAD8_REG: u32 = 1072989364;
pub const RTC_IO_TOUCH_PAD8_DAC: u32 = 7;
pub const RTC_IO_TOUCH_PAD8_DAC_V: u32 = 7;
pub const RTC_IO_TOUCH_PAD8_DAC_S: u32 = 23;
pub const RTC_IO_TOUCH_PAD8_START_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD8_START_S: u32 = 22;
pub const RTC_IO_TOUCH_PAD8_TIE_OPT_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD8_TIE_OPT_S: u32 = 21;
pub const RTC_IO_TOUCH_PAD8_XPD_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD8_XPD_S: u32 = 20;
pub const RTC_IO_TOUCH_PAD8_TO_GPIO_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD8_TO_GPIO_S: u32 = 19;
pub const RTC_IO_TOUCH_PAD9_REG: u32 = 1072989368;
pub const RTC_IO_TOUCH_PAD9_DAC: u32 = 7;
pub const RTC_IO_TOUCH_PAD9_DAC_V: u32 = 7;
pub const RTC_IO_TOUCH_PAD9_DAC_S: u32 = 23;
pub const RTC_IO_TOUCH_PAD9_START_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD9_START_S: u32 = 22;
pub const RTC_IO_TOUCH_PAD9_TIE_OPT_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD9_TIE_OPT_S: u32 = 21;
pub const RTC_IO_TOUCH_PAD9_XPD_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD9_XPD_S: u32 = 20;
pub const RTC_IO_TOUCH_PAD9_TO_GPIO_V: u32 = 1;
pub const RTC_IO_TOUCH_PAD9_TO_GPIO_S: u32 = 19;
pub const RTC_IO_EXT_WAKEUP0_REG: u32 = 1072989372;
pub const RTC_IO_EXT_WAKEUP0_SEL: u32 = 31;
pub const RTC_IO_EXT_WAKEUP0_SEL_V: u32 = 31;
pub const RTC_IO_EXT_WAKEUP0_SEL_S: u32 = 27;
pub const RTC_IO_XTL_EXT_CTR_REG: u32 = 1072989376;
pub const RTC_IO_XTL_EXT_CTR_SEL: u32 = 31;
pub const RTC_IO_XTL_EXT_CTR_SEL_V: u32 = 31;
pub const RTC_IO_XTL_EXT_CTR_SEL_S: u32 = 27;
pub const RTC_IO_SAR_I2C_IO_REG: u32 = 1072989380;
pub const RTC_IO_SAR_I2C_SDA_SEL: u32 = 3;
pub const RTC_IO_SAR_I2C_SDA_SEL_V: u32 = 3;
pub const RTC_IO_SAR_I2C_SDA_SEL_S: u32 = 30;
pub const RTC_IO_SAR_I2C_SCL_SEL: u32 = 3;
pub const RTC_IO_SAR_I2C_SCL_SEL_V: u32 = 3;
pub const RTC_IO_SAR_I2C_SCL_SEL_S: u32 = 28;
pub const RTC_IO_SAR_DEBUG_BIT_SEL: u32 = 31;
pub const RTC_IO_SAR_DEBUG_BIT_SEL_V: u32 = 31;
pub const RTC_IO_SAR_DEBUG_BIT_SEL_S: u32 = 23;
pub const RTC_IO_DATE_REG: u32 = 1072989384;
pub const RTC_IO_IO_DATE: u32 = 268435455;
pub const RTC_IO_IO_DATE_V: u32 = 268435455;
pub const RTC_IO_IO_DATE_S: u32 = 0;
pub const RTC_IO_RTC_IO_DATE_VERSION: u32 = 24129888;
pub const RTC_CNTL_WDT_WKEY_VALUE: u32 = 1356348065;
pub const RTC_WDT_RESET_LENGTH_100_NS: u32 = 0;
pub const RTC_WDT_RESET_LENGTH_200_NS: u32 = 1;
pub const RTC_WDT_RESET_LENGTH_300_NS: u32 = 2;
pub const RTC_WDT_RESET_LENGTH_400_NS: u32 = 3;
pub const RTC_WDT_RESET_LENGTH_500_NS: u32 = 4;
pub const RTC_WDT_RESET_LENGTH_800_NS: u32 = 5;
pub const RTC_WDT_RESET_LENGTH_1600_NS: u32 = 6;
pub const RTC_WDT_RESET_LENGTH_3200_NS: u32 = 7;
pub const RTC_CNTL_OPTIONS0_REG: u32 = 1072988160;
pub const RTC_CNTL_SW_SYS_RST_V: u32 = 1;
pub const RTC_CNTL_SW_SYS_RST_S: u32 = 31;
pub const RTC_CNTL_DG_WRAP_FORCE_NORST_V: u32 = 1;
pub const RTC_CNTL_DG_WRAP_FORCE_NORST_S: u32 = 30;
pub const RTC_CNTL_DG_WRAP_FORCE_RST_V: u32 = 1;
pub const RTC_CNTL_DG_WRAP_FORCE_RST_S: u32 = 29;
pub const RTC_CNTL_ANALOG_FORCE_NOISO_V: u32 = 1;
pub const RTC_CNTL_ANALOG_FORCE_NOISO_S: u32 = 28;
pub const RTC_CNTL_PLL_FORCE_NOISO_V: u32 = 1;
pub const RTC_CNTL_PLL_FORCE_NOISO_S: u32 = 27;
pub const RTC_CNTL_XTL_FORCE_NOISO_V: u32 = 1;
pub const RTC_CNTL_XTL_FORCE_NOISO_S: u32 = 26;
pub const RTC_CNTL_ANALOG_FORCE_ISO_V: u32 = 1;
pub const RTC_CNTL_ANALOG_FORCE_ISO_S: u32 = 25;
pub const RTC_CNTL_PLL_FORCE_ISO_V: u32 = 1;
pub const RTC_CNTL_PLL_FORCE_ISO_S: u32 = 24;
pub const RTC_CNTL_XTL_FORCE_ISO_V: u32 = 1;
pub const RTC_CNTL_XTL_FORCE_ISO_S: u32 = 23;
pub const RTC_CNTL_BIAS_CORE_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_BIAS_CORE_FORCE_PU_S: u32 = 22;
pub const RTC_CNTL_BIAS_CORE_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_BIAS_CORE_FORCE_PD_S: u32 = 21;
pub const RTC_CNTL_BIAS_CORE_FOLW_8M_V: u32 = 1;
pub const RTC_CNTL_BIAS_CORE_FOLW_8M_S: u32 = 20;
pub const RTC_CNTL_BIAS_I2C_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_BIAS_I2C_FORCE_PU_S: u32 = 19;
pub const RTC_CNTL_BIAS_I2C_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_BIAS_I2C_FORCE_PD_S: u32 = 18;
pub const RTC_CNTL_BIAS_I2C_FOLW_8M_V: u32 = 1;
pub const RTC_CNTL_BIAS_I2C_FOLW_8M_S: u32 = 17;
pub const RTC_CNTL_BIAS_FORCE_NOSLEEP_V: u32 = 1;
pub const RTC_CNTL_BIAS_FORCE_NOSLEEP_S: u32 = 16;
pub const RTC_CNTL_BIAS_FORCE_SLEEP_V: u32 = 1;
pub const RTC_CNTL_BIAS_FORCE_SLEEP_S: u32 = 15;
pub const RTC_CNTL_BIAS_SLEEP_FOLW_8M_V: u32 = 1;
pub const RTC_CNTL_BIAS_SLEEP_FOLW_8M_S: u32 = 14;
pub const RTC_CNTL_XTL_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_XTL_FORCE_PU_S: u32 = 13;
pub const RTC_CNTL_XTL_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_XTL_FORCE_PD_S: u32 = 12;
pub const RTC_CNTL_BBPLL_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_BBPLL_FORCE_PU_S: u32 = 11;
pub const RTC_CNTL_BBPLL_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_BBPLL_FORCE_PD_S: u32 = 10;
pub const RTC_CNTL_BBPLL_I2C_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_BBPLL_I2C_FORCE_PU_S: u32 = 9;
pub const RTC_CNTL_BBPLL_I2C_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_BBPLL_I2C_FORCE_PD_S: u32 = 8;
pub const RTC_CNTL_BB_I2C_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_BB_I2C_FORCE_PU_S: u32 = 7;
pub const RTC_CNTL_BB_I2C_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_BB_I2C_FORCE_PD_S: u32 = 6;
pub const RTC_CNTL_SW_PROCPU_RST_V: u32 = 1;
pub const RTC_CNTL_SW_PROCPU_RST_S: u32 = 5;
pub const RTC_CNTL_SW_APPCPU_RST_V: u32 = 1;
pub const RTC_CNTL_SW_APPCPU_RST_S: u32 = 4;
pub const RTC_CNTL_SW_STALL_PROCPU_C0: u32 = 3;
pub const RTC_CNTL_SW_STALL_PROCPU_C0_V: u32 = 3;
pub const RTC_CNTL_SW_STALL_PROCPU_C0_S: u32 = 2;
pub const RTC_CNTL_SW_STALL_APPCPU_C0: u32 = 3;
pub const RTC_CNTL_SW_STALL_APPCPU_C0_V: u32 = 3;
pub const RTC_CNTL_SW_STALL_APPCPU_C0_S: u32 = 0;
pub const RTC_CNTL_SLP_TIMER0_REG: u32 = 1072988164;
pub const RTC_CNTL_SLP_VAL_LO: u32 = 4294967295;
pub const RTC_CNTL_SLP_VAL_LO_V: u32 = 4294967295;
pub const RTC_CNTL_SLP_VAL_LO_S: u32 = 0;
pub const RTC_CNTL_SLP_TIMER1_REG: u32 = 1072988168;
pub const RTC_CNTL_MAIN_TIMER_ALARM_EN_V: u32 = 1;
pub const RTC_CNTL_MAIN_TIMER_ALARM_EN_S: u32 = 16;
pub const RTC_CNTL_SLP_VAL_HI: u32 = 65535;
pub const RTC_CNTL_SLP_VAL_HI_V: u32 = 65535;
pub const RTC_CNTL_SLP_VAL_HI_S: u32 = 0;
pub const RTC_CNTL_TIME_UPDATE_REG: u32 = 1072988172;
pub const RTC_CNTL_TIME_UPDATE_V: u32 = 1;
pub const RTC_CNTL_TIME_UPDATE_S: u32 = 31;
pub const RTC_CNTL_TIME_VALID_V: u32 = 1;
pub const RTC_CNTL_TIME_VALID_S: u32 = 30;
pub const RTC_CNTL_TIME0_REG: u32 = 1072988176;
pub const RTC_CNTL_TIME_LO: u32 = 4294967295;
pub const RTC_CNTL_TIME_LO_V: u32 = 4294967295;
pub const RTC_CNTL_TIME_LO_S: u32 = 0;
pub const RTC_CNTL_TIME1_REG: u32 = 1072988180;
pub const RTC_CNTL_TIME_HI: u32 = 65535;
pub const RTC_CNTL_TIME_HI_V: u32 = 65535;
pub const RTC_CNTL_TIME_HI_S: u32 = 0;
pub const RTC_CNTL_STATE0_REG: u32 = 1072988184;
pub const RTC_CNTL_SLEEP_EN_V: u32 = 1;
pub const RTC_CNTL_SLEEP_EN_S: u32 = 31;
pub const RTC_CNTL_SLP_REJECT_V: u32 = 1;
pub const RTC_CNTL_SLP_REJECT_S: u32 = 30;
pub const RTC_CNTL_SLP_WAKEUP_V: u32 = 1;
pub const RTC_CNTL_SLP_WAKEUP_S: u32 = 29;
pub const RTC_CNTL_SDIO_ACTIVE_IND_V: u32 = 1;
pub const RTC_CNTL_SDIO_ACTIVE_IND_S: u32 = 28;
pub const RTC_CNTL_ULP_CP_SLP_TIMER_EN_V: u32 = 1;
pub const RTC_CNTL_ULP_CP_SLP_TIMER_EN_S: u32 = 24;
pub const RTC_CNTL_TOUCH_SLP_TIMER_EN_V: u32 = 1;
pub const RTC_CNTL_TOUCH_SLP_TIMER_EN_S: u32 = 23;
pub const RTC_CNTL_APB2RTC_BRIDGE_SEL_V: u32 = 1;
pub const RTC_CNTL_APB2RTC_BRIDGE_SEL_S: u32 = 22;
pub const RTC_CNTL_ULP_CP_WAKEUP_FORCE_EN_V: u32 = 1;
pub const RTC_CNTL_ULP_CP_WAKEUP_FORCE_EN_S: u32 = 21;
pub const RTC_CNTL_TOUCH_WAKEUP_FORCE_EN_V: u32 = 1;
pub const RTC_CNTL_TOUCH_WAKEUP_FORCE_EN_S: u32 = 20;
pub const RTC_CNTL_TIMER1_REG: u32 = 1072988188;
pub const RTC_CNTL_PLL_BUF_WAIT: u32 = 255;
pub const RTC_CNTL_PLL_BUF_WAIT_V: u32 = 255;
pub const RTC_CNTL_PLL_BUF_WAIT_S: u32 = 24;
pub const RTC_CNTL_PLL_BUF_WAIT_DEFAULT: u32 = 20;
pub const RTC_CNTL_XTL_BUF_WAIT: u32 = 1023;
pub const RTC_CNTL_XTL_BUF_WAIT_V: u32 = 1023;
pub const RTC_CNTL_XTL_BUF_WAIT_S: u32 = 14;
pub const RTC_CNTL_XTL_BUF_WAIT_DEFAULT: u32 = 20;
pub const RTC_CNTL_CK8M_WAIT: u32 = 255;
pub const RTC_CNTL_CK8M_WAIT_V: u32 = 255;
pub const RTC_CNTL_CK8M_WAIT_S: u32 = 6;
pub const RTC_CNTL_CK8M_WAIT_DEFAULT: u32 = 20;
pub const RTC_CNTL_CPU_STALL_WAIT: u32 = 31;
pub const RTC_CNTL_CPU_STALL_WAIT_V: u32 = 31;
pub const RTC_CNTL_CPU_STALL_WAIT_S: u32 = 1;
pub const RTC_CNTL_CPU_STALL_EN_V: u32 = 1;
pub const RTC_CNTL_CPU_STALL_EN_S: u32 = 0;
pub const RTC_CNTL_TIMER2_REG: u32 = 1072988192;
pub const RTC_CNTL_MIN_TIME_CK8M_OFF: u32 = 255;
pub const RTC_CNTL_MIN_TIME_CK8M_OFF_V: u32 = 255;
pub const RTC_CNTL_MIN_TIME_CK8M_OFF_S: u32 = 24;
pub const RTC_CNTL_ULPCP_TOUCH_START_WAIT: u32 = 511;
pub const RTC_CNTL_ULPCP_TOUCH_START_WAIT_V: u32 = 511;
pub const RTC_CNTL_ULPCP_TOUCH_START_WAIT_S: u32 = 15;
pub const RTC_CNTL_TIMER3_REG: u32 = 1072988196;
pub const RTC_CNTL_ROM_RAM_POWERUP_TIMER: u32 = 127;
pub const RTC_CNTL_ROM_RAM_POWERUP_TIMER_V: u32 = 127;
pub const RTC_CNTL_ROM_RAM_POWERUP_TIMER_S: u32 = 25;
pub const RTC_CNTL_ROM_RAM_WAIT_TIMER: u32 = 511;
pub const RTC_CNTL_ROM_RAM_WAIT_TIMER_V: u32 = 511;
pub const RTC_CNTL_ROM_RAM_WAIT_TIMER_S: u32 = 16;
pub const RTC_CNTL_WIFI_POWERUP_TIMER: u32 = 127;
pub const RTC_CNTL_WIFI_POWERUP_TIMER_V: u32 = 127;
pub const RTC_CNTL_WIFI_POWERUP_TIMER_S: u32 = 9;
pub const RTC_CNTL_WIFI_WAIT_TIMER: u32 = 511;
pub const RTC_CNTL_WIFI_WAIT_TIMER_V: u32 = 511;
pub const RTC_CNTL_WIFI_WAIT_TIMER_S: u32 = 0;
pub const RTC_CNTL_TIMER4_REG: u32 = 1072988200;
pub const RTC_CNTL_DG_WRAP_POWERUP_TIMER: u32 = 127;
pub const RTC_CNTL_DG_WRAP_POWERUP_TIMER_V: u32 = 127;
pub const RTC_CNTL_DG_WRAP_POWERUP_TIMER_S: u32 = 25;
pub const RTC_CNTL_DG_WRAP_WAIT_TIMER: u32 = 511;
pub const RTC_CNTL_DG_WRAP_WAIT_TIMER_V: u32 = 511;
pub const RTC_CNTL_DG_WRAP_WAIT_TIMER_S: u32 = 16;
pub const RTC_CNTL_POWERUP_TIMER: u32 = 127;
pub const RTC_CNTL_POWERUP_TIMER_V: u32 = 127;
pub const RTC_CNTL_POWERUP_TIMER_S: u32 = 9;
pub const RTC_CNTL_WAIT_TIMER: u32 = 511;
pub const RTC_CNTL_WAIT_TIMER_V: u32 = 511;
pub const RTC_CNTL_WAIT_TIMER_S: u32 = 0;
pub const RTC_CNTL_TIMER5_REG: u32 = 1072988204;
pub const RTC_CNTL_RTCMEM_POWERUP_TIMER: u32 = 127;
pub const RTC_CNTL_RTCMEM_POWERUP_TIMER_V: u32 = 127;
pub const RTC_CNTL_RTCMEM_POWERUP_TIMER_S: u32 = 25;
pub const RTC_CNTL_RTCMEM_WAIT_TIMER: u32 = 511;
pub const RTC_CNTL_RTCMEM_WAIT_TIMER_V: u32 = 511;
pub const RTC_CNTL_RTCMEM_WAIT_TIMER_S: u32 = 16;
pub const RTC_CNTL_MIN_SLP_VAL: u32 = 255;
pub const RTC_CNTL_MIN_SLP_VAL_V: u32 = 255;
pub const RTC_CNTL_MIN_SLP_VAL_S: u32 = 8;
pub const RTC_CNTL_MIN_SLP_VAL_MIN: u32 = 2;
pub const RTC_CNTL_ULP_CP_SUBTIMER_PREDIV: u32 = 255;
pub const RTC_CNTL_ULP_CP_SUBTIMER_PREDIV_V: u32 = 255;
pub const RTC_CNTL_ULP_CP_SUBTIMER_PREDIV_S: u32 = 0;
pub const RTC_CNTL_ANA_CONF_REG: u32 = 1072988208;
pub const RTC_CNTL_PLL_I2C_PU_V: u32 = 1;
pub const RTC_CNTL_PLL_I2C_PU_S: u32 = 31;
pub const RTC_CNTL_CKGEN_I2C_PU_V: u32 = 1;
pub const RTC_CNTL_CKGEN_I2C_PU_S: u32 = 30;
pub const RTC_CNTL_RFRX_PBUS_PU_V: u32 = 1;
pub const RTC_CNTL_RFRX_PBUS_PU_S: u32 = 28;
pub const RTC_CNTL_TXRF_I2C_PU_V: u32 = 1;
pub const RTC_CNTL_TXRF_I2C_PU_S: u32 = 27;
pub const RTC_CNTL_PVTMON_PU_V: u32 = 1;
pub const RTC_CNTL_PVTMON_PU_S: u32 = 26;
pub const RTC_CNTL_BBPLL_CAL_SLP_START_V: u32 = 1;
pub const RTC_CNTL_BBPLL_CAL_SLP_START_S: u32 = 25;
pub const RTC_CNTL_PLLA_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_PLLA_FORCE_PU_S: u32 = 24;
pub const RTC_CNTL_PLLA_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_PLLA_FORCE_PD_S: u32 = 23;
pub const RTC_CNTL_RESET_STATE_REG: u32 = 1072988212;
pub const RTC_CNTL_PROCPU_STAT_VECTOR_SEL_V: u32 = 1;
pub const RTC_CNTL_PROCPU_STAT_VECTOR_SEL_S: u32 = 13;
pub const RTC_CNTL_APPCPU_STAT_VECTOR_SEL_V: u32 = 1;
pub const RTC_CNTL_APPCPU_STAT_VECTOR_SEL_S: u32 = 12;
pub const RTC_CNTL_RESET_CAUSE_APPCPU: u32 = 63;
pub const RTC_CNTL_RESET_CAUSE_APPCPU_V: u32 = 63;
pub const RTC_CNTL_RESET_CAUSE_APPCPU_S: u32 = 6;
pub const RTC_CNTL_RESET_CAUSE_PROCPU: u32 = 63;
pub const RTC_CNTL_RESET_CAUSE_PROCPU_V: u32 = 63;
pub const RTC_CNTL_RESET_CAUSE_PROCPU_S: u32 = 0;
pub const RTC_CNTL_WAKEUP_STATE_REG: u32 = 1072988216;
pub const RTC_CNTL_GPIO_WAKEUP_FILTER_V: u32 = 1;
pub const RTC_CNTL_GPIO_WAKEUP_FILTER_S: u32 = 22;
pub const RTC_CNTL_WAKEUP_ENA: u32 = 2047;
pub const RTC_CNTL_WAKEUP_ENA_V: u32 = 2047;
pub const RTC_CNTL_WAKEUP_ENA_S: u32 = 11;
pub const RTC_CNTL_WAKEUP_CAUSE: u32 = 2047;
pub const RTC_CNTL_WAKEUP_CAUSE_V: u32 = 2047;
pub const RTC_CNTL_WAKEUP_CAUSE_S: u32 = 0;
pub const RTC_CNTL_INT_ENA_REG: u32 = 1072988220;
pub const RTC_CNTL_MAIN_TIMER_INT_ENA_V: u32 = 1;
pub const RTC_CNTL_MAIN_TIMER_INT_ENA_S: u32 = 8;
pub const RTC_CNTL_BROWN_OUT_INT_ENA_V: u32 = 1;
pub const RTC_CNTL_BROWN_OUT_INT_ENA_S: u32 = 7;
pub const RTC_CNTL_TOUCH_INT_ENA_V: u32 = 1;
pub const RTC_CNTL_TOUCH_INT_ENA_S: u32 = 6;
pub const RTC_CNTL_ULP_CP_INT_ENA_V: u32 = 1;
pub const RTC_CNTL_ULP_CP_INT_ENA_S: u32 = 5;
pub const RTC_CNTL_TIME_VALID_INT_ENA_V: u32 = 1;
pub const RTC_CNTL_TIME_VALID_INT_ENA_S: u32 = 4;
pub const RTC_CNTL_WDT_INT_ENA_V: u32 = 1;
pub const RTC_CNTL_WDT_INT_ENA_S: u32 = 3;
pub const RTC_CNTL_SDIO_IDLE_INT_ENA_V: u32 = 1;
pub const RTC_CNTL_SDIO_IDLE_INT_ENA_S: u32 = 2;
pub const RTC_CNTL_SLP_REJECT_INT_ENA_V: u32 = 1;
pub const RTC_CNTL_SLP_REJECT_INT_ENA_S: u32 = 1;
pub const RTC_CNTL_SLP_WAKEUP_INT_ENA_V: u32 = 1;
pub const RTC_CNTL_SLP_WAKEUP_INT_ENA_S: u32 = 0;
pub const RTC_CNTL_INT_RAW_REG: u32 = 1072988224;
pub const RTC_CNTL_MAIN_TIMER_INT_RAW_V: u32 = 1;
pub const RTC_CNTL_MAIN_TIMER_INT_RAW_S: u32 = 8;
pub const RTC_CNTL_BROWN_OUT_INT_RAW_V: u32 = 1;
pub const RTC_CNTL_BROWN_OUT_INT_RAW_S: u32 = 7;
pub const RTC_CNTL_TOUCH_INT_RAW_V: u32 = 1;
pub const RTC_CNTL_TOUCH_INT_RAW_S: u32 = 6;
pub const RTC_CNTL_ULP_CP_INT_RAW_V: u32 = 1;
pub const RTC_CNTL_ULP_CP_INT_RAW_S: u32 = 5;
pub const RTC_CNTL_TIME_VALID_INT_RAW_V: u32 = 1;
pub const RTC_CNTL_TIME_VALID_INT_RAW_S: u32 = 4;
pub const RTC_CNTL_WDT_INT_RAW_V: u32 = 1;
pub const RTC_CNTL_WDT_INT_RAW_S: u32 = 3;
pub const RTC_CNTL_SDIO_IDLE_INT_RAW_V: u32 = 1;
pub const RTC_CNTL_SDIO_IDLE_INT_RAW_S: u32 = 2;
pub const RTC_CNTL_SLP_REJECT_INT_RAW_V: u32 = 1;
pub const RTC_CNTL_SLP_REJECT_INT_RAW_S: u32 = 1;
pub const RTC_CNTL_SLP_WAKEUP_INT_RAW_V: u32 = 1;
pub const RTC_CNTL_SLP_WAKEUP_INT_RAW_S: u32 = 0;
pub const RTC_CNTL_INT_ST_REG: u32 = 1072988228;
pub const RTC_CNTL_MAIN_TIMER_INT_ST_V: u32 = 1;
pub const RTC_CNTL_MAIN_TIMER_INT_ST_S: u32 = 8;
pub const RTC_CNTL_BROWN_OUT_INT_ST_V: u32 = 1;
pub const RTC_CNTL_BROWN_OUT_INT_ST_S: u32 = 7;
pub const RTC_CNTL_TOUCH_INT_ST_V: u32 = 1;
pub const RTC_CNTL_TOUCH_INT_ST_S: u32 = 6;
pub const RTC_CNTL_SAR_INT_ST_V: u32 = 1;
pub const RTC_CNTL_SAR_INT_ST_S: u32 = 5;
pub const RTC_CNTL_TIME_VALID_INT_ST_V: u32 = 1;
pub const RTC_CNTL_TIME_VALID_INT_ST_S: u32 = 4;
pub const RTC_CNTL_WDT_INT_ST_V: u32 = 1;
pub const RTC_CNTL_WDT_INT_ST_S: u32 = 3;
pub const RTC_CNTL_SDIO_IDLE_INT_ST_V: u32 = 1;
pub const RTC_CNTL_SDIO_IDLE_INT_ST_S: u32 = 2;
pub const RTC_CNTL_SLP_REJECT_INT_ST_V: u32 = 1;
pub const RTC_CNTL_SLP_REJECT_INT_ST_S: u32 = 1;
pub const RTC_CNTL_SLP_WAKEUP_INT_ST_V: u32 = 1;
pub const RTC_CNTL_SLP_WAKEUP_INT_ST_S: u32 = 0;
pub const RTC_CNTL_INT_CLR_REG: u32 = 1072988232;
pub const RTC_CNTL_MAIN_TIMER_INT_CLR_V: u32 = 1;
pub const RTC_CNTL_MAIN_TIMER_INT_CLR_S: u32 = 8;
pub const RTC_CNTL_BROWN_OUT_INT_CLR_V: u32 = 1;
pub const RTC_CNTL_BROWN_OUT_INT_CLR_S: u32 = 7;
pub const RTC_CNTL_TOUCH_INT_CLR_V: u32 = 1;
pub const RTC_CNTL_TOUCH_INT_CLR_S: u32 = 6;
pub const RTC_CNTL_SAR_INT_CLR_V: u32 = 1;
pub const RTC_CNTL_SAR_INT_CLR_S: u32 = 5;
pub const RTC_CNTL_TIME_VALID_INT_CLR_V: u32 = 1;
pub const RTC_CNTL_TIME_VALID_INT_CLR_S: u32 = 4;
pub const RTC_CNTL_WDT_INT_CLR_V: u32 = 1;
pub const RTC_CNTL_WDT_INT_CLR_S: u32 = 3;
pub const RTC_CNTL_SDIO_IDLE_INT_CLR_V: u32 = 1;
pub const RTC_CNTL_SDIO_IDLE_INT_CLR_S: u32 = 2;
pub const RTC_CNTL_SLP_REJECT_INT_CLR_V: u32 = 1;
pub const RTC_CNTL_SLP_REJECT_INT_CLR_S: u32 = 1;
pub const RTC_CNTL_SLP_WAKEUP_INT_CLR_V: u32 = 1;
pub const RTC_CNTL_SLP_WAKEUP_INT_CLR_S: u32 = 0;
pub const RTC_CNTL_STORE0_REG: u32 = 1072988236;
pub const RTC_CNTL_SCRATCH0: u32 = 4294967295;
pub const RTC_CNTL_SCRATCH0_V: u32 = 4294967295;
pub const RTC_CNTL_SCRATCH0_S: u32 = 0;
pub const RTC_CNTL_STORE1_REG: u32 = 1072988240;
pub const RTC_CNTL_SCRATCH1: u32 = 4294967295;
pub const RTC_CNTL_SCRATCH1_V: u32 = 4294967295;
pub const RTC_CNTL_SCRATCH1_S: u32 = 0;
pub const RTC_CNTL_STORE2_REG: u32 = 1072988244;
pub const RTC_CNTL_SCRATCH2: u32 = 4294967295;
pub const RTC_CNTL_SCRATCH2_V: u32 = 4294967295;
pub const RTC_CNTL_SCRATCH2_S: u32 = 0;
pub const RTC_CNTL_STORE3_REG: u32 = 1072988248;
pub const RTC_CNTL_SCRATCH3: u32 = 4294967295;
pub const RTC_CNTL_SCRATCH3_V: u32 = 4294967295;
pub const RTC_CNTL_SCRATCH3_S: u32 = 0;
pub const RTC_CNTL_EXT_XTL_CONF_REG: u32 = 1072988252;
pub const RTC_CNTL_XTL_EXT_CTR_EN_V: u32 = 1;
pub const RTC_CNTL_XTL_EXT_CTR_EN_S: u32 = 31;
pub const RTC_CNTL_XTL_EXT_CTR_LV_V: u32 = 1;
pub const RTC_CNTL_XTL_EXT_CTR_LV_S: u32 = 30;
pub const RTC_CNTL_EXT_WAKEUP_CONF_REG: u32 = 1072988256;
pub const RTC_CNTL_EXT_WAKEUP1_LV_V: u32 = 1;
pub const RTC_CNTL_EXT_WAKEUP1_LV_S: u32 = 31;
pub const RTC_CNTL_EXT_WAKEUP0_LV_V: u32 = 1;
pub const RTC_CNTL_EXT_WAKEUP0_LV_S: u32 = 30;
pub const RTC_CNTL_SLP_REJECT_CONF_REG: u32 = 1072988260;
pub const RTC_CNTL_REJECT_CAUSE: u32 = 15;
pub const RTC_CNTL_REJECT_CAUSE_V: u32 = 15;
pub const RTC_CNTL_REJECT_CAUSE_S: u32 = 28;
pub const RTC_CNTL_DEEP_SLP_REJECT_EN_V: u32 = 1;
pub const RTC_CNTL_DEEP_SLP_REJECT_EN_S: u32 = 27;
pub const RTC_CNTL_LIGHT_SLP_REJECT_EN_V: u32 = 1;
pub const RTC_CNTL_LIGHT_SLP_REJECT_EN_S: u32 = 26;
pub const RTC_CNTL_SDIO_REJECT_EN_V: u32 = 1;
pub const RTC_CNTL_SDIO_REJECT_EN_S: u32 = 25;
pub const RTC_CNTL_GPIO_REJECT_EN_V: u32 = 1;
pub const RTC_CNTL_GPIO_REJECT_EN_S: u32 = 24;
pub const RTC_CNTL_CPU_PERIOD_CONF_REG: u32 = 1072988264;
pub const RTC_CNTL_CPUPERIOD_SEL: u32 = 3;
pub const RTC_CNTL_CPUPERIOD_SEL_V: u32 = 3;
pub const RTC_CNTL_CPUPERIOD_SEL_S: u32 = 30;
pub const RTC_CNTL_CPUSEL_CONF_V: u32 = 1;
pub const RTC_CNTL_CPUSEL_CONF_S: u32 = 29;
pub const RTC_CNTL_SDIO_ACT_CONF_REG: u32 = 1072988268;
pub const RTC_CNTL_SDIO_ACT_DNUM: u32 = 1023;
pub const RTC_CNTL_SDIO_ACT_DNUM_V: u32 = 1023;
pub const RTC_CNTL_SDIO_ACT_DNUM_S: u32 = 22;
pub const RTC_CNTL_CLK_CONF_REG: u32 = 1072988272;
pub const RTC_CNTL_ANA_CLK_RTC_SEL: u32 = 3;
pub const RTC_CNTL_ANA_CLK_RTC_SEL_V: u32 = 3;
pub const RTC_CNTL_ANA_CLK_RTC_SEL_S: u32 = 30;
pub const RTC_CNTL_FAST_CLK_RTC_SEL_V: u32 = 1;
pub const RTC_CNTL_FAST_CLK_RTC_SEL_S: u32 = 29;
pub const RTC_CNTL_SOC_CLK_SEL: u32 = 3;
pub const RTC_CNTL_SOC_CLK_SEL_V: u32 = 3;
pub const RTC_CNTL_SOC_CLK_SEL_S: u32 = 27;
pub const RTC_CNTL_SOC_CLK_SEL_XTL: u32 = 0;
pub const RTC_CNTL_SOC_CLK_SEL_PLL: u32 = 1;
pub const RTC_CNTL_SOC_CLK_SEL_8M: u32 = 2;
pub const RTC_CNTL_SOC_CLK_SEL_APLL: u32 = 3;
pub const RTC_CNTL_CK8M_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_CK8M_FORCE_PU_S: u32 = 26;
pub const RTC_CNTL_CK8M_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_CK8M_FORCE_PD_S: u32 = 25;
pub const RTC_CNTL_CK8M_DFREQ: u32 = 255;
pub const RTC_CNTL_CK8M_DFREQ_V: u32 = 255;
pub const RTC_CNTL_CK8M_DFREQ_S: u32 = 17;
pub const RTC_CNTL_CK8M_DFREQ_DEFAULT: u32 = 172;
pub const RTC_CNTL_CK8M_FORCE_NOGATING_V: u32 = 1;
pub const RTC_CNTL_CK8M_FORCE_NOGATING_S: u32 = 16;
pub const RTC_CNTL_XTAL_FORCE_NOGATING_V: u32 = 1;
pub const RTC_CNTL_XTAL_FORCE_NOGATING_S: u32 = 15;
pub const RTC_CNTL_CK8M_DIV_SEL: u32 = 7;
pub const RTC_CNTL_CK8M_DIV_SEL_V: u32 = 7;
pub const RTC_CNTL_CK8M_DIV_SEL_S: u32 = 12;
pub const RTC_CNTL_CK8M_DFREQ_FORCE_V: u32 = 1;
pub const RTC_CNTL_CK8M_DFREQ_FORCE_S: u32 = 11;
pub const RTC_CNTL_DIG_CLK8M_EN_V: u32 = 1;
pub const RTC_CNTL_DIG_CLK8M_EN_S: u32 = 10;
pub const RTC_CNTL_DIG_CLK8M_D256_EN_V: u32 = 1;
pub const RTC_CNTL_DIG_CLK8M_D256_EN_S: u32 = 9;
pub const RTC_CNTL_DIG_XTAL32K_EN_V: u32 = 1;
pub const RTC_CNTL_DIG_XTAL32K_EN_S: u32 = 8;
pub const RTC_CNTL_ENB_CK8M_DIV_V: u32 = 1;
pub const RTC_CNTL_ENB_CK8M_DIV_S: u32 = 7;
pub const RTC_CNTL_ENB_CK8M_V: u32 = 1;
pub const RTC_CNTL_ENB_CK8M_S: u32 = 6;
pub const RTC_CNTL_CK8M_DIV: u32 = 3;
pub const RTC_CNTL_CK8M_DIV_V: u32 = 3;
pub const RTC_CNTL_CK8M_DIV_S: u32 = 4;
pub const RTC_CNTL_SDIO_CONF_REG: u32 = 1072988276;
pub const RTC_CNTL_XPD_SDIO_REG_V: u32 = 1;
pub const RTC_CNTL_XPD_SDIO_REG_S: u32 = 31;
pub const RTC_CNTL_DREFH_SDIO: u32 = 3;
pub const RTC_CNTL_DREFH_SDIO_V: u32 = 3;
pub const RTC_CNTL_DREFH_SDIO_S: u32 = 29;
pub const RTC_CNTL_DREFM_SDIO: u32 = 3;
pub const RTC_CNTL_DREFM_SDIO_V: u32 = 3;
pub const RTC_CNTL_DREFM_SDIO_S: u32 = 27;
pub const RTC_CNTL_DREFL_SDIO: u32 = 3;
pub const RTC_CNTL_DREFL_SDIO_V: u32 = 3;
pub const RTC_CNTL_DREFL_SDIO_S: u32 = 25;
pub const RTC_CNTL_REG1P8_READY_V: u32 = 1;
pub const RTC_CNTL_REG1P8_READY_S: u32 = 24;
pub const RTC_CNTL_SDIO_TIEH_V: u32 = 1;
pub const RTC_CNTL_SDIO_TIEH_S: u32 = 23;
pub const RTC_CNTL_SDIO_FORCE_V: u32 = 1;
pub const RTC_CNTL_SDIO_FORCE_S: u32 = 22;
pub const RTC_CNTL_SDIO_PD_EN_V: u32 = 1;
pub const RTC_CNTL_SDIO_PD_EN_S: u32 = 21;
pub const RTC_CNTL_BIAS_CONF_REG: u32 = 1072988280;
pub const RTC_CNTL_RST_BIAS_I2C_V: u32 = 1;
pub const RTC_CNTL_RST_BIAS_I2C_S: u32 = 31;
pub const RTC_CNTL_DEC_HEARTBEAT_WIDTH_V: u32 = 1;
pub const RTC_CNTL_DEC_HEARTBEAT_WIDTH_S: u32 = 30;
pub const RTC_CNTL_INC_HEARTBEAT_PERIOD_V: u32 = 1;
pub const RTC_CNTL_INC_HEARTBEAT_PERIOD_S: u32 = 29;
pub const RTC_CNTL_DEC_HEARTBEAT_PERIOD_V: u32 = 1;
pub const RTC_CNTL_DEC_HEARTBEAT_PERIOD_S: u32 = 28;
pub const RTC_CNTL_INC_HEARTBEAT_REFRESH_V: u32 = 1;
pub const RTC_CNTL_INC_HEARTBEAT_REFRESH_S: u32 = 27;
pub const RTC_CNTL_ENB_SCK_XTAL_V: u32 = 1;
pub const RTC_CNTL_ENB_SCK_XTAL_S: u32 = 26;
pub const RTC_CNTL_DBG_ATTEN: u32 = 3;
pub const RTC_CNTL_DBG_ATTEN_V: u32 = 3;
pub const RTC_CNTL_DBG_ATTEN_S: u32 = 24;
pub const RTC_CNTL_DBG_ATTEN_DEFAULT: u32 = 3;
pub const RTC_CNTL_REG: u32 = 1072988284;
pub const RTC_CNTL_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_FORCE_PU_S: u32 = 31;
pub const RTC_CNTL_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_FORCE_PD_S: u32 = 30;
pub const RTC_CNTL_DBOOST_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_DBOOST_FORCE_PU_S: u32 = 29;
pub const RTC_CNTL_DBOOST_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_DBOOST_FORCE_PD_S: u32 = 28;
pub const RTC_CNTL_DBIAS_WAK: u32 = 7;
pub const RTC_CNTL_DBIAS_WAK_V: u32 = 7;
pub const RTC_CNTL_DBIAS_WAK_S: u32 = 25;
pub const RTC_CNTL_DBIAS_SLP: u32 = 7;
pub const RTC_CNTL_DBIAS_SLP_V: u32 = 7;
pub const RTC_CNTL_DBIAS_SLP_S: u32 = 22;
pub const RTC_CNTL_SCK_DCAP: u32 = 255;
pub const RTC_CNTL_SCK_DCAP_V: u32 = 255;
pub const RTC_CNTL_SCK_DCAP_S: u32 = 14;
pub const RTC_CNTL_SCK_DCAP_DEFAULT: u32 = 255;
pub const RTC_CNTL_DIG_DBIAS_WAK: u32 = 7;
pub const RTC_CNTL_DIG_DBIAS_WAK_V: u32 = 7;
pub const RTC_CNTL_DIG_DBIAS_WAK_S: u32 = 11;
pub const RTC_CNTL_DIG_DBIAS_SLP: u32 = 7;
pub const RTC_CNTL_DIG_DBIAS_SLP_V: u32 = 7;
pub const RTC_CNTL_DIG_DBIAS_SLP_S: u32 = 8;
pub const RTC_CNTL_SCK_DCAP_FORCE_V: u32 = 1;
pub const RTC_CNTL_SCK_DCAP_FORCE_S: u32 = 7;
pub const RTC_CNTL_DBIAS_0V90: u32 = 0;
pub const RTC_CNTL_DBIAS_0V95: u32 = 1;
pub const RTC_CNTL_DBIAS_1V00: u32 = 2;
pub const RTC_CNTL_DBIAS_1V05: u32 = 3;
pub const RTC_CNTL_DBIAS_1V10: u32 = 4;
pub const RTC_CNTL_DBIAS_1V15: u32 = 5;
pub const RTC_CNTL_DBIAS_1V20: u32 = 6;
pub const RTC_CNTL_DBIAS_1V25: u32 = 7;
pub const RTC_CNTL_PWC_REG: u32 = 1072988288;
pub const RTC_CNTL_PD_EN_V: u32 = 1;
pub const RTC_CNTL_PD_EN_S: u32 = 20;
pub const RTC_CNTL_PWC_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_PWC_FORCE_PU_S: u32 = 19;
pub const RTC_CNTL_PWC_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_PWC_FORCE_PD_S: u32 = 18;
pub const RTC_CNTL_SLOWMEM_PD_EN_V: u32 = 1;
pub const RTC_CNTL_SLOWMEM_PD_EN_S: u32 = 17;
pub const RTC_CNTL_SLOWMEM_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_SLOWMEM_FORCE_PU_S: u32 = 16;
pub const RTC_CNTL_SLOWMEM_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_SLOWMEM_FORCE_PD_S: u32 = 15;
pub const RTC_CNTL_FASTMEM_PD_EN_V: u32 = 1;
pub const RTC_CNTL_FASTMEM_PD_EN_S: u32 = 14;
pub const RTC_CNTL_FASTMEM_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_FASTMEM_FORCE_PU_S: u32 = 13;
pub const RTC_CNTL_FASTMEM_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_FASTMEM_FORCE_PD_S: u32 = 12;
pub const RTC_CNTL_SLOWMEM_FORCE_LPU_V: u32 = 1;
pub const RTC_CNTL_SLOWMEM_FORCE_LPU_S: u32 = 11;
pub const RTC_CNTL_SLOWMEM_FORCE_LPD_V: u32 = 1;
pub const RTC_CNTL_SLOWMEM_FORCE_LPD_S: u32 = 10;
pub const RTC_CNTL_SLOWMEM_FOLW_CPU_V: u32 = 1;
pub const RTC_CNTL_SLOWMEM_FOLW_CPU_S: u32 = 9;
pub const RTC_CNTL_FASTMEM_FORCE_LPU_V: u32 = 1;
pub const RTC_CNTL_FASTMEM_FORCE_LPU_S: u32 = 8;
pub const RTC_CNTL_FASTMEM_FORCE_LPD_V: u32 = 1;
pub const RTC_CNTL_FASTMEM_FORCE_LPD_S: u32 = 7;
pub const RTC_CNTL_FASTMEM_FOLW_CPU_V: u32 = 1;
pub const RTC_CNTL_FASTMEM_FOLW_CPU_S: u32 = 6;
pub const RTC_CNTL_FORCE_NOISO_V: u32 = 1;
pub const RTC_CNTL_FORCE_NOISO_S: u32 = 5;
pub const RTC_CNTL_FORCE_ISO_V: u32 = 1;
pub const RTC_CNTL_FORCE_ISO_S: u32 = 4;
pub const RTC_CNTL_SLOWMEM_FORCE_ISO_V: u32 = 1;
pub const RTC_CNTL_SLOWMEM_FORCE_ISO_S: u32 = 3;
pub const RTC_CNTL_SLOWMEM_FORCE_NOISO_V: u32 = 1;
pub const RTC_CNTL_SLOWMEM_FORCE_NOISO_S: u32 = 2;
pub const RTC_CNTL_FASTMEM_FORCE_ISO_V: u32 = 1;
pub const RTC_CNTL_FASTMEM_FORCE_ISO_S: u32 = 1;
pub const RTC_CNTL_FASTMEM_FORCE_NOISO_V: u32 = 1;
pub const RTC_CNTL_FASTMEM_FORCE_NOISO_S: u32 = 0;
pub const RTC_CNTL_DIG_PWC_REG: u32 = 1072988292;
pub const RTC_CNTL_DG_WRAP_PD_EN_V: u32 = 1;
pub const RTC_CNTL_DG_WRAP_PD_EN_S: u32 = 31;
pub const RTC_CNTL_WIFI_PD_EN_V: u32 = 1;
pub const RTC_CNTL_WIFI_PD_EN_S: u32 = 30;
pub const RTC_CNTL_INTER_RAM4_PD_EN_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM4_PD_EN_S: u32 = 29;
pub const RTC_CNTL_INTER_RAM3_PD_EN_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM3_PD_EN_S: u32 = 28;
pub const RTC_CNTL_INTER_RAM2_PD_EN_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM2_PD_EN_S: u32 = 27;
pub const RTC_CNTL_INTER_RAM1_PD_EN_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM1_PD_EN_S: u32 = 26;
pub const RTC_CNTL_INTER_RAM0_PD_EN_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM0_PD_EN_S: u32 = 25;
pub const RTC_CNTL_ROM0_PD_EN_V: u32 = 1;
pub const RTC_CNTL_ROM0_PD_EN_S: u32 = 24;
pub const RTC_CNTL_DG_WRAP_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_DG_WRAP_FORCE_PU_S: u32 = 20;
pub const RTC_CNTL_DG_WRAP_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_DG_WRAP_FORCE_PD_S: u32 = 19;
pub const RTC_CNTL_WIFI_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_WIFI_FORCE_PU_S: u32 = 18;
pub const RTC_CNTL_WIFI_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_WIFI_FORCE_PD_S: u32 = 17;
pub const RTC_CNTL_INTER_RAM4_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM4_FORCE_PU_S: u32 = 16;
pub const RTC_CNTL_INTER_RAM4_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM4_FORCE_PD_S: u32 = 15;
pub const RTC_CNTL_INTER_RAM3_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM3_FORCE_PU_S: u32 = 14;
pub const RTC_CNTL_INTER_RAM3_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM3_FORCE_PD_S: u32 = 13;
pub const RTC_CNTL_INTER_RAM2_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM2_FORCE_PU_S: u32 = 12;
pub const RTC_CNTL_INTER_RAM2_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM2_FORCE_PD_S: u32 = 11;
pub const RTC_CNTL_INTER_RAM1_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM1_FORCE_PU_S: u32 = 10;
pub const RTC_CNTL_INTER_RAM1_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM1_FORCE_PD_S: u32 = 9;
pub const RTC_CNTL_INTER_RAM0_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM0_FORCE_PU_S: u32 = 8;
pub const RTC_CNTL_INTER_RAM0_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM0_FORCE_PD_S: u32 = 7;
pub const RTC_CNTL_ROM0_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_ROM0_FORCE_PU_S: u32 = 6;
pub const RTC_CNTL_ROM0_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_ROM0_FORCE_PD_S: u32 = 5;
pub const RTC_CNTL_LSLP_MEM_FORCE_PU_V: u32 = 1;
pub const RTC_CNTL_LSLP_MEM_FORCE_PU_S: u32 = 4;
pub const RTC_CNTL_LSLP_MEM_FORCE_PD_V: u32 = 1;
pub const RTC_CNTL_LSLP_MEM_FORCE_PD_S: u32 = 3;
pub const RTC_CNTL_DIG_ISO_REG: u32 = 1072988296;
pub const RTC_CNTL_DG_WRAP_FORCE_NOISO_V: u32 = 1;
pub const RTC_CNTL_DG_WRAP_FORCE_NOISO_S: u32 = 31;
pub const RTC_CNTL_DG_WRAP_FORCE_ISO_V: u32 = 1;
pub const RTC_CNTL_DG_WRAP_FORCE_ISO_S: u32 = 30;
pub const RTC_CNTL_WIFI_FORCE_NOISO_V: u32 = 1;
pub const RTC_CNTL_WIFI_FORCE_NOISO_S: u32 = 29;
pub const RTC_CNTL_WIFI_FORCE_ISO_V: u32 = 1;
pub const RTC_CNTL_WIFI_FORCE_ISO_S: u32 = 28;
pub const RTC_CNTL_INTER_RAM4_FORCE_NOISO_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM4_FORCE_NOISO_S: u32 = 27;
pub const RTC_CNTL_INTER_RAM4_FORCE_ISO_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM4_FORCE_ISO_S: u32 = 26;
pub const RTC_CNTL_INTER_RAM3_FORCE_NOISO_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM3_FORCE_NOISO_S: u32 = 25;
pub const RTC_CNTL_INTER_RAM3_FORCE_ISO_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM3_FORCE_ISO_S: u32 = 24;
pub const RTC_CNTL_INTER_RAM2_FORCE_NOISO_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM2_FORCE_NOISO_S: u32 = 23;
pub const RTC_CNTL_INTER_RAM2_FORCE_ISO_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM2_FORCE_ISO_S: u32 = 22;
pub const RTC_CNTL_INTER_RAM1_FORCE_NOISO_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM1_FORCE_NOISO_S: u32 = 21;
pub const RTC_CNTL_INTER_RAM1_FORCE_ISO_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM1_FORCE_ISO_S: u32 = 20;
pub const RTC_CNTL_INTER_RAM0_FORCE_NOISO_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM0_FORCE_NOISO_S: u32 = 19;
pub const RTC_CNTL_INTER_RAM0_FORCE_ISO_V: u32 = 1;
pub const RTC_CNTL_INTER_RAM0_FORCE_ISO_S: u32 = 18;
pub const RTC_CNTL_ROM0_FORCE_NOISO_V: u32 = 1;
pub const RTC_CNTL_ROM0_FORCE_NOISO_S: u32 = 17;
pub const RTC_CNTL_ROM0_FORCE_ISO_V: u32 = 1;
pub const RTC_CNTL_ROM0_FORCE_ISO_S: u32 = 16;
pub const RTC_CNTL_DG_PAD_FORCE_HOLD_V: u32 = 1;
pub const RTC_CNTL_DG_PAD_FORCE_HOLD_S: u32 = 15;
pub const RTC_CNTL_DG_PAD_FORCE_UNHOLD_V: u32 = 1;
pub const RTC_CNTL_DG_PAD_FORCE_UNHOLD_S: u32 = 14;
pub const RTC_CNTL_DG_PAD_FORCE_ISO_V: u32 = 1;
pub const RTC_CNTL_DG_PAD_FORCE_ISO_S: u32 = 13;
pub const RTC_CNTL_DG_PAD_FORCE_NOISO_V: u32 = 1;
pub const RTC_CNTL_DG_PAD_FORCE_NOISO_S: u32 = 12;
pub const RTC_CNTL_DG_PAD_AUTOHOLD_EN_V: u32 = 1;
pub const RTC_CNTL_DG_PAD_AUTOHOLD_EN_S: u32 = 11;
pub const RTC_CNTL_CLR_DG_PAD_AUTOHOLD_V: u32 = 1;
pub const RTC_CNTL_CLR_DG_PAD_AUTOHOLD_S: u32 = 10;
pub const RTC_CNTL_DG_PAD_AUTOHOLD_V: u32 = 1;
pub const RTC_CNTL_DG_PAD_AUTOHOLD_S: u32 = 9;
pub const RTC_CNTL_DIG_ISO_FORCE_ON_V: u32 = 1;
pub const RTC_CNTL_DIG_ISO_FORCE_ON_S: u32 = 8;
pub const RTC_CNTL_DIG_ISO_FORCE_OFF_V: u32 = 1;
pub const RTC_CNTL_DIG_ISO_FORCE_OFF_S: u32 = 7;
pub const RTC_CNTL_WDTCONFIG0_REG: u32 = 1072988300;
pub const RTC_CNTL_WDT_EN_V: u32 = 1;
pub const RTC_CNTL_WDT_EN_S: u32 = 31;
pub const RTC_CNTL_WDT_STG0: u32 = 7;
pub const RTC_CNTL_WDT_STG0_V: u32 = 7;
pub const RTC_CNTL_WDT_STG0_S: u32 = 28;
pub const RTC_CNTL_WDT_STG1: u32 = 7;
pub const RTC_CNTL_WDT_STG1_V: u32 = 7;
pub const RTC_CNTL_WDT_STG1_S: u32 = 25;
pub const RTC_CNTL_WDT_STG2: u32 = 7;
pub const RTC_CNTL_WDT_STG2_V: u32 = 7;
pub const RTC_CNTL_WDT_STG2_S: u32 = 22;
pub const RTC_CNTL_WDT_STG3: u32 = 7;
pub const RTC_CNTL_WDT_STG3_V: u32 = 7;
pub const RTC_CNTL_WDT_STG3_S: u32 = 19;
pub const RTC_CNTL_WDT_EDGE_INT_EN_V: u32 = 1;
pub const RTC_CNTL_WDT_EDGE_INT_EN_S: u32 = 18;
pub const RTC_CNTL_WDT_LEVEL_INT_EN_V: u32 = 1;
pub const RTC_CNTL_WDT_LEVEL_INT_EN_S: u32 = 17;
pub const RTC_CNTL_WDT_CPU_RESET_LENGTH: u32 = 7;
pub const RTC_CNTL_WDT_CPU_RESET_LENGTH_V: u32 = 7;
pub const RTC_CNTL_WDT_CPU_RESET_LENGTH_S: u32 = 14;
pub const RTC_CNTL_WDT_SYS_RESET_LENGTH: u32 = 7;
pub const RTC_CNTL_WDT_SYS_RESET_LENGTH_V: u32 = 7;
pub const RTC_CNTL_WDT_SYS_RESET_LENGTH_S: u32 = 11;
pub const RTC_CNTL_WDT_FLASHBOOT_MOD_EN_V: u32 = 1;
pub const RTC_CNTL_WDT_FLASHBOOT_MOD_EN_S: u32 = 10;
pub const RTC_CNTL_WDT_PROCPU_RESET_EN_V: u32 = 1;
pub const RTC_CNTL_WDT_PROCPU_RESET_EN_S: u32 = 9;
pub const RTC_CNTL_WDT_APPCPU_RESET_EN_V: u32 = 1;
pub const RTC_CNTL_WDT_APPCPU_RESET_EN_S: u32 = 8;
pub const RTC_CNTL_WDT_PAUSE_IN_SLP_V: u32 = 1;
pub const RTC_CNTL_WDT_PAUSE_IN_SLP_S: u32 = 7;
pub const RTC_WDT_STG_SEL_OFF: u32 = 0;
pub const RTC_WDT_STG_SEL_INT: u32 = 1;
pub const RTC_WDT_STG_SEL_RESET_CPU: u32 = 2;
pub const RTC_WDT_STG_SEL_RESET_SYSTEM: u32 = 3;
pub const RTC_WDT_STG_SEL_RESET_RTC: u32 = 4;
pub const RTC_CNTL_WDTCONFIG1_REG: u32 = 1072988304;
pub const RTC_CNTL_WDT_STG0_HOLD: u32 = 4294967295;
pub const RTC_CNTL_WDT_STG0_HOLD_V: u32 = 4294967295;
pub const RTC_CNTL_WDT_STG0_HOLD_S: u32 = 0;
pub const RTC_CNTL_WDTCONFIG2_REG: u32 = 1072988308;
pub const RTC_CNTL_WDT_STG1_HOLD: u32 = 4294967295;
pub const RTC_CNTL_WDT_STG1_HOLD_V: u32 = 4294967295;
pub const RTC_CNTL_WDT_STG1_HOLD_S: u32 = 0;
pub const RTC_CNTL_WDTCONFIG3_REG: u32 = 1072988312;
pub const RTC_CNTL_WDT_STG2_HOLD: u32 = 4294967295;
pub const RTC_CNTL_WDT_STG2_HOLD_V: u32 = 4294967295;
pub const RTC_CNTL_WDT_STG2_HOLD_S: u32 = 0;
pub const RTC_CNTL_WDTCONFIG4_REG: u32 = 1072988316;
pub const RTC_CNTL_WDT_STG3_HOLD: u32 = 4294967295;
pub const RTC_CNTL_WDT_STG3_HOLD_V: u32 = 4294967295;
pub const RTC_CNTL_WDT_STG3_HOLD_S: u32 = 0;
pub const RTC_CNTL_WDTFEED_REG: u32 = 1072988320;
pub const RTC_CNTL_WDT_FEED_V: u32 = 1;
pub const RTC_CNTL_WDT_FEED_S: u32 = 31;
pub const RTC_CNTL_WDTWPROTECT_REG: u32 = 1072988324;
pub const RTC_CNTL_WDT_WKEY: u32 = 4294967295;
pub const RTC_CNTL_WDT_WKEY_V: u32 = 4294967295;
pub const RTC_CNTL_WDT_WKEY_S: u32 = 0;
pub const RTC_CNTL_TEST_MUX_REG: u32 = 1072988328;
pub const RTC_CNTL_DTEST_RTC: u32 = 3;
pub const RTC_CNTL_DTEST_RTC_V: u32 = 3;
pub const RTC_CNTL_DTEST_RTC_S: u32 = 30;
pub const RTC_CNTL_ENT_RTC_V: u32 = 1;
pub const RTC_CNTL_ENT_RTC_S: u32 = 29;
pub const RTC_CNTL_SW_CPU_STALL_REG: u32 = 1072988332;
pub const RTC_CNTL_SW_STALL_PROCPU_C1: u32 = 63;
pub const RTC_CNTL_SW_STALL_PROCPU_C1_V: u32 = 63;
pub const RTC_CNTL_SW_STALL_PROCPU_C1_S: u32 = 26;
pub const RTC_CNTL_SW_STALL_APPCPU_C1: u32 = 63;
pub const RTC_CNTL_SW_STALL_APPCPU_C1_V: u32 = 63;
pub const RTC_CNTL_SW_STALL_APPCPU_C1_S: u32 = 20;
pub const RTC_CNTL_STORE4_REG: u32 = 1072988336;
pub const RTC_CNTL_SCRATCH4: u32 = 4294967295;
pub const RTC_CNTL_SCRATCH4_V: u32 = 4294967295;
pub const RTC_CNTL_SCRATCH4_S: u32 = 0;
pub const RTC_CNTL_STORE5_REG: u32 = 1072988340;
pub const RTC_CNTL_SCRATCH5: u32 = 4294967295;
pub const RTC_CNTL_SCRATCH5_V: u32 = 4294967295;
pub const RTC_CNTL_SCRATCH5_S: u32 = 0;
pub const RTC_CNTL_STORE6_REG: u32 = 1072988344;
pub const RTC_CNTL_SCRATCH6: u32 = 4294967295;
pub const RTC_CNTL_SCRATCH6_V: u32 = 4294967295;
pub const RTC_CNTL_SCRATCH6_S: u32 = 0;
pub const RTC_CNTL_STORE7_REG: u32 = 1072988348;
pub const RTC_CNTL_SCRATCH7: u32 = 4294967295;
pub const RTC_CNTL_SCRATCH7_V: u32 = 4294967295;
pub const RTC_CNTL_SCRATCH7_S: u32 = 0;
pub const RTC_CNTL_LOW_POWER_ST_REG: u32 = 1072988352;
pub const RTC_CNTL_RDY_FOR_WAKEUP_V: u32 = 1;
pub const RTC_CNTL_RDY_FOR_WAKEUP_S: u32 = 19;
pub const RTC_CNTL_DIAG0_REG: u32 = 1072988352;
pub const RTC_CNTL_LOW_POWER_DIAG0: u32 = 4294967295;
pub const RTC_CNTL_LOW_POWER_DIAG0_V: u32 = 4294967295;
pub const RTC_CNTL_LOW_POWER_DIAG0_S: u32 = 0;
pub const RTC_CNTL_DIAG1_REG: u32 = 1072988356;
pub const RTC_CNTL_LOW_POWER_DIAG1: u32 = 4294967295;
pub const RTC_CNTL_LOW_POWER_DIAG1_V: u32 = 4294967295;
pub const RTC_CNTL_LOW_POWER_DIAG1_S: u32 = 0;
pub const RTC_CNTL_HOLD_FORCE_REG: u32 = 1072988360;
pub const RTC_CNTL_X32N_HOLD_FORCE_V: u32 = 1;
pub const RTC_CNTL_X32N_HOLD_FORCE_S: u32 = 17;
pub const RTC_CNTL_X32P_HOLD_FORCE_V: u32 = 1;
pub const RTC_CNTL_X32P_HOLD_FORCE_S: u32 = 16;
pub const RTC_CNTL_TOUCH_PAD7_HOLD_FORCE_V: u32 = 1;
pub const RTC_CNTL_TOUCH_PAD7_HOLD_FORCE_S: u32 = 15;
pub const RTC_CNTL_TOUCH_PAD6_HOLD_FORCE_V: u32 = 1;
pub const RTC_CNTL_TOUCH_PAD6_HOLD_FORCE_S: u32 = 14;
pub const RTC_CNTL_TOUCH_PAD5_HOLD_FORCE_V: u32 = 1;
pub const RTC_CNTL_TOUCH_PAD5_HOLD_FORCE_S: u32 = 13;
pub const RTC_CNTL_TOUCH_PAD4_HOLD_FORCE_V: u32 = 1;
pub const RTC_CNTL_TOUCH_PAD4_HOLD_FORCE_S: u32 = 12;
pub const RTC_CNTL_TOUCH_PAD3_HOLD_FORCE_V: u32 = 1;
pub const RTC_CNTL_TOUCH_PAD3_HOLD_FORCE_S: u32 = 11;
pub const RTC_CNTL_TOUCH_PAD2_HOLD_FORCE_V: u32 = 1;
pub const RTC_CNTL_TOUCH_PAD2_HOLD_FORCE_S: u32 = 10;
pub const RTC_CNTL_TOUCH_PAD1_HOLD_FORCE_V: u32 = 1;
pub const RTC_CNTL_TOUCH_PAD1_HOLD_FORCE_S: u32 = 9;
pub const RTC_CNTL_TOUCH_PAD0_HOLD_FORCE_V: u32 = 1;
pub const RTC_CNTL_TOUCH_PAD0_HOLD_FORCE_S: u32 = 8;
pub const RTC_CNTL_SENSE4_HOLD_FORCE_V: u32 = 1;
pub const RTC_CNTL_SENSE4_HOLD_FORCE_S: u32 = 7;
pub const RTC_CNTL_SENSE3_HOLD_FORCE_V: u32 = 1;
pub const RTC_CNTL_SENSE3_HOLD_FORCE_S: u32 = 6;
pub const RTC_CNTL_SENSE2_HOLD_FORCE_V: u32 = 1;
pub const RTC_CNTL_SENSE2_HOLD_FORCE_S: u32 = 5;
pub const RTC_CNTL_SENSE1_HOLD_FORCE_V: u32 = 1;
pub const RTC_CNTL_SENSE1_HOLD_FORCE_S: u32 = 4;
pub const RTC_CNTL_PDAC2_HOLD_FORCE_V: u32 = 1;
pub const RTC_CNTL_PDAC2_HOLD_FORCE_S: u32 = 3;
pub const RTC_CNTL_PDAC1_HOLD_FORCE_V: u32 = 1;
pub const RTC_CNTL_PDAC1_HOLD_FORCE_S: u32 = 2;
pub const RTC_CNTL_ADC2_HOLD_FORCE_V: u32 = 1;
pub const RTC_CNTL_ADC2_HOLD_FORCE_S: u32 = 1;
pub const RTC_CNTL_ADC1_HOLD_FORCE_V: u32 = 1;
pub const RTC_CNTL_ADC1_HOLD_FORCE_S: u32 = 0;
pub const RTC_CNTL_EXT_WAKEUP1_REG: u32 = 1072988364;
pub const RTC_CNTL_EXT_WAKEUP1_STATUS_CLR_V: u32 = 1;
pub const RTC_CNTL_EXT_WAKEUP1_STATUS_CLR_S: u32 = 18;
pub const RTC_CNTL_EXT_WAKEUP1_SEL: u32 = 262143;
pub const RTC_CNTL_EXT_WAKEUP1_SEL_V: u32 = 262143;
pub const RTC_CNTL_EXT_WAKEUP1_SEL_S: u32 = 0;
pub const RTC_CNTL_EXT_WAKEUP1_STATUS_REG: u32 = 1072988368;
pub const RTC_CNTL_EXT_WAKEUP1_STATUS: u32 = 262143;
pub const RTC_CNTL_EXT_WAKEUP1_STATUS_V: u32 = 262143;
pub const RTC_CNTL_EXT_WAKEUP1_STATUS_S: u32 = 0;
pub const RTC_CNTL_BROWN_OUT_REG: u32 = 1072988372;
pub const RTC_CNTL_BROWN_OUT_DET_V: u32 = 1;
pub const RTC_CNTL_BROWN_OUT_DET_S: u32 = 31;
pub const RTC_CNTL_BROWN_OUT_ENA_V: u32 = 1;
pub const RTC_CNTL_BROWN_OUT_ENA_S: u32 = 30;
pub const RTC_CNTL_DBROWN_OUT_THRES: u32 = 7;
pub const RTC_CNTL_DBROWN_OUT_THRES_V: u32 = 7;
pub const RTC_CNTL_DBROWN_OUT_THRES_S: u32 = 27;
pub const RTC_CNTL_BROWN_OUT_RST_ENA_V: u32 = 1;
pub const RTC_CNTL_BROWN_OUT_RST_ENA_S: u32 = 26;
pub const RTC_CNTL_BROWN_OUT_RST_WAIT: u32 = 1023;
pub const RTC_CNTL_BROWN_OUT_RST_WAIT_V: u32 = 1023;
pub const RTC_CNTL_BROWN_OUT_RST_WAIT_S: u32 = 16;
pub const RTC_CNTL_BROWN_OUT_PD_RF_ENA_V: u32 = 1;
pub const RTC_CNTL_BROWN_OUT_PD_RF_ENA_S: u32 = 15;
pub const RTC_CNTL_BROWN_OUT_CLOSE_FLASH_ENA_V: u32 = 1;
pub const RTC_CNTL_BROWN_OUT_CLOSE_FLASH_ENA_S: u32 = 14;
pub const RTC_MEM_CONF: u32 = 1072988416;
pub const RTC_MEM_CRC_FINISH_V: u32 = 1;
pub const RTC_MEM_CRC_FINISH_S: u32 = 31;
pub const RTC_MEM_CRC_LEN: u32 = 2047;
pub const RTC_MEM_CRC_LEN_V: u32 = 2047;
pub const RTC_MEM_CRC_LEN_S: u32 = 20;
pub const RTC_MEM_CRC_ADDR: u32 = 2047;
pub const RTC_MEM_CRC_ADDR_V: u32 = 2047;
pub const RTC_MEM_CRC_ADDR_S: u32 = 9;
pub const RTC_MEM_CRC_START_V: u32 = 1;
pub const RTC_MEM_CRC_START_S: u32 = 8;
pub const RTC_MEM_PID_CONF: u32 = 255;
pub const RTC_MEM_PID_CONF_M: u32 = 255;
pub const RTC_MEM_PID_CONF_V: u32 = 255;
pub const RTC_MEM_PID_CONF_S: u32 = 0;
pub const RTC_MEM_CRC_RES: u32 = 1072988420;
pub const RTC_CNTL_DATE_REG: u32 = 1072988476;
pub const RTC_CNTL_CNTL_DATE: u32 = 268435455;
pub const RTC_CNTL_CNTL_DATE_V: u32 = 268435455;
pub const RTC_CNTL_CNTL_DATE_S: u32 = 0;
pub const RTC_CNTL_RTC_CNTL_DATE_VERSION: u32 = 23085696;
pub const RTC_FAST_CLK_FREQ_APPROX: u32 = 8500000;
pub const RTC_CLK_CAL_FRACT: u32 = 19;
pub const RTC_VDDSDIO_TIEH_1_8V: u32 = 0;
pub const RTC_VDDSDIO_TIEH_3_3V: u32 = 1;
pub const EFUSE_BLK0_RDATA0_REG: u32 = 1073061888;
pub const EFUSE_RD_FLASH_CRYPT_CNT: u32 = 127;
pub const EFUSE_RD_FLASH_CRYPT_CNT_V: u32 = 127;
pub const EFUSE_RD_FLASH_CRYPT_CNT_S: u32 = 20;
pub const EFUSE_RD_EFUSE_RD_DIS: u32 = 15;
pub const EFUSE_RD_EFUSE_RD_DIS_V: u32 = 15;
pub const EFUSE_RD_EFUSE_RD_DIS_S: u32 = 16;
pub const EFUSE_RD_DIS_BLK1: u32 = 65536;
pub const EFUSE_RD_DIS_BLK2: u32 = 131072;
pub const EFUSE_RD_DIS_BLK3: u32 = 262144;
pub const EFUSE_RD_DIS_BLK0_PARTIAL: u32 = 524288;
pub const EFUSE_RD_EFUSE_WR_DIS: u32 = 65535;
pub const EFUSE_RD_EFUSE_WR_DIS_V: u32 = 65535;
pub const EFUSE_RD_EFUSE_WR_DIS_S: u32 = 0;
pub const EFUSE_WR_DIS_RD_DIS: u32 = 1;
pub const EFUSE_WR_DIS_WR_DIS: u32 = 2;
pub const EFUSE_WR_DIS_FLASH_CRYPT_CNT: u32 = 4;
pub const EFUSE_WR_DIS_MAC_SPI_CONFIG_HD: u32 = 8;
pub const EFUSE_WR_DIS_XPD_SDIO: u32 = 32;
pub const EFUSE_WR_DIS_SPI_PAD_CONFIG: u32 = 64;
pub const EFUSE_WR_DIS_BLK1: u32 = 128;
pub const EFUSE_WR_DIS_BLK2: u32 = 256;
pub const EFUSE_WR_DIS_BLK3: u32 = 512;
pub const EFUSE_WR_DIS_FLASH_CRYPT_CODING_SCHEME: u32 = 1024;
pub const EFUSE_WR_DIS_ABS_DONE_0: u32 = 4096;
pub const EFUSE_WR_DIS_ABS_DONE_1: u32 = 8192;
pub const EFUSE_WR_DIS_JTAG_DISABLE: u32 = 16384;
pub const EFUSE_WR_DIS_CONSOLE_DL_DISABLE: u32 = 32768;
pub const EFUSE_BLK0_RDATA1_REG: u32 = 1073061892;
pub const EFUSE_RD_WIFI_MAC_CRC_LOW: u32 = 4294967295;
pub const EFUSE_RD_WIFI_MAC_CRC_LOW_V: u32 = 4294967295;
pub const EFUSE_RD_WIFI_MAC_CRC_LOW_S: u32 = 0;
pub const EFUSE_BLK0_RDATA2_REG: u32 = 1073061896;
pub const EFUSE_RD_WIFI_MAC_CRC_HIGH: u32 = 16777215;
pub const EFUSE_RD_WIFI_MAC_CRC_HIGH_V: u32 = 16777215;
pub const EFUSE_RD_WIFI_MAC_CRC_HIGH_S: u32 = 0;
pub const EFUSE_BLK0_RDATA3_REG: u32 = 1073061900;
pub const EFUSE_RD_CHIP_VER_REV1_V: u32 = 1;
pub const EFUSE_RD_CHIP_VER_REV1_S: u32 = 15;
pub const EFUSE_RD_BLK3_PART_RESERVE_V: u32 = 1;
pub const EFUSE_RD_BLK3_PART_RESERVE_S: u32 = 14;
pub const EFUSE_RD_CHIP_CPU_FREQ_RATED_V: u32 = 1;
pub const EFUSE_RD_CHIP_CPU_FREQ_RATED_S: u32 = 13;
pub const EFUSE_RD_CHIP_CPU_FREQ_LOW_V: u32 = 1;
pub const EFUSE_RD_CHIP_CPU_FREQ_LOW_S: u32 = 12;
pub const EFUSE_RD_CHIP_VER_PKG: u32 = 7;
pub const EFUSE_RD_CHIP_VER_PKG_V: u32 = 7;
pub const EFUSE_RD_CHIP_VER_PKG_S: u32 = 9;
pub const EFUSE_RD_CHIP_VER_PKG_ESP32D0WDQ6: u32 = 0;
pub const EFUSE_RD_CHIP_VER_PKG_ESP32D0WDQ5: u32 = 1;
pub const EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5: u32 = 2;
pub const EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2: u32 = 4;
pub const EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4: u32 = 5;
pub const EFUSE_RD_SPI_PAD_CONFIG_HD: u32 = 31;
pub const EFUSE_RD_SPI_PAD_CONFIG_HD_V: u32 = 31;
pub const EFUSE_RD_SPI_PAD_CONFIG_HD_S: u32 = 4;
pub const EFUSE_RD_CHIP_VER_DIS_CACHE_V: u32 = 1;
pub const EFUSE_RD_CHIP_VER_DIS_CACHE_S: u32 = 3;
pub const EFUSE_RD_CHIP_VER_32PAD_V: u32 = 1;
pub const EFUSE_RD_CHIP_VER_32PAD_S: u32 = 2;
pub const EFUSE_RD_CHIP_VER_DIS_BT_V: u32 = 1;
pub const EFUSE_RD_CHIP_VER_DIS_BT_S: u32 = 1;
pub const EFUSE_RD_CHIP_VER_DIS_APP_CPU_V: u32 = 1;
pub const EFUSE_RD_CHIP_VER_DIS_APP_CPU_S: u32 = 0;
pub const EFUSE_BLK0_RDATA4_REG: u32 = 1073061904;
pub const EFUSE_RD_SDIO_FORCE_V: u32 = 1;
pub const EFUSE_RD_SDIO_FORCE_S: u32 = 16;
pub const EFUSE_RD_SDIO_TIEH_V: u32 = 1;
pub const EFUSE_RD_SDIO_TIEH_S: u32 = 15;
pub const EFUSE_RD_XPD_SDIO_REG_V: u32 = 1;
pub const EFUSE_RD_XPD_SDIO_REG_S: u32 = 14;
pub const EFUSE_RD_ADC_VREF: u32 = 31;
pub const EFUSE_RD_ADC_VREF_V: u32 = 31;
pub const EFUSE_RD_ADC_VREF_S: u32 = 8;
pub const EFUSE_RD_SDIO_DREFL: u32 = 3;
pub const EFUSE_RD_SDIO_DREFL_V: u32 = 3;
pub const EFUSE_RD_SDIO_DREFL_S: u32 = 12;
pub const EFUSE_RD_SDIO_DREFM: u32 = 3;
pub const EFUSE_RD_SDIO_DREFM_V: u32 = 3;
pub const EFUSE_RD_SDIO_DREFM_S: u32 = 10;
pub const EFUSE_RD_SDIO_DREFH: u32 = 3;
pub const EFUSE_RD_SDIO_DREFH_V: u32 = 3;
pub const EFUSE_RD_SDIO_DREFH_S: u32 = 8;
pub const EFUSE_RD_CK8M_FREQ: u32 = 255;
pub const EFUSE_RD_CK8M_FREQ_V: u32 = 255;
pub const EFUSE_RD_CK8M_FREQ_S: u32 = 0;
pub const EFUSE_BLK0_RDATA5_REG: u32 = 1073061908;
pub const EFUSE_RD_FLASH_CRYPT_CONFIG: u32 = 15;
pub const EFUSE_RD_FLASH_CRYPT_CONFIG_V: u32 = 15;
pub const EFUSE_RD_FLASH_CRYPT_CONFIG_S: u32 = 28;
pub const EFUSE_RD_DIG_VOL_L6: u32 = 15;
pub const EFUSE_RD_DIG_VOL_L6_V: u32 = 15;
pub const EFUSE_RD_DIG_VOL_L6_S: u32 = 24;
pub const EFUSE_RD_VOL_LEVEL_HP_INV: u32 = 3;
pub const EFUSE_RD_VOL_LEVEL_HP_INV_V: u32 = 3;
pub const EFUSE_RD_VOL_LEVEL_HP_INV_S: u32 = 22;
pub const EFUSE_RD_INST_CONFIG: u32 = 255;
pub const EFUSE_RD_INST_CONFIG_V: u32 = 255;
pub const EFUSE_RD_INST_CONFIG_S: u32 = 20;
pub const EFUSE_RD_SPI_PAD_CONFIG_CS0: u32 = 31;
pub const EFUSE_RD_SPI_PAD_CONFIG_CS0_V: u32 = 31;
pub const EFUSE_RD_SPI_PAD_CONFIG_CS0_S: u32 = 15;
pub const EFUSE_RD_SPI_PAD_CONFIG_D: u32 = 31;
pub const EFUSE_RD_SPI_PAD_CONFIG_D_V: u32 = 31;
pub const EFUSE_RD_SPI_PAD_CONFIG_D_S: u32 = 10;
pub const EFUSE_RD_SPI_PAD_CONFIG_Q: u32 = 31;
pub const EFUSE_RD_SPI_PAD_CONFIG_Q_V: u32 = 31;
pub const EFUSE_RD_SPI_PAD_CONFIG_Q_S: u32 = 5;
pub const EFUSE_RD_SPI_PAD_CONFIG_CLK: u32 = 31;
pub const EFUSE_RD_SPI_PAD_CONFIG_CLK_V: u32 = 31;
pub const EFUSE_RD_SPI_PAD_CONFIG_CLK_S: u32 = 0;
pub const EFUSE_BLK0_RDATA6_REG: u32 = 1073061912;
pub const EFUSE_RD_KEY_STATUS_V: u32 = 1;
pub const EFUSE_RD_KEY_STATUS_S: u32 = 10;
pub const EFUSE_RD_DISABLE_DL_CACHE_V: u32 = 1;
pub const EFUSE_RD_DISABLE_DL_CACHE_S: u32 = 9;
pub const EFUSE_RD_DISABLE_DL_DECRYPT_V: u32 = 1;
pub const EFUSE_RD_DISABLE_DL_DECRYPT_S: u32 = 8;
pub const EFUSE_RD_DISABLE_DL_ENCRYPT_V: u32 = 1;
pub const EFUSE_RD_DISABLE_DL_ENCRYPT_S: u32 = 7;
pub const EFUSE_RD_DISABLE_JTAG_V: u32 = 1;
pub const EFUSE_RD_DISABLE_JTAG_S: u32 = 6;
pub const EFUSE_RD_ABS_DONE_1_V: u32 = 1;
pub const EFUSE_RD_ABS_DONE_1_S: u32 = 5;
pub const EFUSE_RD_ABS_DONE_0_V: u32 = 1;
pub const EFUSE_RD_ABS_DONE_0_S: u32 = 4;
pub const EFUSE_RD_DISABLE_SDIO_HOST_V: u32 = 1;
pub const EFUSE_RD_DISABLE_SDIO_HOST_S: u32 = 3;
pub const EFUSE_RD_CONSOLE_DEBUG_DISABLE_V: u32 = 1;
pub const EFUSE_RD_CONSOLE_DEBUG_DISABLE_S: u32 = 2;
pub const EFUSE_RD_CODING_SCHEME: u32 = 3;
pub const EFUSE_RD_CODING_SCHEME_V: u32 = 3;
pub const EFUSE_RD_CODING_SCHEME_S: u32 = 0;
pub const EFUSE_CODING_SCHEME_VAL_NONE: u32 = 0;
pub const EFUSE_CODING_SCHEME_VAL_34: u32 = 1;
pub const EFUSE_CODING_SCHEME_VAL_REPEAT: u32 = 2;
pub const EFUSE_BLK0_WDATA0_REG: u32 = 1073061916;
pub const EFUSE_FLASH_CRYPT_CNT: u32 = 127;
pub const EFUSE_FLASH_CRYPT_CNT_V: u32 = 127;
pub const EFUSE_FLASH_CRYPT_CNT_S: u32 = 20;
pub const EFUSE_RD_DIS: u32 = 15;
pub const EFUSE_RD_DIS_V: u32 = 15;
pub const EFUSE_RD_DIS_S: u32 = 16;
pub const EFUSE_WR_DIS: u32 = 65535;
pub const EFUSE_WR_DIS_V: u32 = 65535;
pub const EFUSE_WR_DIS_S: u32 = 0;
pub const EFUSE_BLK0_WDATA1_REG: u32 = 1073061920;
pub const EFUSE_WIFI_MAC_CRC_LOW: u32 = 4294967295;
pub const EFUSE_WIFI_MAC_CRC_LOW_V: u32 = 4294967295;
pub const EFUSE_WIFI_MAC_CRC_LOW_S: u32 = 0;
pub const EFUSE_BLK0_WDATA2_REG: u32 = 1073061924;
pub const EFUSE_WIFI_MAC_CRC_HIGH: u32 = 16777215;
pub const EFUSE_WIFI_MAC_CRC_HIGH_V: u32 = 16777215;
pub const EFUSE_WIFI_MAC_CRC_HIGH_S: u32 = 0;
pub const EFUSE_BLK0_WDATA3_REG: u32 = 1073061928;
pub const EFUSE_CHIP_VER_REV1_V: u32 = 1;
pub const EFUSE_CHIP_VER_REV1_S: u32 = 15;
pub const EFUSE_BLK3_PART_RESERVE_V: u32 = 1;
pub const EFUSE_BLK3_PART_RESERVE_S: u32 = 14;
pub const EFUSE_CHIP_CPU_FREQ_RATED_V: u32 = 1;
pub const EFUSE_CHIP_CPU_FREQ_RATED_S: u32 = 13;
pub const EFUSE_CHIP_CPU_FREQ_LOW_V: u32 = 1;
pub const EFUSE_CHIP_CPU_FREQ_LOW_S: u32 = 12;
pub const EFUSE_CHIP_VER_PKG: u32 = 7;
pub const EFUSE_CHIP_VER_PKG_V: u32 = 7;
pub const EFUSE_CHIP_VER_PKG_S: u32 = 9;
pub const EFUSE_CHIP_VER_PKG_ESP32D0WDQ6: u32 = 0;
pub const EFUSE_CHIP_VER_PKG_ESP32D0WDQ5: u32 = 1;
pub const EFUSE_CHIP_VER_PKG_ESP32D2WDQ5: u32 = 2;
pub const EFUSE_CHIP_VER_PKG_ESP32PICOD2: u32 = 4;
pub const EFUSE_CHIP_VER_PKG_ESP32PICOD4: u32 = 5;
pub const EFUSE_SPI_PAD_CONFIG_HD: u32 = 31;
pub const EFUSE_SPI_PAD_CONFIG_HD_V: u32 = 31;
pub const EFUSE_SPI_PAD_CONFIG_HD_S: u32 = 4;
pub const EFUSE_CHIP_VER_DIS_CACHE_V: u32 = 1;
pub const EFUSE_CHIP_VER_DIS_CACHE_S: u32 = 3;
pub const EFUSE_CHIP_VER_32PAD_V: u32 = 1;
pub const EFUSE_CHIP_VER_32PAD_S: u32 = 2;
pub const EFUSE_CHIP_VER_DIS_BT_V: u32 = 1;
pub const EFUSE_CHIP_VER_DIS_BT_S: u32 = 1;
pub const EFUSE_CHIP_VER_DIS_APP_CPU_V: u32 = 1;
pub const EFUSE_CHIP_VER_DIS_APP_CPU_S: u32 = 0;
pub const EFUSE_BLK0_WDATA4_REG: u32 = 1073061932;
pub const EFUSE_SDIO_FORCE_V: u32 = 1;
pub const EFUSE_SDIO_FORCE_S: u32 = 16;
pub const EFUSE_SDIO_TIEH_V: u32 = 1;
pub const EFUSE_SDIO_TIEH_S: u32 = 15;
pub const EFUSE_XPD_SDIO_REG_V: u32 = 1;
pub const EFUSE_XPD_SDIO_REG_S: u32 = 14;
pub const EFUSE_ADC_VREF: u32 = 31;
pub const EFUSE_ADC_VREF_V: u32 = 31;
pub const EFUSE_ADC_VREF_S: u32 = 8;
pub const EFUSE_SDIO_DREFL: u32 = 3;
pub const EFUSE_SDIO_DREFL_V: u32 = 3;
pub const EFUSE_SDIO_DREFL_S: u32 = 12;
pub const EFUSE_SDIO_DREFM: u32 = 3;
pub const EFUSE_SDIO_DREFM_V: u32 = 3;
pub const EFUSE_SDIO_DREFM_S: u32 = 10;
pub const EFUSE_SDIO_DREFH: u32 = 3;
pub const EFUSE_SDIO_DREFH_V: u32 = 3;
pub const EFUSE_SDIO_DREFH_S: u32 = 8;
pub const EFUSE_CK8M_FREQ: u32 = 255;
pub const EFUSE_CK8M_FREQ_V: u32 = 255;
pub const EFUSE_CK8M_FREQ_S: u32 = 0;
pub const EFUSE_BLK0_WDATA5_REG: u32 = 1073061936;
pub const EFUSE_FLASH_CRYPT_CONFIG: u32 = 15;
pub const EFUSE_FLASH_CRYPT_CONFIG_V: u32 = 15;
pub const EFUSE_FLASH_CRYPT_CONFIG_S: u32 = 28;
pub const EFUSE_DIG_VOL_L6: u32 = 15;
pub const EFUSE_DIG_VOL_L6_M: u32 = 251658240;
pub const EFUSE_DIG_VOL_L6_V: u32 = 15;
pub const EFUSE_DIG_VOL_L6_S: u32 = 24;
pub const EFUSE_VOL_LEVEL_HP_INV: u32 = 3;
pub const EFUSE_VOL_LEVEL_HP_INV_M: u32 = 12582912;
pub const EFUSE_VOL_LEVEL_HP_INV_V: u32 = 3;
pub const EFUSE_VOL_LEVEL_HP_INV_S: u32 = 22;
pub const EFUSE_INST_CONFIG: u32 = 255;
pub const EFUSE_INST_CONFIG_V: u32 = 255;
pub const EFUSE_INST_CONFIG_S: u32 = 20;
pub const EFUSE_SPI_PAD_CONFIG_CS0: u32 = 31;
pub const EFUSE_SPI_PAD_CONFIG_CS0_V: u32 = 31;
pub const EFUSE_SPI_PAD_CONFIG_CS0_S: u32 = 15;
pub const EFUSE_SPI_PAD_CONFIG_D: u32 = 31;
pub const EFUSE_SPI_PAD_CONFIG_D_V: u32 = 31;
pub const EFUSE_SPI_PAD_CONFIG_D_S: u32 = 10;
pub const EFUSE_SPI_PAD_CONFIG_Q: u32 = 31;
pub const EFUSE_SPI_PAD_CONFIG_Q_V: u32 = 31;
pub const EFUSE_SPI_PAD_CONFIG_Q_S: u32 = 5;
pub const EFUSE_SPI_PAD_CONFIG_CLK: u32 = 31;
pub const EFUSE_SPI_PAD_CONFIG_CLK_V: u32 = 31;
pub const EFUSE_SPI_PAD_CONFIG_CLK_S: u32 = 0;
pub const EFUSE_BLK0_WDATA6_REG: u32 = 1073061940;
pub const EFUSE_KEY_STATUS_V: u32 = 1;
pub const EFUSE_KEY_STATUS_S: u32 = 10;
pub const EFUSE_DISABLE_DL_CACHE_V: u32 = 1;
pub const EFUSE_DISABLE_DL_CACHE_S: u32 = 9;
pub const EFUSE_DISABLE_DL_DECRYPT_V: u32 = 1;
pub const EFUSE_DISABLE_DL_DECRYPT_S: u32 = 8;
pub const EFUSE_DISABLE_DL_ENCRYPT_V: u32 = 1;
pub const EFUSE_DISABLE_DL_ENCRYPT_S: u32 = 7;
pub const EFUSE_DISABLE_JTAG_V: u32 = 1;
pub const EFUSE_DISABLE_JTAG_S: u32 = 6;
pub const EFUSE_ABS_DONE_1_V: u32 = 1;
pub const EFUSE_ABS_DONE_1_S: u32 = 5;
pub const EFUSE_ABS_DONE_0_V: u32 = 1;
pub const EFUSE_ABS_DONE_0_S: u32 = 4;
pub const EFUSE_DISABLE_SDIO_HOST_V: u32 = 1;
pub const EFUSE_DISABLE_SDIO_HOST_S: u32 = 3;
pub const EFUSE_CONSOLE_DEBUG_DISABLE_V: u32 = 1;
pub const EFUSE_CONSOLE_DEBUG_DISABLE_S: u32 = 2;
pub const EFUSE_CODING_SCHEME: u32 = 3;
pub const EFUSE_CODING_SCHEME_V: u32 = 3;
pub const EFUSE_CODING_SCHEME_S: u32 = 0;
pub const EFUSE_BLK1_RDATA0_REG: u32 = 1073061944;
pub const EFUSE_BLK1_DOUT0: u32 = 4294967295;
pub const EFUSE_BLK1_DOUT0_V: u32 = 4294967295;
pub const EFUSE_BLK1_DOUT0_S: u32 = 0;
pub const EFUSE_BLK1_RDATA1_REG: u32 = 1073061948;
pub const EFUSE_BLK1_DOUT1: u32 = 4294967295;
pub const EFUSE_BLK1_DOUT1_V: u32 = 4294967295;
pub const EFUSE_BLK1_DOUT1_S: u32 = 0;
pub const EFUSE_BLK1_RDATA2_REG: u32 = 1073061952;
pub const EFUSE_BLK1_DOUT2: u32 = 4294967295;
pub const EFUSE_BLK1_DOUT2_V: u32 = 4294967295;
pub const EFUSE_BLK1_DOUT2_S: u32 = 0;
pub const EFUSE_BLK1_RDATA3_REG: u32 = 1073061956;
pub const EFUSE_BLK1_DOUT3: u32 = 4294967295;
pub const EFUSE_BLK1_DOUT3_V: u32 = 4294967295;
pub const EFUSE_BLK1_DOUT3_S: u32 = 0;
pub const EFUSE_BLK1_RDATA4_REG: u32 = 1073061960;
pub const EFUSE_BLK1_DOUT4: u32 = 4294967295;
pub const EFUSE_BLK1_DOUT4_V: u32 = 4294967295;
pub const EFUSE_BLK1_DOUT4_S: u32 = 0;
pub const EFUSE_BLK1_RDATA5_REG: u32 = 1073061964;
pub const EFUSE_BLK1_DOUT5: u32 = 4294967295;
pub const EFUSE_BLK1_DOUT5_V: u32 = 4294967295;
pub const EFUSE_BLK1_DOUT5_S: u32 = 0;
pub const EFUSE_BLK1_RDATA6_REG: u32 = 1073061968;
pub const EFUSE_BLK1_DOUT6: u32 = 4294967295;
pub const EFUSE_BLK1_DOUT6_V: u32 = 4294967295;
pub const EFUSE_BLK1_DOUT6_S: u32 = 0;
pub const EFUSE_BLK1_RDATA7_REG: u32 = 1073061972;
pub const EFUSE_BLK1_DOUT7: u32 = 4294967295;
pub const EFUSE_BLK1_DOUT7_V: u32 = 4294967295;
pub const EFUSE_BLK1_DOUT7_S: u32 = 0;
pub const EFUSE_BLK2_RDATA0_REG: u32 = 1073061976;
pub const EFUSE_BLK2_DOUT0: u32 = 4294967295;
pub const EFUSE_BLK2_DOUT0_V: u32 = 4294967295;
pub const EFUSE_BLK2_DOUT0_S: u32 = 0;
pub const EFUSE_BLK2_RDATA1_REG: u32 = 1073061980;
pub const EFUSE_BLK2_DOUT1: u32 = 4294967295;
pub const EFUSE_BLK2_DOUT1_V: u32 = 4294967295;
pub const EFUSE_BLK2_DOUT1_S: u32 = 0;
pub const EFUSE_BLK2_RDATA2_REG: u32 = 1073061984;
pub const EFUSE_BLK2_DOUT2: u32 = 4294967295;
pub const EFUSE_BLK2_DOUT2_V: u32 = 4294967295;
pub const EFUSE_BLK2_DOUT2_S: u32 = 0;
pub const EFUSE_BLK2_RDATA3_REG: u32 = 1073061988;
pub const EFUSE_BLK2_DOUT3: u32 = 4294967295;
pub const EFUSE_BLK2_DOUT3_V: u32 = 4294967295;
pub const EFUSE_BLK2_DOUT3_S: u32 = 0;
pub const EFUSE_BLK2_RDATA4_REG: u32 = 1073061992;
pub const EFUSE_BLK2_DOUT4: u32 = 4294967295;
pub const EFUSE_BLK2_DOUT4_V: u32 = 4294967295;
pub const EFUSE_BLK2_DOUT4_S: u32 = 0;
pub const EFUSE_BLK2_RDATA5_REG: u32 = 1073061996;
pub const EFUSE_BLK2_DOUT5: u32 = 4294967295;
pub const EFUSE_BLK2_DOUT5_V: u32 = 4294967295;
pub const EFUSE_BLK2_DOUT5_S: u32 = 0;
pub const EFUSE_BLK2_RDATA6_REG: u32 = 1073062000;
pub const EFUSE_BLK2_DOUT6: u32 = 4294967295;
pub const EFUSE_BLK2_DOUT6_V: u32 = 4294967295;
pub const EFUSE_BLK2_DOUT6_S: u32 = 0;
pub const EFUSE_BLK2_RDATA7_REG: u32 = 1073062004;
pub const EFUSE_BLK2_DOUT7: u32 = 4294967295;
pub const EFUSE_BLK2_DOUT7_V: u32 = 4294967295;
pub const EFUSE_BLK2_DOUT7_S: u32 = 0;
pub const EFUSE_BLK3_RDATA0_REG: u32 = 1073062008;
pub const EFUSE_BLK3_DOUT0: u32 = 4294967295;
pub const EFUSE_BLK3_DOUT0_V: u32 = 4294967295;
pub const EFUSE_BLK3_DOUT0_S: u32 = 0;
pub const EFUSE_BLK3_RDATA1_REG: u32 = 1073062012;
pub const EFUSE_BLK3_DOUT1: u32 = 4294967295;
pub const EFUSE_BLK3_DOUT1_V: u32 = 4294967295;
pub const EFUSE_BLK3_DOUT1_S: u32 = 0;
pub const EFUSE_BLK3_RDATA2_REG: u32 = 1073062016;
pub const EFUSE_BLK3_DOUT2: u32 = 4294967295;
pub const EFUSE_BLK3_DOUT2_V: u32 = 4294967295;
pub const EFUSE_BLK3_DOUT2_S: u32 = 0;
pub const EFUSE_BLK3_RDATA3_REG: u32 = 1073062020;
pub const EFUSE_BLK3_DOUT3: u32 = 4294967295;
pub const EFUSE_BLK3_DOUT3_V: u32 = 4294967295;
pub const EFUSE_BLK3_DOUT3_S: u32 = 0;
pub const EFUSE_RD_ADC2_TP_HIGH: u32 = 511;
pub const EFUSE_RD_ADC2_TP_HIGH_V: u32 = 511;
pub const EFUSE_RD_ADC2_TP_HIGH_S: u32 = 23;
pub const EFUSE_RD_ADC2_TP_LOW: u32 = 127;
pub const EFUSE_RD_ADC2_TP_LOW_V: u32 = 127;
pub const EFUSE_RD_ADC2_TP_LOW_S: u32 = 16;
pub const EFUSE_RD_ADC1_TP_HIGH: u32 = 511;
pub const EFUSE_RD_ADC1_TP_HIGH_V: u32 = 511;
pub const EFUSE_RD_ADC1_TP_HIGH_S: u32 = 7;
pub const EFUSE_RD_ADC1_TP_LOW: u32 = 127;
pub const EFUSE_RD_ADC1_TP_LOW_V: u32 = 127;
pub const EFUSE_RD_ADC1_TP_LOW_S: u32 = 0;
pub const EFUSE_BLK3_RDATA4_REG: u32 = 1073062024;
pub const EFUSE_BLK3_DOUT4: u32 = 4294967295;
pub const EFUSE_BLK3_DOUT4_V: u32 = 4294967295;
pub const EFUSE_BLK3_DOUT4_S: u32 = 0;
pub const EFUSE_RD_CAL_RESERVED: u32 = 65535;
pub const EFUSE_RD_CAL_RESERVED_V: u32 = 65535;
pub const EFUSE_RD_CAL_RESERVED_S: u32 = 0;
pub const EFUSE_BLK3_RDATA5_REG: u32 = 1073062028;
pub const EFUSE_BLK3_DOUT5: u32 = 4294967295;
pub const EFUSE_BLK3_DOUT5_V: u32 = 4294967295;
pub const EFUSE_BLK3_DOUT5_S: u32 = 0;
pub const EFUSE_BLK3_RDATA6_REG: u32 = 1073062032;
pub const EFUSE_BLK3_DOUT6: u32 = 4294967295;
pub const EFUSE_BLK3_DOUT6_V: u32 = 4294967295;
pub const EFUSE_BLK3_DOUT6_S: u32 = 0;
pub const EFUSE_BLK3_RDATA7_REG: u32 = 1073062036;
pub const EFUSE_BLK3_DOUT7: u32 = 4294967295;
pub const EFUSE_BLK3_DOUT7_V: u32 = 4294967295;
pub const EFUSE_BLK3_DOUT7_S: u32 = 0;
pub const EFUSE_BLK1_WDATA0_REG: u32 = 1073062040;
pub const EFUSE_BLK1_DIN0: u32 = 4294967295;
pub const EFUSE_BLK1_DIN0_V: u32 = 4294967295;
pub const EFUSE_BLK1_DIN0_S: u32 = 0;
pub const EFUSE_BLK1_WDATA1_REG: u32 = 1073062044;
pub const EFUSE_BLK1_DIN1: u32 = 4294967295;
pub const EFUSE_BLK1_DIN1_V: u32 = 4294967295;
pub const EFUSE_BLK1_DIN1_S: u32 = 0;
pub const EFUSE_BLK1_WDATA2_REG: u32 = 1073062048;
pub const EFUSE_BLK1_DIN2: u32 = 4294967295;
pub const EFUSE_BLK1_DIN2_V: u32 = 4294967295;
pub const EFUSE_BLK1_DIN2_S: u32 = 0;
pub const EFUSE_BLK1_WDATA3_REG: u32 = 1073062052;
pub const EFUSE_BLK1_DIN3: u32 = 4294967295;
pub const EFUSE_BLK1_DIN3_V: u32 = 4294967295;
pub const EFUSE_BLK1_DIN3_S: u32 = 0;
pub const EFUSE_BLK1_WDATA4_REG: u32 = 1073062056;
pub const EFUSE_BLK1_DIN4: u32 = 4294967295;
pub const EFUSE_BLK1_DIN4_V: u32 = 4294967295;
pub const EFUSE_BLK1_DIN4_S: u32 = 0;
pub const EFUSE_BLK1_WDATA5_REG: u32 = 1073062060;
pub const EFUSE_BLK1_DIN5: u32 = 4294967295;
pub const EFUSE_BLK1_DIN5_V: u32 = 4294967295;
pub const EFUSE_BLK1_DIN5_S: u32 = 0;
pub const EFUSE_BLK1_WDATA6_REG: u32 = 1073062064;
pub const EFUSE_BLK1_DIN6: u32 = 4294967295;
pub const EFUSE_BLK1_DIN6_V: u32 = 4294967295;
pub const EFUSE_BLK1_DIN6_S: u32 = 0;
pub const EFUSE_BLK1_WDATA7_REG: u32 = 1073062068;
pub const EFUSE_BLK1_DIN7: u32 = 4294967295;
pub const EFUSE_BLK1_DIN7_V: u32 = 4294967295;
pub const EFUSE_BLK1_DIN7_S: u32 = 0;
pub const EFUSE_BLK2_WDATA0_REG: u32 = 1073062072;
pub const EFUSE_BLK2_DIN0: u32 = 4294967295;
pub const EFUSE_BLK2_DIN0_V: u32 = 4294967295;
pub const EFUSE_BLK2_DIN0_S: u32 = 0;
pub const EFUSE_BLK2_WDATA1_REG: u32 = 1073062076;
pub const EFUSE_BLK2_DIN1: u32 = 4294967295;
pub const EFUSE_BLK2_DIN1_V: u32 = 4294967295;
pub const EFUSE_BLK2_DIN1_S: u32 = 0;
pub const EFUSE_BLK2_WDATA2_REG: u32 = 1073062080;
pub const EFUSE_BLK2_DIN2: u32 = 4294967295;
pub const EFUSE_BLK2_DIN2_V: u32 = 4294967295;
pub const EFUSE_BLK2_DIN2_S: u32 = 0;
pub const EFUSE_BLK2_WDATA3_REG: u32 = 1073062084;
pub const EFUSE_BLK2_DIN3: u32 = 4294967295;
pub const EFUSE_BLK2_DIN3_V: u32 = 4294967295;
pub const EFUSE_BLK2_DIN3_S: u32 = 0;
pub const EFUSE_BLK2_WDATA4_REG: u32 = 1073062088;
pub const EFUSE_BLK2_DIN4: u32 = 4294967295;
pub const EFUSE_BLK2_DIN4_V: u32 = 4294967295;
pub const EFUSE_BLK2_DIN4_S: u32 = 0;
pub const EFUSE_BLK2_WDATA5_REG: u32 = 1073062092;
pub const EFUSE_BLK2_DIN5: u32 = 4294967295;
pub const EFUSE_BLK2_DIN5_V: u32 = 4294967295;
pub const EFUSE_BLK2_DIN5_S: u32 = 0;
pub const EFUSE_BLK2_WDATA6_REG: u32 = 1073062096;
pub const EFUSE_BLK2_DIN6: u32 = 4294967295;
pub const EFUSE_BLK2_DIN6_V: u32 = 4294967295;
pub const EFUSE_BLK2_DIN6_S: u32 = 0;
pub const EFUSE_BLK2_WDATA7_REG: u32 = 1073062100;
pub const EFUSE_BLK2_DIN7: u32 = 4294967295;
pub const EFUSE_BLK2_DIN7_V: u32 = 4294967295;
pub const EFUSE_BLK2_DIN7_S: u32 = 0;
pub const EFUSE_BLK3_WDATA0_REG: u32 = 1073062104;
pub const EFUSE_BLK3_DIN0: u32 = 4294967295;
pub const EFUSE_BLK3_DIN0_V: u32 = 4294967295;
pub const EFUSE_BLK3_DIN0_S: u32 = 0;
pub const EFUSE_BLK3_WDATA1_REG: u32 = 1073062108;
pub const EFUSE_BLK3_DIN1: u32 = 4294967295;
pub const EFUSE_BLK3_DIN1_V: u32 = 4294967295;
pub const EFUSE_BLK3_DIN1_S: u32 = 0;
pub const EFUSE_BLK3_WDATA2_REG: u32 = 1073062112;
pub const EFUSE_BLK3_DIN2: u32 = 4294967295;
pub const EFUSE_BLK3_DIN2_V: u32 = 4294967295;
pub const EFUSE_BLK3_DIN2_S: u32 = 0;
pub const EFUSE_BLK3_WDATA3_REG: u32 = 1073062116;
pub const EFUSE_BLK3_DIN3: u32 = 4294967295;
pub const EFUSE_BLK3_DIN3_V: u32 = 4294967295;
pub const EFUSE_BLK3_DIN3_S: u32 = 0;
pub const EFUSE_ADC2_TP_HIGH: u32 = 511;
pub const EFUSE_ADC2_TP_HIGH_V: u32 = 511;
pub const EFUSE_ADC2_TP_HIGH_S: u32 = 23;
pub const EFUSE_ADC2_TP_LOW: u32 = 127;
pub const EFUSE_ADC2_TP_LOW_V: u32 = 127;
pub const EFUSE_ADC2_TP_LOW_S: u32 = 16;
pub const EFUSE_ADC1_TP_HIGH: u32 = 511;
pub const EFUSE_ADC1_TP_HIGH_V: u32 = 511;
pub const EFUSE_ADC1_TP_HIGH_S: u32 = 7;
pub const EFUSE_ADC1_TP_LOW: u32 = 127;
pub const EFUSE_ADC1_TP_LOW_V: u32 = 127;
pub const EFUSE_ADC1_TP_LOW_S: u32 = 0;
pub const EFUSE_BLK3_WDATA4_REG: u32 = 1073062120;
pub const EFUSE_BLK3_DIN4: u32 = 4294967295;
pub const EFUSE_BLK3_DIN4_V: u32 = 4294967295;
pub const EFUSE_BLK3_DIN4_S: u32 = 0;
pub const EFUSE_CAL_RESERVED: u32 = 65535;
pub const EFUSE_CAL_RESERVED_V: u32 = 65535;
pub const EFUSE_CAL_RESERVED_S: u32 = 0;
pub const EFUSE_BLK3_WDATA5_REG: u32 = 1073062124;
pub const EFUSE_BLK3_DIN5: u32 = 4294967295;
pub const EFUSE_BLK3_DIN5_V: u32 = 4294967295;
pub const EFUSE_BLK3_DIN5_S: u32 = 0;
pub const EFUSE_BLK3_WDATA6_REG: u32 = 1073062128;
pub const EFUSE_BLK3_DIN6: u32 = 4294967295;
pub const EFUSE_BLK3_DIN6_V: u32 = 4294967295;
pub const EFUSE_BLK3_DIN6_S: u32 = 0;
pub const EFUSE_BLK3_WDATA7_REG: u32 = 1073062132;
pub const EFUSE_BLK3_DIN7: u32 = 4294967295;
pub const EFUSE_BLK3_DIN7_V: u32 = 4294967295;
pub const EFUSE_BLK3_DIN7_S: u32 = 0;
pub const EFUSE_CLK_REG: u32 = 1073062136;
pub const EFUSE_CLK_EN_V: u32 = 1;
pub const EFUSE_CLK_EN_S: u32 = 16;
pub const EFUSE_CLK_SEL1: u32 = 255;
pub const EFUSE_CLK_SEL1_V: u32 = 255;
pub const EFUSE_CLK_SEL1_S: u32 = 8;
pub const EFUSE_CLK_SEL0: u32 = 255;
pub const EFUSE_CLK_SEL0_V: u32 = 255;
pub const EFUSE_CLK_SEL0_S: u32 = 0;
pub const EFUSE_CONF_REG: u32 = 1073062140;
pub const EFUSE_FORCE_NO_WR_RD_DIS_V: u32 = 1;
pub const EFUSE_FORCE_NO_WR_RD_DIS_S: u32 = 16;
pub const EFUSE_OP_CODE: u32 = 65535;
pub const EFUSE_OP_CODE_V: u32 = 65535;
pub const EFUSE_OP_CODE_S: u32 = 0;
pub const EFUSE_STATUS_REG: u32 = 1073062144;
pub const EFUSE_DEBUG: u32 = 4294967295;
pub const EFUSE_DEBUG_V: u32 = 4294967295;
pub const EFUSE_DEBUG_S: u32 = 0;
pub const EFUSE_CMD_REG: u32 = 1073062148;
pub const EFUSE_PGM_CMD_V: u32 = 1;
pub const EFUSE_PGM_CMD_S: u32 = 1;
pub const EFUSE_READ_CMD_V: u32 = 1;
pub const EFUSE_READ_CMD_S: u32 = 0;
pub const EFUSE_INT_RAW_REG: u32 = 1073062152;
pub const EFUSE_PGM_DONE_INT_RAW_V: u32 = 1;
pub const EFUSE_PGM_DONE_INT_RAW_S: u32 = 1;
pub const EFUSE_READ_DONE_INT_RAW_V: u32 = 1;
pub const EFUSE_READ_DONE_INT_RAW_S: u32 = 0;
pub const EFUSE_INT_ST_REG: u32 = 1073062156;
pub const EFUSE_PGM_DONE_INT_ST_V: u32 = 1;
pub const EFUSE_PGM_DONE_INT_ST_S: u32 = 1;
pub const EFUSE_READ_DONE_INT_ST_V: u32 = 1;
pub const EFUSE_READ_DONE_INT_ST_S: u32 = 0;
pub const EFUSE_INT_ENA_REG: u32 = 1073062160;
pub const EFUSE_PGM_DONE_INT_ENA_V: u32 = 1;
pub const EFUSE_PGM_DONE_INT_ENA_S: u32 = 1;
pub const EFUSE_READ_DONE_INT_ENA_V: u32 = 1;
pub const EFUSE_READ_DONE_INT_ENA_S: u32 = 0;
pub const EFUSE_INT_CLR_REG: u32 = 1073062164;
pub const EFUSE_PGM_DONE_INT_CLR_V: u32 = 1;
pub const EFUSE_PGM_DONE_INT_CLR_S: u32 = 1;
pub const EFUSE_READ_DONE_INT_CLR_V: u32 = 1;
pub const EFUSE_READ_DONE_INT_CLR_S: u32 = 0;
pub const EFUSE_DAC_CONF_REG: u32 = 1073062168;
pub const EFUSE_DAC_CLK_PAD_SEL_V: u32 = 1;
pub const EFUSE_DAC_CLK_PAD_SEL_S: u32 = 8;
pub const EFUSE_DAC_CLK_DIV: u32 = 255;
pub const EFUSE_DAC_CLK_DIV_V: u32 = 255;
pub const EFUSE_DAC_CLK_DIV_S: u32 = 0;
pub const EFUSE_DEC_STATUS_REG: u32 = 1073062172;
pub const EFUSE_DEC_WARNINGS: u32 = 4095;
pub const EFUSE_DEC_WARNINGS_V: u32 = 4095;
pub const EFUSE_DEC_WARNINGS_S: u32 = 0;
pub const EFUSE_DATE_REG: u32 = 1073062396;
pub const EFUSE_DATE: u32 = 4294967295;
pub const EFUSE_DATE_V: u32 = 4294967295;
pub const EFUSE_DATE_S: u32 = 0;
pub const I2S_INTR_MAX: u32 = 4294967295;
pub const I2S_PIN_NO_CHANGE: i32 = -1;
pub const UART_FIFO_LEN: u32 = 128;
pub const UART_BITRATE_MAX: u32 = 5000000;
pub const SOC_UART_NUM: u32 = 3;
pub const SOC_UART_MIN_WAKEUP_THRESH: u32 = 2;
pub const UART_INTR_MASK: u32 = 524287;
pub const UART_NUM_0: u32 = 0;
pub const UART_NUM_1: u32 = 1;
pub const UART_NUM_2: u32 = 2;
pub const UART_NUM_MAX: u32 = 3;
pub const UART_PIN_NO_CHANGE: i32 = -1;
pub const ESP_ERR_NVS_BASE: u32 = 4352;
pub const ESP_ERR_NVS_NOT_INITIALIZED: u32 = 4353;
pub const ESP_ERR_NVS_NOT_FOUND: u32 = 4354;
pub const ESP_ERR_NVS_TYPE_MISMATCH: u32 = 4355;
pub const ESP_ERR_NVS_READ_ONLY: u32 = 4356;
pub const ESP_ERR_NVS_NOT_ENOUGH_SPACE: u32 = 4357;
pub const ESP_ERR_NVS_INVALID_NAME: u32 = 4358;
pub const ESP_ERR_NVS_INVALID_HANDLE: u32 = 4359;
pub const ESP_ERR_NVS_REMOVE_FAILED: u32 = 4360;
pub const ESP_ERR_NVS_KEY_TOO_LONG: u32 = 4361;
pub const ESP_ERR_NVS_PAGE_FULL: u32 = 4362;
pub const ESP_ERR_NVS_INVALID_STATE: u32 = 4363;
pub const ESP_ERR_NVS_INVALID_LENGTH: u32 = 4364;
pub const ESP_ERR_NVS_NO_FREE_PAGES: u32 = 4365;
pub const ESP_ERR_NVS_VALUE_TOO_LONG: u32 = 4366;
pub const ESP_ERR_NVS_PART_NOT_FOUND: u32 = 4367;
pub const ESP_ERR_NVS_NEW_VERSION_FOUND: u32 = 4368;
pub const ESP_ERR_NVS_XTS_ENCR_FAILED: u32 = 4369;
pub const ESP_ERR_NVS_XTS_DECR_FAILED: u32 = 4370;
pub const ESP_ERR_NVS_XTS_CFG_FAILED: u32 = 4371;
pub const ESP_ERR_NVS_XTS_CFG_NOT_FOUND: u32 = 4372;
pub const ESP_ERR_NVS_ENCR_NOT_SUPPORTED: u32 = 4373;
pub const ESP_ERR_NVS_KEYS_NOT_INITIALIZED: u32 = 4374;
pub const ESP_ERR_NVS_CORRUPT_KEY_PART: u32 = 4375;
pub const ESP_ERR_NVS_CONTENT_DIFFERS: u32 = 4376;
pub const NVS_DEFAULT_PART_NAME: &'static [u8; 4usize] = b"nvs\0";
pub const NVS_PART_NAME_MAX_SIZE: u32 = 16;
pub const NVS_KEY_SIZE: u32 = 32;
pub const ESP_EVENT_ANY_ID: i32 = -1;
pub const WIFI_PROTOCOL_11B: u32 = 1;
pub const WIFI_PROTOCOL_11G: u32 = 2;
pub const WIFI_PROTOCOL_11N: u32 = 4;
pub const WIFI_PROTOCOL_LR: u32 = 8;
pub const ESP_WIFI_MAX_CONN_NUM: u32 = 10;
pub const WIFI_VENDOR_IE_ELEMENT_ID: u32 = 221;
pub const WIFI_PROMIS_FILTER_MASK_ALL: u32 = 4294967295;
pub const WIFI_PROMIS_FILTER_MASK_MGMT: u32 = 1;
pub const WIFI_PROMIS_FILTER_MASK_CTRL: u32 = 2;
pub const WIFI_PROMIS_FILTER_MASK_DATA: u32 = 4;
pub const WIFI_PROMIS_FILTER_MASK_MISC: u32 = 8;
pub const WIFI_PROMIS_FILTER_MASK_DATA_MPDU: u32 = 16;
pub const WIFI_PROMIS_FILTER_MASK_DATA_AMPDU: u32 = 32;
pub const WIFI_PROMIS_CTRL_FILTER_MASK_ALL: u32 = 4286578688;
pub const WIFI_PROMIS_CTRL_FILTER_MASK_WRAPPER: u32 = 8388608;
pub const WIFI_PROMIS_CTRL_FILTER_MASK_BAR: u32 = 16777216;
pub const WIFI_PROMIS_CTRL_FILTER_MASK_BA: u32 = 33554432;
pub const WIFI_PROMIS_CTRL_FILTER_MASK_PSPOLL: u32 = 67108864;
pub const WIFI_PROMIS_CTRL_FILTER_MASK_RTS: u32 = 134217728;
pub const WIFI_PROMIS_CTRL_FILTER_MASK_CTS: u32 = 268435456;
pub const WIFI_PROMIS_CTRL_FILTER_MASK_ACK: u32 = 536870912;
pub const WIFI_PROMIS_CTRL_FILTER_MASK_CFEND: u32 = 1073741824;
pub const WIFI_PROMIS_CTRL_FILTER_MASK_CFENDACK: u32 = 2147483648;
pub const WIFI_EVENT_MASK_ALL: u32 = 4294967295;
pub const WIFI_EVENT_MASK_NONE: u32 = 0;
pub const IPSTR: &'static [u8; 12usize] = b"%d.%d.%d.%d\0";
pub const IPV6STR: &'static [u8; 40usize] = b"%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\0";
pub const ESP_IPADDR_TYPE_V4: u32 = 0;
pub const ESP_IPADDR_TYPE_V6: u32 = 6;
pub const ESP_IPADDR_TYPE_ANY: u32 = 46;
pub const ESP_ERR_ESP_NETIF_BASE: u32 = 20480;
pub const ESP_ERR_ESP_NETIF_INVALID_PARAMS: u32 = 20481;
pub const ESP_ERR_ESP_NETIF_IF_NOT_READY: u32 = 20482;
pub const ESP_ERR_ESP_NETIF_DHCPC_START_FAILED: u32 = 20483;
pub const ESP_ERR_ESP_NETIF_DHCP_ALREADY_STARTED: u32 = 20484;
pub const ESP_ERR_ESP_NETIF_DHCP_ALREADY_STOPPED: u32 = 20485;
pub const ESP_ERR_ESP_NETIF_NO_MEM: u32 = 20486;
pub const ESP_ERR_ESP_NETIF_DHCP_NOT_STOPPED: u32 = 20487;
pub const ESP_ERR_ESP_NETIF_DRIVER_ATTACH_FAILED: u32 = 20488;
pub const ESP_ERR_ESP_NETIF_INIT_FAILED: u32 = 20489;
pub const ESP_ERR_ESP_NETIF_DNS_NOT_CONFIGURED: u32 = 20490;
pub const ESP_ERR_ESPNOW_BASE: u32 = 12388;
pub const ESP_ERR_ESPNOW_NOT_INIT: u32 = 12389;
pub const ESP_ERR_ESPNOW_ARG: u32 = 12390;
pub const ESP_ERR_ESPNOW_NO_MEM: u32 = 12391;
pub const ESP_ERR_ESPNOW_FULL: u32 = 12392;
pub const ESP_ERR_ESPNOW_NOT_FOUND: u32 = 12393;
pub const ESP_ERR_ESPNOW_INTERNAL: u32 = 12394;
pub const ESP_ERR_ESPNOW_EXIST: u32 = 12395;
pub const ESP_ERR_ESPNOW_IF: u32 = 12396;
pub const ESP_NOW_ETH_ALEN: u32 = 6;
pub const ESP_NOW_KEY_LEN: u32 = 16;
pub const ESP_NOW_MAX_TOTAL_PEER_NUM: u32 = 20;
pub const ESP_NOW_MAX_ENCRYPT_PEER_NUM: u32 = 6;
pub const ESP_NOW_MAX_DATA_LEN: u32 = 250;
pub const SOC_TOUCH_SENSOR_NUM: u32 = 10;
pub const SOC_TOUCH_SENSOR_BIT_MASK_MAX: u32 = 1023;
pub const SOC_TOUCH_PAD_MEASURE_WAIT: u32 = 255;
pub const SOC_TOUCH_PAD_THRESHOLD_MAX: u32 = 0;
pub const TOUCH_PAD_BIT_MASK_MAX: u32 = 1023;
pub const TOUCH_PAD_THRESHOLD_MAX: u32 = 0;
pub const TOUCH_PAD_SLEEP_CYCLE_DEFAULT: u32 = 4096;
pub const TOUCH_PAD_MEASURE_CYCLE_DEFAULT: u32 = 32767;
pub const ESP_WIFI_CRYPTO_VERSION: u32 = 1;
pub const ESP_WIFI_OS_ADAPTER_VERSION: u32 = 6;
pub const ESP_WIFI_OS_ADAPTER_MAGIC: u32 = 3735928495;
pub const OSI_FUNCS_TIME_BLOCKING: u32 = 4294967295;
pub const OSI_QUEUE_SEND_FRONT: u32 = 0;
pub const OSI_QUEUE_SEND_BACK: u32 = 1;
pub const OSI_QUEUE_SEND_OVERWRITE: u32 = 2;
pub const ESP_ERR_WIFI_NOT_INIT: u32 = 12289;
pub const ESP_ERR_WIFI_NOT_STARTED: u32 = 12290;
pub const ESP_ERR_WIFI_NOT_STOPPED: u32 = 12291;
pub const ESP_ERR_WIFI_IF: u32 = 12292;
pub const ESP_ERR_WIFI_MODE: u32 = 12293;
pub const ESP_ERR_WIFI_STATE: u32 = 12294;
pub const ESP_ERR_WIFI_CONN: u32 = 12295;
pub const ESP_ERR_WIFI_NVS: u32 = 12296;
pub const ESP_ERR_WIFI_MAC: u32 = 12297;
pub const ESP_ERR_WIFI_SSID: u32 = 12298;
pub const ESP_ERR_WIFI_PASSWORD: u32 = 12299;
pub const ESP_ERR_WIFI_TIMEOUT: u32 = 12300;
pub const ESP_ERR_WIFI_WAKE_FAIL: u32 = 12301;
pub const ESP_ERR_WIFI_WOULD_BLOCK: u32 = 12302;
pub const ESP_ERR_WIFI_NOT_CONNECT: u32 = 12303;
pub const ESP_ERR_WIFI_POST: u32 = 12306;
pub const ESP_ERR_WIFI_INIT_STATE: u32 = 12307;
pub const ESP_ERR_WIFI_STOP_STATE: u32 = 12308;
pub const WIFI_STATIC_TX_BUFFER_NUM: u32 = 0;
pub const WIFI_DYNAMIC_TX_BUFFER_NUM: u32 = 32;
pub const WIFI_CSI_ENABLED: u32 = 0;
pub const WIFI_AMPDU_RX_ENABLED: u32 = 1;
pub const WIFI_AMPDU_TX_ENABLED: u32 = 1;
pub const WIFI_NVS_ENABLED: u32 = 1;
pub const WIFI_NANO_FORMAT_ENABLED: u32 = 0;
pub const WIFI_INIT_CONFIG_MAGIC: u32 = 523190095;
pub const WIFI_DEFAULT_TX_BA_WIN: u32 = 6;
pub const WIFI_DEFAULT_RX_BA_WIN: u32 = 6;
pub const WIFI_TASK_CORE_ID: u32 = 0;
pub const WIFI_SOFTAP_BEACON_MAX_LEN: u32 = 752;
pub const WIFI_MGMT_SBUF_NUM: u32 = 32;
pub const CONFIG_FEATURE_WPA3_SAE_BIT: u32 = 1;
pub const _CLOCKS_PER_SEC_: u32 = 1000;
pub const CLOCKS_PER_SEC: u32 = 1000;
pub const CLK_TCK: u32 = 1000;
pub const SIGEV_NONE: u32 = 1;
pub const SIGEV_SIGNAL: u32 = 2;
pub const SIGEV_THREAD: u32 = 3;
pub const SI_USER: u32 = 1;
pub const SI_QUEUE: u32 = 2;
pub const SI_TIMER: u32 = 3;
pub const SI_ASYNCIO: u32 = 4;
pub const SI_MESGQ: u32 = 5;
pub const SA_NOCLDSTOP: u32 = 1;
pub const MINSIGSTKSZ: u32 = 2048;
pub const SIGSTKSZ: u32 = 8192;
pub const SS_ONSTACK: u32 = 1;
pub const SS_DISABLE: u32 = 2;
pub const SIG_SETMASK: u32 = 0;
pub const SIG_BLOCK: u32 = 1;
pub const SIG_UNBLOCK: u32 = 2;
pub const SIGHUP: u32 = 1;
pub const SIGINT: u32 = 2;
pub const SIGQUIT: u32 = 3;
pub const SIGILL: u32 = 4;
pub const SIGTRAP: u32 = 5;
pub const SIGIOT: u32 = 6;
pub const SIGABRT: u32 = 6;
pub const SIGEMT: u32 = 7;
pub const SIGFPE: u32 = 8;
pub const SIGKILL: u32 = 9;
pub const SIGBUS: u32 = 10;
pub const SIGSEGV: u32 = 11;
pub const SIGSYS: u32 = 12;
pub const SIGPIPE: u32 = 13;
pub const SIGALRM: u32 = 14;
pub const SIGTERM: u32 = 15;
pub const SIGURG: u32 = 16;
pub const SIGSTOP: u32 = 17;
pub const SIGTSTP: u32 = 18;
pub const SIGCONT: u32 = 19;
pub const SIGCHLD: u32 = 20;
pub const SIGCLD: u32 = 20;
pub const SIGTTIN: u32 = 21;
pub const SIGTTOU: u32 = 22;
pub const SIGIO: u32 = 23;
pub const SIGPOLL: u32 = 23;
pub const SIGXCPU: u32 = 24;
pub const SIGXFSZ: u32 = 25;
pub const SIGVTALRM: u32 = 26;
pub const SIGPROF: u32 = 27;
pub const SIGWINCH: u32 = 28;
pub const SIGLOST: u32 = 29;
pub const SIGUSR1: u32 = 30;
pub const SIGUSR2: u32 = 31;
pub const NSIG: u32 = 32;
pub const CLOCK_ENABLED: u32 = 1;
pub const CLOCK_DISABLED: u32 = 0;
pub const CLOCK_ALLOWED: u32 = 1;
pub const CLOCK_DISALLOWED: u32 = 0;
pub const TIMER_ABSTIME: u32 = 4;
pub const F_ULOCK: u32 = 0;
pub const F_LOCK: u32 = 1;
pub const F_TLOCK: u32 = 2;
pub const F_TEST: u32 = 3;
pub const F_OK: u32 = 0;
pub const R_OK: u32 = 4;
pub const W_OK: u32 = 2;
pub const X_OK: u32 = 1;
pub const STDIN_FILENO: u32 = 0;
pub const STDOUT_FILENO: u32 = 1;
pub const STDERR_FILENO: u32 = 2;
pub const _SC_ARG_MAX: u32 = 0;
pub const _SC_CHILD_MAX: u32 = 1;
pub const _SC_CLK_TCK: u32 = 2;
pub const _SC_NGROUPS_MAX: u32 = 3;
pub const _SC_OPEN_MAX: u32 = 4;
pub const _SC_JOB_CONTROL: u32 = 5;
pub const _SC_SAVED_IDS: u32 = 6;
pub const _SC_VERSION: u32 = 7;
pub const _SC_PAGESIZE: u32 = 8;
pub const _SC_PAGE_SIZE: u32 = 8;
pub const _SC_NPROCESSORS_CONF: u32 = 9;
pub const _SC_NPROCESSORS_ONLN: u32 = 10;
pub const _SC_PHYS_PAGES: u32 = 11;
pub const _SC_AVPHYS_PAGES: u32 = 12;
pub const _SC_MQ_OPEN_MAX: u32 = 13;
pub const _SC_MQ_PRIO_MAX: u32 = 14;
pub const _SC_RTSIG_MAX: u32 = 15;
pub const _SC_SEM_NSEMS_MAX: u32 = 16;
pub const _SC_SEM_VALUE_MAX: u32 = 17;
pub const _SC_SIGQUEUE_MAX: u32 = 18;
pub const _SC_TIMER_MAX: u32 = 19;
pub const _SC_TZNAME_MAX: u32 = 20;
pub const _SC_ASYNCHRONOUS_IO: u32 = 21;
pub const _SC_FSYNC: u32 = 22;
pub const _SC_MAPPED_FILES: u32 = 23;
pub const _SC_MEMLOCK: u32 = 24;
pub const _SC_MEMLOCK_RANGE: u32 = 25;
pub const _SC_MEMORY_PROTECTION: u32 = 26;
pub const _SC_MESSAGE_PASSING: u32 = 27;
pub const _SC_PRIORITIZED_IO: u32 = 28;
pub const _SC_REALTIME_SIGNALS: u32 = 29;
pub const _SC_SEMAPHORES: u32 = 30;
pub const _SC_SHARED_MEMORY_OBJECTS: u32 = 31;
pub const _SC_SYNCHRONIZED_IO: u32 = 32;
pub const _SC_TIMERS: u32 = 33;
pub const _SC_AIO_LISTIO_MAX: u32 = 34;
pub const _SC_AIO_MAX: u32 = 35;
pub const _SC_AIO_PRIO_DELTA_MAX: u32 = 36;
pub const _SC_DELAYTIMER_MAX: u32 = 37;
pub const _SC_THREAD_KEYS_MAX: u32 = 38;
pub const _SC_THREAD_STACK_MIN: u32 = 39;
pub const _SC_THREAD_THREADS_MAX: u32 = 40;
pub const _SC_TTY_NAME_MAX: u32 = 41;
pub const _SC_THREADS: u32 = 42;
pub const _SC_THREAD_ATTR_STACKADDR: u32 = 43;
pub const _SC_THREAD_ATTR_STACKSIZE: u32 = 44;
pub const _SC_THREAD_PRIORITY_SCHEDULING: u32 = 45;
pub const _SC_THREAD_PRIO_INHERIT: u32 = 46;
pub const _SC_THREAD_PRIO_PROTECT: u32 = 47;
pub const _SC_THREAD_PRIO_CEILING: u32 = 47;
pub const _SC_THREAD_PROCESS_SHARED: u32 = 48;
pub const _SC_THREAD_SAFE_FUNCTIONS: u32 = 49;
pub const _SC_GETGR_R_SIZE_MAX: u32 = 50;
pub const _SC_GETPW_R_SIZE_MAX: u32 = 51;
pub const _SC_LOGIN_NAME_MAX: u32 = 52;
pub const _SC_THREAD_DESTRUCTOR_ITERATIONS: u32 = 53;
pub const _SC_ADVISORY_INFO: u32 = 54;
pub const _SC_ATEXIT_MAX: u32 = 55;
pub const _SC_BARRIERS: u32 = 56;
pub const _SC_BC_BASE_MAX: u32 = 57;
pub const _SC_BC_DIM_MAX: u32 = 58;
pub const _SC_BC_SCALE_MAX: u32 = 59;
pub const _SC_BC_STRING_MAX: u32 = 60;
pub const _SC_CLOCK_SELECTION: u32 = 61;
pub const _SC_COLL_WEIGHTS_MAX: u32 = 62;
pub const _SC_CPUTIME: u32 = 63;
pub const _SC_EXPR_NEST_MAX: u32 = 64;
pub const _SC_HOST_NAME_MAX: u32 = 65;
pub const _SC_IOV_MAX: u32 = 66;
pub const _SC_IPV6: u32 = 67;
pub const _SC_LINE_MAX: u32 = 68;
pub const _SC_MONOTONIC_CLOCK: u32 = 69;
pub const _SC_RAW_SOCKETS: u32 = 70;
pub const _SC_READER_WRITER_LOCKS: u32 = 71;
pub const _SC_REGEXP: u32 = 72;
pub const _SC_RE_DUP_MAX: u32 = 73;
pub const _SC_SHELL: u32 = 74;
pub const _SC_SPAWN: u32 = 75;
pub const _SC_SPIN_LOCKS: u32 = 76;
pub const _SC_SPORADIC_SERVER: u32 = 77;
pub const _SC_SS_REPL_MAX: u32 = 78;
pub const _SC_SYMLOOP_MAX: u32 = 79;
pub const _SC_THREAD_CPUTIME: u32 = 80;
pub const _SC_THREAD_SPORADIC_SERVER: u32 = 81;
pub const _SC_TIMEOUTS: u32 = 82;
pub const _SC_TRACE: u32 = 83;
pub const _SC_TRACE_EVENT_FILTER: u32 = 84;
pub const _SC_TRACE_EVENT_NAME_MAX: u32 = 85;
pub const _SC_TRACE_INHERIT: u32 = 86;
pub const _SC_TRACE_LOG: u32 = 87;
pub const _SC_TRACE_NAME_MAX: u32 = 88;
pub const _SC_TRACE_SYS_MAX: u32 = 89;
pub const _SC_TRACE_USER_EVENT_MAX: u32 = 90;
pub const _SC_TYPED_MEMORY_OBJECTS: u32 = 91;
pub const _SC_V7_ILP32_OFF32: u32 = 92;
pub const _SC_V6_ILP32_OFF32: u32 = 92;
pub const _SC_XBS5_ILP32_OFF32: u32 = 92;
pub const _SC_V7_ILP32_OFFBIG: u32 = 93;
pub const _SC_V6_ILP32_OFFBIG: u32 = 93;
pub const _SC_XBS5_ILP32_OFFBIG: u32 = 93;
pub const _SC_V7_LP64_OFF64: u32 = 94;
pub const _SC_V6_LP64_OFF64: u32 = 94;
pub const _SC_XBS5_LP64_OFF64: u32 = 94;
pub const _SC_V7_LPBIG_OFFBIG: u32 = 95;
pub const _SC_V6_LPBIG_OFFBIG: u32 = 95;
pub const _SC_XBS5_LPBIG_OFFBIG: u32 = 95;
pub const _SC_XOPEN_CRYPT: u32 = 96;
pub const _SC_XOPEN_ENH_I18N: u32 = 97;
pub const _SC_XOPEN_LEGACY: u32 = 98;
pub const _SC_XOPEN_REALTIME: u32 = 99;
pub const _SC_STREAM_MAX: u32 = 100;
pub const _SC_PRIORITY_SCHEDULING: u32 = 101;
pub const _SC_XOPEN_REALTIME_THREADS: u32 = 102;
pub const _SC_XOPEN_SHM: u32 = 103;
pub const _SC_XOPEN_STREAMS: u32 = 104;
pub const _SC_XOPEN_UNIX: u32 = 105;
pub const _SC_XOPEN_VERSION: u32 = 106;
pub const _SC_2_CHAR_TERM: u32 = 107;
pub const _SC_2_C_BIND: u32 = 108;
pub const _SC_2_C_DEV: u32 = 109;
pub const _SC_2_FORT_DEV: u32 = 110;
pub const _SC_2_FORT_RUN: u32 = 111;
pub const _SC_2_LOCALEDEF: u32 = 112;
pub const _SC_2_PBS: u32 = 113;
pub const _SC_2_PBS_ACCOUNTING: u32 = 114;
pub const _SC_2_PBS_CHECKPOINT: u32 = 115;
pub const _SC_2_PBS_LOCATE: u32 = 116;
pub const _SC_2_PBS_MESSAGE: u32 = 117;
pub const _SC_2_PBS_TRACK: u32 = 118;
pub const _SC_2_SW_DEV: u32 = 119;
pub const _SC_2_UPE: u32 = 120;
pub const _SC_2_VERSION: u32 = 121;
pub const _SC_THREAD_ROBUST_PRIO_INHERIT: u32 = 122;
pub const _SC_THREAD_ROBUST_PRIO_PROTECT: u32 = 123;
pub const _SC_XOPEN_UUCP: u32 = 124;
pub const _SC_LEVEL1_ICACHE_SIZE: u32 = 125;
pub const _SC_LEVEL1_ICACHE_ASSOC: u32 = 126;
pub const _SC_LEVEL1_ICACHE_LINESIZE: u32 = 127;
pub const _SC_LEVEL1_DCACHE_SIZE: u32 = 128;
pub const _SC_LEVEL1_DCACHE_ASSOC: u32 = 129;
pub const _SC_LEVEL1_DCACHE_LINESIZE: u32 = 130;
pub const _SC_LEVEL2_CACHE_SIZE: u32 = 131;
pub const _SC_LEVEL2_CACHE_ASSOC: u32 = 132;
pub const _SC_LEVEL2_CACHE_LINESIZE: u32 = 133;
pub const _SC_LEVEL3_CACHE_SIZE: u32 = 134;
pub const _SC_LEVEL3_CACHE_ASSOC: u32 = 135;
pub const _SC_LEVEL3_CACHE_LINESIZE: u32 = 136;
pub const _SC_LEVEL4_CACHE_SIZE: u32 = 137;
pub const _SC_LEVEL4_CACHE_ASSOC: u32 = 138;
pub const _SC_LEVEL4_CACHE_LINESIZE: u32 = 139;
pub const _SC_POSIX_26_VERSION: u32 = 140;
pub const _PC_LINK_MAX: u32 = 0;
pub const _PC_MAX_CANON: u32 = 1;
pub const _PC_MAX_INPUT: u32 = 2;
pub const _PC_NAME_MAX: u32 = 3;
pub const _PC_PATH_MAX: u32 = 4;
pub const _PC_PIPE_BUF: u32 = 5;
pub const _PC_CHOWN_RESTRICTED: u32 = 6;
pub const _PC_NO_TRUNC: u32 = 7;
pub const _PC_VDISABLE: u32 = 8;
pub const _PC_ASYNC_IO: u32 = 9;
pub const _PC_PRIO_IO: u32 = 10;
pub const _PC_SYNC_IO: u32 = 11;
pub const _PC_FILESIZEBITS: u32 = 12;
pub const _PC_2_SYMLINKS: u32 = 13;
pub const _PC_SYMLINK_MAX: u32 = 14;
pub const _PC_ALLOC_SIZE_MIN: u32 = 15;
pub const _PC_REC_INCR_XFER_SIZE: u32 = 16;
pub const _PC_REC_MAX_XFER_SIZE: u32 = 17;
pub const _PC_REC_MIN_XFER_SIZE: u32 = 18;
pub const _PC_REC_XFER_ALIGN: u32 = 19;
pub const _PC_TIMESTAMP_RESOLUTION: u32 = 20;
pub const L_SET: u32 = 0;
pub const L_INCR: u32 = 1;
pub const L_XTND: u32 = 2;
pub const DST_NONE: u32 = 0;
pub const DST_USA: u32 = 1;
pub const DST_AUST: u32 = 2;
pub const DST_WET: u32 = 3;
pub const DST_MET: u32 = 4;
pub const DST_EET: u32 = 5;
pub const DST_CAN: u32 = 6;
pub const SBT_MAX: u64 = 9223372036854775807;
pub const ITIMER_REAL: u32 = 0;
pub const ITIMER_VIRTUAL: u32 = 1;
pub const ITIMER_PROF: u32 = 2;
pub const _FOPEN: i32 = -1;
pub const _FREAD: u32 = 1;
pub const _FWRITE: u32 = 2;
pub const _FAPPEND: u32 = 8;
pub const _FMARK: u32 = 16;
pub const _FDEFER: u32 = 32;
pub const _FASYNC: u32 = 64;
pub const _FSHLOCK: u32 = 128;
pub const _FEXLOCK: u32 = 256;
pub const _FCREAT: u32 = 512;
pub const _FTRUNC: u32 = 1024;
pub const _FEXCL: u32 = 2048;
pub const _FNBIO: u32 = 4096;
pub const _FSYNC: u32 = 8192;
pub const _FNONBLOCK: u32 = 16384;
pub const _FNDELAY: u32 = 16384;
pub const _FNOCTTY: u32 = 32768;
pub const O_RDONLY: u32 = 0;
pub const O_WRONLY: u32 = 1;
pub const O_RDWR: u32 = 2;
pub const O_APPEND: u32 = 8;
pub const O_CREAT: u32 = 512;
pub const O_TRUNC: u32 = 1024;
pub const O_EXCL: u32 = 2048;
pub const O_SYNC: u32 = 8192;
pub const O_NONBLOCK: u32 = 16384;
pub const O_NOCTTY: u32 = 32768;
pub const FAPPEND: u32 = 8;
pub const FSYNC: u32 = 8192;
pub const FASYNC: u32 = 64;
pub const FNBIO: u32 = 4096;
pub const FNONBIO: u32 = 16384;
pub const FNDELAY: u32 = 16384;
pub const FREAD: u32 = 1;
pub const FWRITE: u32 = 2;
pub const FMARK: u32 = 16;
pub const FDEFER: u32 = 32;
pub const FSHLOCK: u32 = 128;
pub const FEXLOCK: u32 = 256;
pub const FOPEN: i32 = -1;
pub const FCREAT: u32 = 512;
pub const FTRUNC: u32 = 1024;
pub const FEXCL: u32 = 2048;
pub const FNOCTTY: u32 = 32768;
pub const FNONBLOCK: u32 = 16384;
pub const FD_CLOEXEC: u32 = 1;
pub const F_DUPFD: u32 = 0;
pub const F_GETFD: u32 = 1;
pub const F_SETFD: u32 = 2;
pub const F_GETFL: u32 = 3;
pub const F_SETFL: u32 = 4;
pub const F_GETOWN: u32 = 5;
pub const F_SETOWN: u32 = 6;
pub const F_GETLK: u32 = 7;
pub const F_SETLK: u32 = 8;
pub const F_SETLKW: u32 = 9;
pub const F_RGETLK: u32 = 10;
pub const F_RSETLK: u32 = 11;
pub const F_CNVT: u32 = 12;
pub const F_RSETLKW: u32 = 13;
pub const F_DUPFD_CLOEXEC: u32 = 14;
pub const F_RDLCK: u32 = 1;
pub const F_WRLCK: u32 = 2;
pub const F_UNLCK: u32 = 3;
pub const F_UNLKSYS: u32 = 4;
pub const AT_FDCWD: i32 = -2;
pub const AT_EACCESS: u32 = 1;
pub const AT_SYMLINK_NOFOLLOW: u32 = 2;
pub const AT_SYMLINK_FOLLOW: u32 = 4;
pub const AT_REMOVEDIR: u32 = 8;
pub const LOCK_SH: u32 = 1;
pub const LOCK_EX: u32 = 2;
pub const LOCK_NB: u32 = 4;
pub const LOCK_UN: u32 = 8;
pub const _IFMT: u32 = 61440;
pub const _IFDIR: u32 = 16384;
pub const _IFCHR: u32 = 8192;
pub const _IFBLK: u32 = 24576;
pub const _IFREG: u32 = 32768;
pub const _IFLNK: u32 = 40960;
pub const _IFSOCK: u32 = 49152;
pub const _IFIFO: u32 = 4096;
pub const S_BLKSIZE: u32 = 1024;
pub const S_ISUID: u32 = 2048;
pub const S_ISGID: u32 = 1024;
pub const S_ISVTX: u32 = 512;
pub const S_IREAD: u32 = 256;
pub const S_IWRITE: u32 = 128;
pub const S_IEXEC: u32 = 64;
pub const S_ENFMT: u32 = 1024;
pub const S_IFMT: u32 = 61440;
pub const S_IFDIR: u32 = 16384;
pub const S_IFCHR: u32 = 8192;
pub const S_IFBLK: u32 = 24576;
pub const S_IFREG: u32 = 32768;
pub const S_IFLNK: u32 = 40960;
pub const S_IFSOCK: u32 = 49152;
pub const S_IFIFO: u32 = 4096;
pub const S_IRUSR: u32 = 256;
pub const S_IWUSR: u32 = 128;
pub const S_IXUSR: u32 = 64;
pub const S_IRGRP: u32 = 32;
pub const S_IWGRP: u32 = 16;
pub const S_IXGRP: u32 = 8;
pub const S_IROTH: u32 = 4;
pub const S_IWOTH: u32 = 2;
pub const S_IXOTH: u32 = 1;
pub const DEFFILEMODE: u32 = 438;
pub const ESP_TASK_PRIO_MAX: u32 = 25;
pub const ESP_TASK_PRIO_MIN: u32 = 0;
pub const ESP_TASK_BT_CONTROLLER_PRIO: u32 = 23;
pub const TASK_EXTRA_STACK_SIZE: u32 = 512;
pub const BT_TASK_EXTRA_STACK_SIZE: u32 = 512;
pub const ESP_TASK_BT_CONTROLLER_STACK: u32 = 4096;
pub const ESP_TASK_TIMER_PRIO: u32 = 22;
pub const ESP_TASKD_EVENT_PRIO: u32 = 20;
pub const ESP_TASK_TCPIP_PRIO: u32 = 18;
pub const ESP_TASK_MAIN_PRIO: u32 = 1;
pub const SYS_LIGHTWEIGHT_PROT: u32 = 1;
pub const MEM_LIBC_MALLOC: u32 = 1;
pub const MEMP_MEM_MALLOC: u32 = 1;
pub const MEM_ALIGNMENT: u32 = 4;
pub const MEMP_NUM_NETCONN: u32 = 10;
pub const MEMP_NUM_RAW_PCB: u32 = 16;
pub const MEMP_NUM_TCP_PCB: u32 = 16;
pub const MEMP_NUM_TCP_PCB_LISTEN: u32 = 16;
pub const MEMP_NUM_UDP_PCB: u32 = 16;
pub const ARP_QUEUEING: u32 = 1;
pub const IP_REASS_MAXAGE: u32 = 3;
pub const IP_REASS_MAX_PBUFS: u32 = 10;
pub const LWIP_RAW: u32 = 1;
pub const LWIP_DHCP: u32 = 1;
pub const DHCP_MAXRTX: u32 = 0;
pub const DHCP_DOES_ARP_CHECK: u32 = 1;
pub const LWIP_IGMP: u32 = 1;
pub const LWIP_DNS: u32 = 1;
pub const DNS_MAX_SERVERS: u32 = 3;
pub const DNS_FALLBACK_SERVER_INDEX: u32 = 2;
pub const TCP_LISTEN_BACKLOG: u32 = 1;
pub const LWIP_NETIF_HOSTNAME: u32 = 1;
pub const LWIP_NETIF_TX_SINGLE_PBUF: u32 = 1;
pub const LWIP_NETIF_LOOPBACK: u32 = 1;
pub const LWIP_LOOPBACK_MAX_PBUFS: u32 = 8;
pub const TCPIP_THREAD_NAME: &'static [u8; 4usize] = b"tiT\0";
pub const TCPIP_THREAD_PRIO: u32 = 18;
pub const DEFAULT_ACCEPTMBOX_SIZE: u32 = 6;
pub const DEFAULT_THREAD_PRIO: u32 = 18;
pub const DEFAULT_RAW_RECVMBOX_SIZE: u32 = 6;
pub const LWIP_TCPIP_CORE_LOCKING: u32 = 0;
pub const LWIP_SO_SNDTIMEO: u32 = 1;
pub const LWIP_SO_RCVTIMEO: u32 = 1;
pub const LWIP_TCP_KEEPALIVE: u32 = 1;
pub const SO_REUSE: u32 = 1;
pub const SO_REUSE_RXTOALL: u32 = 1;
pub const LWIP_IPV6: u32 = 1;
pub const LWIP_POSIX_SOCKETS_IO_NAMES: u32 = 0;
pub const LWIP_SOCKET_OFFSET: u32 = 54;
pub const ESP_LWIP: u32 = 1;
pub const ESP_LWIP_ARP: u32 = 1;
pub const ESP_PER_SOC_TCP_WND: u32 = 0;
pub const ESP_THREAD_SAFE: u32 = 1;
pub const ESP_DHCP: u32 = 1;
pub const ESP_DNS: u32 = 1;
pub const ESP_PERF: u32 = 0;
pub const ESP_RANDOM_TCP_PORT: u32 = 1;
pub const ESP_IP4_ATON: u32 = 1;
pub const ESP_LIGHT_SLEEP: u32 = 1;
pub const ESP_STATS_TCP: u32 = 0;
pub const ESP_DHCPS_TIMER: u32 = 1;
pub const ESP_PING: u32 = 1;
pub const ESP_HAS_SELECT: u32 = 1;
pub const ESP_AUTO_RECV: u32 = 1;
pub const ESP_IP4_ROUTE: u32 = 1;
pub const ESP_AUTO_IP: u32 = 1;
pub const ESP_PBUF: u32 = 1;
pub const ESP_PPP: u32 = 1;
pub const ESP_IPV6: u32 = 1;
pub const ESP_SOCKET: u32 = 1;
pub const ESP_LWIP_SELECT: u32 = 1;
pub const ESP_LWIP_LOCK: u32 = 1;
pub const ESP_LWIP_IGMP_TIMERS_ONDEMAND: u32 = 0;
pub const ESP_LWIP_MLD6_TIMERS_ONDEMAND: u32 = 0;
pub const CHECKSUM_CHECK_UDP: u32 = 0;
pub const CHECKSUM_CHECK_IP: u32 = 0;
pub const LWIP_NETCONN_FULLDUPLEX: u32 = 1;
pub const LWIP_NETCONN_SEM_PER_THREAD: u32 = 1;
pub const LWIP_DHCP_MAX_NTP_SERVERS: u32 = 1;
pub const LWIP_TIMEVAL_PRIVATE: u32 = 0;
pub const SNTP_SERVER_DNS: u32 = 1;
pub const __error_t_defined: u32 = 1;
pub const EPERM: u32 = 1;
pub const ENOENT: u32 = 2;
pub const ESRCH: u32 = 3;
pub const EINTR: u32 = 4;
pub const EIO: u32 = 5;
pub const ENXIO: u32 = 6;
pub const E2BIG: u32 = 7;
pub const ENOEXEC: u32 = 8;
pub const EBADF: u32 = 9;
pub const ECHILD: u32 = 10;
pub const EAGAIN: u32 = 11;
pub const ENOMEM: u32 = 12;
pub const EACCES: u32 = 13;
pub const EFAULT: u32 = 14;
pub const EBUSY: u32 = 16;
pub const EEXIST: u32 = 17;
pub const EXDEV: u32 = 18;
pub const ENODEV: u32 = 19;
pub const ENOTDIR: u32 = 20;
pub const EISDIR: u32 = 21;
pub const EINVAL: u32 = 22;
pub const ENFILE: u32 = 23;
pub const EMFILE: u32 = 24;
pub const ENOTTY: u32 = 25;
pub const ETXTBSY: u32 = 26;
pub const EFBIG: u32 = 27;
pub const ENOSPC: u32 = 28;
pub const ESPIPE: u32 = 29;
pub const EROFS: u32 = 30;
pub const EMLINK: u32 = 31;
pub const EPIPE: u32 = 32;
pub const EDOM: u32 = 33;
pub const ERANGE: u32 = 34;
pub const ENOMSG: u32 = 35;
pub const EIDRM: u32 = 36;
pub const EDEADLK: u32 = 45;
pub const ENOLCK: u32 = 46;
pub const ENOSTR: u32 = 60;
pub const ENODATA: u32 = 61;
pub const ETIME: u32 = 62;
pub const ENOSR: u32 = 63;
pub const ENOLINK: u32 = 67;
pub const EPROTO: u32 = 71;
pub const EMULTIHOP: u32 = 74;
pub const EBADMSG: u32 = 77;
pub const EFTYPE: u32 = 79;
pub const ENOSYS: u32 = 88;
pub const ENOTEMPTY: u32 = 90;
pub const ENAMETOOLONG: u32 = 91;
pub const ELOOP: u32 = 92;
pub const EOPNOTSUPP: u32 = 95;
pub const EPFNOSUPPORT: u32 = 96;
pub const ECONNRESET: u32 = 104;
pub const ENOBUFS: u32 = 105;
pub const EAFNOSUPPORT: u32 = 106;
pub const EPROTOTYPE: u32 = 107;
pub const ENOTSOCK: u32 = 108;
pub const ENOPROTOOPT: u32 = 109;
pub const ECONNREFUSED: u32 = 111;
pub const EADDRINUSE: u32 = 112;
pub const ECONNABORTED: u32 = 113;
pub const ENETUNREACH: u32 = 114;
pub const ENETDOWN: u32 = 115;
pub const ETIMEDOUT: u32 = 116;
pub const EHOSTDOWN: u32 = 117;
pub const EHOSTUNREACH: u32 = 118;
pub const EINPROGRESS: u32 = 119;
pub const EALREADY: u32 = 120;
pub const EDESTADDRREQ: u32 = 121;
pub const EMSGSIZE: u32 = 122;
pub const EPROTONOSUPPORT: u32 = 123;
pub const EADDRNOTAVAIL: u32 = 125;
pub const ENETRESET: u32 = 126;
pub const EISCONN: u32 = 127;
pub const ENOTCONN: u32 = 128;
pub const ETOOMANYREFS: u32 = 129;
pub const EDQUOT: u32 = 132;
pub const ESTALE: u32 = 133;
pub const ENOTSUP: u32 = 134;
pub const EILSEQ: u32 = 138;
pub const EOVERFLOW: u32 = 139;
pub const ECANCELED: u32 = 140;
pub const ENOTRECOVERABLE: u32 = 141;
pub const EOWNERDEAD: u32 = 142;
pub const EWOULDBLOCK: u32 = 11;
pub const __ELASTERROR: u32 = 2000;
pub const ERR_NEED_SCHED: u32 = 123;
pub const LWIP_COMPAT_MUTEX: u32 = 0;
pub const LWIP_NOASSERT: u32 = 1;
pub const S16_F: &'static [u8; 2usize] = b"d\0";
pub const U16_F: &'static [u8; 2usize] = b"d\0";
pub const X16_F: &'static [u8; 2usize] = b"x\0";
pub const S32_F: &'static [u8; 2usize] = b"d\0";
pub const U32_F: &'static [u8; 2usize] = b"d\0";
pub const X32_F: &'static [u8; 2usize] = b"x\0";
pub const LWIP_NO_STDDEF_H: u32 = 0;
pub const LWIP_NO_STDINT_H: u32 = 0;
pub const LWIP_HAVE_INT64: u32 = 1;
pub const LWIP_NO_INTTYPES_H: u32 = 0;
pub const X8_F: &'static [u8; 3usize] = b"02\0";
pub const LWIP_NO_LIMITS_H: u32 = 0;
pub const LWIP_UINT32_MAX: u32 = 4294967295;
pub const LWIP_NO_CTYPE_H: u32 = 0;
pub const _U: u32 = 1;
pub const _L: u32 = 2;
pub const _N: u32 = 4;
pub const _S: u32 = 8;
pub const _P: u32 = 16;
pub const _C: u32 = 32;
pub const _X: u32 = 64;
pub const _B: u32 = 128;
pub const LWIP_DBG_LEVEL_ALL: u32 = 0;
pub const LWIP_DBG_LEVEL_WARNING: u32 = 1;
pub const LWIP_DBG_LEVEL_SERIOUS: u32 = 2;
pub const LWIP_DBG_LEVEL_SEVERE: u32 = 3;
pub const LWIP_DBG_MASK_LEVEL: u32 = 3;
pub const LWIP_DBG_LEVEL_OFF: u32 = 0;
pub const LWIP_DBG_ON: u32 = 128;
pub const LWIP_DBG_OFF: u32 = 0;
pub const LWIP_DBG_TRACE: u32 = 64;
pub const LWIP_DBG_STATE: u32 = 32;
pub const LWIP_DBG_FRESH: u32 = 16;
pub const LWIP_DBG_HALT: u32 = 8;
pub const NO_SYS: u32 = 0;
pub const LWIP_TIMERS: u32 = 1;
pub const LWIP_TIMERS_CUSTOM: u32 = 0;
pub const LWIP_MPU_COMPATIBLE: u32 = 0;
pub const LWIP_TCPIP_CORE_LOCKING_INPUT: u32 = 0;
pub const MEMP_MEM_INIT: u32 = 0;
pub const MEM_SIZE: u32 = 1600;
pub const MEMP_OVERFLOW_CHECK: u32 = 0;
pub const MEMP_SANITY_CHECK: u32 = 0;
pub const MEM_OVERFLOW_CHECK: u32 = 0;
pub const MEM_SANITY_CHECK: u32 = 0;
pub const MEM_USE_POOLS: u32 = 0;
pub const MEM_USE_POOLS_TRY_BIGGER_POOL: u32 = 0;
pub const MEMP_USE_CUSTOM_POOLS: u32 = 0;
pub const LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT: u32 = 0;
pub const MEMP_NUM_PBUF: u32 = 16;
pub const MEMP_NUM_TCP_SEG: u32 = 16;
pub const MEMP_NUM_ALTCP_PCB: u32 = 16;
pub const MEMP_NUM_REASSDATA: u32 = 5;
pub const MEMP_NUM_FRAG_PBUF: u32 = 15;
pub const MEMP_NUM_ARP_QUEUE: u32 = 30;
pub const MEMP_NUM_IGMP_GROUP: u32 = 8;
pub const MEMP_NUM_NETBUF: u32 = 2;
pub const MEMP_NUM_SELECT_CB: u32 = 4;
pub const MEMP_NUM_TCPIP_MSG_API: u32 = 8;
pub const MEMP_NUM_TCPIP_MSG_INPKT: u32 = 8;
pub const MEMP_NUM_NETDB: u32 = 1;
pub const MEMP_NUM_LOCALHOSTLIST: u32 = 1;
pub const PBUF_POOL_SIZE: u32 = 16;
pub const MEMP_NUM_API_MSG: u32 = 8;
pub const MEMP_NUM_DNS_API_MSG: u32 = 8;
pub const MEMP_NUM_SOCKET_SETGETSOCKOPT_DATA: u32 = 8;
pub const MEMP_NUM_NETIFAPI_MSG: u32 = 8;
pub const LWIP_ARP: u32 = 1;
pub const ARP_TABLE_SIZE: u32 = 10;
pub const ARP_MAXAGE: u32 = 300;
pub const ARP_QUEUE_LEN: u32 = 3;
pub const ETHARP_SUPPORT_VLAN: u32 = 0;
pub const LWIP_ETHERNET: u32 = 1;
pub const ETH_PAD_SIZE: u32 = 0;
pub const ETHARP_SUPPORT_STATIC_ENTRIES: u32 = 0;
pub const LWIP_IPV4: u32 = 1;
pub const IP_OPTIONS_ALLOWED: u32 = 1;
pub const IP_DEFAULT_TTL: u32 = 255;
pub const IP_SOF_BROADCAST: u32 = 0;
pub const IP_SOF_BROADCAST_RECV: u32 = 0;
pub const IP_FORWARD_ALLOW_TX_ON_RX_NETIF: u32 = 0;
pub const LWIP_ICMP: u32 = 1;
pub const ICMP_TTL: u32 = 255;
pub const RAW_TTL: u32 = 255;
pub const LWIP_DHCP_BOOTP_FILE: u32 = 0;
pub const LWIP_DHCP_GET_NTP_SRV: u32 = 0;
pub const LWIP_DHCP_MAX_DNS_SERVERS: u32 = 3;
pub const LWIP_AUTOIP: u32 = 0;
pub const LWIP_DHCP_AUTOIP_COOP: u32 = 0;
pub const ESP_IPV6_AUTOCONFIG: u32 = 0;
pub const LWIP_DHCP_AUTOIP_COOP_TRIES: u32 = 9;
pub const LWIP_MIB2_CALLBACKS: u32 = 0;
pub const DNS_TABLE_SIZE: u32 = 4;
pub const DNS_MAX_NAME_LENGTH: u32 = 256;
pub const DNS_MAX_RETRIES: u32 = 4;
pub const DNS_DOES_NAME_CHECK: u32 = 1;
pub const LWIP_DNS_SECURE_RAND_XID: u32 = 1;
pub const LWIP_DNS_SECURE_NO_MULTIPLE_OUTSTANDING: u32 = 2;
pub const LWIP_DNS_SECURE_RAND_SRC_PORT: u32 = 4;
pub const DNS_LOCAL_HOSTLIST: u32 = 0;
pub const DNS_LOCAL_HOSTLIST_IS_DYNAMIC: u32 = 0;
pub const LWIP_UDP: u32 = 1;
pub const LWIP_UDPLITE: u32 = 0;
pub const UDP_TTL: u32 = 255;
pub const LWIP_TCP: u32 = 1;
pub const TCP_TTL: u32 = 255;
pub const LWIP_TCP_MAX_SACK_NUM: u32 = 4;
pub const TCP_CALCULATE_EFF_SEND_MSS: u32 = 1;
pub const TCP_OOSEQ_MAX_BYTES: u32 = 0;
pub const TCP_OOSEQ_MAX_PBUFS: u32 = 0;
pub const TCP_DEFAULT_LISTEN_BACKLOG: u32 = 255;
pub const LWIP_TCP_TIMESTAMPS: u32 = 0;
pub const LWIP_EVENT_API: u32 = 0;
pub const LWIP_CALLBACK_API: u32 = 1;
pub const LWIP_WND_SCALE: u32 = 0;
pub const TCP_RCV_SCALE: u32 = 0;
pub const LWIP_TCP_PCB_NUM_EXT_ARGS: u32 = 0;
pub const LWIP_ALTCP: u32 = 0;
pub const LWIP_ALTCP_TLS: u32 = 0;
pub const PBUF_LINK_HLEN: u32 = 14;
pub const PBUF_LINK_ENCAPSULATION_HLEN: u32 = 0;
pub const LWIP_SINGLE_NETIF: u32 = 0;
pub const LWIP_NETIF_API: u32 = 0;
pub const LWIP_NETIF_STATUS_CALLBACK: u32 = 0;
pub const LWIP_NETIF_EXT_STATUS_CALLBACK: u32 = 0;
pub const LWIP_NETIF_LINK_CALLBACK: u32 = 0;
pub const LWIP_NETIF_REMOVE_CALLBACK: u32 = 0;
pub const LWIP_NETIF_HWADDRHINT: u32 = 0;
pub const LWIP_NUM_NETIF_CLIENT_DATA: u32 = 0;
pub const LWIP_LOOPIF_MULTICAST: u32 = 0;
pub const SLIPIF_THREAD_NAME: &'static [u8; 12usize] = b"slipif_loop\0";
pub const SLIPIF_THREAD_STACKSIZE: u32 = 0;
pub const SLIPIF_THREAD_PRIO: u32 = 1;
pub const DEFAULT_THREAD_NAME: &'static [u8; 5usize] = b"lwIP\0";
pub const LWIP_NETCONN: u32 = 1;
pub const LWIP_TCPIP_TIMEOUT: u32 = 0;
pub const LWIP_SOCKET: u32 = 1;
pub const LWIP_COMPAT_SOCKETS: u32 = 1;
pub const LWIP_SO_SNDRCVTIMEO_NONSTANDARD: u32 = 0;
pub const LWIP_TCP_CLOSE_TIMEOUT_MS_DEFAULT: u32 = 20000;
pub const LWIP_FIONREAD_LINUXMODE: u32 = 0;
pub const LWIP_SOCKET_SELECT: u32 = 1;
pub const LWIP_SOCKET_POLL: u32 = 1;
pub const LINK_STATS: u32 = 0;
pub const ETHARP_STATS: u32 = 0;
pub const IP_STATS: u32 = 0;
pub const IPFRAG_STATS: u32 = 0;
pub const ICMP_STATS: u32 = 0;
pub const IGMP_STATS: u32 = 0;
pub const UDP_STATS: u32 = 0;
pub const TCP_STATS: u32 = 0;
pub const MEM_STATS: u32 = 0;
pub const MEMP_STATS: u32 = 0;
pub const SYS_STATS: u32 = 0;
pub const LWIP_STATS_DISPLAY: u32 = 0;
pub const IP6_STATS: u32 = 0;
pub const ICMP6_STATS: u32 = 0;
pub const IP6_FRAG_STATS: u32 = 0;
pub const MLD6_STATS: u32 = 0;
pub const ND6_STATS: u32 = 0;
pub const MIB2_STATS: u32 = 0;
pub const LWIP_CHECKSUM_CTRL_PER_NETIF: u32 = 0;
pub const CHECKSUM_GEN_IP: u32 = 1;
pub const CHECKSUM_GEN_UDP: u32 = 1;
pub const CHECKSUM_GEN_TCP: u32 = 1;
pub const CHECKSUM_GEN_ICMP: u32 = 1;
pub const CHECKSUM_GEN_ICMP6: u32 = 1;
pub const CHECKSUM_CHECK_TCP: u32 = 1;
pub const CHECKSUM_CHECK_ICMP: u32 = 1;
pub const CHECKSUM_CHECK_ICMP6: u32 = 1;
pub const LWIP_CHECKSUM_ON_COPY: u32 = 0;
pub const IPV6_REASS_MAXAGE: u32 = 60;
pub const LWIP_IPV6_SCOPES_DEBUG: u32 = 0;
pub const LWIP_IPV6_NUM_ADDRESSES: u32 = 3;
pub const LWIP_IPV6_FORWARD: u32 = 0;
pub const LWIP_IPV6_FRAG: u32 = 1;
pub const LWIP_IPV6_REASS: u32 = 1;
pub const LWIP_IPV6_SEND_ROUTER_SOLICIT: u32 = 1;
pub const LWIP_IPV6_AUTOCONFIG: u32 = 1;
pub const LWIP_IPV6_ADDRESS_LIFETIMES: u32 = 1;
pub const LWIP_IPV6_DUP_DETECT_ATTEMPTS: u32 = 1;
pub const LWIP_ICMP6: u32 = 1;
pub const LWIP_ICMP6_DATASIZE: u32 = 8;
pub const LWIP_ICMP6_HL: u32 = 255;
pub const LWIP_IPV6_MLD: u32 = 1;
pub const MEMP_NUM_MLD6_GROUP: u32 = 4;
pub const LWIP_ND6_QUEUEING: u32 = 1;
pub const MEMP_NUM_ND6_QUEUE: u32 = 20;
pub const LWIP_ND6_NUM_NEIGHBORS: u32 = 10;
pub const LWIP_ND6_NUM_DESTINATIONS: u32 = 10;
pub const LWIP_ND6_NUM_PREFIXES: u32 = 5;
pub const LWIP_ND6_NUM_ROUTERS: u32 = 3;
pub const LWIP_ND6_MAX_MULTICAST_SOLICIT: u32 = 3;
pub const LWIP_ND6_MAX_UNICAST_SOLICIT: u32 = 3;
pub const LWIP_ND6_MAX_ANYCAST_DELAY_TIME: u32 = 1000;
pub const LWIP_ND6_MAX_NEIGHBOR_ADVERTISEMENT: u32 = 3;
pub const LWIP_ND6_REACHABLE_TIME: u32 = 30000;
pub const LWIP_ND6_RETRANS_TIMER: u32 = 1000;
pub const LWIP_ND6_DELAY_FIRST_PROBE_TIME: u32 = 5000;
pub const LWIP_ND6_ALLOW_RA_UPDATES: u32 = 1;
pub const LWIP_ND6_TCP_REACHABILITY_HINTS: u32 = 1;
pub const LWIP_ND6_RDNSS_MAX_DNS_SERVERS: u32 = 0;
pub const LWIP_IPV6_DHCP6: u32 = 0;
pub const LWIP_IPV6_DHCP6_STATEFUL: u32 = 0;
pub const LWIP_IPV6_DHCP6_STATELESS: u32 = 0;
pub const LWIP_DHCP6_GET_NTP_SRV: u32 = 0;
pub const LWIP_DHCP6_MAX_NTP_SERVERS: u32 = 1;
pub const LWIP_DHCP6_MAX_DNS_SERVERS: u32 = 3;
pub const LWIP_DBG_MIN_LEVEL: u32 = 0;
pub const LWIP_DBG_TYPES_ON: u32 = 128;
pub const API_MSG_DEBUG: u32 = 0;
pub const IGMP_DEBUG: u32 = 0;
pub const INET_DEBUG: u32 = 0;
pub const IP_REASS_DEBUG: u32 = 0;
pub const RAW_DEBUG: u32 = 0;
pub const MEM_DEBUG: u32 = 0;
pub const SYS_DEBUG: u32 = 0;
pub const TIMERS_DEBUG: u32 = 0;
pub const TCP_FR_DEBUG: u32 = 0;
pub const TCP_RTO_DEBUG: u32 = 0;
pub const TCP_CWND_DEBUG: u32 = 0;
pub const TCP_WND_DEBUG: u32 = 0;
pub const TCP_RST_DEBUG: u32 = 0;
pub const TCP_QLEN_DEBUG: u32 = 0;
pub const UDP_DEBUG: u32 = 0;
pub const SLIP_DEBUG: u32 = 0;
pub const AUTOIP_DEBUG: u32 = 0;
pub const DNS_DEBUG: u32 = 0;
pub const IP6_DEBUG: u32 = 0;
pub const DHCP6_DEBUG: u32 = 0;
pub const LWIP_TESTMODE: u32 = 0;
pub const NAPT_DEBUG: u32 = 0;
pub const LWIP_PERF: u32 = 0;
pub const IP_CLASSA_NET: u32 = 4278190080;
pub const IP_CLASSA_NSHIFT: u32 = 24;
pub const IP_CLASSA_HOST: u32 = 16777215;
pub const IP_CLASSA_MAX: u32 = 128;
pub const IP_CLASSB_NET: u32 = 4294901760;
pub const IP_CLASSB_NSHIFT: u32 = 16;
pub const IP_CLASSB_HOST: u32 = 65535;
pub const IP_CLASSB_MAX: u32 = 65536;
pub const IP_CLASSC_NET: u32 = 4294967040;
pub const IP_CLASSC_NSHIFT: u32 = 8;
pub const IP_CLASSC_HOST: u32 = 255;
pub const IP_CLASSD_NET: u32 = 4026531840;
pub const IP_CLASSD_NSHIFT: u32 = 28;
pub const IP_CLASSD_HOST: u32 = 268435455;
pub const IP_LOOPBACKNET: u32 = 127;
pub const IP4ADDR_STRLEN_MAX: u32 = 16;
pub const IP6_NO_ZONE: u32 = 0;
pub const IPV6_CUSTOM_SCOPES: u32 = 0;
pub const IP6_MULTICAST_SCOPE_RESERVED: u32 = 0;
pub const IP6_MULTICAST_SCOPE_RESERVED0: u32 = 0;
pub const IP6_MULTICAST_SCOPE_INTERFACE_LOCAL: u32 = 1;
pub const IP6_MULTICAST_SCOPE_LINK_LOCAL: u32 = 2;
pub const IP6_MULTICAST_SCOPE_RESERVED3: u32 = 3;
pub const IP6_MULTICAST_SCOPE_ADMIN_LOCAL: u32 = 4;
pub const IP6_MULTICAST_SCOPE_SITE_LOCAL: u32 = 5;
pub const IP6_MULTICAST_SCOPE_ORGANIZATION_LOCAL: u32 = 8;
pub const IP6_MULTICAST_SCOPE_GLOBAL: u32 = 14;
pub const IP6_MULTICAST_SCOPE_RESERVEDF: u32 = 15;
pub const IP6_ADDR_INVALID: u32 = 0;
pub const IP6_ADDR_TENTATIVE: u32 = 8;
pub const IP6_ADDR_TENTATIVE_1: u32 = 9;
pub const IP6_ADDR_TENTATIVE_2: u32 = 10;
pub const IP6_ADDR_TENTATIVE_3: u32 = 11;
pub const IP6_ADDR_TENTATIVE_4: u32 = 12;
pub const IP6_ADDR_TENTATIVE_5: u32 = 13;
pub const IP6_ADDR_TENTATIVE_6: u32 = 14;
pub const IP6_ADDR_TENTATIVE_7: u32 = 15;
pub const IP6_ADDR_VALID: u32 = 16;
pub const IP6_ADDR_PREFERRED: u32 = 48;
pub const IP6_ADDR_DEPRECATED: u32 = 16;
pub const IP6_ADDR_DUPLICATED: u32 = 64;
pub const IP6_ADDR_TENTATIVE_COUNT_MASK: u32 = 7;
pub const IP6_ADDR_LIFE_STATIC: u32 = 0;
pub const IP6_ADDR_LIFE_INFINITE: u32 = 4294967295;
pub const IP6ADDR_STRLEN_MAX: u32 = 46;
pub const IPADDR_STRLEN_MAX: u32 = 46;
pub const IN_CLASSA_NET: u32 = 4278190080;
pub const IN_CLASSA_NSHIFT: u32 = 24;
pub const IN_CLASSA_HOST: u32 = 16777215;
pub const IN_CLASSA_MAX: u32 = 128;
pub const IN_CLASSB_NET: u32 = 4294901760;
pub const IN_CLASSB_NSHIFT: u32 = 16;
pub const IN_CLASSB_HOST: u32 = 65535;
pub const IN_CLASSB_MAX: u32 = 65536;
pub const IN_CLASSC_NET: u32 = 4294967040;
pub const IN_CLASSC_NSHIFT: u32 = 8;
pub const IN_CLASSC_HOST: u32 = 255;
pub const IN_CLASSD_NET: u32 = 4026531840;
pub const IN_CLASSD_NSHIFT: u32 = 28;
pub const IN_CLASSD_HOST: u32 = 268435455;
pub const IN_LOOPBACKNET: u32 = 127;
pub const INET_ADDRSTRLEN: u32 = 16;
pub const INET6_ADDRSTRLEN: u32 = 46;
pub const POLLIN: u32 = 1;
pub const POLLRDNORM: u32 = 2;
pub const POLLRDBAND: u32 = 4;
pub const POLLPRI: u32 = 4;
pub const POLLOUT: u32 = 8;
pub const POLLWRNORM: u32 = 8;
pub const POLLWRBAND: u32 = 16;
pub const POLLERR: u32 = 32;
pub const POLLHUP: u32 = 64;
pub const POLLNVAL: u32 = 128;
pub const PBUF_TRANSPORT_HLEN: u32 = 20;
pub const PBUF_IP_HLEN: u32 = 40;
pub const PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS: u32 = 128;
pub const PBUF_TYPE_FLAG_DATA_VOLATILE: u32 = 64;
pub const PBUF_TYPE_ALLOC_SRC_MASK: u32 = 15;
pub const PBUF_ALLOC_FLAG_RX: u32 = 256;
pub const PBUF_ALLOC_FLAG_DATA_CONTIGUOUS: u32 = 512;
pub const PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP: u32 = 0;
pub const PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF: u32 = 1;
pub const PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF_POOL: u32 = 2;
pub const PBUF_TYPE_ALLOC_SRC_MASK_APP_MIN: u32 = 3;
pub const PBUF_TYPE_ALLOC_SRC_MASK_APP_MAX: u32 = 15;
pub const PBUF_FLAG_PUSH: u32 = 1;
pub const PBUF_FLAG_IS_CUSTOM: u32 = 2;
pub const PBUF_FLAG_MCASTLOOP: u32 = 4;
pub const PBUF_FLAG_LLBCAST: u32 = 8;
pub const PBUF_FLAG_LLMCAST: u32 = 16;
pub const PBUF_FLAG_TCP_FIN: u32 = 32;
pub const PBUF_POOL_FREE_OOSEQ: u32 = 1;
pub const MEMP_SIZE: u32 = 0;
pub const NETIF_MAX_HWADDR_LEN: u32 = 6;
pub const NETIF_NAMESIZE: u32 = 6;
pub const NETIF_FLAG_UP: u32 = 1;
pub const NETIF_FLAG_BROADCAST: u32 = 2;
pub const NETIF_FLAG_LINK_UP: u32 = 4;
pub const NETIF_FLAG_ETHARP: u32 = 8;
pub const NETIF_FLAG_ETHERNET: u32 = 16;
pub const NETIF_FLAG_IGMP: u32 = 32;
pub const NETIF_FLAG_MLD6: u32 = 64;
pub const NETIF_ADDR_IDX_MAX: u32 = 127;
pub const LWIP_NETIF_USE_HINTS: u32 = 0;
pub const NETIF_NO_INDEX: u32 = 0;
pub const LWIP_NSC_NONE: u32 = 0;
pub const LWIP_NSC_NETIF_ADDED: u32 = 1;
pub const LWIP_NSC_NETIF_REMOVED: u32 = 2;
pub const LWIP_NSC_LINK_CHANGED: u32 = 4;
pub const LWIP_NSC_STATUS_CHANGED: u32 = 8;
pub const LWIP_NSC_IPV4_ADDRESS_CHANGED: u32 = 16;
pub const LWIP_NSC_IPV4_GATEWAY_CHANGED: u32 = 32;
pub const LWIP_NSC_IPV4_NETMASK_CHANGED: u32 = 64;
pub const LWIP_NSC_IPV4_SETTINGS_CHANGED: u32 = 128;
pub const LWIP_NSC_IPV6_SET: u32 = 256;
pub const LWIP_NSC_IPV6_ADDR_STATE_CHANGED: u32 = 512;
pub const SIN_ZERO_LEN: u32 = 8;
pub const IOV_MAX: u32 = 65535;
pub const MSG_TRUNC: u32 = 4;
pub const MSG_CTRUNC: u32 = 8;
pub const IFNAMSIZ: u32 = 6;
pub const SOCK_STREAM: u32 = 1;
pub const SOCK_DGRAM: u32 = 2;
pub const SOCK_RAW: u32 = 3;
pub const SO_REUSEADDR: u32 = 4;
pub const SO_KEEPALIVE: u32 = 8;
pub const SO_BROADCAST: u32 = 32;
pub const SO_DEBUG: u32 = 1;
pub const SO_ACCEPTCONN: u32 = 2;
pub const SO_DONTROUTE: u32 = 16;
pub const SO_USELOOPBACK: u32 = 64;
pub const SO_LINGER: u32 = 128;
pub const SO_OOBINLINE: u32 = 256;
pub const SO_REUSEPORT: u32 = 512;
pub const SO_SNDBUF: u32 = 4097;
pub const SO_RCVBUF: u32 = 4098;
pub const SO_SNDLOWAT: u32 = 4099;
pub const SO_RCVLOWAT: u32 = 4100;
pub const SO_SNDTIMEO: u32 = 4101;
pub const SO_RCVTIMEO: u32 = 4102;
pub const SO_ERROR: u32 = 4103;
pub const SO_TYPE: u32 = 4104;
pub const SO_CONTIMEO: u32 = 4105;
pub const SO_NO_CHECK: u32 = 4106;
pub const SO_BINDTODEVICE: u32 = 4107;
pub const SOL_SOCKET: u32 = 4095;
pub const AF_UNSPEC: u32 = 0;
pub const AF_INET: u32 = 2;
pub const AF_INET6: u32 = 10;
pub const PF_INET: u32 = 2;
pub const PF_INET6: u32 = 10;
pub const PF_UNSPEC: u32 = 0;
pub const IPPROTO_IP: u32 = 0;
pub const IPPROTO_ICMP: u32 = 1;
pub const IPPROTO_TCP: u32 = 6;
pub const IPPROTO_UDP: u32 = 17;
pub const IPPROTO_IPV6: u32 = 41;
pub const IPPROTO_ICMPV6: u32 = 58;
pub const IPPROTO_UDPLITE: u32 = 136;
pub const IPPROTO_RAW: u32 = 255;
pub const MSG_PEEK: u32 = 1;
pub const MSG_WAITALL: u32 = 2;
pub const MSG_OOB: u32 = 4;
pub const MSG_DONTWAIT: u32 = 8;
pub const MSG_MORE: u32 = 16;
pub const MSG_NOSIGNAL: u32 = 32;
pub const IP_TOS: u32 = 1;
pub const IP_TTL: u32 = 2;
pub const IP_PKTINFO: u32 = 8;
pub const TCP_NODELAY: u32 = 1;
pub const TCP_KEEPALIVE: u32 = 2;
pub const TCP_KEEPIDLE: u32 = 3;
pub const TCP_KEEPINTVL: u32 = 4;
pub const TCP_KEEPCNT: u32 = 5;
pub const IPV6_CHECKSUM: u32 = 7;
pub const IPV6_V6ONLY: u32 = 27;
pub const IP_MULTICAST_TTL: u32 = 5;
pub const IP_MULTICAST_IF: u32 = 6;
pub const IP_MULTICAST_LOOP: u32 = 7;
pub const IP_ADD_MEMBERSHIP: u32 = 3;
pub const IP_DROP_MEMBERSHIP: u32 = 4;
pub const IPV6_JOIN_GROUP: u32 = 12;
pub const IPV6_ADD_MEMBERSHIP: u32 = 12;
pub const IPV6_LEAVE_GROUP: u32 = 13;
pub const IPV6_DROP_MEMBERSHIP: u32 = 13;
pub const IPV6_MULTICAST_IF: u32 = 768;
pub const IPV6_MULTICAST_HOPS: u32 = 769;
pub const IPV6_MULTICAST_LOOP: u32 = 770;
pub const IPTOS_TOS_MASK: u32 = 30;
pub const IPTOS_LOWDELAY: u32 = 16;
pub const IPTOS_THROUGHPUT: u32 = 8;
pub const IPTOS_RELIABILITY: u32 = 4;
pub const IPTOS_LOWCOST: u32 = 2;
pub const IPTOS_MINCOST: u32 = 2;
pub const IPTOS_PREC_MASK: u32 = 224;
pub const IPTOS_PREC_NETCONTROL: u32 = 224;
pub const IPTOS_PREC_INTERNETCONTROL: u32 = 192;
pub const IPTOS_PREC_CRITIC_ECP: u32 = 160;
pub const IPTOS_PREC_FLASHOVERRIDE: u32 = 128;
pub const IPTOS_PREC_FLASH: u32 = 96;
pub const IPTOS_PREC_IMMEDIATE: u32 = 64;
pub const IPTOS_PREC_PRIORITY: u32 = 32;
pub const IPTOS_PREC_ROUTINE: u32 = 0;
pub const IOCPARM_MASK: u32 = 127;
pub const IOC_VOID: u32 = 536870912;
pub const IOC_OUT: u32 = 1073741824;
pub const IOC_IN: u32 = 2147483648;
pub const IOC_INOUT: u32 = 3221225472;
pub const O_NDELAY: u32 = 16384;
pub const SHUT_RD: u32 = 0;
pub const SHUT_WR: u32 = 1;
pub const SHUT_RDWR: u32 = 2;
pub const LWIP_SELECT_MAXNFDS: u32 = 64;
pub const LWIP_DNS_API_DECLARE_H_ERRNO: u32 = 1;
pub const LWIP_DNS_API_DEFINE_ERRORS: u32 = 1;
pub const LWIP_DNS_API_DEFINE_FLAGS: u32 = 1;
pub const LWIP_DNS_API_DECLARE_STRUCTS: u32 = 1;
pub const EAI_NONAME: u32 = 200;
pub const EAI_SERVICE: u32 = 201;
pub const EAI_FAIL: u32 = 202;
pub const EAI_MEMORY: u32 = 203;
pub const EAI_FAMILY: u32 = 204;
pub const HOST_NOT_FOUND: u32 = 210;
pub const NO_DATA: u32 = 211;
pub const NO_RECOVERY: u32 = 212;
pub const TRY_AGAIN: u32 = 213;
pub const AI_PASSIVE: u32 = 1;
pub const AI_CANONNAME: u32 = 2;
pub const AI_NUMERICHOST: u32 = 4;
pub const AI_NUMERICSERV: u32 = 8;
pub const AI_V4MAPPED: u32 = 16;
pub const AI_ALL: u32 = 32;
pub const AI_ADDRCONFIG: u32 = 64;
pub type __int8_t = libc::c_schar;
pub type __uint8_t = libc::c_uchar;
pub type __int16_t = libc::c_short;
pub type __uint16_t = libc::c_ushort;
pub type __int32_t = libc::c_int;
pub type __uint32_t = libc::c_uint;
pub type __int64_t = libc::c_longlong;
pub type __uint64_t = libc::c_ulonglong;
pub type __int_least8_t = libc::c_schar;
pub type __uint_least8_t = libc::c_uchar;
pub type __int_least16_t = libc::c_short;
pub type __uint_least16_t = libc::c_ushort;
pub type __int_least32_t = libc::c_int;
pub type __uint_least32_t = libc::c_uint;
pub type __int_least64_t = libc::c_longlong;
pub type __uint_least64_t = libc::c_ulonglong;
pub type __intmax_t = libc::c_longlong;
pub type __uintmax_t = libc::c_ulonglong;
pub type __intptr_t = libc::c_int;
pub type __uintptr_t = libc::c_uint;
pub type intmax_t = __intmax_t;
pub type uintmax_t = __uintmax_t;
pub type int_least8_t = __int_least8_t;
pub type uint_least8_t = __uint_least8_t;
pub type int_least16_t = __int_least16_t;
pub type uint_least16_t = __uint_least16_t;
pub type int_least32_t = __int_least32_t;
pub type uint_least32_t = __uint_least32_t;
pub type int_least64_t = __int_least64_t;
pub type uint_least64_t = __uint_least64_t;
pub type int_fast8_t = libc::c_schar;
pub type uint_fast8_t = libc::c_uchar;
pub type int_fast16_t = libc::c_short;
pub type uint_fast16_t = libc::c_ushort;
pub type int_fast32_t = libc::c_int;
pub type uint_fast32_t = libc::c_uint;
pub type int_fast64_t = libc::c_longlong;
pub type uint_fast64_t = libc::c_ulonglong;
pub type size_t = libc::c_uint;
pub type wchar_t = libc::c_uchar;
#[repr(C)]
#[repr(align(8))]
#[derive(Debug, Copy, Clone)]
pub struct max_align_t {
pub __clang_max_align_nonce1: libc::c_longlong,
pub __clang_max_align_nonce2: f64,
}
pub type va_list = __builtin_va_list;
pub type __gnuc_va_list = __builtin_va_list;
pub type _lock_t = libc::c_int;
pub type _LOCK_RECURSIVE_T = _lock_t;
pub type _LOCK_T = _lock_t;
extern "C" {
pub fn _lock_init(lock: *mut _lock_t);
}
extern "C" {
pub fn _lock_init_recursive(lock: *mut _lock_t);
}
extern "C" {
pub fn _lock_close(lock: *mut _lock_t);
}
extern "C" {
pub fn _lock_close_recursive(lock: *mut _lock_t);
}
extern "C" {
pub fn _lock_acquire(lock: *mut _lock_t);
}
extern "C" {
pub fn _lock_acquire_recursive(lock: *mut _lock_t);
}
extern "C" {
pub fn _lock_try_acquire(lock: *mut _lock_t) -> libc::c_int;
}
extern "C" {
pub fn _lock_try_acquire_recursive(lock: *mut _lock_t) -> libc::c_int;
}
extern "C" {
pub fn _lock_release(lock: *mut _lock_t);
}
extern "C" {
pub fn _lock_release_recursive(lock: *mut _lock_t);
}
pub type __blkcnt_t = libc::c_long;
pub type __blksize_t = libc::c_long;
pub type __fsblkcnt_t = __uint64_t;
pub type __fsfilcnt_t = __uint32_t;
pub type _off_t = libc::c_long;
pub type __pid_t = libc::c_int;
pub type __dev_t = libc::c_short;
pub type __uid_t = libc::c_ushort;
pub type __gid_t = libc::c_ushort;
pub type __id_t = __uint32_t;
pub type __ino_t = libc::c_ushort;
pub type __mode_t = __uint32_t;
pub type _off64_t = libc::c_longlong;
pub type __off_t = _off_t;
pub type __loff_t = _off64_t;
pub type __key_t = libc::c_long;
pub type _fpos_t = libc::c_long;
pub type __size_t = libc::c_uint;
pub type _ssize_t = libc::c_int;
pub type __ssize_t = _ssize_t;
pub type wint_t = libc::c_uint;
#[repr(C)]
#[derive(Copy, Clone)]
pub struct _mbstate_t {
pub __count: libc::c_int,
pub __value: _mbstate_t__bindgen_ty_1,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union _mbstate_t__bindgen_ty_1 {
pub __wch: wint_t,
pub __wchb: [libc::c_uchar; 4usize],
_bindgen_union_align: u32,
}
pub type _flock_t = _LOCK_RECURSIVE_T;
pub type _iconv_t = *mut libc::c_void;
pub type __clock_t = libc::c_ulong;
pub type __time_t = libc::c_long;
pub type __clockid_t = libc::c_ulong;
pub type __timer_t = libc::c_ulong;
pub type __sa_family_t = __uint8_t;
pub type __socklen_t = __uint32_t;
pub type __nlink_t = libc::c_ushort;
pub type __suseconds_t = libc::c_long;
pub type __useconds_t = libc::c_ulong;
pub type __va_list = __builtin_va_list;
pub type __ULong = libc::c_ulong;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct __locale_t {
_unused: [u8; 0],
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct _Bigint {
pub _next: *mut _Bigint,
pub _k: libc::c_int,
pub _maxwds: libc::c_int,
pub _sign: libc::c_int,
pub _wds: libc::c_int,
pub _x: [__ULong; 1usize],
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct __tm {
pub __tm_sec: libc::c_int,
pub __tm_min: libc::c_int,
pub __tm_hour: libc::c_int,
pub __tm_mday: libc::c_int,
pub __tm_mon: libc::c_int,
pub __tm_year: libc::c_int,
pub __tm_wday: libc::c_int,
pub __tm_yday: libc::c_int,
pub __tm_isdst: libc::c_int,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct _on_exit_args {
pub _fnargs: [*mut libc::c_void; 32usize],
pub _dso_handle: [*mut libc::c_void; 32usize],
pub _fntypes: __ULong,
pub _is_cxa: __ULong,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct _atexit {
pub _next: *mut _atexit,
pub _ind: libc::c_int,
pub _fns: [::core::option::Option<unsafe extern "C" fn()>; 32usize],
pub _on_exit_args_ptr: *mut _on_exit_args,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct __sbuf {
pub _base: *mut libc::c_uchar,
pub _size: libc::c_int,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct __sFILE_fake {
pub _p: *mut libc::c_uchar,
pub _r: libc::c_int,
pub _w: libc::c_int,
pub _flags: libc::c_short,
pub _file: libc::c_short,
pub _bf: __sbuf,
pub _lbfsize: libc::c_int,
pub _data: *mut _reent,
}
extern "C" {
pub fn __sinit(arg1: *mut _reent);
}
#[repr(C)]
#[derive(Copy, Clone)]
pub struct __sFILE {
pub _p: *mut libc::c_uchar,
pub _r: libc::c_int,
pub _w: libc::c_int,
pub _flags: libc::c_short,
pub _file: libc::c_short,
pub _bf: __sbuf,
pub _lbfsize: libc::c_int,
pub _data: *mut _reent,
pub _cookie: *mut libc::c_void,
pub _read: ::core::option::Option<
unsafe extern "C" fn(
arg1: *mut _reent,
arg2: *mut libc::c_void,
arg3: *mut libc::c_char,
arg4: libc::c_int,
) -> libc::c_int,
>,
pub _write: ::core::option::Option<
unsafe extern "C" fn(
arg1: *mut _reent,
arg2: *mut libc::c_void,
arg3: *const libc::c_char,
arg4: libc::c_int,
) -> libc::c_int,
>,
pub _seek: ::core::option::Option<
unsafe extern "C" fn(
arg1: *mut _reent,
arg2: *mut libc::c_void,
arg3: _fpos_t,
arg4: libc::c_int,
) -> _fpos_t,
>,
pub _close: ::core::option::Option<
unsafe extern "C" fn(arg1: *mut _reent, arg2: *mut libc::c_void) -> libc::c_int,
>,
pub _ub: __sbuf,
pub _up: *mut libc::c_uchar,
pub _ur: libc::c_int,
pub _ubuf: [libc::c_uchar; 3usize],
pub _nbuf: [libc::c_uchar; 1usize],
pub _lb: __sbuf,
pub _blksize: libc::c_int,
pub _offset: _off_t,
pub _lock: _flock_t,
pub _mbstate: _mbstate_t,
pub _flags2: libc::c_int,
}
pub type __FILE = __sFILE;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct _glue {
pub _next: *mut _glue,
pub _niobs: libc::c_int,
pub _iobs: *mut __FILE,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct _rand48 {
pub _seed: [libc::c_ushort; 3usize],
pub _mult: [libc::c_ushort; 3usize],
pub _add: libc::c_ushort,
pub _rand_next: libc::c_ulonglong,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct _mprec {
pub _result: *mut _Bigint,
pub _result_k: libc::c_int,
pub _p5s: *mut _Bigint,
pub _freelist: *mut *mut _Bigint,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub struct _misc_reent {
pub _strtok_last: *mut libc::c_char,
pub _mblen_state: _mbstate_t,
pub _wctomb_state: _mbstate_t,
pub _mbtowc_state: _mbstate_t,
pub _l64a_buf: [libc::c_char; 8usize],
pub _getdate_err: libc::c_int,
pub _mbrlen_state: _mbstate_t,
pub _mbrtowc_state: _mbstate_t,
pub _mbsrtowcs_state: _mbstate_t,
pub _wcrtomb_state: _mbstate_t,
pub _wcsrtombs_state: _mbstate_t,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct _reent {
pub _errno: libc::c_int,
pub _stdin: *mut __FILE,
pub _stdout: *mut __FILE,
pub _stderr: *mut __FILE,
pub _inc: libc::c_int,
pub _emergency: *mut libc::c_char,
pub __sdidinit: libc::c_int,
pub _unspecified_locale_info: libc::c_int,
pub _locale: *mut __locale_t,
pub _mp: *mut _mprec,
pub __cleanup: ::core::option::Option<unsafe extern "C" fn(arg1: *mut _reent)>,
pub _gamma_signgam: libc::c_int,
pub _cvtlen: libc::c_int,
pub _cvtbuf: *mut libc::c_char,
pub _r48: *mut _rand48,
pub _localtime_buf: *mut __tm,
pub _asctime_buf: *mut libc::c_char,
pub _sig_func: *mut ::core::option::Option<unsafe extern "C" fn(arg1: libc::c_int)>,
pub _atexit: *mut _atexit,
pub _atexit0: _atexit,
pub __sglue: _glue,
pub __sf: *mut __FILE,
pub _misc: *mut _misc_reent,
pub _signal_buf: *mut libc::c_char,
}
extern "C" {
pub static __sf_fake_stdin: __sFILE_fake;
}
extern "C" {
pub static __sf_fake_stdout: __sFILE_fake;
}
extern "C" {
pub static __sf_fake_stderr: __sFILE_fake;
}
extern "C" {
pub static mut _global_impure_ptr: *mut _reent;
}
extern "C" {
pub fn _reclaim_reent(arg1: *mut _reent);
}
extern "C" {
pub fn __getreent() -> *mut _reent;
}
pub type u_int8_t = __uint8_t;
pub type u_int16_t = __uint16_t;
pub type u_int32_t = __uint32_t;
pub type u_int64_t = __uint64_t;
pub type register_t = libc::c_int;
pub type __sigset_t = libc::c_ulong;
pub type suseconds_t = __suseconds_t;
pub type time_t = libc::c_long;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct timeval {
pub tv_sec: time_t,
pub tv_usec: suseconds_t,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct timespec {
pub tv_sec: time_t,
pub tv_nsec: libc::c_long,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct itimerspec {
pub it_interval: timespec,
pub it_value: timespec,
}
pub type sigset_t = __sigset_t;
pub type fd_mask = libc::c_ulong;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct _types_fd_set {
pub fds_bits: [fd_mask; 2usize],
}
extern "C" {
pub fn select(
__n: libc::c_int,
__readfds: *mut _types_fd_set,
__writefds: *mut _types_fd_set,
__exceptfds: *mut _types_fd_set,
__timeout: *mut timeval,
) -> libc::c_int;
}
extern "C" {
pub fn pselect(
__n: libc::c_int,
__readfds: *mut _types_fd_set,
__writefds: *mut _types_fd_set,
__exceptfds: *mut _types_fd_set,
__timeout: *const timespec,
__set: *const sigset_t,
) -> libc::c_int;
}
pub type in_addr_t = __uint32_t;
pub type in_port_t = __uint16_t;
pub type u_char = libc::c_uchar;
pub type u_short = libc::c_ushort;
pub type u_int = libc::c_uint;
pub type u_long = libc::c_ulong;
pub type ushort = libc::c_ushort;
pub type uint = libc::c_uint;
pub type ulong = libc::c_ulong;
pub type blkcnt_t = __blkcnt_t;
pub type blksize_t = __blksize_t;
pub type clock_t = libc::c_ulong;
pub type daddr_t = libc::c_long;
pub type caddr_t = *mut libc::c_char;
pub type fsblkcnt_t = __fsblkcnt_t;
pub type fsfilcnt_t = __fsfilcnt_t;
pub type id_t = __id_t;
pub type ino_t = __ino_t;
pub type off_t = __off_t;
pub type dev_t = __dev_t;
pub type uid_t = __uid_t;
pub type gid_t = __gid_t;
pub type pid_t = __pid_t;
pub type key_t = __key_t;
pub type ssize_t = _ssize_t;
pub type mode_t = __mode_t;
pub type nlink_t = __nlink_t;
pub type clockid_t = __clockid_t;
pub type timer_t = __timer_t;
pub type useconds_t = __useconds_t;
pub type sbintime_t = __int64_t;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct sched_param {
pub sched_priority: libc::c_int,
}
extern "C" {
pub fn sched_yield() -> libc::c_int;
}
pub type pthread_t = __uint32_t;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct pthread_attr_t {
pub is_initialized: libc::c_int,
pub stackaddr: *mut libc::c_void,
pub stacksize: libc::c_int,
pub contentionscope: libc::c_int,
pub inheritsched: libc::c_int,
pub schedpolicy: libc::c_int,
pub schedparam: sched_param,
pub detachstate: libc::c_int,
}
pub type pthread_mutex_t = __uint32_t;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct pthread_mutexattr_t {
pub is_initialized: libc::c_int,
pub type_: libc::c_int,
pub recursive: libc::c_int,
}
pub type pthread_cond_t = __uint32_t;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct pthread_condattr_t {
pub is_initialized: libc::c_int,
pub clock: clock_t,
}
pub type pthread_key_t = __uint32_t;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct pthread_once_t {
pub is_initialized: libc::c_int,
pub init_executed: libc::c_int,
}
pub type FILE = __FILE;
pub type fpos_t = _fpos_t;
extern "C" {
pub fn ctermid(arg1: *mut libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn tmpfile() -> *mut FILE;
}
extern "C" {
pub fn tmpnam(arg1: *mut libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn tempnam(arg1: *const libc::c_char, arg2: *const libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn fclose(arg1: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn fflush(arg1: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn freopen(
arg1: *const libc::c_char,
arg2: *const libc::c_char,
arg3: *mut FILE,
) -> *mut FILE;
}
extern "C" {
pub fn setbuf(arg1: *mut FILE, arg2: *mut libc::c_char);
}
extern "C" {
pub fn setvbuf(
arg1: *mut FILE,
arg2: *mut libc::c_char,
arg3: libc::c_int,
arg4: size_t,
) -> libc::c_int;
}
extern "C" {
pub fn fprintf(arg1: *mut FILE, arg2: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn fscanf(arg1: *mut FILE, arg2: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn printf(arg1: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn scanf(arg1: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn sscanf(arg1: *const libc::c_char, arg2: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn vfprintf(
arg1: *mut FILE,
arg2: *const libc::c_char,
arg3: __builtin_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn vprintf(arg1: *const libc::c_char, arg2: __builtin_va_list) -> libc::c_int;
}
extern "C" {
pub fn vsprintf(
arg1: *mut libc::c_char,
arg2: *const libc::c_char,
arg3: __builtin_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn fgetc(arg1: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn fgets(arg1: *mut libc::c_char, arg2: libc::c_int, arg3: *mut FILE) -> *mut libc::c_char;
}
extern "C" {
pub fn fputc(arg1: libc::c_int, arg2: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn fputs(arg1: *const libc::c_char, arg2: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn getc(arg1: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn getchar() -> libc::c_int;
}
extern "C" {
pub fn gets(arg1: *mut libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn putc(arg1: libc::c_int, arg2: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn putchar(arg1: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn puts(arg1: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn ungetc(arg1: libc::c_int, arg2: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn fread(
arg1: *mut libc::c_void,
_size: libc::c_uint,
_n: libc::c_uint,
arg2: *mut FILE,
) -> libc::c_uint;
}
extern "C" {
pub fn fwrite(
arg1: *const libc::c_void,
_size: libc::c_uint,
_n: libc::c_uint,
arg2: *mut FILE,
) -> libc::c_uint;
}
extern "C" {
pub fn fgetpos(arg1: *mut FILE, arg2: *mut fpos_t) -> libc::c_int;
}
extern "C" {
pub fn fseek(arg1: *mut FILE, arg2: libc::c_long, arg3: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn fsetpos(arg1: *mut FILE, arg2: *const fpos_t) -> libc::c_int;
}
extern "C" {
pub fn ftell(arg1: *mut FILE) -> libc::c_long;
}
extern "C" {
pub fn rewind(arg1: *mut FILE);
}
extern "C" {
pub fn clearerr(arg1: *mut FILE);
}
extern "C" {
pub fn feof(arg1: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn ferror(arg1: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn perror(arg1: *const libc::c_char);
}
extern "C" {
pub fn fopen(_name: *const libc::c_char, _type: *const libc::c_char) -> *mut FILE;
}
extern "C" {
pub fn sprintf(arg1: *mut libc::c_char, arg2: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn remove(arg1: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn rename(arg1: *const libc::c_char, arg2: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn fseeko(arg1: *mut FILE, arg2: off_t, arg3: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn ftello(arg1: *mut FILE) -> off_t;
}
extern "C" {
pub fn snprintf(
arg1: *mut libc::c_char,
arg2: libc::c_uint,
arg3: *const libc::c_char,
...
) -> libc::c_int;
}
extern "C" {
pub fn vsnprintf(
arg1: *mut libc::c_char,
arg2: libc::c_uint,
arg3: *const libc::c_char,
arg4: __builtin_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn vfscanf(
arg1: *mut FILE,
arg2: *const libc::c_char,
arg3: __builtin_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn vscanf(arg1: *const libc::c_char, arg2: __builtin_va_list) -> libc::c_int;
}
extern "C" {
pub fn vsscanf(
arg1: *const libc::c_char,
arg2: *const libc::c_char,
arg3: __builtin_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn asiprintf(arg1: *mut *mut libc::c_char, arg2: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn asniprintf(
arg1: *mut libc::c_char,
arg2: *mut size_t,
arg3: *const libc::c_char,
...
) -> *mut libc::c_char;
}
extern "C" {
pub fn asnprintf(
arg1: *mut libc::c_char,
arg2: *mut size_t,
arg3: *const libc::c_char,
...
) -> *mut libc::c_char;
}
extern "C" {
pub fn diprintf(arg1: libc::c_int, arg2: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn fiprintf(arg1: *mut FILE, arg2: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn fiscanf(arg1: *mut FILE, arg2: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn iprintf(arg1: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn iscanf(arg1: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn siprintf(arg1: *mut libc::c_char, arg2: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn siscanf(arg1: *const libc::c_char, arg2: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn sniprintf(
arg1: *mut libc::c_char,
arg2: size_t,
arg3: *const libc::c_char,
...
) -> libc::c_int;
}
extern "C" {
pub fn vasiprintf(
arg1: *mut *mut libc::c_char,
arg2: *const libc::c_char,
arg3: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn vasniprintf(
arg1: *mut libc::c_char,
arg2: *mut size_t,
arg3: *const libc::c_char,
arg4: __gnuc_va_list,
) -> *mut libc::c_char;
}
extern "C" {
pub fn vasnprintf(
arg1: *mut libc::c_char,
arg2: *mut size_t,
arg3: *const libc::c_char,
arg4: __gnuc_va_list,
) -> *mut libc::c_char;
}
extern "C" {
pub fn vdiprintf(
arg1: libc::c_int,
arg2: *const libc::c_char,
arg3: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn vfiprintf(
arg1: *mut FILE,
arg2: *const libc::c_char,
arg3: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn vfiscanf(
arg1: *mut FILE,
arg2: *const libc::c_char,
arg3: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn viprintf(arg1: *const libc::c_char, arg2: __gnuc_va_list) -> libc::c_int;
}
extern "C" {
pub fn viscanf(arg1: *const libc::c_char, arg2: __gnuc_va_list) -> libc::c_int;
}
extern "C" {
pub fn vsiprintf(
arg1: *mut libc::c_char,
arg2: *const libc::c_char,
arg3: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn vsiscanf(
arg1: *const libc::c_char,
arg2: *const libc::c_char,
arg3: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn vsniprintf(
arg1: *mut libc::c_char,
arg2: size_t,
arg3: *const libc::c_char,
arg4: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn fdopen(arg1: libc::c_int, arg2: *const libc::c_char) -> *mut FILE;
}
extern "C" {
pub fn fileno(arg1: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn pclose(arg1: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn popen(arg1: *const libc::c_char, arg2: *const libc::c_char) -> *mut FILE;
}
extern "C" {
pub fn setbuffer(arg1: *mut FILE, arg2: *mut libc::c_char, arg3: libc::c_int);
}
extern "C" {
pub fn setlinebuf(arg1: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn getw(arg1: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn putw(arg1: libc::c_int, arg2: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn getc_unlocked(arg1: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn getchar_unlocked() -> libc::c_int;
}
extern "C" {
pub fn flockfile(arg1: *mut FILE);
}
extern "C" {
pub fn ftrylockfile(arg1: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn funlockfile(arg1: *mut FILE);
}
extern "C" {
pub fn putc_unlocked(arg1: libc::c_int, arg2: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn putchar_unlocked(arg1: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn dprintf(arg1: libc::c_int, arg2: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn fmemopen(arg1: *mut libc::c_void, arg2: size_t, arg3: *const libc::c_char) -> *mut FILE;
}
extern "C" {
pub fn open_memstream(arg1: *mut *mut libc::c_char, arg2: *mut size_t) -> *mut FILE;
}
extern "C" {
pub fn vdprintf(
arg1: libc::c_int,
arg2: *const libc::c_char,
arg3: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn renameat(
arg1: libc::c_int,
arg2: *const libc::c_char,
arg3: libc::c_int,
arg4: *const libc::c_char,
) -> libc::c_int;
}
extern "C" {
pub fn _asiprintf_r(
arg1: *mut _reent,
arg2: *mut *mut libc::c_char,
arg3: *const libc::c_char,
...
) -> libc::c_int;
}
extern "C" {
pub fn _asniprintf_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: *mut size_t,
arg4: *const libc::c_char,
...
) -> *mut libc::c_char;
}
extern "C" {
pub fn _asnprintf_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: *mut size_t,
arg4: *const libc::c_char,
...
) -> *mut libc::c_char;
}
extern "C" {
pub fn _asprintf_r(
arg1: *mut _reent,
arg2: *mut *mut libc::c_char,
arg3: *const libc::c_char,
...
) -> libc::c_int;
}
extern "C" {
pub fn _diprintf_r(
arg1: *mut _reent,
arg2: libc::c_int,
arg3: *const libc::c_char,
...
) -> libc::c_int;
}
extern "C" {
pub fn _dprintf_r(
arg1: *mut _reent,
arg2: libc::c_int,
arg3: *const libc::c_char,
...
) -> libc::c_int;
}
extern "C" {
pub fn _fclose_r(arg1: *mut _reent, arg2: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn _fcloseall_r(arg1: *mut _reent) -> libc::c_int;
}
extern "C" {
pub fn _fdopen_r(arg1: *mut _reent, arg2: libc::c_int, arg3: *const libc::c_char) -> *mut FILE;
}
extern "C" {
pub fn _fflush_r(arg1: *mut _reent, arg2: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn _fgetc_r(arg1: *mut _reent, arg2: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn _fgetc_unlocked_r(arg1: *mut _reent, arg2: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn _fgets_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: libc::c_int,
arg4: *mut FILE,
) -> *mut libc::c_char;
}
extern "C" {
pub fn _fgets_unlocked_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: libc::c_int,
arg4: *mut FILE,
) -> *mut libc::c_char;
}
extern "C" {
pub fn _fgetpos_r(arg1: *mut _reent, arg2: *mut FILE, arg3: *mut fpos_t) -> libc::c_int;
}
extern "C" {
pub fn _fsetpos_r(arg1: *mut _reent, arg2: *mut FILE, arg3: *const fpos_t) -> libc::c_int;
}
extern "C" {
pub fn _fiprintf_r(
arg1: *mut _reent,
arg2: *mut FILE,
arg3: *const libc::c_char,
...
) -> libc::c_int;
}
extern "C" {
pub fn _fiscanf_r(
arg1: *mut _reent,
arg2: *mut FILE,
arg3: *const libc::c_char,
...
) -> libc::c_int;
}
extern "C" {
pub fn _fmemopen_r(
arg1: *mut _reent,
arg2: *mut libc::c_void,
arg3: size_t,
arg4: *const libc::c_char,
) -> *mut FILE;
}
extern "C" {
pub fn _fopen_r(
arg1: *mut _reent,
arg2: *const libc::c_char,
arg3: *const libc::c_char,
) -> *mut FILE;
}
extern "C" {
pub fn _freopen_r(
arg1: *mut _reent,
arg2: *const libc::c_char,
arg3: *const libc::c_char,
arg4: *mut FILE,
) -> *mut FILE;
}
extern "C" {
pub fn _fprintf_r(
arg1: *mut _reent,
arg2: *mut FILE,
arg3: *const libc::c_char,
...
) -> libc::c_int;
}
extern "C" {
pub fn _fpurge_r(arg1: *mut _reent, arg2: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn _fputc_r(arg1: *mut _reent, arg2: libc::c_int, arg3: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn _fputc_unlocked_r(arg1: *mut _reent, arg2: libc::c_int, arg3: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn _fputs_r(arg1: *mut _reent, arg2: *const libc::c_char, arg3: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn _fputs_unlocked_r(
arg1: *mut _reent,
arg2: *const libc::c_char,
arg3: *mut FILE,
) -> libc::c_int;
}
extern "C" {
pub fn _fread_r(
arg1: *mut _reent,
arg2: *mut libc::c_void,
_size: size_t,
_n: size_t,
arg3: *mut FILE,
) -> size_t;
}
extern "C" {
pub fn _fread_unlocked_r(
arg1: *mut _reent,
arg2: *mut libc::c_void,
_size: size_t,
_n: size_t,
arg3: *mut FILE,
) -> size_t;
}
extern "C" {
pub fn _fscanf_r(
arg1: *mut _reent,
arg2: *mut FILE,
arg3: *const libc::c_char,
...
) -> libc::c_int;
}
extern "C" {
pub fn _fseek_r(
arg1: *mut _reent,
arg2: *mut FILE,
arg3: libc::c_long,
arg4: libc::c_int,
) -> libc::c_int;
}
extern "C" {
pub fn _fseeko_r(
arg1: *mut _reent,
arg2: *mut FILE,
arg3: _off_t,
arg4: libc::c_int,
) -> libc::c_int;
}
extern "C" {
pub fn _ftell_r(arg1: *mut _reent, arg2: *mut FILE) -> libc::c_long;
}
extern "C" {
pub fn _ftello_r(arg1: *mut _reent, arg2: *mut FILE) -> _off_t;
}
extern "C" {
pub fn _rewind_r(arg1: *mut _reent, arg2: *mut FILE);
}
extern "C" {
pub fn _fwrite_r(
arg1: *mut _reent,
arg2: *const libc::c_void,
_size: size_t,
_n: size_t,
arg3: *mut FILE,
) -> size_t;
}
extern "C" {
pub fn _fwrite_unlocked_r(
arg1: *mut _reent,
arg2: *const libc::c_void,
_size: size_t,
_n: size_t,
arg3: *mut FILE,
) -> size_t;
}
extern "C" {
pub fn _getc_r(arg1: *mut _reent, arg2: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn _getc_unlocked_r(arg1: *mut _reent, arg2: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn _getchar_r(arg1: *mut _reent) -> libc::c_int;
}
extern "C" {
pub fn _getchar_unlocked_r(arg1: *mut _reent) -> libc::c_int;
}
extern "C" {
pub fn _gets_r(arg1: *mut _reent, arg2: *mut libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn _iprintf_r(arg1: *mut _reent, arg2: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn _iscanf_r(arg1: *mut _reent, arg2: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn _open_memstream_r(
arg1: *mut _reent,
arg2: *mut *mut libc::c_char,
arg3: *mut size_t,
) -> *mut FILE;
}
extern "C" {
pub fn _perror_r(arg1: *mut _reent, arg2: *const libc::c_char);
}
extern "C" {
pub fn _printf_r(arg1: *mut _reent, arg2: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn _putc_r(arg1: *mut _reent, arg2: libc::c_int, arg3: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn _putc_unlocked_r(arg1: *mut _reent, arg2: libc::c_int, arg3: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn _putchar_unlocked_r(arg1: *mut _reent, arg2: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn _putchar_r(arg1: *mut _reent, arg2: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn _puts_r(arg1: *mut _reent, arg2: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn _remove_r(arg1: *mut _reent, arg2: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn _rename_r(
arg1: *mut _reent,
_old: *const libc::c_char,
_new: *const libc::c_char,
) -> libc::c_int;
}
extern "C" {
pub fn _scanf_r(arg1: *mut _reent, arg2: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn _siprintf_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: *const libc::c_char,
...
) -> libc::c_int;
}
extern "C" {
pub fn _siscanf_r(
arg1: *mut _reent,
arg2: *const libc::c_char,
arg3: *const libc::c_char,
...
) -> libc::c_int;
}
extern "C" {
pub fn _sniprintf_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: size_t,
arg4: *const libc::c_char,
...
) -> libc::c_int;
}
extern "C" {
pub fn _snprintf_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: size_t,
arg4: *const libc::c_char,
...
) -> libc::c_int;
}
extern "C" {
pub fn _sprintf_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: *const libc::c_char,
...
) -> libc::c_int;
}
extern "C" {
pub fn _sscanf_r(
arg1: *mut _reent,
arg2: *const libc::c_char,
arg3: *const libc::c_char,
...
) -> libc::c_int;
}
extern "C" {
pub fn _tempnam_r(
arg1: *mut _reent,
arg2: *const libc::c_char,
arg3: *const libc::c_char,
) -> *mut libc::c_char;
}
extern "C" {
pub fn _tmpfile_r(arg1: *mut _reent) -> *mut FILE;
}
extern "C" {
pub fn _tmpnam_r(arg1: *mut _reent, arg2: *mut libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn _ungetc_r(arg1: *mut _reent, arg2: libc::c_int, arg3: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn _vasiprintf_r(
arg1: *mut _reent,
arg2: *mut *mut libc::c_char,
arg3: *const libc::c_char,
arg4: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn _vasniprintf_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: *mut size_t,
arg4: *const libc::c_char,
arg5: __gnuc_va_list,
) -> *mut libc::c_char;
}
extern "C" {
pub fn _vasnprintf_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: *mut size_t,
arg4: *const libc::c_char,
arg5: __gnuc_va_list,
) -> *mut libc::c_char;
}
extern "C" {
pub fn _vasprintf_r(
arg1: *mut _reent,
arg2: *mut *mut libc::c_char,
arg3: *const libc::c_char,
arg4: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn _vdiprintf_r(
arg1: *mut _reent,
arg2: libc::c_int,
arg3: *const libc::c_char,
arg4: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn _vdprintf_r(
arg1: *mut _reent,
arg2: libc::c_int,
arg3: *const libc::c_char,
arg4: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn _vfiprintf_r(
arg1: *mut _reent,
arg2: *mut FILE,
arg3: *const libc::c_char,
arg4: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn _vfiscanf_r(
arg1: *mut _reent,
arg2: *mut FILE,
arg3: *const libc::c_char,
arg4: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn _vfprintf_r(
arg1: *mut _reent,
arg2: *mut FILE,
arg3: *const libc::c_char,
arg4: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn _vfscanf_r(
arg1: *mut _reent,
arg2: *mut FILE,
arg3: *const libc::c_char,
arg4: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn _viprintf_r(
arg1: *mut _reent,
arg2: *const libc::c_char,
arg3: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn _viscanf_r(
arg1: *mut _reent,
arg2: *const libc::c_char,
arg3: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn _vprintf_r(
arg1: *mut _reent,
arg2: *const libc::c_char,
arg3: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn _vscanf_r(
arg1: *mut _reent,
arg2: *const libc::c_char,
arg3: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn _vsiprintf_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: *const libc::c_char,
arg4: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn _vsiscanf_r(
arg1: *mut _reent,
arg2: *const libc::c_char,
arg3: *const libc::c_char,
arg4: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn _vsniprintf_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: size_t,
arg4: *const libc::c_char,
arg5: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn _vsnprintf_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: size_t,
arg4: *const libc::c_char,
arg5: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn _vsprintf_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: *const libc::c_char,
arg4: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn _vsscanf_r(
arg1: *mut _reent,
arg2: *const libc::c_char,
arg3: *const libc::c_char,
arg4: __gnuc_va_list,
) -> libc::c_int;
}
extern "C" {
pub fn fpurge(arg1: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn __getdelim(
arg1: *mut *mut libc::c_char,
arg2: *mut size_t,
arg3: libc::c_int,
arg4: *mut FILE,
) -> ssize_t;
}
extern "C" {
pub fn __getline(arg1: *mut *mut libc::c_char, arg2: *mut size_t, arg3: *mut FILE) -> ssize_t;
}
extern "C" {
pub fn clearerr_unlocked(arg1: *mut FILE);
}
extern "C" {
pub fn feof_unlocked(arg1: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn ferror_unlocked(arg1: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn fileno_unlocked(arg1: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn fflush_unlocked(arg1: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn fgetc_unlocked(arg1: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn fputc_unlocked(arg1: libc::c_int, arg2: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn fread_unlocked(
arg1: *mut libc::c_void,
_size: size_t,
_n: size_t,
arg2: *mut FILE,
) -> size_t;
}
extern "C" {
pub fn fwrite_unlocked(
arg1: *const libc::c_void,
_size: size_t,
_n: size_t,
arg2: *mut FILE,
) -> size_t;
}
extern "C" {
pub fn __srget_r(arg1: *mut _reent, arg2: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn __swbuf_r(arg1: *mut _reent, arg2: libc::c_int, arg3: *mut FILE) -> libc::c_int;
}
extern "C" {
pub fn funopen(
__cookie: *const libc::c_void,
__readfn: ::core::option::Option<
unsafe extern "C" fn(
__cookie: *mut libc::c_void,
__buf: *mut libc::c_char,
__n: libc::c_int,
) -> libc::c_int,
>,
__writefn: ::core::option::Option<
unsafe extern "C" fn(
__cookie: *mut libc::c_void,
__buf: *const libc::c_char,
__n: libc::c_int,
) -> libc::c_int,
>,
__seekfn: ::core::option::Option<
unsafe extern "C" fn(
__cookie: *mut libc::c_void,
__off: fpos_t,
__whence: libc::c_int,
) -> fpos_t,
>,
__closefn: ::core::option::Option<
unsafe extern "C" fn(__cookie: *mut libc::c_void) -> libc::c_int,
>,
) -> *mut FILE;
}
extern "C" {
pub fn _funopen_r(
arg1: *mut _reent,
__cookie: *const libc::c_void,
__readfn: ::core::option::Option<
unsafe extern "C" fn(
__cookie: *mut libc::c_void,
__buf: *mut libc::c_char,
__n: libc::c_int,
) -> libc::c_int,
>,
__writefn: ::core::option::Option<
unsafe extern "C" fn(
__cookie: *mut libc::c_void,
__buf: *const libc::c_char,
__n: libc::c_int,
) -> libc::c_int,
>,
__seekfn: ::core::option::Option<
unsafe extern "C" fn(
__cookie: *mut libc::c_void,
__off: fpos_t,
__whence: libc::c_int,
) -> fpos_t,
>,
__closefn: ::core::option::Option<
unsafe extern "C" fn(__cookie: *mut libc::c_void) -> libc::c_int,
>,
) -> *mut FILE;
}
extern "C" {
pub fn __assert(arg1: *const libc::c_char, arg2: libc::c_int, arg3: *const libc::c_char);
}
extern "C" {
pub fn __assert_func(
arg1: *const libc::c_char,
arg2: libc::c_int,
arg3: *const libc::c_char,
arg4: *const libc::c_char,
);
}
pub type esp_err_t = i32;
extern "C" {
#[doc = " @brief Returns string for esp_err_t error codes"]
#[doc = ""]
#[doc = " This function finds the error code in a pre-generated lookup-table and"]
#[doc = " returns its string representation."]
#[doc = ""]
#[doc = " The function is generated by the Python script"]
#[doc = " tools/gen_esp_err_to_name.py which should be run each time an esp_err_t"]
#[doc = " error is modified, created or removed from the IDF project."]
#[doc = ""]
#[doc = " @param code esp_err_t error code"]
#[doc = " @return string error message"]
pub fn esp_err_to_name(code: esp_err_t) -> *const libc::c_char;
}
extern "C" {
#[doc = " @brief Returns string for esp_err_t and system error codes"]
#[doc = ""]
#[doc = " This function finds the error code in a pre-generated lookup-table of"]
#[doc = " esp_err_t errors and returns its string representation. If the error code"]
#[doc = " is not found then it is attempted to be found among system errors."]
#[doc = ""]
#[doc = " The function is generated by the Python script"]
#[doc = " tools/gen_esp_err_to_name.py which should be run each time an esp_err_t"]
#[doc = " error is modified, created or removed from the IDF project."]
#[doc = ""]
#[doc = " @param code esp_err_t error code"]
#[doc = " @param[out] buf buffer where the error message should be written"]
#[doc = " @param buflen Size of buffer buf. At most buflen bytes are written into the buf buffer (including the terminating null byte)."]
#[doc = " @return buf containing the string error message"]
pub fn esp_err_to_name_r(
code: esp_err_t,
buf: *mut libc::c_char,
buflen: size_t,
) -> *const libc::c_char;
}
extern "C" {
#[doc = " @cond"]
pub fn _esp_error_check_failed(
rc: esp_err_t,
file: *const libc::c_char,
line: libc::c_int,
function: *const libc::c_char,
expression: *const libc::c_char,
);
}
extern "C" {
#[doc = " @cond"]
pub fn _esp_error_check_failed_without_abort(
rc: esp_err_t,
file: *const libc::c_char,
line: libc::c_int,
function: *const libc::c_char,
expression: *const libc::c_char,
);
}
extern "C" {
pub static Xthal_rev_no: libc::c_uint;
}
extern "C" {
pub fn xthal_save_extra(base: *mut libc::c_void);
}
extern "C" {
pub fn xthal_restore_extra(base: *mut libc::c_void);
}
extern "C" {
pub fn xthal_save_cpregs(base: *mut libc::c_void, arg1: libc::c_int);
}
extern "C" {
pub fn xthal_restore_cpregs(base: *mut libc::c_void, arg1: libc::c_int);
}
extern "C" {
pub fn xthal_save_cp0(base: *mut libc::c_void);
}
extern "C" {
pub fn xthal_save_cp1(base: *mut libc::c_void);
}
extern "C" {
pub fn xthal_save_cp2(base: *mut libc::c_void);
}
extern "C" {
pub fn xthal_save_cp3(base: *mut libc::c_void);
}
extern "C" {
pub fn xthal_save_cp4(base: *mut libc::c_void);
}
extern "C" {
pub fn xthal_save_cp5(base: *mut libc::c_void);
}
extern "C" {
pub fn xthal_save_cp6(base: *mut libc::c_void);
}
extern "C" {
pub fn xthal_save_cp7(base: *mut libc::c_void);
}
extern "C" {
pub fn xthal_restore_cp0(base: *mut libc::c_void);
}
extern "C" {
pub fn xthal_restore_cp1(base: *mut libc::c_void);
}
extern "C" {
pub fn xthal_restore_cp2(base: *mut libc::c_void);
}
extern "C" {
pub fn xthal_restore_cp3(base: *mut libc::c_void);
}
extern "C" {
pub fn xthal_restore_cp4(base: *mut libc::c_void);
}
extern "C" {
pub fn xthal_restore_cp5(base: *mut libc::c_void);
}
extern "C" {
pub fn xthal_restore_cp6(base: *mut libc::c_void);
}
extern "C" {
pub fn xthal_restore_cp7(base: *mut libc::c_void);
}
extern "C" {
pub static mut Xthal_cpregs_save_fn: [*mut libc::c_void; 8usize];
}
extern "C" {
pub static mut Xthal_cpregs_restore_fn: [*mut libc::c_void; 8usize];
}
extern "C" {
pub static mut Xthal_cpregs_save_nw_fn: [*mut libc::c_void; 8usize];
}
extern "C" {
pub static mut Xthal_cpregs_restore_nw_fn: [*mut libc::c_void; 8usize];
}
extern "C" {
pub static Xthal_extra_size: libc::c_uint;
}
extern "C" {
pub static Xthal_extra_align: libc::c_uint;
}
extern "C" {
pub static Xthal_cpregs_size: [libc::c_uint; 8usize];
}
extern "C" {
pub static Xthal_cpregs_align: [libc::c_uint; 8usize];
}
extern "C" {
pub static Xthal_all_extra_size: libc::c_uint;
}
extern "C" {
pub static Xthal_all_extra_align: libc::c_uint;
}
extern "C" {
pub static Xthal_cp_names: [*const libc::c_char; 8usize];
}
extern "C" {
pub fn xthal_init_mem_extra(arg1: *mut libc::c_void);
}
extern "C" {
pub fn xthal_init_mem_cp(arg1: *mut libc::c_void, arg2: libc::c_int);
}
extern "C" {
pub static Xthal_num_coprocessors: libc::c_uint;
}
extern "C" {
pub static Xthal_cp_num: libc::c_uchar;
}
extern "C" {
pub static Xthal_cp_max: libc::c_uchar;
}
extern "C" {
pub static Xthal_cp_mask: libc::c_uint;
}
extern "C" {
pub static Xthal_num_aregs: libc::c_uint;
}
extern "C" {
pub static Xthal_num_aregs_log2: libc::c_uchar;
}
extern "C" {
pub static Xthal_icache_linewidth: libc::c_uchar;
}
extern "C" {
pub static Xthal_dcache_linewidth: libc::c_uchar;
}
extern "C" {
pub static Xthal_icache_linesize: libc::c_ushort;
}
extern "C" {
pub static Xthal_dcache_linesize: libc::c_ushort;
}
extern "C" {
pub static Xthal_icache_size: libc::c_uint;
}
extern "C" {
pub static Xthal_dcache_size: libc::c_uint;
}
extern "C" {
pub static Xthal_dcache_is_writeback: libc::c_uchar;
}
extern "C" {
pub fn xthal_icache_region_invalidate(addr: *mut libc::c_void, size: libc::c_uint);
}
extern "C" {
pub fn xthal_dcache_region_invalidate(addr: *mut libc::c_void, size: libc::c_uint);
}
extern "C" {
pub fn xthal_dcache_region_writeback(addr: *mut libc::c_void, size: libc::c_uint);
}
extern "C" {
pub fn xthal_dcache_region_writeback_inv(addr: *mut libc::c_void, size: libc::c_uint);
}
extern "C" {
pub fn xthal_icache_line_invalidate(addr: *mut libc::c_void);
}
extern "C" {
pub fn xthal_dcache_line_invalidate(addr: *mut libc::c_void);
}
extern "C" {
pub fn xthal_dcache_line_writeback(addr: *mut libc::c_void);
}
extern "C" {
pub fn xthal_dcache_line_writeback_inv(addr: *mut libc::c_void);
}
extern "C" {
pub fn xthal_icache_sync();
}
extern "C" {
pub fn xthal_dcache_sync();
}
extern "C" {
pub fn xthal_icache_get_ways() -> libc::c_uint;
}
extern "C" {
pub fn xthal_icache_set_ways(ways: libc::c_uint);
}
extern "C" {
pub fn xthal_dcache_get_ways() -> libc::c_uint;
}
extern "C" {
pub fn xthal_dcache_set_ways(ways: libc::c_uint);
}
extern "C" {
pub fn xthal_cache_coherence_on();
}
extern "C" {
pub fn xthal_cache_coherence_off();
}
extern "C" {
pub fn xthal_cache_coherence_optin();
}
extern "C" {
pub fn xthal_cache_coherence_optout();
}
extern "C" {
pub fn xthal_get_cache_prefetch() -> libc::c_int;
}
extern "C" {
pub fn xthal_set_cache_prefetch(arg1: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn xthal_set_cache_prefetch_long(arg1: libc::c_ulonglong) -> libc::c_int;
}
extern "C" {
pub static Xthal_debug_configured: libc::c_int;
}
extern "C" {
pub fn xthal_set_soft_break(addr: *mut libc::c_void) -> libc::c_uint;
}
extern "C" {
pub fn xthal_remove_soft_break(addr: *mut libc::c_void, arg1: libc::c_uint);
}
extern "C" {
pub fn xthal_disassemble(
instr_buf: *mut libc::c_uchar,
tgt_addr: *mut libc::c_void,
buffer: *mut libc::c_char,
buflen: libc::c_uint,
options: libc::c_uint,
) -> libc::c_int;
}
extern "C" {
pub fn xthal_disassemble_size(instr_buf: *mut libc::c_uchar) -> libc::c_int;
}
extern "C" {
pub fn xthal_memcpy(
dst: *mut libc::c_void,
src: *const libc::c_void,
len: libc::c_uint,
) -> *mut libc::c_void;
}
extern "C" {
pub fn xthal_bcopy(
src: *const libc::c_void,
dst: *mut libc::c_void,
len: libc::c_uint,
) -> *mut libc::c_void;
}
extern "C" {
pub fn xthal_compare_and_set(
addr: *mut libc::c_int,
test_val: libc::c_int,
compare_val: libc::c_int,
) -> libc::c_int;
}
extern "C" {
pub static Xthal_release_major: libc::c_uint;
}
extern "C" {
pub static Xthal_release_minor: libc::c_uint;
}
extern "C" {
pub static Xthal_release_name: *const libc::c_char;
}
extern "C" {
pub static Xthal_release_internal: *const libc::c_char;
}
extern "C" {
pub static Xthal_memory_order: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_windowed: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_density: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_booleans: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_loops: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_nsa: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_minmax: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_sext: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_clamps: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_mac16: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_mul16: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_fp: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_speculation: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_threadptr: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_pif: libc::c_uchar;
}
extern "C" {
pub static Xthal_num_writebuffer_entries: libc::c_ushort;
}
extern "C" {
pub static Xthal_build_unique_id: libc::c_uint;
}
extern "C" {
pub static Xthal_hw_configid0: libc::c_uint;
}
extern "C" {
pub static Xthal_hw_configid1: libc::c_uint;
}
extern "C" {
pub static Xthal_hw_release_major: libc::c_uint;
}
extern "C" {
pub static Xthal_hw_release_minor: libc::c_uint;
}
extern "C" {
pub static Xthal_hw_release_name: *const libc::c_char;
}
extern "C" {
pub static Xthal_hw_release_internal: *const libc::c_char;
}
extern "C" {
pub fn xthal_clear_regcached_code();
}
extern "C" {
pub fn xthal_window_spill();
}
extern "C" {
pub fn xthal_validate_cp(arg1: libc::c_int);
}
extern "C" {
pub fn xthal_invalidate_cp(arg1: libc::c_int);
}
extern "C" {
pub fn xthal_set_cpenable(arg1: libc::c_uint);
}
extern "C" {
pub fn xthal_get_cpenable() -> libc::c_uint;
}
extern "C" {
pub static Xthal_num_intlevels: libc::c_uchar;
}
extern "C" {
pub static Xthal_num_interrupts: libc::c_uchar;
}
extern "C" {
pub static Xthal_excm_level: libc::c_uchar;
}
extern "C" {
pub static Xthal_intlevel_mask: [libc::c_uint; 16usize];
}
extern "C" {
pub static Xthal_intlevel_andbelow_mask: [libc::c_uint; 16usize];
}
extern "C" {
pub static Xthal_intlevel: [libc::c_uchar; 32usize];
}
extern "C" {
pub static Xthal_inttype: [libc::c_uchar; 32usize];
}
extern "C" {
pub static Xthal_inttype_mask: [libc::c_uint; 11usize];
}
extern "C" {
pub static Xthal_timer_interrupt: [libc::c_int; 4usize];
}
extern "C" {
pub fn xthal_get_intenable() -> libc::c_uint;
}
extern "C" {
pub fn xthal_set_intenable(arg1: libc::c_uint);
}
extern "C" {
pub fn xthal_get_interrupt() -> libc::c_uint;
}
extern "C" {
pub fn xthal_set_intset(arg1: libc::c_uint);
}
extern "C" {
pub fn xthal_set_intclear(arg1: libc::c_uint);
}
extern "C" {
pub static Xthal_num_ibreak: libc::c_int;
}
extern "C" {
pub static Xthal_num_dbreak: libc::c_int;
}
extern "C" {
pub static Xthal_have_ccount: libc::c_uchar;
}
extern "C" {
pub static Xthal_num_ccompare: libc::c_uchar;
}
extern "C" {
pub fn xthal_get_ccount() -> libc::c_uint;
}
extern "C" {
pub fn xthal_set_ccompare(arg1: libc::c_int, arg2: libc::c_uint);
}
extern "C" {
pub fn xthal_get_ccompare(arg1: libc::c_int) -> libc::c_uint;
}
extern "C" {
pub static Xthal_have_prid: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_exceptions: libc::c_uchar;
}
extern "C" {
pub static Xthal_xea_version: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_interrupts: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_highlevel_interrupts: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_nmi: libc::c_uchar;
}
extern "C" {
pub fn xthal_get_prid() -> libc::c_uint;
}
extern "C" {
pub fn xthal_vpri_to_intlevel(vpri: libc::c_uint) -> libc::c_uint;
}
extern "C" {
pub fn xthal_intlevel_to_vpri(intlevel: libc::c_uint) -> libc::c_uint;
}
extern "C" {
pub fn xthal_int_enable(arg1: libc::c_uint) -> libc::c_uint;
}
extern "C" {
pub fn xthal_int_disable(arg1: libc::c_uint) -> libc::c_uint;
}
extern "C" {
pub fn xthal_set_int_vpri(intnum: libc::c_int, vpri: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn xthal_get_int_vpri(intnum: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn xthal_set_vpri_locklevel(intlevel: libc::c_uint);
}
extern "C" {
pub fn xthal_get_vpri_locklevel() -> libc::c_uint;
}
extern "C" {
pub fn xthal_set_vpri(vpri: libc::c_uint) -> libc::c_uint;
}
extern "C" {
pub fn xthal_get_vpri() -> libc::c_uint;
}
extern "C" {
pub fn xthal_set_vpri_intlevel(intlevel: libc::c_uint) -> libc::c_uint;
}
extern "C" {
pub fn xthal_set_vpri_lock() -> libc::c_uint;
}
pub type XtHalVoidFunc = ::core::option::Option<unsafe extern "C" fn()>;
extern "C" {
pub static mut Xthal_tram_pending: libc::c_uint;
}
extern "C" {
pub static mut Xthal_tram_enabled: libc::c_uint;
}
extern "C" {
pub static mut Xthal_tram_sync: libc::c_uint;
}
extern "C" {
pub fn xthal_tram_pending_to_service() -> libc::c_uint;
}
extern "C" {
pub fn xthal_tram_done(serviced_mask: libc::c_uint);
}
extern "C" {
pub fn xthal_tram_set_sync(intnum: libc::c_int, sync: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn xthal_set_tram_trigger_func(trigger_fn: XtHalVoidFunc) -> XtHalVoidFunc;
}
extern "C" {
pub static Xthal_num_instrom: libc::c_uchar;
}
extern "C" {
pub static Xthal_num_instram: libc::c_uchar;
}
extern "C" {
pub static Xthal_num_datarom: libc::c_uchar;
}
extern "C" {
pub static Xthal_num_dataram: libc::c_uchar;
}
extern "C" {
pub static Xthal_num_xlmi: libc::c_uchar;
}
extern "C" {
pub static mut Xthal_instrom_vaddr: [libc::c_uint; 0usize];
}
extern "C" {
pub static mut Xthal_instrom_paddr: [libc::c_uint; 0usize];
}
extern "C" {
pub static mut Xthal_instrom_size: [libc::c_uint; 0usize];
}
extern "C" {
pub static mut Xthal_instram_vaddr: [libc::c_uint; 0usize];
}
extern "C" {
pub static mut Xthal_instram_paddr: [libc::c_uint; 0usize];
}
extern "C" {
pub static mut Xthal_instram_size: [libc::c_uint; 0usize];
}
extern "C" {
pub static mut Xthal_datarom_vaddr: [libc::c_uint; 0usize];
}
extern "C" {
pub static mut Xthal_datarom_paddr: [libc::c_uint; 0usize];
}
extern "C" {
pub static mut Xthal_datarom_size: [libc::c_uint; 0usize];
}
extern "C" {
pub static mut Xthal_dataram_vaddr: [libc::c_uint; 0usize];
}
extern "C" {
pub static mut Xthal_dataram_paddr: [libc::c_uint; 0usize];
}
extern "C" {
pub static mut Xthal_dataram_size: [libc::c_uint; 0usize];
}
extern "C" {
pub static mut Xthal_xlmi_vaddr: [libc::c_uint; 0usize];
}
extern "C" {
pub static mut Xthal_xlmi_paddr: [libc::c_uint; 0usize];
}
extern "C" {
pub static mut Xthal_xlmi_size: [libc::c_uint; 0usize];
}
extern "C" {
pub static Xthal_icache_setwidth: libc::c_uchar;
}
extern "C" {
pub static Xthal_dcache_setwidth: libc::c_uchar;
}
extern "C" {
pub static Xthal_icache_ways: libc::c_uint;
}
extern "C" {
pub static Xthal_dcache_ways: libc::c_uint;
}
extern "C" {
pub static Xthal_icache_line_lockable: libc::c_uchar;
}
extern "C" {
pub static Xthal_dcache_line_lockable: libc::c_uchar;
}
extern "C" {
pub fn xthal_get_cacheattr() -> libc::c_uint;
}
extern "C" {
pub fn xthal_get_icacheattr() -> libc::c_uint;
}
extern "C" {
pub fn xthal_get_dcacheattr() -> libc::c_uint;
}
extern "C" {
pub fn xthal_set_cacheattr(arg1: libc::c_uint);
}
extern "C" {
pub fn xthal_set_icacheattr(arg1: libc::c_uint);
}
extern "C" {
pub fn xthal_set_dcacheattr(arg1: libc::c_uint);
}
extern "C" {
pub fn xthal_set_region_attribute(
addr: *mut libc::c_void,
size: libc::c_uint,
cattr: libc::c_uint,
flags: libc::c_uint,
) -> libc::c_int;
}
extern "C" {
pub fn xthal_icache_enable();
}
extern "C" {
pub fn xthal_dcache_enable();
}
extern "C" {
pub fn xthal_icache_disable();
}
extern "C" {
pub fn xthal_dcache_disable();
}
extern "C" {
pub fn xthal_icache_all_invalidate();
}
extern "C" {
pub fn xthal_dcache_all_invalidate();
}
extern "C" {
pub fn xthal_dcache_all_writeback();
}
extern "C" {
pub fn xthal_dcache_all_writeback_inv();
}
extern "C" {
pub fn xthal_icache_all_unlock();
}
extern "C" {
pub fn xthal_dcache_all_unlock();
}
extern "C" {
pub fn xthal_icache_region_lock(addr: *mut libc::c_void, size: libc::c_uint);
}
extern "C" {
pub fn xthal_dcache_region_lock(addr: *mut libc::c_void, size: libc::c_uint);
}
extern "C" {
pub fn xthal_icache_region_unlock(addr: *mut libc::c_void, size: libc::c_uint);
}
extern "C" {
pub fn xthal_dcache_region_unlock(addr: *mut libc::c_void, size: libc::c_uint);
}
extern "C" {
pub fn xthal_icache_hugerange_invalidate(addr: *mut libc::c_void, size: libc::c_uint);
}
extern "C" {
pub fn xthal_icache_hugerange_unlock(addr: *mut libc::c_void, size: libc::c_uint);
}
extern "C" {
pub fn xthal_dcache_hugerange_invalidate(addr: *mut libc::c_void, size: libc::c_uint);
}
extern "C" {
pub fn xthal_dcache_hugerange_unlock(addr: *mut libc::c_void, size: libc::c_uint);
}
extern "C" {
pub fn xthal_dcache_hugerange_writeback(addr: *mut libc::c_void, size: libc::c_uint);
}
extern "C" {
pub fn xthal_dcache_hugerange_writeback_inv(addr: *mut libc::c_void, size: libc::c_uint);
}
extern "C" {
pub fn xthal_icache_line_lock(addr: *mut libc::c_void);
}
extern "C" {
pub fn xthal_dcache_line_lock(addr: *mut libc::c_void);
}
extern "C" {
pub fn xthal_icache_line_unlock(addr: *mut libc::c_void);
}
extern "C" {
pub fn xthal_dcache_line_unlock(addr: *mut libc::c_void);
}
extern "C" {
pub fn xthal_memep_inject_error(addr: *mut libc::c_void, size: libc::c_int, flags: libc::c_int);
}
extern "C" {
pub static Xthal_have_spanning_way: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_identity_map: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_mimic_cacheattr: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_xlt_cacheattr: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_cacheattr: libc::c_uchar;
}
extern "C" {
pub static Xthal_have_tlbs: libc::c_uchar;
}
extern "C" {
pub static Xthal_mmu_asid_bits: libc::c_uchar;
}
extern "C" {
pub static Xthal_mmu_asid_kernel: libc::c_uchar;
}
extern "C" {
pub static Xthal_mmu_rings: libc::c_uchar;
}
extern "C" {
pub static Xthal_mmu_ring_bits: libc::c_uchar;
}
extern "C" {
pub static Xthal_mmu_sr_bits: libc::c_uchar;
}
extern "C" {
pub static Xthal_mmu_ca_bits: libc::c_uchar;
}
extern "C" {
pub static Xthal_mmu_max_pte_page_size: libc::c_uint;
}
extern "C" {
pub static Xthal_mmu_min_pte_page_size: libc::c_uint;
}
extern "C" {
pub static Xthal_itlb_way_bits: libc::c_uchar;
}
extern "C" {
pub static Xthal_itlb_ways: libc::c_uchar;
}
extern "C" {
pub static Xthal_itlb_arf_ways: libc::c_uchar;
}
extern "C" {
pub static Xthal_dtlb_way_bits: libc::c_uchar;
}
extern "C" {
pub static Xthal_dtlb_ways: libc::c_uchar;
}
extern "C" {
pub static Xthal_dtlb_arf_ways: libc::c_uchar;
}
extern "C" {
pub fn xthal_static_v2p(vaddr: libc::c_uint, paddrp: *mut libc::c_uint) -> libc::c_int;
}
extern "C" {
pub fn xthal_static_p2v(
paddr: libc::c_uint,
vaddrp: *mut libc::c_uint,
cached: libc::c_uint,
) -> libc::c_int;
}
extern "C" {
pub fn xthal_set_region_translation(
vaddr: *mut libc::c_void,
paddr: *mut libc::c_void,
size: libc::c_uint,
cache_atr: libc::c_uint,
flags: libc::c_uint,
) -> libc::c_int;
}
extern "C" {
pub fn xthal_v2p(
arg1: *mut libc::c_void,
arg2: *mut *mut libc::c_void,
arg3: *mut libc::c_uint,
arg4: *mut libc::c_uint,
) -> libc::c_int;
}
extern "C" {
pub fn xthal_invalidate_region(addr: *mut libc::c_void) -> libc::c_int;
}
extern "C" {
pub fn xthal_set_region_translation_raw(
vaddr: *mut libc::c_void,
paddr: *mut libc::c_void,
cattr: libc::c_uint,
) -> libc::c_int;
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct xthal_MPU_entry {
pub as_: u32,
pub at: u32,
}
extern "C" {
pub static mut Xthal_mpu_bgmap: [xthal_MPU_entry; 0usize];
}
extern "C" {
pub fn xthal_is_kernel_readable(accessRights: u32) -> i32;
}
extern "C" {
pub fn xthal_is_kernel_writeable(accessRights: u32) -> i32;
}
extern "C" {
pub fn xthal_is_kernel_executable(accessRights: u32) -> i32;
}
extern "C" {
pub fn xthal_is_user_readable(accessRights: u32) -> i32;
}
extern "C" {
pub fn xthal_is_user_writeable(accessRights: u32) -> i32;
}
extern "C" {
pub fn xthal_is_user_executable(accessRights: u32) -> i32;
}
extern "C" {
pub fn xthal_encode_memory_type(x: u32) -> libc::c_int;
}
extern "C" {
pub fn xthal_is_cacheable(memoryType: u32) -> i32;
}
extern "C" {
pub fn xthal_is_writeback(memoryType: u32) -> i32;
}
extern "C" {
pub fn xthal_is_device(memoryType: u32) -> i32;
}
extern "C" {
pub fn xthal_read_map(entries: *mut xthal_MPU_entry) -> i32;
}
extern "C" {
pub fn xthal_write_map(entries: *const xthal_MPU_entry, n: u32);
}
extern "C" {
pub fn xthal_check_map(entries: *const xthal_MPU_entry, n: u32) -> libc::c_int;
}
extern "C" {
pub fn xthal_get_entry_for_address(
vaddr: *mut libc::c_void,
infgmap: *mut i32,
) -> xthal_MPU_entry;
}
extern "C" {
pub fn xthal_calc_cacheadrdis(e: *const xthal_MPU_entry, n: u32) -> u32;
}
extern "C" {
pub fn xthal_mpu_set_region_attribute(
vaddr: *mut libc::c_void,
size: size_t,
accessRights: i32,
memoryType: i32,
flags: u32,
) -> libc::c_int;
}
extern "C" {
pub fn xthal_read_background_map(entries: *mut xthal_MPU_entry) -> i32;
}
extern "C" {
pub static Xthal_cp_id_FPU: libc::c_uchar;
}
extern "C" {
pub static Xthal_cp_mask_FPU: libc::c_uint;
}
extern "C" {
pub static Xthal_cp_id_XCHAL_CP1_IDENT: libc::c_uchar;
}
extern "C" {
pub static Xthal_cp_mask_XCHAL_CP1_IDENT: libc::c_uint;
}
extern "C" {
pub static Xthal_cp_id_XCHAL_CP2_IDENT: libc::c_uchar;
}
extern "C" {
pub static Xthal_cp_mask_XCHAL_CP2_IDENT: libc::c_uint;
}
extern "C" {
pub static Xthal_cp_id_XCHAL_CP3_IDENT: libc::c_uchar;
}
extern "C" {
pub static Xthal_cp_mask_XCHAL_CP3_IDENT: libc::c_uint;
}
extern "C" {
pub static Xthal_cp_id_XCHAL_CP4_IDENT: libc::c_uchar;
}
extern "C" {
pub static Xthal_cp_mask_XCHAL_CP4_IDENT: libc::c_uint;
}
extern "C" {
pub static Xthal_cp_id_XCHAL_CP5_IDENT: libc::c_uchar;
}
extern "C" {
pub static Xthal_cp_mask_XCHAL_CP5_IDENT: libc::c_uint;
}
extern "C" {
pub static Xthal_cp_id_XCHAL_CP6_IDENT: libc::c_uchar;
}
extern "C" {
pub static Xthal_cp_mask_XCHAL_CP6_IDENT: libc::c_uint;
}
extern "C" {
pub static Xthal_cp_id_XCHAL_CP7_IDENT: libc::c_uchar;
}
extern "C" {
pub static Xthal_cp_mask_XCHAL_CP7_IDENT: libc::c_uint;
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct KernelFrame {
pub pc: libc::c_long,
pub ps: libc::c_long,
pub areg: [libc::c_long; 4usize],
pub sar: libc::c_long,
pub lcount: libc::c_long,
pub lbeg: libc::c_long,
pub lend: libc::c_long,
pub acclo: libc::c_long,
pub acchi: libc::c_long,
pub mr: [libc::c_long; 4usize],
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct UserFrame {
pub pc: libc::c_long,
pub ps: libc::c_long,
pub sar: libc::c_long,
pub vpri: libc::c_long,
pub a2: libc::c_long,
pub a3: libc::c_long,
pub a4: libc::c_long,
pub a5: libc::c_long,
pub exccause: libc::c_long,
pub lcount: libc::c_long,
pub lbeg: libc::c_long,
pub lend: libc::c_long,
pub acclo: libc::c_long,
pub acchi: libc::c_long,
pub mr: [libc::c_long; 4usize],
pub pad: [libc::c_long; 2usize],
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct XtExcFrame {
pub exit: libc::c_long,
pub pc: libc::c_long,
pub ps: libc::c_long,
pub a0: libc::c_long,
pub a1: libc::c_long,
pub a2: libc::c_long,
pub a3: libc::c_long,
pub a4: libc::c_long,
pub a5: libc::c_long,
pub a6: libc::c_long,
pub a7: libc::c_long,
pub a8: libc::c_long,
pub a9: libc::c_long,
pub a10: libc::c_long,
pub a11: libc::c_long,
pub a12: libc::c_long,
pub a13: libc::c_long,
pub a14: libc::c_long,
pub a15: libc::c_long,
pub sar: libc::c_long,
pub exccause: libc::c_long,
pub excvaddr: libc::c_long,
pub lbeg: libc::c_long,
pub lend: libc::c_long,
pub lcount: libc::c_long,
pub tmp0: libc::c_long,
pub tmp1: libc::c_long,
pub tmp2: libc::c_long,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct XtSolFrame {
pub exit: libc::c_long,
pub pc: libc::c_long,
pub ps: libc::c_long,
pub next: libc::c_long,
pub a0: libc::c_long,
pub a1: libc::c_long,
pub a2: libc::c_long,
pub a3: libc::c_long,
}
pub type xt_handler = ::core::option::Option<unsafe extern "C" fn(arg1: *mut libc::c_void)>;
pub type xt_exc_handler = ::core::option::Option<unsafe extern "C" fn(arg1: *mut XtExcFrame)>;
extern "C" {
pub fn xt_set_exception_handler(n: libc::c_int, f: xt_exc_handler) -> xt_exc_handler;
}
extern "C" {
pub fn xt_set_interrupt_handler(
n: libc::c_int,
f: xt_handler,
arg: *mut libc::c_void,
) -> xt_handler;
}
extern "C" {
pub fn xt_ints_on(mask: libc::c_uint);
}
extern "C" {
pub fn xt_ints_off(mask: libc::c_uint);
}
extern "C" {
pub fn xt_get_interrupt_handler_arg(n: libc::c_int) -> *mut libc::c_void;
}
#[doc = " Function prototype for interrupt handler function"]
pub type intr_handler_t = ::core::option::Option<unsafe extern "C" fn(arg: *mut libc::c_void)>;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct intr_handle_data_t {
_unused: [u8; 0],
}
#[doc = " Handle to an interrupt handler"]
pub type intr_handle_t = *mut intr_handle_data_t;
extern "C" {
#[doc = " @brief Mark an interrupt as a shared interrupt"]
#[doc = ""]
#[doc = " This will mark a certain interrupt on the specified CPU as"]
#[doc = " an interrupt that can be used to hook shared interrupt handlers"]
#[doc = " to."]
#[doc = ""]
#[doc = " @param intno The number of the interrupt (0-31)"]
#[doc = " @param cpu CPU on which the interrupt should be marked as shared (0 or 1)"]
#[doc = " @param is_in_iram Shared interrupt is for handlers that reside in IRAM and"]
#[doc = " the int can be left enabled while the flash cache is disabled."]
#[doc = ""]
#[doc = " @return ESP_ERR_INVALID_ARG if cpu or intno is invalid"]
#[doc = " ESP_OK otherwise"]
pub fn esp_intr_mark_shared(
intno: libc::c_int,
cpu: libc::c_int,
is_in_iram: bool,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Reserve an interrupt to be used outside of this framework"]
#[doc = ""]
#[doc = " This will mark a certain interrupt on the specified CPU as"]
#[doc = " reserved, not to be allocated for any reason."]
#[doc = ""]
#[doc = " @param intno The number of the interrupt (0-31)"]
#[doc = " @param cpu CPU on which the interrupt should be marked as shared (0 or 1)"]
#[doc = ""]
#[doc = " @return ESP_ERR_INVALID_ARG if cpu or intno is invalid"]
#[doc = " ESP_OK otherwise"]
pub fn esp_intr_reserve(intno: libc::c_int, cpu: libc::c_int) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Allocate an interrupt with the given parameters."]
#[doc = ""]
#[doc = " This finds an interrupt that matches the restrictions as given in the flags"]
#[doc = " parameter, maps the given interrupt source to it and hooks up the given"]
#[doc = " interrupt handler (with optional argument) as well. If needed, it can return"]
#[doc = " a handle for the interrupt as well."]
#[doc = ""]
#[doc = " The interrupt will always be allocated on the core that runs this function."]
#[doc = ""]
#[doc = " If ESP_INTR_FLAG_IRAM flag is used, and handler address is not in IRAM or"]
#[doc = " RTC_FAST_MEM, then ESP_ERR_INVALID_ARG is returned."]
#[doc = ""]
#[doc = " @param source The interrupt source. One of the ETS_*_INTR_SOURCE interrupt mux"]
#[doc = " sources, as defined in soc/soc.h, or one of the internal"]
#[doc = " ETS_INTERNAL_*_INTR_SOURCE sources as defined in this header."]
#[doc = " @param flags An ORred mask of the ESP_INTR_FLAG_* defines. These restrict the"]
#[doc = " choice of interrupts that this routine can choose from. If this value"]
#[doc = " is 0, it will default to allocating a non-shared interrupt of level"]
#[doc = " 1, 2 or 3. If this is ESP_INTR_FLAG_SHARED, it will allocate a shared"]
#[doc = " interrupt of level 1. Setting ESP_INTR_FLAG_INTRDISABLED will return"]
#[doc = " from this function with the interrupt disabled."]
#[doc = " @param handler The interrupt handler. Must be NULL when an interrupt of level >3"]
#[doc = " is requested, because these types of interrupts aren't C-callable."]
#[doc = " @param arg Optional argument for passed to the interrupt handler"]
#[doc = " @param ret_handle Pointer to an intr_handle_t to store a handle that can later be"]
#[doc = " used to request details or free the interrupt. Can be NULL if no handle"]
#[doc = " is required."]
#[doc = ""]
#[doc = " @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid."]
#[doc = " ESP_ERR_NOT_FOUND No free interrupt found with the specified flags"]
#[doc = " ESP_OK otherwise"]
pub fn esp_intr_alloc(
source: libc::c_int,
flags: libc::c_int,
handler: intr_handler_t,
arg: *mut libc::c_void,
ret_handle: *mut intr_handle_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Allocate an interrupt with the given parameters."]
#[doc = ""]
#[doc = ""]
#[doc = " This essentially does the same as esp_intr_alloc, but allows specifying a register and mask"]
#[doc = " combo. For shared interrupts, the handler is only called if a read from the specified"]
#[doc = " register, ANDed with the mask, returns non-zero. By passing an interrupt status register"]
#[doc = " address and a fitting mask, this can be used to accelerate interrupt handling in the case"]
#[doc = " a shared interrupt is triggered; by checking the interrupt statuses first, the code can"]
#[doc = " decide which ISRs can be skipped"]
#[doc = ""]
#[doc = " @param source The interrupt source. One of the ETS_*_INTR_SOURCE interrupt mux"]
#[doc = " sources, as defined in soc/soc.h, or one of the internal"]
#[doc = " ETS_INTERNAL_*_INTR_SOURCE sources as defined in this header."]
#[doc = " @param flags An ORred mask of the ESP_INTR_FLAG_* defines. These restrict the"]
#[doc = " choice of interrupts that this routine can choose from. If this value"]
#[doc = " is 0, it will default to allocating a non-shared interrupt of level"]
#[doc = " 1, 2 or 3. If this is ESP_INTR_FLAG_SHARED, it will allocate a shared"]
#[doc = " interrupt of level 1. Setting ESP_INTR_FLAG_INTRDISABLED will return"]
#[doc = " from this function with the interrupt disabled."]
#[doc = " @param intrstatusreg The address of an interrupt status register"]
#[doc = " @param intrstatusmask A mask. If a read of address intrstatusreg has any of the bits"]
#[doc = " that are 1 in the mask set, the ISR will be called. If not, it will be"]
#[doc = " skipped."]
#[doc = " @param handler The interrupt handler. Must be NULL when an interrupt of level >3"]
#[doc = " is requested, because these types of interrupts aren't C-callable."]
#[doc = " @param arg Optional argument for passed to the interrupt handler"]
#[doc = " @param ret_handle Pointer to an intr_handle_t to store a handle that can later be"]
#[doc = " used to request details or free the interrupt. Can be NULL if no handle"]
#[doc = " is required."]
#[doc = ""]
#[doc = " @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid."]
#[doc = " ESP_ERR_NOT_FOUND No free interrupt found with the specified flags"]
#[doc = " ESP_OK otherwise"]
pub fn esp_intr_alloc_intrstatus(
source: libc::c_int,
flags: libc::c_int,
intrstatusreg: u32,
intrstatusmask: u32,
handler: intr_handler_t,
arg: *mut libc::c_void,
ret_handle: *mut intr_handle_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Disable and free an interrupt."]
#[doc = ""]
#[doc = " Use an interrupt handle to disable the interrupt and release the resources associated with it."]
#[doc = " If the current core is not the core that registered this interrupt, this routine will be assigned to"]
#[doc = " the core that allocated this interrupt, blocking and waiting until the resource is successfully released."]
#[doc = ""]
#[doc = " @note"]
#[doc = " When the handler shares its source with other handlers, the interrupt status"]
#[doc = " bits it's responsible for should be managed properly before freeing it. see"]
#[doc = " ``esp_intr_disable`` for more details. Please do not call this function in ``esp_ipc_call_blocking``."]
#[doc = ""]
#[doc = " @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus"]
#[doc = ""]
#[doc = " @return ESP_ERR_INVALID_ARG the handle is NULL"]
#[doc = " ESP_FAIL failed to release this handle"]
#[doc = " ESP_OK otherwise"]
pub fn esp_intr_free(handle: intr_handle_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get CPU number an interrupt is tied to"]
#[doc = ""]
#[doc = " @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus"]
#[doc = ""]
#[doc = " @return The core number where the interrupt is allocated"]
pub fn esp_intr_get_cpu(handle: intr_handle_t) -> libc::c_int;
}
extern "C" {
#[doc = " @brief Get the allocated interrupt for a certain handle"]
#[doc = ""]
#[doc = " @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus"]
#[doc = ""]
#[doc = " @return The interrupt number"]
pub fn esp_intr_get_intno(handle: intr_handle_t) -> libc::c_int;
}
extern "C" {
#[doc = " @brief Disable the interrupt associated with the handle"]
#[doc = ""]
#[doc = " @note"]
#[doc = " 1. For local interrupts (ESP_INTERNAL_* sources), this function has to be called on the"]
#[doc = " CPU the interrupt is allocated on. Other interrupts have no such restriction."]
#[doc = " 2. When several handlers sharing a same interrupt source, interrupt status bits, which are"]
#[doc = " handled in the handler to be disabled, should be masked before the disabling, or handled"]
#[doc = " in other enabled interrupts properly. Miss of interrupt status handling will cause infinite"]
#[doc = " interrupt calls and finally system crash."]
#[doc = ""]
#[doc = " @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus"]
#[doc = ""]
#[doc = " @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid."]
#[doc = " ESP_OK otherwise"]
pub fn esp_intr_disable(handle: intr_handle_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable the interrupt associated with the handle"]
#[doc = ""]
#[doc = " @note For local interrupts (ESP_INTERNAL_* sources), this function has to be called on the"]
#[doc = " CPU the interrupt is allocated on. Other interrupts have no such restriction."]
#[doc = ""]
#[doc = " @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus"]
#[doc = ""]
#[doc = " @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid."]
#[doc = " ESP_OK otherwise"]
pub fn esp_intr_enable(handle: intr_handle_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set the \"in IRAM\" status of the handler."]
#[doc = ""]
#[doc = " @note Does not work on shared interrupts."]
#[doc = ""]
#[doc = " @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus"]
#[doc = " @param is_in_iram Whether the handler associated with this handle resides in IRAM."]
#[doc = " Handlers residing in IRAM can be called when cache is disabled."]
#[doc = ""]
#[doc = " @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid."]
#[doc = " ESP_OK otherwise"]
pub fn esp_intr_set_in_iram(handle: intr_handle_t, is_in_iram: bool) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Disable interrupts that aren't specifically marked as running from IRAM"]
pub fn esp_intr_noniram_disable();
}
extern "C" {
#[doc = " @brief Re-enable interrupts disabled by esp_intr_noniram_disable"]
pub fn esp_intr_noniram_enable();
}
#[repr(C)]
#[derive(Copy, Clone)]
pub struct gpio_dev_s {
pub bt_select: u32,
pub out: u32,
pub out_w1ts: u32,
pub out_w1tc: u32,
pub out1: gpio_dev_s__bindgen_ty_1,
pub out1_w1ts: gpio_dev_s__bindgen_ty_2,
pub out1_w1tc: gpio_dev_s__bindgen_ty_3,
pub sdio_select: gpio_dev_s__bindgen_ty_4,
pub enable: u32,
pub enable_w1ts: u32,
pub enable_w1tc: u32,
pub enable1: gpio_dev_s__bindgen_ty_5,
pub enable1_w1ts: gpio_dev_s__bindgen_ty_6,
pub enable1_w1tc: gpio_dev_s__bindgen_ty_7,
pub strap: gpio_dev_s__bindgen_ty_8,
pub in_: u32,
pub in1: gpio_dev_s__bindgen_ty_9,
pub status: u32,
pub status_w1ts: u32,
pub status_w1tc: u32,
pub status1: gpio_dev_s__bindgen_ty_10,
pub status1_w1ts: gpio_dev_s__bindgen_ty_11,
pub status1_w1tc: gpio_dev_s__bindgen_ty_12,
pub reserved_5c: u32,
pub acpu_int: u32,
pub acpu_nmi_int: u32,
pub pcpu_int: u32,
pub pcpu_nmi_int: u32,
pub cpusdio_int: u32,
pub acpu_int1: gpio_dev_s__bindgen_ty_13,
pub acpu_nmi_int1: gpio_dev_s__bindgen_ty_14,
pub pcpu_int1: gpio_dev_s__bindgen_ty_15,
pub pcpu_nmi_int1: gpio_dev_s__bindgen_ty_16,
pub cpusdio_int1: gpio_dev_s__bindgen_ty_17,
pub pin: [gpio_dev_s__bindgen_ty_18; 40usize],
pub cali_conf: gpio_dev_s__bindgen_ty_19,
pub cali_data: gpio_dev_s__bindgen_ty_20,
pub func_in_sel_cfg: [gpio_dev_s__bindgen_ty_21; 256usize],
pub func_out_sel_cfg: [gpio_dev_s__bindgen_ty_22; 40usize],
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_1 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_1__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_1__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_1__bindgen_ty_1 {
#[inline]
pub fn data(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_data(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn reserved8(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved8(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 24u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(data: u32, reserved8: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let data: u32 = unsafe { ::core::mem::transmute(data) };
data as u64
});
__bindgen_bitfield_unit.set(8usize, 24u8, {
let reserved8: u32 = unsafe { ::core::mem::transmute(reserved8) };
reserved8 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_2 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_2__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_2__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_2__bindgen_ty_1 {
#[inline]
pub fn data(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_data(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn reserved8(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved8(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 24u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(data: u32, reserved8: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let data: u32 = unsafe { ::core::mem::transmute(data) };
data as u64
});
__bindgen_bitfield_unit.set(8usize, 24u8, {
let reserved8: u32 = unsafe { ::core::mem::transmute(reserved8) };
reserved8 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_3 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_3__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_3__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_3__bindgen_ty_1 {
#[inline]
pub fn data(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_data(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn reserved8(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved8(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 24u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(data: u32, reserved8: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let data: u32 = unsafe { ::core::mem::transmute(data) };
data as u64
});
__bindgen_bitfield_unit.set(8usize, 24u8, {
let reserved8: u32 = unsafe { ::core::mem::transmute(reserved8) };
reserved8 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_4 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_4__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_4__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_4__bindgen_ty_1 {
#[inline]
pub fn sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn reserved8(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved8(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 24u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(sel: u32, reserved8: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let sel: u32 = unsafe { ::core::mem::transmute(sel) };
sel as u64
});
__bindgen_bitfield_unit.set(8usize, 24u8, {
let reserved8: u32 = unsafe { ::core::mem::transmute(reserved8) };
reserved8 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_5 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_5__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_5__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_5__bindgen_ty_1 {
#[inline]
pub fn data(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_data(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn reserved8(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved8(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 24u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(data: u32, reserved8: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let data: u32 = unsafe { ::core::mem::transmute(data) };
data as u64
});
__bindgen_bitfield_unit.set(8usize, 24u8, {
let reserved8: u32 = unsafe { ::core::mem::transmute(reserved8) };
reserved8 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_6 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_6__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_6__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_6__bindgen_ty_1 {
#[inline]
pub fn data(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_data(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn reserved8(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved8(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 24u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(data: u32, reserved8: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let data: u32 = unsafe { ::core::mem::transmute(data) };
data as u64
});
__bindgen_bitfield_unit.set(8usize, 24u8, {
let reserved8: u32 = unsafe { ::core::mem::transmute(reserved8) };
reserved8 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_7 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_7__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_7__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_7__bindgen_ty_1 {
#[inline]
pub fn data(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_data(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn reserved8(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved8(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 24u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(data: u32, reserved8: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let data: u32 = unsafe { ::core::mem::transmute(data) };
data as u64
});
__bindgen_bitfield_unit.set(8usize, 24u8, {
let reserved8: u32 = unsafe { ::core::mem::transmute(reserved8) };
reserved8 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_8 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_8__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_8__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl gpio_dev_s__bindgen_ty_8__bindgen_ty_1 {
#[inline]
pub fn strapping(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 16u8) as u32) }
}
#[inline]
pub fn set_strapping(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 16u8, val as u64)
}
}
#[inline]
pub fn reserved16(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 16u8) as u32) }
}
#[inline]
pub fn set_reserved16(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 16u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
strapping: u32,
reserved16: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 16u8, {
let strapping: u32 = unsafe { ::core::mem::transmute(strapping) };
strapping as u64
});
__bindgen_bitfield_unit.set(16usize, 16u8, {
let reserved16: u32 = unsafe { ::core::mem::transmute(reserved16) };
reserved16 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_9 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_9__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_9__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_9__bindgen_ty_1 {
#[inline]
pub fn data(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_data(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn reserved8(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved8(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 24u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(data: u32, reserved8: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let data: u32 = unsafe { ::core::mem::transmute(data) };
data as u64
});
__bindgen_bitfield_unit.set(8usize, 24u8, {
let reserved8: u32 = unsafe { ::core::mem::transmute(reserved8) };
reserved8 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_10 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_10__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_10__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_10__bindgen_ty_1 {
#[inline]
pub fn intr_st(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_intr_st(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn reserved8(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved8(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 24u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
intr_st: u32,
reserved8: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let intr_st: u32 = unsafe { ::core::mem::transmute(intr_st) };
intr_st as u64
});
__bindgen_bitfield_unit.set(8usize, 24u8, {
let reserved8: u32 = unsafe { ::core::mem::transmute(reserved8) };
reserved8 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_11 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_11__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_11__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_11__bindgen_ty_1 {
#[inline]
pub fn intr_st(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_intr_st(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn reserved8(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved8(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 24u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
intr_st: u32,
reserved8: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let intr_st: u32 = unsafe { ::core::mem::transmute(intr_st) };
intr_st as u64
});
__bindgen_bitfield_unit.set(8usize, 24u8, {
let reserved8: u32 = unsafe { ::core::mem::transmute(reserved8) };
reserved8 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_12 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_12__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_12__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_12__bindgen_ty_1 {
#[inline]
pub fn intr_st(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_intr_st(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn reserved8(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved8(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 24u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
intr_st: u32,
reserved8: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let intr_st: u32 = unsafe { ::core::mem::transmute(intr_st) };
intr_st as u64
});
__bindgen_bitfield_unit.set(8usize, 24u8, {
let reserved8: u32 = unsafe { ::core::mem::transmute(reserved8) };
reserved8 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_13 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_13__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_13__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_13__bindgen_ty_1 {
#[inline]
pub fn intr(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_intr(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn reserved8(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved8(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 24u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(intr: u32, reserved8: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let intr: u32 = unsafe { ::core::mem::transmute(intr) };
intr as u64
});
__bindgen_bitfield_unit.set(8usize, 24u8, {
let reserved8: u32 = unsafe { ::core::mem::transmute(reserved8) };
reserved8 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_14 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_14__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_14__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_14__bindgen_ty_1 {
#[inline]
pub fn intr(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_intr(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn reserved8(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved8(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 24u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(intr: u32, reserved8: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let intr: u32 = unsafe { ::core::mem::transmute(intr) };
intr as u64
});
__bindgen_bitfield_unit.set(8usize, 24u8, {
let reserved8: u32 = unsafe { ::core::mem::transmute(reserved8) };
reserved8 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_15 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_15__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_15__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_15__bindgen_ty_1 {
#[inline]
pub fn intr(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_intr(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn reserved8(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved8(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 24u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(intr: u32, reserved8: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let intr: u32 = unsafe { ::core::mem::transmute(intr) };
intr as u64
});
__bindgen_bitfield_unit.set(8usize, 24u8, {
let reserved8: u32 = unsafe { ::core::mem::transmute(reserved8) };
reserved8 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_16 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_16__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_16__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_16__bindgen_ty_1 {
#[inline]
pub fn intr(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_intr(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn reserved8(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved8(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 24u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(intr: u32, reserved8: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let intr: u32 = unsafe { ::core::mem::transmute(intr) };
intr as u64
});
__bindgen_bitfield_unit.set(8usize, 24u8, {
let reserved8: u32 = unsafe { ::core::mem::transmute(reserved8) };
reserved8 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_17 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_17__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_17__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_17__bindgen_ty_1 {
#[inline]
pub fn intr(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_intr(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn reserved8(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved8(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 24u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(intr: u32, reserved8: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let intr: u32 = unsafe { ::core::mem::transmute(intr) };
intr as u64
});
__bindgen_bitfield_unit.set(8usize, 24u8, {
let reserved8: u32 = unsafe { ::core::mem::transmute(reserved8) };
reserved8 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_18 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_18__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_18__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl gpio_dev_s__bindgen_ty_18__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 2u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 2u8, val as u64)
}
}
#[inline]
pub fn pad_driver(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_pad_driver(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved3(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 4u8) as u32) }
}
#[inline]
pub fn set_reserved3(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 4u8, val as u64)
}
}
#[inline]
pub fn int_type(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 3u8) as u32) }
}
#[inline]
pub fn set_int_type(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 3u8, val as u64)
}
}
#[inline]
pub fn wakeup_enable(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_wakeup_enable(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn config(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 2u8) as u32) }
}
#[inline]
pub fn set_config(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 2u8, val as u64)
}
}
#[inline]
pub fn int_ena(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 5u8) as u32) }
}
#[inline]
pub fn set_int_ena(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 5u8, val as u64)
}
}
#[inline]
pub fn reserved18(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 14u8) as u32) }
}
#[inline]
pub fn set_reserved18(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 14u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
pad_driver: u32,
reserved3: u32,
int_type: u32,
wakeup_enable: u32,
config: u32,
int_ena: u32,
reserved18: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 2u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let pad_driver: u32 = unsafe { ::core::mem::transmute(pad_driver) };
pad_driver as u64
});
__bindgen_bitfield_unit.set(3usize, 4u8, {
let reserved3: u32 = unsafe { ::core::mem::transmute(reserved3) };
reserved3 as u64
});
__bindgen_bitfield_unit.set(7usize, 3u8, {
let int_type: u32 = unsafe { ::core::mem::transmute(int_type) };
int_type as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let wakeup_enable: u32 = unsafe { ::core::mem::transmute(wakeup_enable) };
wakeup_enable as u64
});
__bindgen_bitfield_unit.set(11usize, 2u8, {
let config: u32 = unsafe { ::core::mem::transmute(config) };
config as u64
});
__bindgen_bitfield_unit.set(13usize, 5u8, {
let int_ena: u32 = unsafe { ::core::mem::transmute(int_ena) };
int_ena as u64
});
__bindgen_bitfield_unit.set(18usize, 14u8, {
let reserved18: u32 = unsafe { ::core::mem::transmute(reserved18) };
reserved18 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_19 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_19__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_19__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_19__bindgen_ty_1 {
#[inline]
pub fn rtc_max(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 10u8) as u32) }
}
#[inline]
pub fn set_rtc_max(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 10u8, val as u64)
}
}
#[inline]
pub fn reserved10(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 21u8) as u32) }
}
#[inline]
pub fn set_reserved10(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 21u8, val as u64)
}
}
#[inline]
pub fn start(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_start(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
rtc_max: u32,
reserved10: u32,
start: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 10u8, {
let rtc_max: u32 = unsafe { ::core::mem::transmute(rtc_max) };
rtc_max as u64
});
__bindgen_bitfield_unit.set(10usize, 21u8, {
let reserved10: u32 = unsafe { ::core::mem::transmute(reserved10) };
reserved10 as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let start: u32 = unsafe { ::core::mem::transmute(start) };
start as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_20 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_20__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_20__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_20__bindgen_ty_1 {
#[inline]
pub fn value_sync2(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 20u8) as u32) }
}
#[inline]
pub fn set_value_sync2(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 20u8, val as u64)
}
}
#[inline]
pub fn reserved20(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 10u8) as u32) }
}
#[inline]
pub fn set_reserved20(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 10u8, val as u64)
}
}
#[inline]
pub fn rdy_real(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_rdy_real(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn rdy_sync2(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_rdy_sync2(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
value_sync2: u32,
reserved20: u32,
rdy_real: u32,
rdy_sync2: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 20u8, {
let value_sync2: u32 = unsafe { ::core::mem::transmute(value_sync2) };
value_sync2 as u64
});
__bindgen_bitfield_unit.set(20usize, 10u8, {
let reserved20: u32 = unsafe { ::core::mem::transmute(reserved20) };
reserved20 as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let rdy_real: u32 = unsafe { ::core::mem::transmute(rdy_real) };
rdy_real as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let rdy_sync2: u32 = unsafe { ::core::mem::transmute(rdy_sync2) };
rdy_sync2 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_21 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_21__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_21__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_21__bindgen_ty_1 {
#[inline]
pub fn func_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 6u8) as u32) }
}
#[inline]
pub fn set_func_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 6u8, val as u64)
}
}
#[inline]
pub fn sig_in_inv(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_sig_in_inv(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn sig_in_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_sig_in_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved8(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved8(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 24u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
func_sel: u32,
sig_in_inv: u32,
sig_in_sel: u32,
reserved8: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 6u8, {
let func_sel: u32 = unsafe { ::core::mem::transmute(func_sel) };
func_sel as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let sig_in_inv: u32 = unsafe { ::core::mem::transmute(sig_in_inv) };
sig_in_inv as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let sig_in_sel: u32 = unsafe { ::core::mem::transmute(sig_in_sel) };
sig_in_sel as u64
});
__bindgen_bitfield_unit.set(8usize, 24u8, {
let reserved8: u32 = unsafe { ::core::mem::transmute(reserved8) };
reserved8 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union gpio_dev_s__bindgen_ty_22 {
pub __bindgen_anon_1: gpio_dev_s__bindgen_ty_22__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct gpio_dev_s__bindgen_ty_22__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl gpio_dev_s__bindgen_ty_22__bindgen_ty_1 {
#[inline]
pub fn func_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 9u8) as u32) }
}
#[inline]
pub fn set_func_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 9u8, val as u64)
}
}
#[inline]
pub fn inv_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_inv_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn oen_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_oen_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn oen_inv_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_oen_inv_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved12(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 20u8) as u32) }
}
#[inline]
pub fn set_reserved12(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 20u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
func_sel: u32,
inv_sel: u32,
oen_sel: u32,
oen_inv_sel: u32,
reserved12: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 9u8, {
let func_sel: u32 = unsafe { ::core::mem::transmute(func_sel) };
func_sel as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let inv_sel: u32 = unsafe { ::core::mem::transmute(inv_sel) };
inv_sel as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let oen_sel: u32 = unsafe { ::core::mem::transmute(oen_sel) };
oen_sel as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let oen_inv_sel: u32 = unsafe { ::core::mem::transmute(oen_inv_sel) };
oen_inv_sel as u64
});
__bindgen_bitfield_unit.set(12usize, 20u8, {
let reserved12: u32 = unsafe { ::core::mem::transmute(reserved12) };
reserved12 as u64
});
__bindgen_bitfield_unit
}
}
pub type gpio_dev_t = gpio_dev_s;
extern "C" {
pub static mut GPIO: gpio_dev_t;
}
extern "C" {
pub static GPIO_PIN_MUX_REG: [u32; 40usize];
}
extern "C" {
pub static GPIO_HOLD_MASK: [u32; 40usize];
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum gpio_port_t {
GPIO_PORT_0 = 0,
GPIO_PORT_MAX = 1,
}
#[repr(i32)]
#[doc = " @endcond"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum gpio_num_t {
#[doc = "< Use to signal not connected to S/W"]
GPIO_NUM_NC = -1,
#[doc = "< GPIO0, input and output"]
GPIO_NUM_0 = 0,
#[doc = "< GPIO1, input and output"]
GPIO_NUM_1 = 1,
#[doc = "< GPIO2, input and output"]
GPIO_NUM_2 = 2,
#[doc = "< GPIO3, input and output"]
GPIO_NUM_3 = 3,
#[doc = "< GPIO4, input and output"]
GPIO_NUM_4 = 4,
#[doc = "< GPIO5, input and output"]
GPIO_NUM_5 = 5,
#[doc = "< GPIO6, input and output"]
GPIO_NUM_6 = 6,
#[doc = "< GPIO7, input and output"]
GPIO_NUM_7 = 7,
#[doc = "< GPIO8, input and output"]
GPIO_NUM_8 = 8,
#[doc = "< GPIO9, input and output"]
GPIO_NUM_9 = 9,
#[doc = "< GPIO10, input and output"]
GPIO_NUM_10 = 10,
#[doc = "< GPIO11, input and output"]
GPIO_NUM_11 = 11,
#[doc = "< GPIO12, input and output"]
GPIO_NUM_12 = 12,
#[doc = "< GPIO13, input and output"]
GPIO_NUM_13 = 13,
#[doc = "< GPIO14, input and output"]
GPIO_NUM_14 = 14,
#[doc = "< GPIO15, input and output"]
GPIO_NUM_15 = 15,
#[doc = "< GPIO16, input and output"]
GPIO_NUM_16 = 16,
#[doc = "< GPIO17, input and output"]
GPIO_NUM_17 = 17,
#[doc = "< GPIO18, input and output"]
GPIO_NUM_18 = 18,
#[doc = "< GPIO19, input and output"]
GPIO_NUM_19 = 19,
#[doc = "< GPIO20, input and output"]
GPIO_NUM_20 = 20,
#[doc = "< GPIO21, input and output"]
GPIO_NUM_21 = 21,
#[doc = "< GPIO22, input and output"]
GPIO_NUM_22 = 22,
#[doc = "< GPIO23, input and output"]
GPIO_NUM_23 = 23,
#[doc = "< GPIO25, input and output"]
GPIO_NUM_25 = 25,
#[doc = "< GPIO26, input and output"]
GPIO_NUM_26 = 26,
#[doc = "< GPIO27, input and output"]
GPIO_NUM_27 = 27,
#[doc = "< GPIO28, input and output"]
GPIO_NUM_28 = 28,
#[doc = "< GPIO29, input and output"]
GPIO_NUM_29 = 29,
#[doc = "< GPIO30, input and output"]
GPIO_NUM_30 = 30,
#[doc = "< GPIO31, input and output"]
GPIO_NUM_31 = 31,
#[doc = "< GPIO32, input and output"]
GPIO_NUM_32 = 32,
#[doc = "< GPIO33, input and output"]
GPIO_NUM_33 = 33,
#[doc = "< GPIO34, input mode only(ESP32) / input and output(ESP32-S2)"]
GPIO_NUM_34 = 34,
#[doc = "< GPIO35, input mode only(ESP32) / input and output(ESP32-S2)"]
GPIO_NUM_35 = 35,
#[doc = "< GPIO36, input mode only(ESP32) / input and output(ESP32-S2)"]
GPIO_NUM_36 = 36,
#[doc = "< GPIO37, input mode only(ESP32) / input and output(ESP32-S2)"]
GPIO_NUM_37 = 37,
#[doc = "< GPIO38, input mode only(ESP32) / input and output(ESP32-S2)"]
GPIO_NUM_38 = 38,
#[doc = "< GPIO39, input mode only(ESP32) / input and output(ESP32-S2)"]
GPIO_NUM_39 = 39,
GPIO_NUM_MAX = 40,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum gpio_int_type_t {
#[doc = "< Disable GPIO interrupt"]
GPIO_INTR_DISABLE = 0,
#[doc = "< GPIO interrupt type : rising edge"]
GPIO_INTR_POSEDGE = 1,
#[doc = "< GPIO interrupt type : falling edge"]
GPIO_INTR_NEGEDGE = 2,
#[doc = "< GPIO interrupt type : both rising and falling edge"]
GPIO_INTR_ANYEDGE = 3,
#[doc = "< GPIO interrupt type : input low level trigger"]
GPIO_INTR_LOW_LEVEL = 4,
#[doc = "< GPIO interrupt type : input high level trigger"]
GPIO_INTR_HIGH_LEVEL = 5,
GPIO_INTR_MAX = 6,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum gpio_mode_t {
#[doc = "< GPIO mode : disable input and output"]
GPIO_MODE_DISABLE = 0,
#[doc = "< GPIO mode : input only"]
GPIO_MODE_INPUT = 1,
#[doc = "< GPIO mode : output only mode"]
GPIO_MODE_OUTPUT = 2,
#[doc = "< GPIO mode : output only with open-drain mode"]
GPIO_MODE_OUTPUT_OD = 6,
#[doc = "< GPIO mode : output and input with open-drain mode"]
GPIO_MODE_INPUT_OUTPUT_OD = 7,
#[doc = "< GPIO mode : output and input mode"]
GPIO_MODE_INPUT_OUTPUT = 3,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum gpio_pullup_t {
#[doc = "< Disable GPIO pull-up resistor"]
GPIO_PULLUP_DISABLE = 0,
#[doc = "< Enable GPIO pull-up resistor"]
GPIO_PULLUP_ENABLE = 1,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum gpio_pulldown_t {
#[doc = "< Disable GPIO pull-down resistor"]
GPIO_PULLDOWN_DISABLE = 0,
#[doc = "< Enable GPIO pull-down resistor"]
GPIO_PULLDOWN_ENABLE = 1,
}
#[doc = " @brief Configuration parameters of GPIO pad for gpio_config function"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct gpio_config_t {
#[doc = "< GPIO pin: set with bit mask, each bit maps to a GPIO"]
pub pin_bit_mask: u64,
#[doc = "< GPIO mode: set input/output mode"]
pub mode: gpio_mode_t,
#[doc = "< GPIO pull-up"]
pub pull_up_en: gpio_pullup_t,
#[doc = "< GPIO pull-down"]
pub pull_down_en: gpio_pulldown_t,
#[doc = "< GPIO interrupt type"]
pub intr_type: gpio_int_type_t,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum gpio_pull_mode_t {
#[doc = "< Pad pull up"]
GPIO_PULLUP_ONLY = 0,
#[doc = "< Pad pull down"]
GPIO_PULLDOWN_ONLY = 1,
#[doc = "< Pad pull up + pull down"]
GPIO_PULLUP_PULLDOWN = 2,
#[doc = "< Pad floating"]
GPIO_FLOATING = 3,
}
impl gpio_drive_cap_t {
pub const GPIO_DRIVE_CAP_DEFAULT: gpio_drive_cap_t = gpio_drive_cap_t::GPIO_DRIVE_CAP_2;
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum gpio_drive_cap_t {
#[doc = "< Pad drive capability: weak"]
GPIO_DRIVE_CAP_0 = 0,
#[doc = "< Pad drive capability: stronger"]
GPIO_DRIVE_CAP_1 = 1,
#[doc = "< Pad drive capability: medium"]
GPIO_DRIVE_CAP_2 = 2,
#[doc = "< Pad drive capability: strongest"]
GPIO_DRIVE_CAP_3 = 3,
GPIO_DRIVE_CAP_MAX = 4,
}
pub type gpio_isr_t = ::core::option::Option<unsafe extern "C" fn(arg1: *mut libc::c_void)>;
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum GPIO_INT_TYPE {
GPIO_PIN_INTR_DISABLE = 0,
GPIO_PIN_INTR_POSEDGE = 1,
GPIO_PIN_INTR_NEGEDGE = 2,
GPIO_PIN_INTR_ANYEDGE = 3,
GPIO_PIN_INTR_LOLEVEL = 4,
GPIO_PIN_INTR_HILEVEL = 5,
}
pub type gpio_intr_handler_fn_t = ::core::option::Option<
unsafe extern "C" fn(intr_mask: u32, high: bool, arg: *mut libc::c_void),
>;
extern "C" {
#[doc = " @brief Initialize GPIO. This includes reading the GPIO Configuration DataSet"]
#[doc = " to initialize \"output enables\" and pin configurations for each gpio pin."]
#[doc = " Please do not call this function in SDK."]
#[doc = ""]
#[doc = " @param None"]
#[doc = ""]
#[doc = " @return None"]
pub fn gpio_init();
}
extern "C" {
#[doc = " @brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0)."]
#[doc = " There is no particular ordering guaranteed; so if the order of writes is significant,"]
#[doc = " calling code should divide a single call into multiple calls."]
#[doc = ""]
#[doc = " @param uint32_t set_mask : the gpios that need high level."]
#[doc = ""]
#[doc = " @param uint32_t clear_mask : the gpios that need low level."]
#[doc = ""]
#[doc = " @param uint32_t enable_mask : the gpios that need be changed."]
#[doc = ""]
#[doc = " @param uint32_t disable_mask : the gpios that need diable output."]
#[doc = ""]
#[doc = " @return None"]
pub fn gpio_output_set(set_mask: u32, clear_mask: u32, enable_mask: u32, disable_mask: u32);
}
extern "C" {
#[doc = " @brief Change GPIO(32-39) pin output by setting, clearing, or disabling pins, GPIO32<->BIT(0)."]
#[doc = " There is no particular ordering guaranteed; so if the order of writes is significant,"]
#[doc = " calling code should divide a single call into multiple calls."]
#[doc = ""]
#[doc = " @param uint32_t set_mask : the gpios that need high level."]
#[doc = ""]
#[doc = " @param uint32_t clear_mask : the gpios that need low level."]
#[doc = ""]
#[doc = " @param uint32_t enable_mask : the gpios that need be changed."]
#[doc = ""]
#[doc = " @param uint32_t disable_mask : the gpios that need diable output."]
#[doc = ""]
#[doc = " @return None"]
pub fn gpio_output_set_high(
set_mask: u32,
clear_mask: u32,
enable_mask: u32,
disable_mask: u32,
);
}
extern "C" {
#[doc = " @brief Sample the value of GPIO input pins(0-31) and returns a bitmask."]
#[doc = ""]
#[doc = " @param None"]
#[doc = ""]
#[doc = " @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO0."]
pub fn gpio_input_get() -> u32;
}
extern "C" {
#[doc = " @brief Sample the value of GPIO input pins(32-39) and returns a bitmask."]
#[doc = ""]
#[doc = " @param None"]
#[doc = ""]
#[doc = " @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO32."]
pub fn gpio_input_get_high() -> u32;
}
extern "C" {
#[doc = " @brief Register an application-specific interrupt handler for GPIO pin interrupts."]
#[doc = " Once the interrupt handler is called, it will not be called again until after a call to gpio_intr_ack."]
#[doc = " Please do not call this function in SDK."]
#[doc = ""]
#[doc = " @param gpio_intr_handler_fn_t fn : gpio application-specific interrupt handler"]
#[doc = ""]
#[doc = " @param void *arg : gpio application-specific interrupt handler argument."]
#[doc = ""]
#[doc = " @return None"]
pub fn gpio_intr_handler_register(fn_: gpio_intr_handler_fn_t, arg: *mut libc::c_void);
}
extern "C" {
#[doc = " @brief Get gpio interrupts which happens but not processed."]
#[doc = " Please do not call this function in SDK."]
#[doc = ""]
#[doc = " @param None"]
#[doc = ""]
#[doc = " @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO0."]
pub fn gpio_intr_pending() -> u32;
}
extern "C" {
#[doc = " @brief Get gpio interrupts which happens but not processed."]
#[doc = " Please do not call this function in SDK."]
#[doc = ""]
#[doc = " @param None"]
#[doc = ""]
#[doc = " @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO32."]
pub fn gpio_intr_pending_high() -> u32;
}
extern "C" {
#[doc = " @brief Ack gpio interrupts to process pending interrupts."]
#[doc = " Please do not call this function in SDK."]
#[doc = ""]
#[doc = " @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO0."]
#[doc = ""]
#[doc = " @return None"]
pub fn gpio_intr_ack(ack_mask: u32);
}
extern "C" {
#[doc = " @brief Ack gpio interrupts to process pending interrupts."]
#[doc = " Please do not call this function in SDK."]
#[doc = ""]
#[doc = " @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO32."]
#[doc = ""]
#[doc = " @return None"]
pub fn gpio_intr_ack_high(ack_mask: u32);
}
extern "C" {
#[doc = " @brief Set GPIO to wakeup the ESP32."]
#[doc = " Please do not call this function in SDK."]
#[doc = ""]
#[doc = " @param uint32_t i: gpio number."]
#[doc = ""]
#[doc = " @param GPIO_INT_TYPE intr_state : only GPIO_PIN_INTR_LOLEVEL\\GPIO_PIN_INTR_HILEVEL can be used"]
#[doc = ""]
#[doc = " @return None"]
pub fn gpio_pin_wakeup_enable(i: u32, intr_state: GPIO_INT_TYPE);
}
extern "C" {
#[doc = " @brief disable GPIOs to wakeup the ESP32."]
#[doc = " Please do not call this function in SDK."]
#[doc = ""]
#[doc = " @param None"]
#[doc = ""]
#[doc = " @return None"]
pub fn gpio_pin_wakeup_disable();
}
extern "C" {
#[doc = " @brief set gpio input to a signal, one gpio can input to several signals."]
#[doc = ""]
#[doc = " @param uint32_t gpio : gpio number, 0~0x27"]
#[doc = " gpio == 0x30, input 0 to signal"]
#[doc = " gpio == 0x34, ???"]
#[doc = " gpio == 0x38, input 1 to signal"]
#[doc = ""]
#[doc = " @param uint32_t signal_idx : signal index."]
#[doc = ""]
#[doc = " @param bool inv : the signal is inv or not"]
#[doc = ""]
#[doc = " @return None"]
pub fn gpio_matrix_in(gpio: u32, signal_idx: u32, inv: bool);
}
extern "C" {
#[doc = " @brief set signal output to gpio, one signal can output to several gpios."]
#[doc = ""]
#[doc = " @param uint32_t gpio : gpio number, 0~0x27"]
#[doc = ""]
#[doc = " @param uint32_t signal_idx : signal index."]
#[doc = " signal_idx == 0x100, cancel output put to the gpio"]
#[doc = ""]
#[doc = " @param bool out_inv : the signal output is inv or not"]
#[doc = ""]
#[doc = " @param bool oen_inv : the signal output enable is inv or not"]
#[doc = ""]
#[doc = " @return None"]
pub fn gpio_matrix_out(gpio: u32, signal_idx: u32, out_inv: bool, oen_inv: bool);
}
extern "C" {
#[doc = " @brief Select pad as a gpio function from IOMUX."]
#[doc = ""]
#[doc = " @param uint32_t gpio_num : gpio number, 0~0x27"]
#[doc = ""]
#[doc = " @return None"]
pub fn gpio_pad_select_gpio(gpio_num: u8);
}
extern "C" {
#[doc = " @brief Set pad driver capability."]
#[doc = ""]
#[doc = " @param uint32_t gpio_num : gpio number, 0~0x27"]
#[doc = ""]
#[doc = " @param uint8_t drv : 0-3"]
#[doc = ""]
#[doc = " @return None"]
pub fn gpio_pad_set_drv(gpio_num: u8, drv: u8);
}
extern "C" {
#[doc = " @brief Pull up the pad from gpio number."]
#[doc = ""]
#[doc = " @param uint32_t gpio_num : gpio number, 0~0x27"]
#[doc = ""]
#[doc = " @return None"]
pub fn gpio_pad_pullup(gpio_num: u8);
}
extern "C" {
#[doc = " @brief Pull down the pad from gpio number."]
#[doc = ""]
#[doc = " @param uint32_t gpio_num : gpio number, 0~0x27"]
#[doc = ""]
#[doc = " @return None"]
pub fn gpio_pad_pulldown(gpio_num: u8);
}
extern "C" {
#[doc = " @brief Unhold the pad from gpio number."]
#[doc = ""]
#[doc = " @param uint32_t gpio_num : gpio number, 0~0x27"]
#[doc = ""]
#[doc = " @return None"]
pub fn gpio_pad_unhold(gpio_num: u8);
}
extern "C" {
#[doc = " @brief Hold the pad from gpio number."]
#[doc = ""]
#[doc = " @param uint32_t gpio_num : gpio number, 0~0x27"]
#[doc = ""]
#[doc = " @return None"]
pub fn gpio_pad_hold(gpio_num: u8);
}
pub type gpio_isr_handle_t = intr_handle_t;
extern "C" {
#[doc = " @brief GPIO common configuration"]
#[doc = ""]
#[doc = " Configure GPIO's Mode,pull-up,PullDown,IntrType"]
#[doc = ""]
#[doc = " @param pGPIOConfig Pointer to GPIO configure struct"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
#[doc = ""]
pub fn gpio_config(pGPIOConfig: *const gpio_config_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Reset an gpio to default state (select gpio function, enable pullup and disable input and output)."]
#[doc = ""]
#[doc = " @param gpio_num GPIO number."]
#[doc = ""]
#[doc = " @note This function also configures the IOMUX for this pin to the GPIO"]
#[doc = " function, and disconnects any other peripheral output configured via GPIO"]
#[doc = " Matrix."]
#[doc = ""]
#[doc = " @return Always return ESP_OK."]
pub fn gpio_reset_pin(gpio_num: gpio_num_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief GPIO set interrupt trigger type"]
#[doc = ""]
#[doc = " @param gpio_num GPIO number. If you want to set the trigger type of e.g. of GPIO16, gpio_num should be GPIO_NUM_16 (16);"]
#[doc = " @param intr_type Interrupt type, select from gpio_int_type_t"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
#[doc = ""]
pub fn gpio_set_intr_type(gpio_num: gpio_num_t, intr_type: gpio_int_type_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable GPIO module interrupt signal"]
#[doc = ""]
#[doc = " @note Please do not use the interrupt of GPIO36 and GPIO39 when using ADC."]
#[doc = " Please refer to the comments of `adc1_get_raw`."]
#[doc = " Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue."]
#[doc = ""]
#[doc = " @param gpio_num GPIO number. If you want to enable an interrupt on e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
#[doc = ""]
pub fn gpio_intr_enable(gpio_num: gpio_num_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Disable GPIO module interrupt signal"]
#[doc = ""]
#[doc = " @param gpio_num GPIO number. If you want to disable the interrupt of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
#[doc = ""]
pub fn gpio_intr_disable(gpio_num: gpio_num_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief GPIO set output level"]
#[doc = ""]
#[doc = " @param gpio_num GPIO number. If you want to set the output level of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);"]
#[doc = " @param level Output level. 0: low ; 1: high"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG GPIO number error"]
#[doc = ""]
pub fn gpio_set_level(gpio_num: gpio_num_t, level: u32) -> esp_err_t;
}
extern "C" {
#[doc = " @brief GPIO get input level"]
#[doc = ""]
#[doc = " @warning If the pad is not configured for input (or input and output) the returned value is always 0."]
#[doc = ""]
#[doc = " @param gpio_num GPIO number. If you want to get the logic level of e.g. pin GPIO16, gpio_num should be GPIO_NUM_16 (16);"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - 0 the GPIO input level is 0"]
#[doc = " - 1 the GPIO input level is 1"]
#[doc = ""]
pub fn gpio_get_level(gpio_num: gpio_num_t) -> libc::c_int;
}
extern "C" {
#[doc = " @brief\t GPIO set direction"]
#[doc = ""]
#[doc = " Configure GPIO direction,such as output_only,input_only,output_and_input"]
#[doc = ""]
#[doc = " @param gpio_num Configure GPIO pins number, it should be GPIO number. If you want to set direction of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);"]
#[doc = " @param mode GPIO direction"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG GPIO error"]
#[doc = ""]
pub fn gpio_set_direction(gpio_num: gpio_num_t, mode: gpio_mode_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Configure GPIO pull-up/pull-down resistors"]
#[doc = ""]
#[doc = " Only pins that support both input & output have integrated pull-up and pull-down resistors. Input-only GPIOs 34-39 do not."]
#[doc = ""]
#[doc = " @param gpio_num GPIO number. If you want to set pull up or down mode for e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);"]
#[doc = " @param pull GPIO pull up/down mode."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG : Parameter error"]
#[doc = ""]
pub fn gpio_set_pull_mode(gpio_num: gpio_num_t, pull: gpio_pull_mode_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable GPIO wake-up function."]
#[doc = ""]
#[doc = " @param gpio_num GPIO number."]
#[doc = ""]
#[doc = " @param intr_type GPIO wake-up type. Only GPIO_INTR_LOW_LEVEL or GPIO_INTR_HIGH_LEVEL can be used."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn gpio_wakeup_enable(gpio_num: gpio_num_t, intr_type: gpio_int_type_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Disable GPIO wake-up function."]
#[doc = ""]
#[doc = " @param gpio_num GPIO number"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn gpio_wakeup_disable(gpio_num: gpio_num_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Register GPIO interrupt handler, the handler is an ISR."]
#[doc = " The handler will be attached to the same CPU core that this function is running on."]
#[doc = ""]
#[doc = " This ISR function is called whenever any GPIO interrupt occurs. See"]
#[doc = " the alternative gpio_install_isr_service() and"]
#[doc = " gpio_isr_handler_add() API in order to have the driver support"]
#[doc = " per-GPIO ISRs."]
#[doc = ""]
#[doc = " @param fn Interrupt handler function."]
#[doc = " @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)"]
#[doc = " ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info."]
#[doc = " @param arg Parameter for handler function"]
#[doc = " @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will be returned here."]
#[doc = ""]
#[doc = " \\verbatim embed:rst:leading-asterisk"]
#[doc = " To disable or remove the ISR, pass the returned handle to the :doc:`interrupt allocation functions </api-reference/system/intr_alloc>`."]
#[doc = " \\endverbatim"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success ;"]
#[doc = " - ESP_ERR_INVALID_ARG GPIO error"]
#[doc = " - ESP_ERR_NOT_FOUND No free interrupt found with the specified flags"]
pub fn gpio_isr_register(
fn_: ::core::option::Option<unsafe extern "C" fn(arg1: *mut libc::c_void)>,
arg: *mut libc::c_void,
intr_alloc_flags: libc::c_int,
handle: *mut gpio_isr_handle_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable pull-up on GPIO."]
#[doc = ""]
#[doc = " @param gpio_num GPIO number"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn gpio_pullup_en(gpio_num: gpio_num_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Disable pull-up on GPIO."]
#[doc = ""]
#[doc = " @param gpio_num GPIO number"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn gpio_pullup_dis(gpio_num: gpio_num_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable pull-down on GPIO."]
#[doc = ""]
#[doc = " @param gpio_num GPIO number"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn gpio_pulldown_en(gpio_num: gpio_num_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Disable pull-down on GPIO."]
#[doc = ""]
#[doc = " @param gpio_num GPIO number"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn gpio_pulldown_dis(gpio_num: gpio_num_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Install the driver's GPIO ISR handler service, which allows per-pin GPIO interrupt handlers."]
#[doc = ""]
#[doc = " This function is incompatible with gpio_isr_register() - if that function is used, a single global ISR is registered for all GPIO interrupts. If this function is used, the ISR service provides a global GPIO ISR and individual pin handlers are registered via the gpio_isr_handler_add() function."]
#[doc = ""]
#[doc = " @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)"]
#[doc = " ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_NO_MEM No memory to install this service"]
#[doc = " - ESP_ERR_INVALID_STATE ISR service already installed."]
#[doc = " - ESP_ERR_NOT_FOUND No free interrupt found with the specified flags"]
#[doc = " - ESP_ERR_INVALID_ARG GPIO error"]
pub fn gpio_install_isr_service(intr_alloc_flags: libc::c_int) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Uninstall the driver's GPIO ISR service, freeing related resources."]
pub fn gpio_uninstall_isr_service();
}
extern "C" {
#[doc = " @brief Add ISR handler for the corresponding GPIO pin."]
#[doc = ""]
#[doc = " Call this function after using gpio_install_isr_service() to"]
#[doc = " install the driver's GPIO ISR handler service."]
#[doc = ""]
#[doc = " The pin ISR handlers no longer need to be declared with IRAM_ATTR,"]
#[doc = " unless you pass the ESP_INTR_FLAG_IRAM flag when allocating the"]
#[doc = " ISR in gpio_install_isr_service()."]
#[doc = ""]
#[doc = " This ISR handler will be called from an ISR. So there is a stack"]
#[doc = " size limit (configurable as \"ISR stack size\" in menuconfig). This"]
#[doc = " limit is smaller compared to a global GPIO interrupt handler due"]
#[doc = " to the additional level of indirection."]
#[doc = ""]
#[doc = " @param gpio_num GPIO number"]
#[doc = " @param isr_handler ISR handler function for the corresponding GPIO number."]
#[doc = " @param args parameter for ISR handler."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_STATE Wrong state, the ISR service has not been initialized."]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn gpio_isr_handler_add(
gpio_num: gpio_num_t,
isr_handler: gpio_isr_t,
args: *mut libc::c_void,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Remove ISR handler for the corresponding GPIO pin."]
#[doc = ""]
#[doc = " @param gpio_num GPIO number"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_STATE Wrong state, the ISR service has not been initialized."]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn gpio_isr_handler_remove(gpio_num: gpio_num_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set GPIO pad drive capability"]
#[doc = ""]
#[doc = " @param gpio_num GPIO number, only support output GPIOs"]
#[doc = " @param strength Drive capability of the pad"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn gpio_set_drive_capability(gpio_num: gpio_num_t, strength: gpio_drive_cap_t)
-> esp_err_t;
}
extern "C" {
#[doc = " @brief Get GPIO pad drive capability"]
#[doc = ""]
#[doc = " @param gpio_num GPIO number, only support output GPIOs"]
#[doc = " @param strength Pointer to accept drive capability of the pad"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn gpio_get_drive_capability(
gpio_num: gpio_num_t,
strength: *mut gpio_drive_cap_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable gpio pad hold function."]
#[doc = ""]
#[doc = " The gpio pad hold function works in both input and output modes, but must be output-capable gpios."]
#[doc = " If pad hold enabled:"]
#[doc = " in output mode: the output level of the pad will be force locked and can not be changed."]
#[doc = " in input mode: the input value read will not change, regardless the changes of input signal."]
#[doc = ""]
#[doc = " The state of digital gpio cannot be held during Deep-sleep, and it will resume the hold function"]
#[doc = " when the chip wakes up from Deep-sleep. If the digital gpio also needs to be held during Deep-sleep,"]
#[doc = " `gpio_deep_sleep_hold_en` should also be called."]
#[doc = ""]
#[doc = " Power down or call gpio_hold_dis will disable this function."]
#[doc = ""]
#[doc = " @param gpio_num GPIO number, only support output-capable GPIOs"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_NOT_SUPPORTED Not support pad hold function"]
pub fn gpio_hold_en(gpio_num: gpio_num_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Disable gpio pad hold function."]
#[doc = ""]
#[doc = " When the chip is woken up from Deep-sleep, the gpio will be set to the default mode, so, the gpio will output"]
#[doc = " the default level if this function is called. If you don't want the level changes, the gpio should be configured to"]
#[doc = " a known state before this function is called."]
#[doc = " e.g."]
#[doc = " If you hold gpio18 high during Deep-sleep, after the chip is woken up and `gpio_hold_dis` is called,"]
#[doc = " gpio18 will output low level(because gpio18 is input mode by default). If you don't want this behavior,"]
#[doc = " you should configure gpio18 as output mode and set it to hight level before calling `gpio_hold_dis`."]
#[doc = ""]
#[doc = " @param gpio_num GPIO number, only support output-capable GPIOs"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_NOT_SUPPORTED Not support pad hold function"]
pub fn gpio_hold_dis(gpio_num: gpio_num_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable all digital gpio pad hold function during Deep-sleep."]
#[doc = ""]
#[doc = " When the chip is in Deep-sleep mode, all digital gpio will hold the state before sleep, and when the chip is woken up,"]
#[doc = " the status of digital gpio will not be held. Note that the pad hold feature only works when the chip is in Deep-sleep mode,"]
#[doc = " when not in sleep mode, the digital gpio state can be changed even you have called this function."]
#[doc = ""]
#[doc = " Power down or call gpio_hold_dis will disable this function, otherwise, the digital gpio hold feature works as long as the chip enter Deep-sleep."]
pub fn gpio_deep_sleep_hold_en();
}
extern "C" {
#[doc = " @brief Disable all digital gpio pad hold function during Deep-sleep."]
#[doc = ""]
pub fn gpio_deep_sleep_hold_dis();
}
extern "C" {
#[doc = " @brief Set pad input to a peripheral signal through the IOMUX."]
#[doc = " @param gpio_num GPIO number of the pad."]
#[doc = " @param signal_idx Peripheral signal id to input. One of the ``*_IN_IDX`` signals in ``soc/gpio_sig_map.h``."]
pub fn gpio_iomux_in(gpio_num: u32, signal_idx: u32);
}
extern "C" {
#[doc = " @brief Set peripheral output to an GPIO pad through the IOMUX."]
#[doc = " @param gpio_num gpio_num GPIO number of the pad."]
#[doc = " @param func The function number of the peripheral pin to output pin."]
#[doc = " One of the ``FUNC_X_*`` of specified pin (X) in ``soc/io_mux_reg.h``."]
#[doc = " @param oen_inv True if the output enable needs to be inverted, otherwise False."]
pub fn gpio_iomux_out(gpio_num: u8, func: libc::c_int, oen_inv: bool);
}
#[repr(u32)]
#[doc = " @brief ADC units selected handle."]
#[doc = ""]
#[doc = " @note For ADC digital controller(DMA mode), ESP32 don't support `ADC_UNIT_2`, `ADC_UNIT_BOTH`, `ADC_UNIT_ALTER`."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum adc_unit_t {
#[doc = "< SAR ADC 1."]
ADC_UNIT_1 = 1,
#[doc = "< SAR ADC 2."]
ADC_UNIT_2 = 2,
#[doc = "< SAR ADC 1 and 2."]
ADC_UNIT_BOTH = 3,
#[doc = "< SAR ADC 1 and 2 alternative mode, not supported yet"]
ADC_UNIT_ALTER = 7,
ADC_UNIT_MAX = 8,
}
#[repr(u32)]
#[doc = " @brief ADC channels handle. See ``adc1_channel_t``, ``adc2_channel_t``."]
#[doc = ""]
#[doc = " @note For ESP32 ADC1, don't support `ADC_CHANNEL_8`, `ADC_CHANNEL_9`. See ``adc1_channel_t``."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum adc_channel_t {
#[doc = "< ADC channel"]
ADC_CHANNEL_0 = 0,
#[doc = "< ADC channel"]
ADC_CHANNEL_1 = 1,
#[doc = "< ADC channel"]
ADC_CHANNEL_2 = 2,
#[doc = "< ADC channel"]
ADC_CHANNEL_3 = 3,
#[doc = "< ADC channel"]
ADC_CHANNEL_4 = 4,
#[doc = "< ADC channel"]
ADC_CHANNEL_5 = 5,
#[doc = "< ADC channel"]
ADC_CHANNEL_6 = 6,
#[doc = "< ADC channel"]
ADC_CHANNEL_7 = 7,
#[doc = "< ADC channel"]
ADC_CHANNEL_8 = 8,
#[doc = "< ADC channel"]
ADC_CHANNEL_9 = 9,
ADC_CHANNEL_MAX = 10,
}
#[repr(u32)]
#[doc = " @brief ADC attenuation parameter. Different parameters determine the range of the ADC. See ``adc1_config_channel_atten``."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum adc_atten_t {
#[doc = "<The input voltage of ADC will be reduced to about 1/1"]
ADC_ATTEN_DB_0 = 0,
#[doc = "<The input voltage of ADC will be reduced to about 1/1.34"]
ADC_ATTEN_DB_2_5 = 1,
#[doc = "<The input voltage of ADC will be reduced to about 1/2"]
ADC_ATTEN_DB_6 = 2,
#[doc = "<The input voltage of ADC will be reduced to about 1/3.6"]
ADC_ATTEN_DB_11 = 3,
ADC_ATTEN_MAX = 4,
}
#[repr(u32)]
#[doc = " @brief ESP32 ADC DMA source selection."]
#[doc = ""]
#[doc = " @note It's be deprecated in ESP32S2. Beacause ESP32S2 don't use I2S DMA."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum adc_i2s_source_t {
#[doc = "< I2S data from GPIO matrix signal"]
ADC_I2S_DATA_SRC_IO_SIG = 0,
#[doc = "< I2S data from ADC"]
ADC_I2S_DATA_SRC_ADC = 1,
ADC_I2S_DATA_SRC_MAX = 2,
}
#[repr(u32)]
#[doc = " @brief ADC resolution setting option."]
#[doc = ""]
#[doc = " @note For ESP32S2. Only support 13 bit resolution."]
#[doc = " For ESP32. Don't support 13 bit resolution."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum adc_bits_width_t {
#[doc = "< ADC capture width is 9Bit. Only ESP32 is supported."]
ADC_WIDTH_BIT_9 = 0,
#[doc = "< ADC capture width is 10Bit. Only ESP32 is supported."]
ADC_WIDTH_BIT_10 = 1,
#[doc = "< ADC capture width is 11Bit. Only ESP32 is supported."]
ADC_WIDTH_BIT_11 = 2,
#[doc = "< ADC capture width is 12Bit. Only ESP32 is supported."]
ADC_WIDTH_BIT_12 = 3,
ADC_WIDTH_MAX = 4,
}
#[repr(u32)]
#[doc = " `adc1_channel_t` will be deprecated functions, combine into `adc_channel_t`"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum adc1_channel_t {
#[doc = "< ADC1 channel 0 is GPIO36 (ESP32), GPIO1 (ESP32-S2)"]
ADC1_CHANNEL_0 = 0,
#[doc = "< ADC1 channel 1 is GPIO37 (ESP32), GPIO2 (ESP32-S2)"]
ADC1_CHANNEL_1 = 1,
#[doc = "< ADC1 channel 2 is GPIO38 (ESP32), GPIO3 (ESP32-S2)"]
ADC1_CHANNEL_2 = 2,
#[doc = "< ADC1 channel 3 is GPIO39 (ESP32), GPIO4 (ESP32-S2)"]
ADC1_CHANNEL_3 = 3,
#[doc = "< ADC1 channel 4 is GPIO32 (ESP32), GPIO5 (ESP32-S2)"]
ADC1_CHANNEL_4 = 4,
#[doc = "< ADC1 channel 5 is GPIO33 (ESP32), GPIO6 (ESP32-S2)"]
ADC1_CHANNEL_5 = 5,
#[doc = "< ADC1 channel 6 is GPIO34 (ESP32), GPIO7 (ESP32-S2)"]
ADC1_CHANNEL_6 = 6,
#[doc = "< ADC1 channel 7 is GPIO35 (ESP32), GPIO8 (ESP32-S2)"]
ADC1_CHANNEL_7 = 7,
ADC1_CHANNEL_MAX = 8,
}
#[repr(u32)]
#[doc = " `adc2_channel_t` will be deprecated functions, combine into `adc_channel_t`"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum adc2_channel_t {
#[doc = "< ADC2 channel 0 is GPIO4 (ESP32), GPIO11 (ESP32-S2)"]
ADC2_CHANNEL_0 = 0,
#[doc = "< ADC2 channel 1 is GPIO0 (ESP32), GPIO12 (ESP32-S2)"]
ADC2_CHANNEL_1 = 1,
#[doc = "< ADC2 channel 2 is GPIO2 (ESP32), GPIO13 (ESP32-S2)"]
ADC2_CHANNEL_2 = 2,
#[doc = "< ADC2 channel 3 is GPIO15 (ESP32), GPIO14 (ESP32-S2)"]
ADC2_CHANNEL_3 = 3,
#[doc = "< ADC2 channel 4 is GPIO13 (ESP32), GPIO15 (ESP32-S2)"]
ADC2_CHANNEL_4 = 4,
#[doc = "< ADC2 channel 5 is GPIO12 (ESP32), GPIO16 (ESP32-S2)"]
ADC2_CHANNEL_5 = 5,
#[doc = "< ADC2 channel 6 is GPIO14 (ESP32), GPIO17 (ESP32-S2)"]
ADC2_CHANNEL_6 = 6,
#[doc = "< ADC2 channel 7 is GPIO27 (ESP32), GPIO18 (ESP32-S2)"]
ADC2_CHANNEL_7 = 7,
#[doc = "< ADC2 channel 8 is GPIO25 (ESP32), GPIO19 (ESP32-S2)"]
ADC2_CHANNEL_8 = 8,
#[doc = "< ADC2 channel 9 is GPIO26 (ESP32), GPIO20 (ESP32-S2)"]
ADC2_CHANNEL_9 = 9,
ADC2_CHANNEL_MAX = 10,
}
#[repr(u32)]
#[doc = " @brief ADC digital controller encode option."]
#[doc = ""]
#[doc = " @deprecated The ESP32S2 don't use I2S DMA. Call ``adc_digi_output_format_t`` instead."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum adc_i2s_encode_t {
#[doc = "< ADC to DMA data format, , [15:12]-channel [11:0]-12 bits ADC data"]
ADC_ENCODE_12BIT = 0,
#[doc = "< ADC to DMA data format, [15]-unit, [14:11]-channel [10:0]-11 bits ADC data"]
ADC_ENCODE_11BIT = 1,
ADC_ENCODE_MAX = 2,
}
extern "C" {
#[doc = " @brief Get the GPIO number of a specific ADC1 channel."]
#[doc = ""]
#[doc = " @param channel Channel to get the GPIO number"]
#[doc = " @param gpio_num output buffer to hold the GPIO number"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if success"]
#[doc = " - ESP_ERR_INVALID_ARG if channel not valid"]
pub fn adc1_pad_get_io_num(channel: adc1_channel_t, gpio_num: *mut gpio_num_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set the attenuation of a particular channel on ADC1, and configure its associated GPIO pin mux."]
#[doc = ""]
#[doc = " The default ADC full-scale voltage is 1.1 V. To read higher voltages (up to the pin maximum voltage,"]
#[doc = " usually 3.3 V) requires setting >0 dB signal attenuation for that ADC channel."]
#[doc = ""]
#[doc = " When VDD_A is 3.3 V:"]
#[doc = ""]
#[doc = " - 0 dB attenuation (ADC_ATTEN_DB_0) gives full-scale voltage 1.1 V"]
#[doc = " - 2.5 dB attenuation (ADC_ATTEN_DB_2_5) gives full-scale voltage 1.5 V"]
#[doc = " - 6 dB attenuation (ADC_ATTEN_DB_6) gives full-scale voltage 2.2 V"]
#[doc = " - 11 dB attenuation (ADC_ATTEN_DB_11) gives full-scale voltage 3.9 V (see note below)"]
#[doc = ""]
#[doc = " @note The full-scale voltage is the voltage corresponding to a maximum reading (depending on ADC1 configured bit width,"]
#[doc = " this value in ESP32 is: 4095 for 12-bits, 2047 for 11-bits, 1023 for 10-bits, 511 for 9 bits."]
#[doc = " this value in ESP32S2 is: 8191 for 13-bits.)"]
#[doc = ""]
#[doc = " @note At 11 dB attenuation the maximum voltage is limited by VDD_A, not the full scale voltage."]
#[doc = ""]
#[doc = " @note For ESP32:"]
#[doc = " Due to ADC characteristics, most accurate results are obtained within the following approximate voltage ranges:"]
#[doc = ""]
#[doc = " - 0 dB attenuation (ADC_ATTEN_DB_0) between 100 and 950 mV"]
#[doc = " - 2.5 dB attenuation (ADC_ATTEN_DB_2_5) between 100 and 1250 mV"]
#[doc = " - 6 dB attenuation (ADC_ATTEN_DB_6) between 150 to 1750 mV"]
#[doc = " - 11 dB attenuation (ADC_ATTEN_DB_11) between 150 to 2450 mV"]
#[doc = ""]
#[doc = " For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended ranges."]
#[doc = ""]
#[doc = " @note For any given channel, this function must be called before the first time ``adc1_get_raw()`` is called for that channel."]
#[doc = ""]
#[doc = " @note This function can be called multiple times to configure multiple"]
#[doc = " ADC channels simultaneously. ``adc1_get_raw()`` can then be called for any configured channel."]
#[doc = ""]
#[doc = " @param channel ADC1 channel to configure"]
#[doc = " @param atten Attenuation level"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn adc1_config_channel_atten(channel: adc1_channel_t, atten: adc_atten_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Configure ADC1 capture width, meanwhile enable output invert for ADC1."]
#[doc = " The configuration is for all channels of ADC1"]
#[doc = " @param width_bit Bit capture width for ADC1"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn adc1_config_width(width_bit: adc_bits_width_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Take an ADC1 reading from a single channel."]
#[doc = " @note ESP32:"]
#[doc = " When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,"]
#[doc = " the input of GPIO36 and GPIO39 will be pulled down for about 80ns."]
#[doc = " When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39."]
#[doc = " Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue."]
#[doc = ""]
#[doc = " @note Call adc1_config_width() before the first time this"]
#[doc = " function is called."]
#[doc = ""]
#[doc = " @note For any given channel, adc1_config_channel_atten(channel)"]
#[doc = " must be called before the first time this function is called. Configuring"]
#[doc = " a new channel does not prevent a previously configured channel from being read."]
#[doc = ""]
#[doc = " @param channel ADC1 channel to read"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - -1: Parameter error"]
#[doc = " - Other: ADC1 channel reading."]
pub fn adc1_get_raw(channel: adc1_channel_t) -> libc::c_int;
}
extern "C" {
#[doc = " @brief Enable ADC power"]
pub fn adc_power_on();
}
extern "C" {
#[doc = " @brief Power off SAR ADC"]
#[doc = " This function will force power down for ADC"]
pub fn adc_power_off();
}
extern "C" {
#[doc = " @brief Initialize ADC pad"]
#[doc = " @param adc_unit ADC unit index"]
#[doc = " @param channel ADC channel index"]
#[doc = " @return"]
#[doc = " - ESP_OK success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn adc_gpio_init(adc_unit: adc_unit_t, channel: adc_channel_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set ADC data invert"]
#[doc = " @param adc_unit ADC unit index"]
#[doc = " @param inv_en whether enable data invert"]
#[doc = " @return"]
#[doc = " - ESP_OK success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn adc_set_data_inv(adc_unit: adc_unit_t, inv_en: bool) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set ADC source clock"]
#[doc = " @param clk_div ADC clock divider, ADC clock is divided from APB clock"]
#[doc = " @return"]
#[doc = " - ESP_OK success"]
pub fn adc_set_clk_div(clk_div: u8) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Configure ADC capture width."]
#[doc = ""]
#[doc = " @note For ESP32S2, only support ``ADC_WIDTH_BIT_13``."]
#[doc = ""]
#[doc = " @param adc_unit ADC unit index"]
#[doc = " @param width_bit Bit capture width for ADC unit. For ESP32S2, only support ``ADC_WIDTH_BIT_13``."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn adc_set_data_width(adc_unit: adc_unit_t, width_bit: adc_bits_width_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Configure ADC1 to be usable by the ULP"]
#[doc = ""]
#[doc = " This function reconfigures ADC1 to be controlled by the ULP."]
#[doc = " Effect of this function can be reverted using adc1_get_raw function."]
#[doc = ""]
#[doc = " Note that adc1_config_channel_atten, adc1_config_width functions need"]
#[doc = " to be called to configure ADC1 channels, before ADC1 is used by the ULP."]
pub fn adc1_ulp_enable();
}
extern "C" {
#[doc = " @brief Get the GPIO number of a specific ADC2 channel."]
#[doc = ""]
#[doc = " @param channel Channel to get the GPIO number"]
#[doc = ""]
#[doc = " @param gpio_num output buffer to hold the GPIO number"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if success"]
#[doc = " - ESP_ERR_INVALID_ARG if channel not valid"]
pub fn adc2_pad_get_io_num(channel: adc2_channel_t, gpio_num: *mut gpio_num_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Configure the ADC2 channel, including setting attenuation."]
#[doc = ""]
#[doc = " The default ADC full-scale voltage is 1.1 V. To read higher voltages (up to the pin maximum voltage,"]
#[doc = " usually 3.3 V) requires setting >0 dB signal attenuation for that ADC channel."]
#[doc = ""]
#[doc = " When VDD_A is 3.3 V:"]
#[doc = ""]
#[doc = " - 0 dB attenuation (ADC_ATTEN_0db) gives full-scale voltage 1.1 V"]
#[doc = " - 2.5 dB attenuation (ADC_ATTEN_2_5db) gives full-scale voltage 1.5 V"]
#[doc = " - 6 dB attenuation (ADC_ATTEN_6db) gives full-scale voltage 2.2 V"]
#[doc = " - 11 dB attenuation (ADC_ATTEN_11db) gives full-scale voltage 3.9 V (see note below)"]
#[doc = ""]
#[doc = " @note This function also configures the input GPIO pin mux to"]
#[doc = " connect it to the ADC2 channel. It must be called before calling"]
#[doc = " ``adc2_get_raw()`` for this channel."]
#[doc = ""]
#[doc = " @note The full-scale voltage is the voltage corresponding to a maximum reading"]
#[doc = " (depending on ADC2 configured bit width,"]
#[doc = " this value of ESP32 is: 4095 for 12-bits, 2047 for 11-bits, 1023 for 10-bits, 511 for 9 bits."]
#[doc = " this value of ESP32S2 is: 8191 for 13-bits.)"]
#[doc = ""]
#[doc = " @note At 11 dB attenuation the maximum voltage is limited by VDD_A, not the full scale voltage."]
#[doc = ""]
#[doc = " @param channel ADC2 channel to configure"]
#[doc = " @param atten Attenuation level"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn adc2_config_channel_atten(channel: adc2_channel_t, atten: adc_atten_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Take an ADC2 reading on a single channel"]
#[doc = ""]
#[doc = " @note ESP32:"]
#[doc = " When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,"]
#[doc = " the input of GPIO36 and GPIO39 will be pulled down for about 80ns."]
#[doc = " When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39."]
#[doc = " Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue."]
#[doc = ""]
#[doc = " @note ESP32:"]
#[doc = " For a given channel, ``adc2_config_channel_atten()``"]
#[doc = " must be called before the first time this function is called. If Wi-Fi is started via ``esp_wifi_start()``, this"]
#[doc = " function will always fail with ``ESP_ERR_TIMEOUT``."]
#[doc = ""]
#[doc = " @note ESP32S2:"]
#[doc = " ADC2 support hardware arbiter. The arbiter is to improve the use efficiency of ADC2. After the control right is robbed by the high priority,"]
#[doc = " the low priority controller will read the invalid ADC2 data. Default priority: Wi-Fi > RTC > Digital;"]
#[doc = ""]
#[doc = " @param channel ADC2 channel to read"]
#[doc = " @param width_bit Bit capture width for ADC2. For ESP32S2, only support ``ADC_WIDTH_BIT_13``."]
#[doc = " @param raw_out the variable to hold the output data."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if success"]
#[doc = " - ESP_ERR_TIMEOUT ADC2 is being used by other controller and the request timed out."]
#[doc = " - ESP_ERR_INVALID_STATE The controller status is invalid. Please try again."]
pub fn adc2_get_raw(
channel: adc2_channel_t,
width_bit: adc_bits_width_t,
raw_out: *mut libc::c_int,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set I2S data source"]
#[doc = " @param src I2S DMA data source, I2S DMA can get data from digital signals or from ADC."]
#[doc = " @return"]
#[doc = " - ESP_OK success"]
pub fn adc_set_i2s_data_source(src: adc_i2s_source_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Initialize I2S ADC mode"]
#[doc = " @param adc_unit ADC unit index"]
#[doc = " @param channel ADC channel index"]
#[doc = " @return"]
#[doc = " - ESP_OK success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn adc_i2s_mode_init(adc_unit: adc_unit_t, channel: adc_channel_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Output ADC2 reference voltage to GPIO 25 or 26 or 27"]
#[doc = ""]
#[doc = " This function utilizes the testing mux exclusive to ADC 2 to route the"]
#[doc = " reference voltage one of ADC2's channels. Supported GPIOs are GPIOs"]
#[doc = " 25, 26, and 27. This refernce voltage can be manually read from the pin"]
#[doc = " and used in the esp_adc_cal component."]
#[doc = ""]
#[doc = " @param[in] gpio GPIO number (GPIOs 25, 26 and 27 are supported)"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: v_ref successfully routed to selected GPIO"]
#[doc = " - ESP_ERR_INVALID_ARG: Unsupported GPIO"]
pub fn adc2_vref_to_gpio(gpio: gpio_num_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Read Hall Sensor"]
#[doc = ""]
#[doc = " @note When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on,"]
#[doc = " the input of GPIO36 and GPIO39 will be pulled down for about 80ns."]
#[doc = " When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39."]
#[doc = " Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue."]
#[doc = ""]
#[doc = " @note The Hall Sensor uses channels 0 and 3 of ADC1. Do not configure"]
#[doc = " these channels for use as ADC channels."]
#[doc = ""]
#[doc = " @note The ADC1 module must be enabled by calling"]
#[doc = " adc1_config_width() before calling hall_sensor_read(). ADC1"]
#[doc = " should be configured for 12 bit readings, as the hall sensor"]
#[doc = " readings are low values and do not cover the full range of the"]
#[doc = " ADC."]
#[doc = ""]
#[doc = " @return The hall sensor reading."]
pub fn hall_sensor_read() -> libc::c_int;
}
pub const ESP_ERR_FLASH_SIZE_NOT_MATCH: _bindgen_ty_1 = _bindgen_ty_1::ESP_ERR_FLASH_SIZE_NOT_MATCH;
pub const ESP_ERR_FLASH_NO_RESPONSE: _bindgen_ty_1 = _bindgen_ty_1::ESP_ERR_FLASH_NO_RESPONSE;
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum _bindgen_ty_1 {
#[doc = "< The chip doesn't have enough space for the current partition table"]
ESP_ERR_FLASH_SIZE_NOT_MATCH = 260,
#[doc = "< Chip did not respond to the command, or timed out."]
ESP_ERR_FLASH_NO_RESPONSE = 264,
}
#[doc = " Definition of a common transaction. Also holds the return value."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct spi_flash_trans_t {
#[doc = "< Command to send, always 8bits"]
pub command: u8,
#[doc = "< Output data length, in bytes"]
pub mosi_len: u8,
#[doc = "< Input data length, in bytes"]
pub miso_len: u8,
#[doc = "< Length of address in bits, set to 0 if command does not need an address"]
pub address_bitlen: u8,
#[doc = "< Address to perform operation on"]
pub address: u32,
#[doc = "< Output data to salve"]
pub mosi_data: *const u8,
#[doc = "< [out] Input data from slave, little endian"]
pub miso_data: *mut u8,
}
#[repr(u32)]
#[doc = " @brief SPI flash clock speed values, always refer to them by the enum rather"]
#[doc = " than the actual value (more speed may be appended into the list)."]
#[doc = ""]
#[doc = " A strategy to select the maximum allowed speed is to enumerate from the"]
#[doc = " ``ESP_FLSH_SPEED_MAX-1`` or highest frequency supported by your flash, and"]
#[doc = " decrease the speed until the probing success."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_flash_speed_t {
#[doc = "< The flash runs under 5MHz"]
ESP_FLASH_5MHZ = 0,
#[doc = "< The flash runs under 10MHz"]
ESP_FLASH_10MHZ = 1,
#[doc = "< The flash runs under 20MHz"]
ESP_FLASH_20MHZ = 2,
#[doc = "< The flash runs under 26MHz"]
ESP_FLASH_26MHZ = 3,
#[doc = "< The flash runs under 40MHz"]
ESP_FLASH_40MHZ = 4,
#[doc = "< The flash runs under 80MHz"]
ESP_FLASH_80MHZ = 5,
#[doc = "< The maximum frequency supported by the host is ``ESP_FLASH_SPEED_MAX-1``."]
ESP_FLASH_SPEED_MAX = 6,
}
#[repr(u32)]
#[doc = " @brief Mode used for reading from SPI flash"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_flash_io_mode_t {
#[doc = "< Data read using single I/O, some limits on speed"]
SPI_FLASH_SLOWRD = 0,
#[doc = "< Data read using single I/O, no limit on speed"]
SPI_FLASH_FASTRD = 1,
#[doc = "< Data read using dual I/O"]
SPI_FLASH_DOUT = 2,
#[doc = "< Both address & data transferred using dual I/O"]
SPI_FLASH_DIO = 3,
#[doc = "< Data read using quad I/O"]
SPI_FLASH_QOUT = 4,
#[doc = "< Both address & data transferred using quad I/O"]
SPI_FLASH_QIO = 5,
#[doc = "< The fastest io mode supported by the host is ``ESP_FLASH_READ_MODE_MAX-1``."]
SPI_FLASH_READ_MODE_MAX = 6,
}
#[doc = " Host driver configuration and context structure."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct spi_flash_host_driver_t {
#[doc = " Configuration and static data used by the specific host driver. The type"]
#[doc = " is determined by the host driver."]
pub driver_data: *mut libc::c_void,
#[doc = " Configure the device-related register before transactions. This saves"]
#[doc = " some time to re-configure those registers when we send continuously"]
pub dev_config: ::core::option::Option<
unsafe extern "C" fn(driver: *mut spi_flash_host_driver_t) -> esp_err_t,
>,
#[doc = " Send an user-defined spi transaction to the device."]
pub common_command: ::core::option::Option<
unsafe extern "C" fn(
driver: *mut spi_flash_host_driver_t,
t: *mut spi_flash_trans_t,
) -> esp_err_t,
>,
#[doc = " Read flash ID."]
pub read_id: ::core::option::Option<
unsafe extern "C" fn(driver: *mut spi_flash_host_driver_t, id: *mut u32) -> esp_err_t,
>,
#[doc = " Erase whole flash chip."]
pub erase_chip:
::core::option::Option<unsafe extern "C" fn(driver: *mut spi_flash_host_driver_t)>,
#[doc = " Erase a specific sector by its start address."]
pub erase_sector: ::core::option::Option<
unsafe extern "C" fn(driver: *mut spi_flash_host_driver_t, start_address: u32),
>,
#[doc = " Erase a specific block by its start address."]
pub erase_block: ::core::option::Option<
unsafe extern "C" fn(driver: *mut spi_flash_host_driver_t, start_address: u32),
>,
#[doc = " Read the status of the flash chip."]
pub read_status: ::core::option::Option<
unsafe extern "C" fn(driver: *mut spi_flash_host_driver_t, out_sr: *mut u8) -> esp_err_t,
>,
#[doc = " Disable write protection."]
pub set_write_protect: ::core::option::Option<
unsafe extern "C" fn(driver: *mut spi_flash_host_driver_t, wp: bool) -> esp_err_t,
>,
#[doc = " Program a page of the flash. Check ``max_write_bytes`` for the maximum allowed writing length."]
pub program_page: ::core::option::Option<
unsafe extern "C" fn(
driver: *mut spi_flash_host_driver_t,
buffer: *const libc::c_void,
address: u32,
length: u32,
),
>,
#[doc = " Check whether need to allocate new buffer to write"]
pub supports_direct_write: ::core::option::Option<
unsafe extern "C" fn(driver: *mut spi_flash_host_driver_t, p: *const libc::c_void) -> bool,
>,
#[doc = " Check whether need to allocate new buffer to read"]
pub supports_direct_read: ::core::option::Option<
unsafe extern "C" fn(driver: *mut spi_flash_host_driver_t, p: *const libc::c_void) -> bool,
>,
#[doc = " maximum length of program_page"]
pub max_write_bytes: libc::c_int,
#[doc = " Read data from the flash. Check ``max_read_bytes`` for the maximum allowed reading length."]
pub read: ::core::option::Option<
unsafe extern "C" fn(
driver: *mut spi_flash_host_driver_t,
buffer: *mut libc::c_void,
address: u32,
read_len: u32,
) -> esp_err_t,
>,
#[doc = " maximum length of read"]
pub max_read_bytes: libc::c_int,
#[doc = " Check whether the host is idle to perform new operations."]
pub host_idle:
::core::option::Option<unsafe extern "C" fn(driver: *mut spi_flash_host_driver_t) -> bool>,
#[doc = " Configure the host to work at different read mode. Responsible to compensate the timing and set IO mode."]
pub configure_host_io_mode: ::core::option::Option<
unsafe extern "C" fn(
driver: *mut spi_flash_host_driver_t,
command: u32,
addr_bitlen: u32,
dummy_bitlen_base: libc::c_int,
io_mode: esp_flash_io_mode_t,
) -> esp_err_t,
>,
#[doc = " Internal use, poll the HW until the last operation is done."]
pub poll_cmd_done:
::core::option::Option<unsafe extern "C" fn(driver: *mut spi_flash_host_driver_t)>,
#[doc = " For some host (SPI1), they are shared with a cache. When the data is"]
#[doc = " modified, the cache needs to be flushed. Left NULL if not supported."]
pub flush_cache: ::core::option::Option<
unsafe extern "C" fn(
driver: *mut spi_flash_host_driver_t,
addr: u32,
size: u32,
) -> esp_err_t,
>,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct spi_flash_chip_t {
_unused: [u8; 0],
}
#[doc = " @brief Structure for describing a region of flash"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_flash_region_t {
#[doc = "< Start address of this region"]
pub offset: u32,
#[doc = "< Size of the region"]
pub size: u32,
}
#[doc = " OS-level integration hooks for accessing flash chips inside a running OS"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_flash_os_functions_t {
#[doc = " Called before commencing any flash operation. Does not need to be"]
#[doc = " recursive (ie is called at most once for each call to 'end')."]
pub start: ::core::option::Option<unsafe extern "C" fn(arg: *mut libc::c_void) -> esp_err_t>,
#[doc = " Called after completing any flash operation."]
pub end: ::core::option::Option<unsafe extern "C" fn(arg: *mut libc::c_void) -> esp_err_t>,
#[doc = " Called before any erase/write operations to check whether the region is limited by the OS"]
pub region_protected: ::core::option::Option<
unsafe extern "C" fn(arg: *mut libc::c_void, start_addr: size_t, size: size_t) -> esp_err_t,
>,
#[doc = " Delay for at least 'us' microseconds. Called in between 'start' and 'end'."]
pub delay_us: ::core::option::Option<
unsafe extern "C" fn(arg: *mut libc::c_void, us: libc::c_uint) -> esp_err_t,
>,
}
#[doc = " @brief Structure to describe a SPI flash chip connected to the system."]
#[doc = ""]
#[doc = "Structure must be initialized before use (passed to esp_flash_init())."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_flash_t {
#[doc = "< Pointer to hardware-specific \"host_driver\" structure. Must be initialized before used."]
pub host: *mut spi_flash_host_driver_t,
#[doc = "< Pointer to chip-model-specific \"adapter\" structure. If NULL, will be detected during initialisation."]
pub chip_drv: *const spi_flash_chip_t,
#[doc = "< Pointer to os-specific hook structure. Call ``esp_flash_init_os_functions()`` to setup this field, after the host is properly initialized."]
pub os_func: *const esp_flash_os_functions_t,
#[doc = "< Pointer to argument for os-specific hooks. Left NULL and will be initialized with ``os_func``."]
pub os_func_data: *mut libc::c_void,
#[doc = "< Configured SPI flash read mode. Set before ``esp_flash_init`` is called."]
pub read_mode: esp_flash_io_mode_t,
#[doc = "< Size of SPI flash in bytes. If 0, size will be detected during initialisation."]
pub size: u32,
#[doc = "< Detected chip id."]
pub chip_id: u32,
}
extern "C" {
#[doc = " @brief Initialise SPI flash chip interface."]
#[doc = ""]
#[doc = " This function must be called before any other API functions are called for this chip."]
#[doc = ""]
#[doc = " @note Only the ``host`` and ``read_mode`` fields of the chip structure must"]
#[doc = " be initialised before this function is called. Other fields may be"]
#[doc = " auto-detected if left set to zero or NULL."]
#[doc = ""]
#[doc = " @note If the chip->drv pointer is NULL, chip chip_drv will be auto-detected"]
#[doc = " based on its manufacturer & product IDs. See"]
#[doc = " ``esp_flash_registered_flash_drivers`` pointer for details of this process."]
#[doc = ""]
#[doc = " @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted."]
#[doc = " @return ESP_OK on success, or a flash error code if initialisation fails."]
pub fn esp_flash_init(chip: *mut esp_flash_t) -> esp_err_t;
}
extern "C" {
#[doc = " Check if appropriate chip driver is set."]
#[doc = ""]
#[doc = " @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted."]
#[doc = ""]
#[doc = " @return true if set, otherwise false."]
pub fn esp_flash_chip_driver_initialized(chip: *const esp_flash_t) -> bool;
}
extern "C" {
#[doc = " @brief Read flash ID via the common \"RDID\" SPI flash command."]
#[doc = ""]
#[doc = " @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()"]
#[doc = " @param[out] out_id Pointer to receive ID value."]
#[doc = ""]
#[doc = " ID is a 24-bit value. Lower 16 bits of 'id' are the chip ID, upper 8 bits are the manufacturer ID."]
#[doc = ""]
#[doc = " @return ESP_OK on success, or a flash error code if operation failed."]
pub fn esp_flash_read_id(chip: *mut esp_flash_t, out_id: *mut u32) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Detect flash size based on flash ID."]
#[doc = ""]
#[doc = " @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()"]
#[doc = " @param[out] out_size Detected size in bytes."]
#[doc = ""]
#[doc = " @note Most flash chips use a common format for flash ID, where the lower 4 bits specify the size as a power of 2. If"]
#[doc = " the manufacturer doesn't follow this convention, the size may be incorrectly detected."]
#[doc = ""]
#[doc = " @return ESP_OK on success, or a flash error code if operation failed."]
pub fn esp_flash_get_size(chip: *mut esp_flash_t, out_size: *mut u32) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Erase flash chip contents"]
#[doc = ""]
#[doc = " @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()"]
#[doc = ""]
#[doc = ""]
#[doc = " @return ESP_OK on success, or a flash error code if operation failed."]
pub fn esp_flash_erase_chip(chip: *mut esp_flash_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Erase a region of the flash chip"]
#[doc = ""]
#[doc = " @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()"]
#[doc = " @param start Address to start erasing flash. Must be sector aligned."]
#[doc = " @param len Length of region to erase. Must also be sector aligned."]
#[doc = ""]
#[doc = " Sector size is specifyed in chip->drv->sector_size field (typically 4096 bytes.) ESP_ERR_INVALID_ARG will be"]
#[doc = " returned if the start & length are not a multiple of this size."]
#[doc = ""]
#[doc = " Erase is performed using block (multi-sector) erases where possible (block size is specified in"]
#[doc = " chip->drv->block_erase_size field, typically 65536 bytes). Remaining sectors are erased using individual sector erase"]
#[doc = " commands."]
#[doc = ""]
#[doc = " @return ESP_OK on success, or a flash error code if operation failed."]
pub fn esp_flash_erase_region(chip: *mut esp_flash_t, start: u32, len: u32) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Read if the entire chip is write protected"]
#[doc = ""]
#[doc = " @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()"]
#[doc = " @param[out] write_protected Pointer to boolean, set to the value of the write protect flag."]
#[doc = ""]
#[doc = " @note A correct result for this flag depends on the SPI flash chip model and chip_drv in use (via the 'chip->drv'"]
#[doc = " field)."]
#[doc = ""]
#[doc = " @return ESP_OK on success, or a flash error code if operation failed."]
pub fn esp_flash_get_chip_write_protect(
chip: *mut esp_flash_t,
write_protected: *mut bool,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set write protection for the SPI flash chip"]
#[doc = ""]
#[doc = " @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()"]
#[doc = " @param write_protect Boolean value for the write protect flag"]
#[doc = ""]
#[doc = " @note Correct behaviour of this function depends on the SPI flash chip model and chip_drv in use (via the 'chip->drv'"]
#[doc = " field)."]
#[doc = ""]
#[doc = " Some SPI flash chips may require a power cycle before write protect status can be cleared. Otherwise,"]
#[doc = " write protection can be removed via a follow-up call to this function."]
#[doc = ""]
#[doc = " @return ESP_OK on success, or a flash error code if operation failed."]
pub fn esp_flash_set_chip_write_protect(
chip: *mut esp_flash_t,
write_protect: bool,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Read the list of individually protectable regions of this SPI flash chip."]
#[doc = ""]
#[doc = " @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()"]
#[doc = " @param[out] out_regions Pointer to receive a pointer to the array of protectable regions of the chip."]
#[doc = " @param[out] out_num_regions Pointer to an integer receiving the count of protectable regions in the array returned in 'regions'."]
#[doc = ""]
#[doc = " @note Correct behaviour of this function depends on the SPI flash chip model and chip_drv in use (via the 'chip->drv'"]
#[doc = " field)."]
#[doc = ""]
#[doc = " @return ESP_OK on success, or a flash error code if operation failed."]
pub fn esp_flash_get_protectable_regions(
chip: *const esp_flash_t,
out_regions: *mut *const esp_flash_region_t,
out_num_regions: *mut u32,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Detect if a region of the SPI flash chip is protected"]
#[doc = ""]
#[doc = " @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()"]
#[doc = " @param region Pointer to a struct describing a protected region. This must match one of the regions returned from esp_flash_get_protectable_regions(...)."]
#[doc = " @param[out] out_protected Pointer to a flag which is set based on the protected status for this region."]
#[doc = ""]
#[doc = " @note It is possible for this result to be false and write operations to still fail, if protection is enabled for the entire chip."]
#[doc = ""]
#[doc = " @note Correct behaviour of this function depends on the SPI flash chip model and chip_drv in use (via the 'chip->drv'"]
#[doc = " field)."]
#[doc = ""]
#[doc = " @return ESP_OK on success, or a flash error code if operation failed."]
pub fn esp_flash_get_protected_region(
chip: *mut esp_flash_t,
region: *const esp_flash_region_t,
out_protected: *mut bool,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Update the protected status for a region of the SPI flash chip"]
#[doc = ""]
#[doc = " @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()"]
#[doc = " @param region Pointer to a struct describing a protected region. This must match one of the regions returned from esp_flash_get_protectable_regions(...)."]
#[doc = " @param protect Write protection flag to set."]
#[doc = ""]
#[doc = " @note It is possible for the region protection flag to be cleared and write operations to still fail, if protection is enabled for the entire chip."]
#[doc = ""]
#[doc = " @note Correct behaviour of this function depends on the SPI flash chip model and chip_drv in use (via the 'chip->drv'"]
#[doc = " field)."]
#[doc = ""]
#[doc = " @return ESP_OK on success, or a flash error code if operation failed."]
pub fn esp_flash_set_protected_region(
chip: *mut esp_flash_t,
region: *const esp_flash_region_t,
protect: bool,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Read data from the SPI flash chip"]
#[doc = ""]
#[doc = " @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()"]
#[doc = " @param buffer Pointer to a buffer where the data will be read. To get better performance, this should be in the DRAM and word aligned."]
#[doc = " @param address Address on flash to read from. Must be less than chip->size field."]
#[doc = " @param length Length (in bytes) of data to read."]
#[doc = ""]
#[doc = " There are no alignment constraints on buffer, address or length."]
#[doc = ""]
#[doc = " @note If on-chip flash encryption is used, this function returns raw (ie encrypted) data. Use the flash cache"]
#[doc = " to transparently decrypt data."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: success"]
#[doc = " - ESP_ERR_NO_MEM: Buffer is in external PSRAM which cannot be concurrently accessed, and a temporary internal buffer could not be allocated."]
#[doc = " - or a flash error code if operation failed."]
pub fn esp_flash_read(
chip: *mut esp_flash_t,
buffer: *mut libc::c_void,
address: u32,
length: u32,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Write data to the SPI flash chip"]
#[doc = ""]
#[doc = " @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init()"]
#[doc = " @param address Address on flash to write to. Must be previously erased (SPI NOR flash can only write bits 1->0)."]
#[doc = " @param buffer Pointer to a buffer with the data to write. To get better performance, this should be in the DRAM and word aligned."]
#[doc = " @param length Length (in bytes) of data to write."]
#[doc = ""]
#[doc = " There are no alignment constraints on buffer, address or length."]
#[doc = ""]
#[doc = " @return ESP_OK on success, or a flash error code if operation failed."]
pub fn esp_flash_write(
chip: *mut esp_flash_t,
buffer: *const libc::c_void,
address: u32,
length: u32,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Encrypted and write data to the SPI flash chip using on-chip hardware flash encryption"]
#[doc = ""]
#[doc = " @param chip Pointer to identify flash chip. Must be NULL (the main flash chip). For other chips, encrypted write is not supported."]
#[doc = " @param address Address on flash to write to. 16 byte aligned. Must be previously erased (SPI NOR flash can only write bits 1->0)."]
#[doc = " @param buffer Pointer to a buffer with the data to write."]
#[doc = " @param length Length (in bytes) of data to write. 16 byte aligned."]
#[doc = ""]
#[doc = " @note Both address & length must be 16 byte aligned, as this is the encryption block size"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: on success"]
#[doc = " - ESP_ERR_NOT_SUPPORTED: encrypted write not supported for this chip."]
#[doc = " - ESP_ERR_INVALID_ARG: Either the address, buffer or length is invalid."]
#[doc = " - or other flash error code from spi_flash_write_encrypted()."]
pub fn esp_flash_write_encrypted(
chip: *mut esp_flash_t,
address: u32,
buffer: *const libc::c_void,
length: u32,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Read and decrypt data from the SPI flash chip using on-chip hardware flash encryption"]
#[doc = ""]
#[doc = " @param chip Pointer to identify flash chip. Must be NULL (the main flash chip). For other chips, encrypted read is not supported."]
#[doc = " @param address Address on flash to read from."]
#[doc = " @param out_buffer Pointer to a buffer for the data to read to."]
#[doc = " @param length Length (in bytes) of data to read."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: on success"]
#[doc = " - ESP_ERR_NOT_SUPPORTED: encrypted read not supported for this chip."]
#[doc = " - or other flash error code from spi_flash_read_encrypted()."]
pub fn esp_flash_read_encrypted(
chip: *mut esp_flash_t,
address: u32,
out_buffer: *mut libc::c_void,
length: u32,
) -> esp_err_t;
}
extern "C" {
pub static mut esp_flash_default_chip: *mut esp_flash_t;
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum spi_flash_wrap_mode_t {
FLASH_WRAP_MODE_8B = 0,
FLASH_WRAP_MODE_16B = 2,
FLASH_WRAP_MODE_32B = 4,
FLASH_WRAP_MODE_64B = 6,
FLASH_WRAP_MODE_DISABLE = 1,
}
extern "C" {
#[doc = " @brief set wrap mode of flash"]
#[doc = ""]
#[doc = " @param mode: wrap mode support disable, 16 32, 64 byte"]
#[doc = ""]
#[doc = " @return esp_err_t : ESP_OK for successful."]
#[doc = ""]
pub fn spi_flash_wrap_set(mode: spi_flash_wrap_mode_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Initialize SPI flash access driver"]
#[doc = ""]
#[doc = " This function must be called exactly once, before any other"]
#[doc = " spi_flash_* functions are called."]
#[doc = " Currently this function is called from startup code. There is"]
#[doc = " no need to call it from application code."]
#[doc = ""]
pub fn spi_flash_init();
}
extern "C" {
#[doc = " @brief Get flash chip size, as set in binary image header"]
#[doc = ""]
#[doc = " @note This value does not necessarily match real flash size."]
#[doc = ""]
#[doc = " @return size of flash chip, in bytes"]
pub fn spi_flash_get_chip_size() -> size_t;
}
extern "C" {
#[doc = " @brief Erase the Flash sector."]
#[doc = ""]
#[doc = " @param sector: Sector number, the count starts at sector 0, 4KB per sector."]
#[doc = ""]
#[doc = " @return esp_err_t"]
pub fn spi_flash_erase_sector(sector: size_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Erase a range of flash sectors"]
#[doc = ""]
#[doc = " @param start_address Address where erase operation has to start."]
#[doc = " Must be 4kB-aligned"]
#[doc = " @param size Size of erased range, in bytes. Must be divisible by 4kB."]
#[doc = ""]
#[doc = " @return esp_err_t"]
pub fn spi_flash_erase_range(start_address: size_t, size: size_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Write data to Flash."]
#[doc = ""]
#[doc = " @note For fastest write performance, write a 4 byte aligned size at a"]
#[doc = " 4 byte aligned offset in flash from a source buffer in DRAM. Varying any of"]
#[doc = " these parameters will still work, but will be slower due to buffering."]
#[doc = ""]
#[doc = " @note Writing more than 8KB at a time will be split into multiple"]
#[doc = " write operations to avoid disrupting other tasks in the system."]
#[doc = ""]
#[doc = " @param dest_addr Destination address in Flash."]
#[doc = " @param src Pointer to the source buffer."]
#[doc = " @param size Length of data, in bytes."]
#[doc = ""]
#[doc = " @return esp_err_t"]
pub fn spi_flash_write(dest_addr: size_t, src: *const libc::c_void, size: size_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Write data encrypted to Flash."]
#[doc = ""]
#[doc = " @note Flash encryption must be enabled for this function to work."]
#[doc = ""]
#[doc = " @note Flash encryption must be enabled when calling this function."]
#[doc = " If flash encryption is disabled, the function returns"]
#[doc = " ESP_ERR_INVALID_STATE. Use esp_flash_encryption_enabled()"]
#[doc = " function to determine if flash encryption is enabled."]
#[doc = ""]
#[doc = " @note Both dest_addr and size must be multiples of 16 bytes. For"]
#[doc = " absolute best performance, both dest_addr and size arguments should"]
#[doc = " be multiples of 32 bytes."]
#[doc = ""]
#[doc = " @param dest_addr Destination address in Flash. Must be a multiple of 16 bytes."]
#[doc = " @param src Pointer to the source buffer."]
#[doc = " @param size Length of data, in bytes. Must be a multiple of 16 bytes."]
#[doc = ""]
#[doc = " @return esp_err_t"]
pub fn spi_flash_write_encrypted(
dest_addr: size_t,
src: *const libc::c_void,
size: size_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Read data from Flash."]
#[doc = ""]
#[doc = " @note For fastest read performance, all parameters should be"]
#[doc = " 4 byte aligned. If source address and read size are not 4 byte"]
#[doc = " aligned, read may be split into multiple flash operations. If"]
#[doc = " destination buffer is not 4 byte aligned, a temporary buffer will"]
#[doc = " be allocated on the stack."]
#[doc = ""]
#[doc = " @note Reading more than 16KB of data at a time will be split"]
#[doc = " into multiple reads to avoid disruption to other tasks in the"]
#[doc = " system. Consider using spi_flash_mmap() to read large amounts"]
#[doc = " of data."]
#[doc = ""]
#[doc = " @param src_addr source address of the data in Flash."]
#[doc = " @param dest pointer to the destination buffer"]
#[doc = " @param size length of data"]
#[doc = ""]
#[doc = ""]
#[doc = " @return esp_err_t"]
pub fn spi_flash_read(src_addr: size_t, dest: *mut libc::c_void, size: size_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Read data from Encrypted Flash."]
#[doc = ""]
#[doc = " If flash encryption is enabled, this function will transparently decrypt data as it is read."]
#[doc = " If flash encryption is not enabled, this function behaves the same as spi_flash_read()."]
#[doc = ""]
#[doc = " See esp_flash_encryption_enabled() for a function to check if flash encryption is enabled."]
#[doc = ""]
#[doc = " @param src source address of the data in Flash."]
#[doc = " @param dest pointer to the destination buffer"]
#[doc = " @param size length of data"]
#[doc = ""]
#[doc = " @return esp_err_t"]
pub fn spi_flash_read_encrypted(
src: size_t,
dest: *mut libc::c_void,
size: size_t,
) -> esp_err_t;
}
#[repr(u32)]
#[doc = " @brief Enumeration which specifies memory space requested in an mmap call"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum spi_flash_mmap_memory_t {
#[doc = "< map to data memory (Vaddr0), allows byte-aligned access, 4 MB total"]
SPI_FLASH_MMAP_DATA = 0,
#[doc = "< map to instruction memory (Vaddr1-3), allows only 4-byte-aligned access, 11 MB total"]
SPI_FLASH_MMAP_INST = 1,
}
#[doc = " @brief Opaque handle for memory region obtained from spi_flash_mmap."]
pub type spi_flash_mmap_handle_t = u32;
extern "C" {
#[doc = " @brief Map region of flash memory into data or instruction address space"]
#[doc = ""]
#[doc = " This function allocates sufficient number of 64kB MMU pages and configures"]
#[doc = " them to map the requested region of flash memory into the address space."]
#[doc = " It may reuse MMU pages which already provide the required mapping."]
#[doc = ""]
#[doc = " As with any allocator, if mmap/munmap are heavily used then the address space"]
#[doc = " may become fragmented. To troubleshoot issues with page allocation, use"]
#[doc = " spi_flash_mmap_dump() function."]
#[doc = ""]
#[doc = " @param src_addr Physical address in flash where requested region starts."]
#[doc = " This address *must* be aligned to 64kB boundary"]
#[doc = " (SPI_FLASH_MMU_PAGE_SIZE)"]
#[doc = " @param size Size of region to be mapped. This size will be rounded"]
#[doc = " up to a 64kB boundary"]
#[doc = " @param memory Address space where the region should be mapped (data or instruction)"]
#[doc = " @param[out] out_ptr Output, pointer to the mapped memory region"]
#[doc = " @param[out] out_handle Output, handle which should be used for spi_flash_munmap call"]
#[doc = ""]
#[doc = " @return ESP_OK on success, ESP_ERR_NO_MEM if pages can not be allocated"]
pub fn spi_flash_mmap(
src_addr: size_t,
size: size_t,
memory: spi_flash_mmap_memory_t,
out_ptr: *mut *const libc::c_void,
out_handle: *mut spi_flash_mmap_handle_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Map sequences of pages of flash memory into data or instruction address space"]
#[doc = ""]
#[doc = " This function allocates sufficient number of 64kB MMU pages and configures"]
#[doc = " them to map the indicated pages of flash memory contiguously into address space."]
#[doc = " In this respect, it works in a similar way as spi_flash_mmap() but it allows mapping"]
#[doc = " a (maybe non-contiguous) set of pages into a contiguous region of memory."]
#[doc = ""]
#[doc = " @param pages An array of numbers indicating the 64kB pages in flash to be mapped"]
#[doc = " contiguously into memory. These indicate the indexes of the 64kB pages,"]
#[doc = " not the byte-size addresses as used in other functions."]
#[doc = " Array must be located in internal memory."]
#[doc = " @param page_count Number of entries in the pages array"]
#[doc = " @param memory Address space where the region should be mapped (instruction or data)"]
#[doc = " @param[out] out_ptr Output, pointer to the mapped memory region"]
#[doc = " @param[out] out_handle Output, handle which should be used for spi_flash_munmap call"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_NO_MEM if pages can not be allocated"]
#[doc = " - ESP_ERR_INVALID_ARG if pagecount is zero or pages array is not in"]
#[doc = " internal memory"]
pub fn spi_flash_mmap_pages(
pages: *const libc::c_int,
page_count: size_t,
memory: spi_flash_mmap_memory_t,
out_ptr: *mut *const libc::c_void,
out_handle: *mut spi_flash_mmap_handle_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Release region previously obtained using spi_flash_mmap"]
#[doc = ""]
#[doc = " @note Calling this function will not necessarily unmap memory region."]
#[doc = " Region will only be unmapped when there are no other handles which"]
#[doc = " reference this region. In case of partially overlapping regions"]
#[doc = " it is possible that memory will be unmapped partially."]
#[doc = ""]
#[doc = " @param handle Handle obtained from spi_flash_mmap"]
pub fn spi_flash_munmap(handle: spi_flash_mmap_handle_t);
}
extern "C" {
#[doc = " @brief Display information about mapped regions"]
#[doc = ""]
#[doc = " This function lists handles obtained using spi_flash_mmap, along with range"]
#[doc = " of pages allocated to each handle. It also lists all non-zero entries of"]
#[doc = " MMU table and corresponding reference counts."]
pub fn spi_flash_mmap_dump();
}
extern "C" {
#[doc = " @brief get free pages number which can be mmap"]
#[doc = ""]
#[doc = " This function will return number of free pages available in mmu table. This could be useful"]
#[doc = " before calling actual spi_flash_mmap (maps flash range to DCache or ICache memory) to check"]
#[doc = " if there is sufficient space available for mapping."]
#[doc = ""]
#[doc = " @param memory memory type of MMU table free page"]
#[doc = ""]
#[doc = " @return number of free pages which can be mmaped"]
pub fn spi_flash_mmap_get_free_pages(memory: spi_flash_mmap_memory_t) -> u32;
}
extern "C" {
#[doc = " @brief Given a memory address where flash is mapped, return the corresponding physical flash offset."]
#[doc = ""]
#[doc = " Cache address does not have have been assigned via spi_flash_mmap(), any address in memory mapped flash space can be looked up."]
#[doc = ""]
#[doc = " @param cached Pointer to flashed cached memory."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - SPI_FLASH_CACHE2PHYS_FAIL If cache address is outside flash cache region, or the address is not mapped."]
#[doc = " - Otherwise, returns physical offset in flash"]
pub fn spi_flash_cache2phys(cached: *const libc::c_void) -> size_t;
}
extern "C" {
#[doc = " @brief Given a physical offset in flash, return the address where it is mapped in the memory space."]
#[doc = ""]
#[doc = " Physical address does not have to have been assigned via spi_flash_mmap(), any address in flash can be looked up."]
#[doc = ""]
#[doc = " @note Only the first matching cache address is returned. If MMU flash cache table is configured so multiple entries"]
#[doc = " point to the same physical address, there may be more than one cache address corresponding to that physical"]
#[doc = " address. It is also possible for a single physical address to be mapped to both the IROM and DROM regions."]
#[doc = ""]
#[doc = " @note This function doesn't impose any alignment constraints, but if memory argument is SPI_FLASH_MMAP_INST and"]
#[doc = " phys_offs is not 4-byte aligned, then reading from the returned pointer will result in a crash."]
#[doc = ""]
#[doc = " @param phys_offs Physical offset in flash memory to look up."]
#[doc = " @param memory Address space type to look up a flash cache address mapping for (instruction or data)"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - NULL if the physical address is invalid or not mapped to flash cache of the specified memory type."]
#[doc = " - Cached memory address (in IROM or DROM space) corresponding to phys_offs."]
pub fn spi_flash_phys2cache(
phys_offs: size_t,
memory: spi_flash_mmap_memory_t,
) -> *const libc::c_void;
}
extern "C" {
#[doc = " @brief Check at runtime if flash cache is enabled on both CPUs"]
#[doc = ""]
#[doc = " @return true if both CPUs have flash cache enabled, false otherwise."]
pub fn spi_flash_cache_enabled() -> bool;
}
extern "C" {
#[doc = " @brief Re-enable cache for the core defined as cpuid parameter."]
#[doc = ""]
#[doc = " @param cpuid the core number to enable instruction cache for"]
pub fn spi_flash_enable_cache(cpuid: u32);
}
#[doc = " @brief SPI flash critical section enter function."]
#[doc = ""]
pub type spi_flash_guard_start_func_t = ::core::option::Option<unsafe extern "C" fn()>;
#[doc = " @brief SPI flash critical section exit function."]
pub type spi_flash_guard_end_func_t = ::core::option::Option<unsafe extern "C" fn()>;
#[doc = " @brief SPI flash operation lock function."]
pub type spi_flash_op_lock_func_t = ::core::option::Option<unsafe extern "C" fn()>;
#[doc = " @brief SPI flash operation unlock function."]
pub type spi_flash_op_unlock_func_t = ::core::option::Option<unsafe extern "C" fn()>;
#[doc = " @brief Function to protect SPI flash critical regions corruption."]
pub type spi_flash_is_safe_write_address_t =
::core::option::Option<unsafe extern "C" fn(addr: size_t, size: size_t) -> bool>;
#[doc = " Structure holding SPI flash access critical sections management functions."]
#[doc = ""]
#[doc = " Flash API uses two types of flash access management functions:"]
#[doc = " 1) Functions which prepare/restore flash cache and interrupts before calling"]
#[doc = " appropriate ROM functions (SPIWrite, SPIRead and SPIEraseBlock):"]
#[doc = " - 'start' function should disables flash cache and non-IRAM interrupts and"]
#[doc = " is invoked before the call to one of ROM function above."]
#[doc = " - 'end' function should restore state of flash cache and non-IRAM interrupts and"]
#[doc = " is invoked after the call to one of ROM function above."]
#[doc = " These two functions are not recursive."]
#[doc = " 2) Functions which synchronizes access to internal data used by flash API."]
#[doc = " This functions are mostly intended to synchronize access to flash API internal data"]
#[doc = " in multithreaded environment and use OS primitives:"]
#[doc = " - 'op_lock' locks access to flash API internal data."]
#[doc = " - 'op_unlock' unlocks access to flash API internal data."]
#[doc = " These two functions are recursive and can be used around the outside of multiple calls to"]
#[doc = " 'start' & 'end', in order to create atomic multi-part flash operations."]
#[doc = " 3) When CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is disabled, flash writing/erasing"]
#[doc = " API checks for addresses provided by user to avoid corruption of critical flash regions"]
#[doc = " (bootloader, partition table, running application etc.)."]
#[doc = ""]
#[doc = " Different versions of the guarding functions should be used depending on the context of"]
#[doc = " execution (with or without functional OS). In normal conditions when flash API is called"]
#[doc = " from task the functions use OS primitives. When there is no OS at all or when"]
#[doc = " it is not guaranteed that OS is functional (accessing flash from exception handler) these"]
#[doc = " functions cannot use OS primitives or even does not need them (multithreaded access is not possible)."]
#[doc = ""]
#[doc = " @note Structure and corresponding guard functions should not reside in flash."]
#[doc = " For example structure can be placed in DRAM and functions in IRAM sections."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct spi_flash_guard_funcs_t {
#[doc = "< critical section start function."]
pub start: spi_flash_guard_start_func_t,
#[doc = "< critical section end function."]
pub end: spi_flash_guard_end_func_t,
#[doc = "< flash access API lock function."]
pub op_lock: spi_flash_op_lock_func_t,
#[doc = "< flash access API unlock function."]
pub op_unlock: spi_flash_op_unlock_func_t,
#[doc = "< checks flash write addresses."]
pub is_safe_write_address: spi_flash_is_safe_write_address_t,
}
extern "C" {
#[doc = " @brief Sets guard functions to access flash."]
#[doc = ""]
#[doc = " @note Pointed structure and corresponding guard functions should not reside in flash."]
#[doc = " For example structure can be placed in DRAM and functions in IRAM sections."]
#[doc = ""]
#[doc = " @param funcs pointer to structure holding flash access guard functions."]
pub fn spi_flash_guard_set(funcs: *const spi_flash_guard_funcs_t);
}
extern "C" {
#[doc = " @brief Get the guard functions used for flash access"]
#[doc = ""]
#[doc = " @return The guard functions that were set via spi_flash_guard_set(). These functions"]
#[doc = " can be called if implementing custom low-level SPI flash operations."]
pub fn spi_flash_guard_get() -> *const spi_flash_guard_funcs_t;
}
extern "C" {
pub static g_flash_guard_default_ops: spi_flash_guard_funcs_t;
}
extern "C" {
pub static g_flash_guard_no_os_ops: spi_flash_guard_funcs_t;
}
#[repr(u32)]
#[doc = " @brief Partition type"]
#[doc = ""]
#[doc = " @note Partition types with integer value 0x00-0x3F are reserved for partition types defined by ESP-IDF."]
#[doc = " Any other integer value 0x40-0xFE can be used by individual applications, without restriction."]
#[doc = ""]
#[doc = " @internal Keep this enum in sync with PartitionDefinition class gen_esp32part.py @endinternal"]
#[doc = ""]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_partition_type_t {
#[doc = "!< Application partition type"]
ESP_PARTITION_TYPE_APP = 0,
#[doc = "!< Data partition type"]
ESP_PARTITION_TYPE_DATA = 1,
}
impl esp_partition_subtype_t {
pub const ESP_PARTITION_SUBTYPE_APP_OTA_0: esp_partition_subtype_t =
esp_partition_subtype_t::ESP_PARTITION_SUBTYPE_APP_OTA_MIN;
}
impl esp_partition_subtype_t {
pub const ESP_PARTITION_SUBTYPE_APP_TEST: esp_partition_subtype_t =
esp_partition_subtype_t::ESP_PARTITION_SUBTYPE_APP_OTA_MAX;
}
impl esp_partition_subtype_t {
pub const ESP_PARTITION_SUBTYPE_DATA_OTA: esp_partition_subtype_t =
esp_partition_subtype_t::ESP_PARTITION_SUBTYPE_APP_FACTORY;
}
#[repr(u32)]
#[doc = " @brief Partition subtype"]
#[doc = ""]
#[doc = " @note These ESP-IDF-defined partition subtypes apply to partitions of type ESP_PARTITION_TYPE_APP"]
#[doc = " and ESP_PARTITION_TYPE_DATA."]
#[doc = ""]
#[doc = " Application-defined partition types (0x40-0xFE) can set any numeric subtype value."]
#[doc = ""]
#[doc = " @internal Keep this enum in sync with PartitionDefinition class gen_esp32part.py @endinternal"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_partition_subtype_t {
#[doc = "!< Factory application partition"]
ESP_PARTITION_SUBTYPE_APP_FACTORY = 0,
#[doc = "!< Base for OTA partition subtypes"]
ESP_PARTITION_SUBTYPE_APP_OTA_MIN = 16,
#[doc = "!< OTA partition 1"]
ESP_PARTITION_SUBTYPE_APP_OTA_1 = 17,
#[doc = "!< OTA partition 2"]
ESP_PARTITION_SUBTYPE_APP_OTA_2 = 18,
#[doc = "!< OTA partition 3"]
ESP_PARTITION_SUBTYPE_APP_OTA_3 = 19,
#[doc = "!< OTA partition 4"]
ESP_PARTITION_SUBTYPE_APP_OTA_4 = 20,
#[doc = "!< OTA partition 5"]
ESP_PARTITION_SUBTYPE_APP_OTA_5 = 21,
#[doc = "!< OTA partition 6"]
ESP_PARTITION_SUBTYPE_APP_OTA_6 = 22,
#[doc = "!< OTA partition 7"]
ESP_PARTITION_SUBTYPE_APP_OTA_7 = 23,
#[doc = "!< OTA partition 8"]
ESP_PARTITION_SUBTYPE_APP_OTA_8 = 24,
#[doc = "!< OTA partition 9"]
ESP_PARTITION_SUBTYPE_APP_OTA_9 = 25,
#[doc = "!< OTA partition 10"]
ESP_PARTITION_SUBTYPE_APP_OTA_10 = 26,
#[doc = "!< OTA partition 11"]
ESP_PARTITION_SUBTYPE_APP_OTA_11 = 27,
#[doc = "!< OTA partition 12"]
ESP_PARTITION_SUBTYPE_APP_OTA_12 = 28,
#[doc = "!< OTA partition 13"]
ESP_PARTITION_SUBTYPE_APP_OTA_13 = 29,
#[doc = "!< OTA partition 14"]
ESP_PARTITION_SUBTYPE_APP_OTA_14 = 30,
#[doc = "!< OTA partition 15"]
ESP_PARTITION_SUBTYPE_APP_OTA_15 = 31,
#[doc = "!< Max subtype of OTA partition"]
ESP_PARTITION_SUBTYPE_APP_OTA_MAX = 32,
#[doc = "!< PHY init data partition"]
ESP_PARTITION_SUBTYPE_DATA_PHY = 1,
#[doc = "!< NVS partition"]
ESP_PARTITION_SUBTYPE_DATA_NVS = 2,
#[doc = "!< COREDUMP partition"]
ESP_PARTITION_SUBTYPE_DATA_COREDUMP = 3,
#[doc = "!< Partition for NVS keys"]
ESP_PARTITION_SUBTYPE_DATA_NVS_KEYS = 4,
#[doc = "!< Partition for emulate eFuse bits"]
ESP_PARTITION_SUBTYPE_DATA_EFUSE_EM = 5,
#[doc = "!< ESPHTTPD partition"]
ESP_PARTITION_SUBTYPE_DATA_ESPHTTPD = 128,
#[doc = "!< FAT partition"]
ESP_PARTITION_SUBTYPE_DATA_FAT = 129,
#[doc = "!< SPIFFS partition"]
ESP_PARTITION_SUBTYPE_DATA_SPIFFS = 130,
#[doc = "!< Used to search for partitions with any subtype"]
ESP_PARTITION_SUBTYPE_ANY = 255,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_partition_iterator_opaque_ {
_unused: [u8; 0],
}
#[doc = " @brief Opaque partition iterator type"]
pub type esp_partition_iterator_t = *mut esp_partition_iterator_opaque_;
#[doc = " @brief partition information structure"]
#[doc = ""]
#[doc = " This is not the format in flash, that format is esp_partition_info_t."]
#[doc = ""]
#[doc = " However, this is the format used by this API."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_partition_t {
#[doc = "< SPI flash chip on which the partition resides"]
pub flash_chip: *mut esp_flash_t,
#[doc = "< partition type (app/data)"]
pub type_: esp_partition_type_t,
#[doc = "< partition subtype"]
pub subtype: esp_partition_subtype_t,
#[doc = "< starting address of the partition in flash"]
pub address: u32,
#[doc = "< size of the partition, in bytes"]
pub size: u32,
#[doc = "< partition label, zero-terminated ASCII string"]
pub label: [libc::c_char; 17usize],
#[doc = "< flag is set to true if partition is encrypted"]
pub encrypted: bool,
}
extern "C" {
#[doc = " @brief Find partition based on one or more parameters"]
#[doc = ""]
#[doc = " @param type Partition type, one of esp_partition_type_t values or an 8-bit unsigned integer"]
#[doc = " @param subtype Partition subtype, one of esp_partition_subtype_t values or an 8-bit unsigned integer."]
#[doc = " To find all partitions of given type, use ESP_PARTITION_SUBTYPE_ANY."]
#[doc = " @param label (optional) Partition label. Set this value if looking"]
#[doc = " for partition with a specific name. Pass NULL otherwise."]
#[doc = ""]
#[doc = " @return iterator which can be used to enumerate all the partitions found,"]
#[doc = " or NULL if no partitions were found."]
#[doc = " Iterator obtained through this function has to be released"]
#[doc = " using esp_partition_iterator_release when not used any more."]
pub fn esp_partition_find(
type_: esp_partition_type_t,
subtype: esp_partition_subtype_t,
label: *const libc::c_char,
) -> esp_partition_iterator_t;
}
extern "C" {
#[doc = " @brief Find first partition based on one or more parameters"]
#[doc = ""]
#[doc = " @param type Partition type, one of esp_partition_type_t values or an 8-bit unsigned integer"]
#[doc = " @param subtype Partition subtype, one of esp_partition_subtype_t values or an 8-bit unsigned integer"]
#[doc = " To find all partitions of given type, use ESP_PARTITION_SUBTYPE_ANY."]
#[doc = " @param label (optional) Partition label. Set this value if looking"]
#[doc = " for partition with a specific name. Pass NULL otherwise."]
#[doc = ""]
#[doc = " @return pointer to esp_partition_t structure, or NULL if no partition is found."]
#[doc = " This pointer is valid for the lifetime of the application."]
pub fn esp_partition_find_first(
type_: esp_partition_type_t,
subtype: esp_partition_subtype_t,
label: *const libc::c_char,
) -> *const esp_partition_t;
}
extern "C" {
#[doc = " @brief Get esp_partition_t structure for given partition"]
#[doc = ""]
#[doc = " @param iterator Iterator obtained using esp_partition_find. Must be non-NULL."]
#[doc = ""]
#[doc = " @return pointer to esp_partition_t structure. This pointer is valid for the lifetime"]
#[doc = " of the application."]
pub fn esp_partition_get(iterator: esp_partition_iterator_t) -> *const esp_partition_t;
}
extern "C" {
#[doc = " @brief Move partition iterator to the next partition found"]
#[doc = ""]
#[doc = " Any copies of the iterator will be invalid after this call."]
#[doc = ""]
#[doc = " @param iterator Iterator obtained using esp_partition_find. Must be non-NULL."]
#[doc = ""]
#[doc = " @return NULL if no partition was found, valid esp_partition_iterator_t otherwise."]
pub fn esp_partition_next(iterator: esp_partition_iterator_t) -> esp_partition_iterator_t;
}
extern "C" {
#[doc = " @brief Release partition iterator"]
#[doc = ""]
#[doc = " @param iterator Iterator obtained using esp_partition_find. Must be non-NULL."]
#[doc = ""]
pub fn esp_partition_iterator_release(iterator: esp_partition_iterator_t);
}
extern "C" {
#[doc = " @brief Verify partition data"]
#[doc = ""]
#[doc = " Given a pointer to partition data, verify this partition exists in the partition table (all fields match.)"]
#[doc = ""]
#[doc = " This function is also useful to take partition data which may be in a RAM buffer and convert it to a pointer to the"]
#[doc = " permanent partition data stored in flash."]
#[doc = ""]
#[doc = " Pointers returned from this function can be compared directly to the address of any pointer returned from"]
#[doc = " esp_partition_get(), as a test for equality."]
#[doc = ""]
#[doc = " @param partition Pointer to partition data to verify. Must be non-NULL. All fields of this structure must match the"]
#[doc = " partition table entry in flash for this function to return a successful match."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - If partition not found, returns NULL."]
#[doc = " - If found, returns a pointer to the esp_partition_t structure in flash. This pointer is always valid for the lifetime of the application."]
pub fn esp_partition_verify(partition: *const esp_partition_t) -> *const esp_partition_t;
}
extern "C" {
#[doc = " @brief Read data from the partition"]
#[doc = ""]
#[doc = " @param partition Pointer to partition structure obtained using"]
#[doc = " esp_partition_find_first or esp_partition_get."]
#[doc = " Must be non-NULL."]
#[doc = " @param dst Pointer to the buffer where data should be stored."]
#[doc = " Pointer must be non-NULL and buffer must be at least 'size' bytes long."]
#[doc = " @param src_offset Address of the data to be read, relative to the"]
#[doc = " beginning of the partition."]
#[doc = " @param size Size of data to be read, in bytes."]
#[doc = ""]
#[doc = " @return ESP_OK, if data was read successfully;"]
#[doc = " ESP_ERR_INVALID_ARG, if src_offset exceeds partition size;"]
#[doc = " ESP_ERR_INVALID_SIZE, if read would go out of bounds of the partition;"]
#[doc = " or one of error codes from lower-level flash driver."]
pub fn esp_partition_read(
partition: *const esp_partition_t,
src_offset: size_t,
dst: *mut libc::c_void,
size: size_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Write data to the partition"]
#[doc = ""]
#[doc = " Before writing data to flash, corresponding region of flash needs to be erased."]
#[doc = " This can be done using esp_partition_erase_range function."]
#[doc = ""]
#[doc = " Partitions marked with an encryption flag will automatically be"]
#[doc = " written via the spi_flash_write_encrypted() function. If writing to"]
#[doc = " an encrypted partition, all write offsets and lengths must be"]
#[doc = " multiples of 16 bytes. See the spi_flash_write_encrypted() function"]
#[doc = " for more details. Unencrypted partitions do not have this"]
#[doc = " restriction."]
#[doc = ""]
#[doc = " @param partition Pointer to partition structure obtained using"]
#[doc = " esp_partition_find_first or esp_partition_get."]
#[doc = " Must be non-NULL."]
#[doc = " @param dst_offset Address where the data should be written, relative to the"]
#[doc = " beginning of the partition."]
#[doc = " @param src Pointer to the source buffer. Pointer must be non-NULL and"]
#[doc = " buffer must be at least 'size' bytes long."]
#[doc = " @param size Size of data to be written, in bytes."]
#[doc = ""]
#[doc = " @note Prior to writing to flash memory, make sure it has been erased with"]
#[doc = " esp_partition_erase_range call."]
#[doc = ""]
#[doc = " @return ESP_OK, if data was written successfully;"]
#[doc = " ESP_ERR_INVALID_ARG, if dst_offset exceeds partition size;"]
#[doc = " ESP_ERR_INVALID_SIZE, if write would go out of bounds of the partition;"]
#[doc = " or one of error codes from lower-level flash driver."]
pub fn esp_partition_write(
partition: *const esp_partition_t,
dst_offset: size_t,
src: *const libc::c_void,
size: size_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Erase part of the partition"]
#[doc = ""]
#[doc = " @param partition Pointer to partition structure obtained using"]
#[doc = " esp_partition_find_first or esp_partition_get."]
#[doc = " Must be non-NULL."]
#[doc = " @param offset Offset from the beginning of partition where erase operation"]
#[doc = " should start. Must be aligned to 4 kilobytes."]
#[doc = " @param size Size of the range which should be erased, in bytes."]
#[doc = " Must be divisible by 4 kilobytes."]
#[doc = ""]
#[doc = " @return ESP_OK, if the range was erased successfully;"]
#[doc = " ESP_ERR_INVALID_ARG, if iterator or dst are NULL;"]
#[doc = " ESP_ERR_INVALID_SIZE, if erase would go out of bounds of the partition;"]
#[doc = " or one of error codes from lower-level flash driver."]
pub fn esp_partition_erase_range(
partition: *const esp_partition_t,
offset: size_t,
size: size_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Configure MMU to map partition into data memory"]
#[doc = ""]
#[doc = " Unlike spi_flash_mmap function, which requires a 64kB aligned base address,"]
#[doc = " this function doesn't impose such a requirement."]
#[doc = " If offset results in a flash address which is not aligned to 64kB boundary,"]
#[doc = " address will be rounded to the lower 64kB boundary, so that mapped region"]
#[doc = " includes requested range."]
#[doc = " Pointer returned via out_ptr argument will be adjusted to point to the"]
#[doc = " requested offset (not necessarily to the beginning of mmap-ed region)."]
#[doc = ""]
#[doc = " To release mapped memory, pass handle returned via out_handle argument to"]
#[doc = " spi_flash_munmap function."]
#[doc = ""]
#[doc = " @param partition Pointer to partition structure obtained using"]
#[doc = " esp_partition_find_first or esp_partition_get."]
#[doc = " Must be non-NULL."]
#[doc = " @param offset Offset from the beginning of partition where mapping should start."]
#[doc = " @param size Size of the area to be mapped."]
#[doc = " @param memory Memory space where the region should be mapped"]
#[doc = " @param out_ptr Output, pointer to the mapped memory region"]
#[doc = " @param out_handle Output, handle which should be used for spi_flash_munmap call"]
#[doc = ""]
#[doc = " @return ESP_OK, if successful"]
pub fn esp_partition_mmap(
partition: *const esp_partition_t,
offset: size_t,
size: size_t,
memory: spi_flash_mmap_memory_t,
out_ptr: *mut *const libc::c_void,
out_handle: *mut spi_flash_mmap_handle_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get SHA-256 digest for required partition."]
#[doc = ""]
#[doc = " For apps with SHA-256 appended to the app image, the result is the appended SHA-256 value for the app image content."]
#[doc = " The hash is verified before returning, if app content is invalid then the function returns ESP_ERR_IMAGE_INVALID."]
#[doc = " For apps without SHA-256 appended to the image, the result is the SHA-256 of all bytes in the app image."]
#[doc = " For other partition types, the result is the SHA-256 of the entire partition."]
#[doc = ""]
#[doc = " @param[in] partition Pointer to info for partition containing app or data. (fields: address, size and type, are required to be filled)."]
#[doc = " @param[out] sha_256 Returned SHA-256 digest for a given partition."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: In case of successful operation."]
#[doc = " - ESP_ERR_INVALID_ARG: The size was 0 or the sha_256 was NULL."]
#[doc = " - ESP_ERR_NO_MEM: Cannot allocate memory for sha256 operation."]
#[doc = " - ESP_ERR_IMAGE_INVALID: App partition doesn't contain a valid app image."]
#[doc = " - ESP_FAIL: An allocation error occurred."]
pub fn esp_partition_get_sha256(
partition: *const esp_partition_t,
sha_256: *mut u8,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Check for the identity of two partitions by SHA-256 digest."]
#[doc = ""]
#[doc = " @param[in] partition_1 Pointer to info for partition 1 containing app or data. (fields: address, size and type, are required to be filled)."]
#[doc = " @param[in] partition_2 Pointer to info for partition 2 containing app or data. (fields: address, size and type, are required to be filled)."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - True: In case of the two firmware is equal."]
#[doc = " - False: Otherwise"]
pub fn esp_partition_check_identity(
partition_1: *const esp_partition_t,
partition_2: *const esp_partition_t,
) -> bool;
}
extern "C" {
#[doc = " @brief Register a partition on an external flash chip"]
#[doc = ""]
#[doc = " This API allows designating certain areas of external flash chips (identified by the esp_flash_t structure)"]
#[doc = " as partitions. This allows using them with components which access SPI flash through the esp_partition API."]
#[doc = ""]
#[doc = " @param flash_chip Pointer to the structure identifying the flash chip"]
#[doc = " @param offset Address in bytes, where the partition starts"]
#[doc = " @param size Size of the partition in bytes"]
#[doc = " @param label Partition name"]
#[doc = " @param type One of the partition types (ESP_PARTITION_TYPE_*), or an integer. Note that applications can not be booted from external flash"]
#[doc = " chips, so using ESP_PARTITION_TYPE_APP is not supported."]
#[doc = " @param subtype One of the partition subtypes (ESP_PARTITION_SUBTYPE_*), or an integer."]
#[doc = " @param[out] out_partition Output, if non-NULL, receives the pointer to the resulting esp_partition_t structure"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_NOT_SUPPORTED if CONFIG_CONFIG_SPI_FLASH_USE_LEGACY_IMPL is enabled"]
#[doc = " - ESP_ERR_NO_MEM if memory allocation has failed"]
#[doc = " - ESP_ERR_INVALID_ARG if the new partition overlaps another partition on the same flash chip"]
#[doc = " - ESP_ERR_INVALID_SIZE if the partition doesn't fit into the flash chip size"]
pub fn esp_partition_register_external(
flash_chip: *mut esp_flash_t,
offset: size_t,
size: size_t,
label: *const libc::c_char,
type_: esp_partition_type_t,
subtype: esp_partition_subtype_t,
out_partition: *mut *const esp_partition_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Deregister the partition previously registered using esp_partition_register_external"]
#[doc = " @param partition pointer to the partition structure obtained from esp_partition_register_external,"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_NOT_FOUND if the partition pointer is not found"]
#[doc = " - ESP_ERR_INVALID_ARG if the partition comes from the partition table"]
#[doc = " - ESP_ERR_INVALID_ARG if the partition was not registered using"]
#[doc = " esp_partition_register_external function."]
pub fn esp_partition_deregister_external(partition: *const esp_partition_t) -> esp_err_t;
}
#[repr(u32)]
#[doc = " OTA_DATA states for checking operability of the app."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_ota_img_states_t {
#[doc = "< Monitor the first boot. In bootloader this state is changed to ESP_OTA_IMG_PENDING_VERIFY."]
ESP_OTA_IMG_NEW = 0,
#[doc = "< First boot for this app was. If while the second boot this state is then it will be changed to ABORTED."]
ESP_OTA_IMG_PENDING_VERIFY = 1,
#[doc = "< App was confirmed as workable. App can boot and work without limits."]
ESP_OTA_IMG_VALID = 2,
#[doc = "< App was confirmed as non-workable. This app will not selected to boot at all."]
ESP_OTA_IMG_INVALID = 3,
#[doc = "< App could not confirm the workable or non-workable. In bootloader IMG_PENDING_VERIFY state will be changed to IMG_ABORTED. This app will not selected to boot at all."]
ESP_OTA_IMG_ABORTED = 4,
#[doc = "< Undefined. App can boot and work without limits."]
ESP_OTA_IMG_UNDEFINED = 4294967295,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_ota_select_entry_t {
pub ota_seq: u32,
pub seq_label: [u8; 20usize],
pub ota_state: u32,
pub crc: u32,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_partition_pos_t {
pub offset: u32,
pub size: u32,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_partition_info_t {
pub magic: u16,
pub type_: u8,
pub subtype: u8,
pub pos: esp_partition_pos_t,
pub label: [u8; 16usize],
pub flags: u32,
}
extern "C" {
pub fn esp_partition_table_verify(
partition_table: *const esp_partition_info_t,
log_errors: bool,
num_partitions: *mut libc::c_int,
) -> esp_err_t;
}
extern "C" {
#[doc = " Check whether the region on the main flash is safe to write."]
#[doc = ""]
#[doc = " @param addr Start address of the region"]
#[doc = " @param size Size of the region"]
#[doc = ""]
#[doc = " @return true if the region is safe to write, otherwise false."]
pub fn esp_partition_main_flash_region_safe(addr: size_t, size: size_t) -> bool;
}
#[repr(u16)]
#[doc = " @brief ESP chip ID"]
#[doc = ""]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_chip_id_t {
#[doc = "< chip ID: ESP32"]
ESP_CHIP_ID_ESP32 = 0,
#[doc = "< chip ID: ESP32S2"]
ESP_CHIP_ID_ESP32S2 = 2,
#[doc = "< Invalid chip ID (we defined it to make sure the esp_chip_id_t is 2 bytes size)"]
ESP_CHIP_ID_INVALID = 65535,
}
#[repr(u32)]
#[doc = " @brief SPI flash mode, used in esp_image_header_t"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_image_spi_mode_t {
#[doc = "< SPI mode QIO"]
ESP_IMAGE_SPI_MODE_QIO = 0,
#[doc = "< SPI mode QOUT"]
ESP_IMAGE_SPI_MODE_QOUT = 1,
#[doc = "< SPI mode DIO"]
ESP_IMAGE_SPI_MODE_DIO = 2,
#[doc = "< SPI mode DOUT"]
ESP_IMAGE_SPI_MODE_DOUT = 3,
#[doc = "< SPI mode FAST_READ"]
ESP_IMAGE_SPI_MODE_FAST_READ = 4,
#[doc = "< SPI mode SLOW_READ"]
ESP_IMAGE_SPI_MODE_SLOW_READ = 5,
}
#[repr(u32)]
#[doc = " @brief SPI flash clock frequency"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_image_spi_freq_t {
#[doc = "< SPI clock frequency 40 MHz"]
ESP_IMAGE_SPI_SPEED_40M = 0,
#[doc = "< SPI clock frequency 26 MHz"]
ESP_IMAGE_SPI_SPEED_26M = 1,
#[doc = "< SPI clock frequency 20 MHz"]
ESP_IMAGE_SPI_SPEED_20M = 2,
#[doc = "< SPI clock frequency 80 MHz"]
ESP_IMAGE_SPI_SPEED_80M = 15,
}
#[repr(u32)]
#[doc = " @brief Supported SPI flash sizes"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_image_flash_size_t {
#[doc = "< SPI flash size 1 MB"]
ESP_IMAGE_FLASH_SIZE_1MB = 0,
#[doc = "< SPI flash size 2 MB"]
ESP_IMAGE_FLASH_SIZE_2MB = 1,
#[doc = "< SPI flash size 4 MB"]
ESP_IMAGE_FLASH_SIZE_4MB = 2,
#[doc = "< SPI flash size 8 MB"]
ESP_IMAGE_FLASH_SIZE_8MB = 3,
#[doc = "< SPI flash size 16 MB"]
ESP_IMAGE_FLASH_SIZE_16MB = 4,
#[doc = "< SPI flash size MAX"]
ESP_IMAGE_FLASH_SIZE_MAX = 5,
}
#[doc = " @brief Main header of binary image"]
#[repr(C, packed)]
#[derive(Debug, Copy, Clone)]
pub struct esp_image_header_t {
#[doc = "< Magic word ESP_IMAGE_HEADER_MAGIC"]
pub magic: u8,
#[doc = "< Count of memory segments"]
pub segment_count: u8,
#[doc = "< flash read mode (esp_image_spi_mode_t as uint8_t)"]
pub spi_mode: u8,
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 1usize], u8>,
#[doc = "< Entry address"]
pub entry_addr: u32,
#[doc = "< WP pin when SPI pins set via efuse (read by ROM bootloader,"]
#[doc = " the IDF bootloader uses software to configure the WP"]
#[doc = " pin and sets this field to 0xEE=disabled)"]
pub wp_pin: u8,
#[doc = "< Drive settings for the SPI flash pins (read by ROM bootloader)"]
pub spi_pin_drv: [u8; 3usize],
#[doc = "< Chip identification number"]
pub chip_id: esp_chip_id_t,
#[doc = "< Minimum chip revision supported by image"]
pub min_chip_rev: u8,
#[doc = "< Reserved bytes in additional header space, currently unused"]
pub reserved: [u8; 8usize],
#[doc = "< If 1, a SHA256 digest \"simple hash\" (of the entire image) is appended after the checksum."]
#[doc = " Included in image length. This digest"]
#[doc = " is separate to secure boot and only used for detecting corruption."]
#[doc = " For secure boot signed images, the signature"]
#[doc = " is appended after this (and the simple hash is included in the signed data)."]
pub hash_appended: u8,
}
impl esp_image_header_t {
#[inline]
pub fn spi_speed(&self) -> u8 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 4u8) as u8) }
}
#[inline]
pub fn set_spi_speed(&mut self, val: u8) {
unsafe {
let val: u8 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 4u8, val as u64)
}
}
#[inline]
pub fn spi_size(&self) -> u8 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 4u8) as u8) }
}
#[inline]
pub fn set_spi_size(&mut self, val: u8) {
unsafe {
let val: u8 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 4u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(spi_speed: u8, spi_size: u8) -> __BindgenBitfieldUnit<[u8; 1usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 1usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 4u8, {
let spi_speed: u8 = unsafe { ::core::mem::transmute(spi_speed) };
spi_speed as u64
});
__bindgen_bitfield_unit.set(4usize, 4u8, {
let spi_size: u8 = unsafe { ::core::mem::transmute(spi_size) };
spi_size as u64
});
__bindgen_bitfield_unit
}
}
#[doc = " @brief Header of binary image segment"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_image_segment_header_t {
#[doc = "< Address of segment"]
pub load_addr: u32,
#[doc = "< Length of data"]
pub data_len: u32,
}
#[doc = " @brief Description about application."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_app_desc_t {
#[doc = "< Magic word ESP_APP_DESC_MAGIC_WORD"]
pub magic_word: u32,
#[doc = "< Secure version"]
pub secure_version: u32,
#[doc = "< reserv1"]
pub reserv1: [u32; 2usize],
#[doc = "< Application version"]
pub version: [libc::c_char; 32usize],
#[doc = "< Project name"]
pub project_name: [libc::c_char; 32usize],
#[doc = "< Compile time"]
pub time: [libc::c_char; 16usize],
#[doc = "< Compile date"]
pub date: [libc::c_char; 16usize],
#[doc = "< Version IDF"]
pub idf_ver: [libc::c_char; 32usize],
#[doc = "< sha256 of elf file"]
pub app_elf_sha256: [u8; 32usize],
#[doc = "< reserv2"]
pub reserv2: [u32; 20usize],
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_image_metadata_t {
pub start_addr: u32,
pub image: esp_image_header_t,
pub segments: [esp_image_segment_header_t; 16usize],
pub segment_data: [u32; 16usize],
pub image_len: u32,
pub image_digest: [u8; 32usize],
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_image_load_mode_t {
ESP_IMAGE_VERIFY = 0,
ESP_IMAGE_VERIFY_SILENT = 1,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct rtc_retain_mem_t {
#[doc = "< Partition of application which worked before goes to the deep sleep."]
pub partition: esp_partition_pos_t,
#[doc = "< Reboot counter. Reset only when power is off."]
pub reboot_counter: u16,
#[doc = "< Reserve"]
pub reserve: u16,
#[doc = "< Check sum crc32"]
pub crc: u32,
}
extern "C" {
#[doc = " @brief Verify an app image."]
#[doc = ""]
#[doc = " If encryption is enabled, data will be transparently decrypted."]
#[doc = ""]
#[doc = " @param mode Mode of operation (verify, silent verify, or load)."]
#[doc = " @param part Partition to load the app from."]
#[doc = " @param[inout] data Pointer to the image metadata structure which is be filled in by this function."]
#[doc = " 'start_addr' member should be set (to the start address of the image.)"]
#[doc = " Other fields will all be initialised by this function."]
#[doc = ""]
#[doc = " Image validation checks:"]
#[doc = " - Magic byte."]
#[doc = " - Partition smaller than 16MB."]
#[doc = " - All segments & image fit in partition."]
#[doc = " - 8 bit image checksum is valid."]
#[doc = " - SHA-256 of image is valid (if image has this appended)."]
#[doc = " - (Signature) if signature verification is enabled."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if verify or load was successful"]
#[doc = " - ESP_ERR_IMAGE_FLASH_FAIL if a SPI flash error occurs"]
#[doc = " - ESP_ERR_IMAGE_INVALID if the image appears invalid."]
#[doc = " - ESP_ERR_INVALID_ARG if the partition or data pointers are invalid."]
pub fn esp_image_verify(
mode: esp_image_load_mode_t,
part: *const esp_partition_pos_t,
data: *mut esp_image_metadata_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Verify and load an app image (available only in space of bootloader)."]
#[doc = ""]
#[doc = " If encryption is enabled, data will be transparently decrypted."]
#[doc = ""]
#[doc = " @param part Partition to load the app from."]
#[doc = " @param[inout] data Pointer to the image metadata structure which is be filled in by this function."]
#[doc = " 'start_addr' member should be set (to the start address of the image.)"]
#[doc = " Other fields will all be initialised by this function."]
#[doc = ""]
#[doc = " Image validation checks:"]
#[doc = " - Magic byte."]
#[doc = " - Partition smaller than 16MB."]
#[doc = " - All segments & image fit in partition."]
#[doc = " - 8 bit image checksum is valid."]
#[doc = " - SHA-256 of image is valid (if image has this appended)."]
#[doc = " - (Signature) if signature verification is enabled."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if verify or load was successful"]
#[doc = " - ESP_ERR_IMAGE_FLASH_FAIL if a SPI flash error occurs"]
#[doc = " - ESP_ERR_IMAGE_INVALID if the image appears invalid."]
#[doc = " - ESP_ERR_INVALID_ARG if the partition or data pointers are invalid."]
pub fn bootloader_load_image(
part: *const esp_partition_pos_t,
data: *mut esp_image_metadata_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Load an app image without verification (available only in space of bootloader)."]
#[doc = ""]
#[doc = " If encryption is enabled, data will be transparently decrypted."]
#[doc = ""]
#[doc = " @param part Partition to load the app from."]
#[doc = " @param[inout] data Pointer to the image metadata structure which is be filled in by this function."]
#[doc = " 'start_addr' member should be set (to the start address of the image.)"]
#[doc = " Other fields will all be initialised by this function."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if verify or load was successful"]
#[doc = " - ESP_ERR_IMAGE_FLASH_FAIL if a SPI flash error occurs"]
#[doc = " - ESP_ERR_IMAGE_INVALID if the image appears invalid."]
#[doc = " - ESP_ERR_INVALID_ARG if the partition or data pointers are invalid."]
pub fn bootloader_load_image_no_verify(
part: *const esp_partition_pos_t,
data: *mut esp_image_metadata_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Verify the bootloader image."]
#[doc = ""]
#[doc = " @param[out] If result is ESP_OK and this pointer is non-NULL, it"]
#[doc = " will be set to the length of the bootloader image."]
#[doc = ""]
#[doc = " @return As per esp_image_load_metadata()."]
pub fn esp_image_verify_bootloader(length: *mut u32) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Verify the bootloader image."]
#[doc = ""]
#[doc = " @param[out] Metadata for the image. Only valid if result is ESP_OK."]
#[doc = ""]
#[doc = " @return As per esp_image_load_metadata()."]
pub fn esp_image_verify_bootloader_data(data: *mut esp_image_metadata_t) -> esp_err_t;
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_image_flash_mapping_t {
pub drom_addr: u32,
pub drom_load_addr: u32,
pub drom_size: u32,
pub irom_addr: u32,
pub irom_load_addr: u32,
pub irom_size: u32,
}
#[doc = " @brief Opaque handle for an application OTA update"]
#[doc = ""]
#[doc = " esp_ota_begin() returns a handle which is then used for subsequent"]
#[doc = " calls to esp_ota_write() and esp_ota_end()."]
pub type esp_ota_handle_t = u32;
extern "C" {
#[doc = " @brief Return esp_app_desc structure. This structure includes app version."]
#[doc = ""]
#[doc = " Return description for running app."]
#[doc = " @return Pointer to esp_app_desc structure."]
pub fn esp_ota_get_app_description() -> *const esp_app_desc_t;
}
extern "C" {
#[doc = " @brief Fill the provided buffer with SHA256 of the ELF file, formatted as hexadecimal, null-terminated."]
#[doc = " If the buffer size is not sufficient to fit the entire SHA256 in hex plus a null terminator,"]
#[doc = " the largest possible number of bytes will be written followed by a null."]
#[doc = " @param dst Destination buffer"]
#[doc = " @param size Size of the buffer"]
#[doc = " @return Number of bytes written to dst (including null terminator)"]
pub fn esp_ota_get_app_elf_sha256(dst: *mut libc::c_char, size: size_t) -> libc::c_int;
}
extern "C" {
#[doc = " @brief Commence an OTA update writing to the specified partition."]
#[doc = ""]
#[doc = " The specified partition is erased to the specified image size."]
#[doc = ""]
#[doc = " If image size is not yet known, pass OTA_SIZE_UNKNOWN which will"]
#[doc = " cause the entire partition to be erased."]
#[doc = ""]
#[doc = " On success, this function allocates memory that remains in use"]
#[doc = " until esp_ota_end() is called with the returned handle."]
#[doc = ""]
#[doc = " Note: If the rollback option is enabled and the running application has the ESP_OTA_IMG_PENDING_VERIFY state then"]
#[doc = " it will lead to the ESP_ERR_OTA_ROLLBACK_INVALID_STATE error. Confirm the running app before to run download a new app,"]
#[doc = " use esp_ota_mark_app_valid_cancel_rollback() function for it (this should be done as early as possible when you first download a new application)."]
#[doc = ""]
#[doc = " @param partition Pointer to info for partition which will receive the OTA update. Required."]
#[doc = " @param image_size Size of new OTA app image. Partition will be erased in order to receive this size of image. If 0 or OTA_SIZE_UNKNOWN, the entire partition is erased."]
#[doc = " @param out_handle On success, returns a handle which should be used for subsequent esp_ota_write() and esp_ota_end() calls."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: OTA operation commenced successfully."]
#[doc = " - ESP_ERR_INVALID_ARG: partition or out_handle arguments were NULL, or partition doesn't point to an OTA app partition."]
#[doc = " - ESP_ERR_NO_MEM: Cannot allocate memory for OTA operation."]
#[doc = " - ESP_ERR_OTA_PARTITION_CONFLICT: Partition holds the currently running firmware, cannot update in place."]
#[doc = " - ESP_ERR_NOT_FOUND: Partition argument not found in partition table."]
#[doc = " - ESP_ERR_OTA_SELECT_INFO_INVALID: The OTA data partition contains invalid data."]
#[doc = " - ESP_ERR_INVALID_SIZE: Partition doesn't fit in configured flash size."]
#[doc = " - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed."]
#[doc = " - ESP_ERR_OTA_ROLLBACK_INVALID_STATE: If the running app has not confirmed state. Before performing an update, the application must be valid."]
pub fn esp_ota_begin(
partition: *const esp_partition_t,
image_size: size_t,
out_handle: *mut esp_ota_handle_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Write OTA update data to partition"]
#[doc = ""]
#[doc = " This function can be called multiple times as"]
#[doc = " data is received during the OTA operation. Data is written"]
#[doc = " sequentially to the partition."]
#[doc = ""]
#[doc = " @param handle Handle obtained from esp_ota_begin"]
#[doc = " @param data Data buffer to write"]
#[doc = " @param size Size of data buffer in bytes."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Data was written to flash successfully."]
#[doc = " - ESP_ERR_INVALID_ARG: handle is invalid."]
#[doc = " - ESP_ERR_OTA_VALIDATE_FAILED: First byte of image contains invalid app image magic byte."]
#[doc = " - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed."]
#[doc = " - ESP_ERR_OTA_SELECT_INFO_INVALID: OTA data partition has invalid contents"]
pub fn esp_ota_write(
handle: esp_ota_handle_t,
data: *const libc::c_void,
size: size_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Write OTA update data to partition"]
#[doc = ""]
#[doc = " This function can write data in non contiguous manner."]
#[doc = " If flash encryption is enabled, data should be 16 byte aligned."]
#[doc = ""]
#[doc = " @param handle Handle obtained from esp_ota_begin"]
#[doc = " @param data Data buffer to write"]
#[doc = " @param size Size of data buffer in bytes"]
#[doc = " @param offset Offset in flash partition"]
#[doc = ""]
#[doc = " @note While performing OTA, if the packets arrive out of order, esp_ota_write_with_offset() can be used to write data in non contiguous manner."]
#[doc = " Use of esp_ota_write_with_offset() in combination with esp_ota_write() is not recommended."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Data was written to flash successfully."]
#[doc = " - ESP_ERR_INVALID_ARG: handle is invalid."]
#[doc = " - ESP_ERR_OTA_VALIDATE_FAILED: First byte of image contains invalid app image magic byte."]
#[doc = " - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed."]
#[doc = " - ESP_ERR_OTA_SELECT_INFO_INVALID: OTA data partition has invalid contents"]
pub fn esp_ota_write_with_offset(
handle: esp_ota_handle_t,
data: *const libc::c_void,
size: size_t,
offset: u32,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Finish OTA update and validate newly written app image."]
#[doc = ""]
#[doc = " @param handle Handle obtained from esp_ota_begin()."]
#[doc = ""]
#[doc = " @note After calling esp_ota_end(), the handle is no longer valid and any memory associated with it is freed (regardless of result)."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Newly written OTA app image is valid."]
#[doc = " - ESP_ERR_NOT_FOUND: OTA handle was not found."]
#[doc = " - ESP_ERR_INVALID_ARG: Handle was never written to."]
#[doc = " - ESP_ERR_OTA_VALIDATE_FAILED: OTA image is invalid (either not a valid app image, or - if secure boot is enabled - signature failed to verify.)"]
#[doc = " - ESP_ERR_INVALID_STATE: If flash encryption is enabled, this result indicates an internal error writing the final encrypted bytes to flash."]
pub fn esp_ota_end(handle: esp_ota_handle_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Configure OTA data for a new boot partition"]
#[doc = ""]
#[doc = " @note If this function returns ESP_OK, calling esp_restart() will boot the newly configured app partition."]
#[doc = ""]
#[doc = " @param partition Pointer to info for partition containing app image to boot."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: OTA data updated, next reboot will use specified partition."]
#[doc = " - ESP_ERR_INVALID_ARG: partition argument was NULL or didn't point to a valid OTA partition of type \"app\"."]
#[doc = " - ESP_ERR_OTA_VALIDATE_FAILED: Partition contained invalid app image. Also returned if secure boot is enabled and signature validation failed."]
#[doc = " - ESP_ERR_NOT_FOUND: OTA data partition not found."]
#[doc = " - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash erase or write failed."]
pub fn esp_ota_set_boot_partition(partition: *const esp_partition_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get partition info of currently configured boot app"]
#[doc = ""]
#[doc = " If esp_ota_set_boot_partition() has been called, the partition which was set by that function will be returned."]
#[doc = ""]
#[doc = " If esp_ota_set_boot_partition() has not been called, the result is usually the same as esp_ota_get_running_partition()."]
#[doc = " The two results are not equal if the configured boot partition does not contain a valid app (meaning that the running partition"]
#[doc = " will be an app that the bootloader chose via fallback)."]
#[doc = ""]
#[doc = " If the OTA data partition is not present or not valid then the result is the first app partition found in the"]
#[doc = " partition table. In priority order, this means: the factory app, the first OTA app slot, or the test app partition."]
#[doc = ""]
#[doc = " Note that there is no guarantee the returned partition is a valid app. Use esp_image_verify(ESP_IMAGE_VERIFY, ...) to verify if the"]
#[doc = " returned partition contains a bootable image."]
#[doc = ""]
#[doc = " @return Pointer to info for partition structure, or NULL if partition table is invalid or a flash read operation failed. Any returned pointer is valid for the lifetime of the application."]
pub fn esp_ota_get_boot_partition() -> *const esp_partition_t;
}
extern "C" {
#[doc = " @brief Get partition info of currently running app"]
#[doc = ""]
#[doc = " This function is different to esp_ota_get_boot_partition() in that"]
#[doc = " it ignores any change of selected boot partition caused by"]
#[doc = " esp_ota_set_boot_partition(). Only the app whose code is currently"]
#[doc = " running will have its partition information returned."]
#[doc = ""]
#[doc = " The partition returned by this function may also differ from esp_ota_get_boot_partition() if the configured boot"]
#[doc = " partition is somehow invalid, and the bootloader fell back to a different app partition at boot."]
#[doc = ""]
#[doc = " @return Pointer to info for partition structure, or NULL if no partition is found or flash read operation failed. Returned pointer is valid for the lifetime of the application."]
pub fn esp_ota_get_running_partition() -> *const esp_partition_t;
}
extern "C" {
#[doc = " @brief Return the next OTA app partition which should be written with a new firmware."]
#[doc = ""]
#[doc = " Call this function to find an OTA app partition which can be passed to esp_ota_begin()."]
#[doc = ""]
#[doc = " Finds next partition round-robin, starting from the current running partition."]
#[doc = ""]
#[doc = " @param start_from If set, treat this partition info as describing the current running partition. Can be NULL, in which case esp_ota_get_running_partition() is used to find the currently running partition. The result of this function is never the same as this argument."]
#[doc = ""]
#[doc = " @return Pointer to info for partition which should be updated next. NULL result indicates invalid OTA data partition, or that no eligible OTA app slot partition was found."]
#[doc = ""]
pub fn esp_ota_get_next_update_partition(
start_from: *const esp_partition_t,
) -> *const esp_partition_t;
}
extern "C" {
#[doc = " @brief Returns esp_app_desc structure for app partition. This structure includes app version."]
#[doc = ""]
#[doc = " Returns a description for the requested app partition."]
#[doc = " @param[in] partition Pointer to app partition. (only app partition)"]
#[doc = " @param[out] app_desc Structure of info about app."]
#[doc = " @return"]
#[doc = " - ESP_OK Successful."]
#[doc = " - ESP_ERR_NOT_FOUND app_desc structure is not found. Magic word is incorrect."]
#[doc = " - ESP_ERR_NOT_SUPPORTED Partition is not application."]
#[doc = " - ESP_ERR_INVALID_ARG Arguments is NULL or if partition's offset exceeds partition size."]
#[doc = " - ESP_ERR_INVALID_SIZE Read would go out of bounds of the partition."]
#[doc = " - or one of error codes from lower-level flash driver."]
pub fn esp_ota_get_partition_description(
partition: *const esp_partition_t,
app_desc: *mut esp_app_desc_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief This function is called to indicate that the running app is working well."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: if successful."]
pub fn esp_ota_mark_app_valid_cancel_rollback() -> esp_err_t;
}
extern "C" {
#[doc = " @brief This function is called to roll back to the previously workable app with reboot."]
#[doc = ""]
#[doc = " If rollback is successful then device will reset else API will return with error code."]
#[doc = " Checks applications on a flash drive that can be booted in case of rollback."]
#[doc = " If the flash does not have at least one app (except the running app) then rollback is not possible."]
#[doc = " @return"]
#[doc = " - ESP_FAIL: if not successful."]
#[doc = " - ESP_ERR_OTA_ROLLBACK_FAILED: The rollback is not possible due to flash does not have any apps."]
pub fn esp_ota_mark_app_invalid_rollback_and_reboot() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Returns last partition with invalid state (ESP_OTA_IMG_INVALID or ESP_OTA_IMG_ABORTED)."]
#[doc = ""]
#[doc = " @return partition."]
pub fn esp_ota_get_last_invalid_partition() -> *const esp_partition_t;
}
extern "C" {
#[doc = " @brief Returns state for given partition."]
#[doc = ""]
#[doc = " @param[in] partition Pointer to partition."]
#[doc = " @param[out] ota_state state of partition (if this partition has a record in otadata)."]
#[doc = " @return"]
#[doc = " - ESP_OK: Successful."]
#[doc = " - ESP_ERR_INVALID_ARG: partition or ota_state arguments were NULL."]
#[doc = " - ESP_ERR_NOT_SUPPORTED: partition is not ota."]
#[doc = " - ESP_ERR_NOT_FOUND: Partition table does not have otadata or state was not found for given partition."]
pub fn esp_ota_get_state_partition(
partition: *const esp_partition_t,
ota_state: *mut esp_ota_img_states_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Erase previous boot app partition and corresponding otadata select for this partition."]
#[doc = ""]
#[doc = " When current app is marked to as valid then you can erase previous app partition."]
#[doc = " @return"]
#[doc = " - ESP_OK: Successful, otherwise ESP_ERR."]
pub fn esp_ota_erase_last_boot_app_partition() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Checks applications on the slots which can be booted in case of rollback."]
#[doc = ""]
#[doc = " These applications should be valid (marked in otadata as not UNDEFINED, INVALID or ABORTED and crc is good) and be able booted,"]
#[doc = " and secure_version of app >= secure_version of efuse (if anti-rollback is enabled)."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - True: Returns true if the slots have at least one app (except the running app)."]
#[doc = " - False: The rollback is not possible."]
pub fn esp_ota_check_rollback_is_possible() -> bool;
}
extern "C" {
#[doc = " This function is defined to provide a deprecation warning whenever"]
#[doc = " XT_CLOCK_FREQ macro is used."]
#[doc = " Update the code to use esp_clk_cpu_freq function instead."]
#[doc = " @return current CPU clock frequency, in Hz"]
pub fn xt_clock_freq() -> libc::c_int;
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct div_t {
pub quot: libc::c_int,
pub rem: libc::c_int,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct ldiv_t {
pub quot: libc::c_long,
pub rem: libc::c_long,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct lldiv_t {
pub quot: libc::c_longlong,
pub rem: libc::c_longlong,
}
pub type __compar_fn_t = ::core::option::Option<
unsafe extern "C" fn(arg1: *const libc::c_void, arg2: *const libc::c_void) -> libc::c_int,
>;
extern "C" {
pub fn __locale_mb_cur_max() -> libc::c_int;
}
extern "C" {
pub fn abort();
}
extern "C" {
pub fn abs(arg1: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn arc4random() -> __uint32_t;
}
extern "C" {
pub fn arc4random_uniform(arg1: __uint32_t) -> __uint32_t;
}
extern "C" {
pub fn arc4random_buf(arg1: *mut libc::c_void, arg2: size_t);
}
extern "C" {
pub fn atexit(__func: ::core::option::Option<unsafe extern "C" fn()>) -> libc::c_int;
}
extern "C" {
pub fn atof(__nptr: *const libc::c_char) -> f64;
}
extern "C" {
pub fn atoff(__nptr: *const libc::c_char) -> f32;
}
extern "C" {
pub fn atoi(__nptr: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn _atoi_r(arg1: *mut _reent, __nptr: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn atol(__nptr: *const libc::c_char) -> libc::c_long;
}
extern "C" {
pub fn _atol_r(arg1: *mut _reent, __nptr: *const libc::c_char) -> libc::c_long;
}
extern "C" {
pub fn bsearch(
__key: *const libc::c_void,
__base: *const libc::c_void,
__nmemb: size_t,
__size: size_t,
_compar: __compar_fn_t,
) -> *mut libc::c_void;
}
extern "C" {
pub fn calloc(__nmemb: libc::c_uint, __size: libc::c_uint) -> *mut libc::c_void;
}
extern "C" {
pub fn div(__numer: libc::c_int, __denom: libc::c_int) -> div_t;
}
extern "C" {
pub fn exit(__status: libc::c_int);
}
extern "C" {
pub fn free(arg1: *mut libc::c_void);
}
extern "C" {
pub fn getenv(__string: *const libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn _getenv_r(arg1: *mut _reent, __string: *const libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn _findenv(arg1: *const libc::c_char, arg2: *mut libc::c_int) -> *mut libc::c_char;
}
extern "C" {
pub fn _findenv_r(
arg1: *mut _reent,
arg2: *const libc::c_char,
arg3: *mut libc::c_int,
) -> *mut libc::c_char;
}
extern "C" {
pub static mut suboptarg: *mut libc::c_char;
}
extern "C" {
pub fn getsubopt(
arg1: *mut *mut libc::c_char,
arg2: *const *mut libc::c_char,
arg3: *mut *mut libc::c_char,
) -> libc::c_int;
}
extern "C" {
pub fn labs(arg1: libc::c_long) -> libc::c_long;
}
extern "C" {
pub fn ldiv(__numer: libc::c_long, __denom: libc::c_long) -> ldiv_t;
}
extern "C" {
pub fn malloc(__size: libc::c_uint) -> *mut libc::c_void;
}
extern "C" {
pub fn mblen(arg1: *const libc::c_char, arg2: size_t) -> libc::c_int;
}
extern "C" {
pub fn _mblen_r(
arg1: *mut _reent,
arg2: *const libc::c_char,
arg3: size_t,
arg4: *mut _mbstate_t,
) -> libc::c_int;
}
extern "C" {
pub fn mbtowc(arg1: *mut wchar_t, arg2: *const libc::c_char, arg3: size_t) -> libc::c_int;
}
extern "C" {
pub fn _mbtowc_r(
arg1: *mut _reent,
arg2: *mut wchar_t,
arg3: *const libc::c_char,
arg4: size_t,
arg5: *mut _mbstate_t,
) -> libc::c_int;
}
extern "C" {
pub fn wctomb(arg1: *mut libc::c_char, arg2: wchar_t) -> libc::c_int;
}
extern "C" {
pub fn _wctomb_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: wchar_t,
arg4: *mut _mbstate_t,
) -> libc::c_int;
}
extern "C" {
pub fn mbstowcs(arg1: *mut wchar_t, arg2: *const libc::c_char, arg3: size_t) -> size_t;
}
extern "C" {
pub fn _mbstowcs_r(
arg1: *mut _reent,
arg2: *mut wchar_t,
arg3: *const libc::c_char,
arg4: size_t,
arg5: *mut _mbstate_t,
) -> size_t;
}
extern "C" {
pub fn wcstombs(arg1: *mut libc::c_char, arg2: *const wchar_t, arg3: size_t) -> size_t;
}
extern "C" {
pub fn _wcstombs_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: *const wchar_t,
arg4: size_t,
arg5: *mut _mbstate_t,
) -> size_t;
}
extern "C" {
pub fn mkdtemp(arg1: *mut libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn mkstemp(arg1: *mut libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn mkstemps(arg1: *mut libc::c_char, arg2: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn mktemp(arg1: *mut libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn _mkdtemp_r(arg1: *mut _reent, arg2: *mut libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn _mkostemp_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: libc::c_int,
) -> libc::c_int;
}
extern "C" {
pub fn _mkostemps_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: libc::c_int,
arg4: libc::c_int,
) -> libc::c_int;
}
extern "C" {
pub fn _mkstemp_r(arg1: *mut _reent, arg2: *mut libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn _mkstemps_r(
arg1: *mut _reent,
arg2: *mut libc::c_char,
arg3: libc::c_int,
) -> libc::c_int;
}
extern "C" {
pub fn _mktemp_r(arg1: *mut _reent, arg2: *mut libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn qsort(
__base: *mut libc::c_void,
__nmemb: size_t,
__size: size_t,
_compar: __compar_fn_t,
);
}
extern "C" {
pub fn rand() -> libc::c_int;
}
extern "C" {
pub fn realloc(__r: *mut libc::c_void, __size: libc::c_uint) -> *mut libc::c_void;
}
extern "C" {
pub fn reallocarray(arg1: *mut libc::c_void, arg2: size_t, arg3: size_t) -> *mut libc::c_void;
}
extern "C" {
pub fn reallocf(__r: *mut libc::c_void, __size: size_t) -> *mut libc::c_void;
}
extern "C" {
pub fn realpath(
path: *const libc::c_char,
resolved_path: *mut libc::c_char,
) -> *mut libc::c_char;
}
extern "C" {
pub fn rpmatch(response: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn srand(__seed: libc::c_uint);
}
extern "C" {
pub fn strtod(__n: *const libc::c_char, __end_PTR: *mut *mut libc::c_char) -> f64;
}
extern "C" {
pub fn _strtod_r(
arg1: *mut _reent,
__n: *const libc::c_char,
__end_PTR: *mut *mut libc::c_char,
) -> f64;
}
extern "C" {
pub fn strtof(__n: *const libc::c_char, __end_PTR: *mut *mut libc::c_char) -> f32;
}
extern "C" {
pub fn strtol(
__n: *const libc::c_char,
__end_PTR: *mut *mut libc::c_char,
__base: libc::c_int,
) -> libc::c_long;
}
extern "C" {
pub fn _strtol_r(
arg1: *mut _reent,
__n: *const libc::c_char,
__end_PTR: *mut *mut libc::c_char,
__base: libc::c_int,
) -> libc::c_long;
}
extern "C" {
pub fn strtoul(
__n: *const libc::c_char,
__end_PTR: *mut *mut libc::c_char,
__base: libc::c_int,
) -> libc::c_ulong;
}
extern "C" {
pub fn _strtoul_r(
arg1: *mut _reent,
__n: *const libc::c_char,
__end_PTR: *mut *mut libc::c_char,
__base: libc::c_int,
) -> libc::c_ulong;
}
extern "C" {
pub fn system(__string: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn a64l(__input: *const libc::c_char) -> libc::c_long;
}
extern "C" {
pub fn l64a(__input: libc::c_long) -> *mut libc::c_char;
}
extern "C" {
pub fn _l64a_r(arg1: *mut _reent, __input: libc::c_long) -> *mut libc::c_char;
}
extern "C" {
pub fn on_exit(
__func: ::core::option::Option<
unsafe extern "C" fn(arg1: libc::c_int, arg2: *mut libc::c_void),
>,
__arg: *mut libc::c_void,
) -> libc::c_int;
}
extern "C" {
pub fn _Exit(__status: libc::c_int);
}
extern "C" {
pub fn putenv(__string: *mut libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn _putenv_r(arg1: *mut _reent, __string: *mut libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn _reallocf_r(
arg1: *mut _reent,
arg2: *mut libc::c_void,
arg3: size_t,
) -> *mut libc::c_void;
}
extern "C" {
pub fn setenv(
__string: *const libc::c_char,
__value: *const libc::c_char,
__overwrite: libc::c_int,
) -> libc::c_int;
}
extern "C" {
pub fn _setenv_r(
arg1: *mut _reent,
__string: *const libc::c_char,
__value: *const libc::c_char,
__overwrite: libc::c_int,
) -> libc::c_int;
}
extern "C" {
pub fn __itoa(
arg1: libc::c_int,
arg2: *mut libc::c_char,
arg3: libc::c_int,
) -> *mut libc::c_char;
}
extern "C" {
pub fn __utoa(
arg1: libc::c_uint,
arg2: *mut libc::c_char,
arg3: libc::c_int,
) -> *mut libc::c_char;
}
extern "C" {
pub fn itoa(arg1: libc::c_int, arg2: *mut libc::c_char, arg3: libc::c_int)
-> *mut libc::c_char;
}
extern "C" {
pub fn utoa(
arg1: libc::c_uint,
arg2: *mut libc::c_char,
arg3: libc::c_int,
) -> *mut libc::c_char;
}
extern "C" {
pub fn rand_r(__seed: *mut libc::c_uint) -> libc::c_int;
}
extern "C" {
pub fn drand48() -> f64;
}
extern "C" {
pub fn _drand48_r(arg1: *mut _reent) -> f64;
}
extern "C" {
pub fn erand48(arg1: *mut libc::c_ushort) -> f64;
}
extern "C" {
pub fn _erand48_r(arg1: *mut _reent, arg2: *mut libc::c_ushort) -> f64;
}
extern "C" {
pub fn jrand48(arg1: *mut libc::c_ushort) -> libc::c_long;
}
extern "C" {
pub fn _jrand48_r(arg1: *mut _reent, arg2: *mut libc::c_ushort) -> libc::c_long;
}
extern "C" {
pub fn lcong48(arg1: *mut libc::c_ushort);
}
extern "C" {
pub fn _lcong48_r(arg1: *mut _reent, arg2: *mut libc::c_ushort);
}
extern "C" {
pub fn lrand48() -> libc::c_long;
}
extern "C" {
pub fn _lrand48_r(arg1: *mut _reent) -> libc::c_long;
}
extern "C" {
pub fn mrand48() -> libc::c_long;
}
extern "C" {
pub fn _mrand48_r(arg1: *mut _reent) -> libc::c_long;
}
extern "C" {
pub fn nrand48(arg1: *mut libc::c_ushort) -> libc::c_long;
}
extern "C" {
pub fn _nrand48_r(arg1: *mut _reent, arg2: *mut libc::c_ushort) -> libc::c_long;
}
extern "C" {
pub fn seed48(arg1: *mut libc::c_ushort) -> *mut libc::c_ushort;
}
extern "C" {
pub fn _seed48_r(arg1: *mut _reent, arg2: *mut libc::c_ushort) -> *mut libc::c_ushort;
}
extern "C" {
pub fn srand48(arg1: libc::c_long);
}
extern "C" {
pub fn _srand48_r(arg1: *mut _reent, arg2: libc::c_long);
}
extern "C" {
pub fn initstate(
arg1: libc::c_uint,
arg2: *mut libc::c_char,
arg3: size_t,
) -> *mut libc::c_char;
}
extern "C" {
pub fn random() -> libc::c_long;
}
extern "C" {
pub fn setstate(arg1: *mut libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn srandom(arg1: libc::c_uint);
}
extern "C" {
pub fn atoll(__nptr: *const libc::c_char) -> libc::c_longlong;
}
extern "C" {
pub fn _atoll_r(arg1: *mut _reent, __nptr: *const libc::c_char) -> libc::c_longlong;
}
extern "C" {
pub fn llabs(arg1: libc::c_longlong) -> libc::c_longlong;
}
extern "C" {
pub fn lldiv(__numer: libc::c_longlong, __denom: libc::c_longlong) -> lldiv_t;
}
extern "C" {
pub fn strtoll(
__n: *const libc::c_char,
__end_PTR: *mut *mut libc::c_char,
__base: libc::c_int,
) -> libc::c_longlong;
}
extern "C" {
pub fn _strtoll_r(
arg1: *mut _reent,
__n: *const libc::c_char,
__end_PTR: *mut *mut libc::c_char,
__base: libc::c_int,
) -> libc::c_longlong;
}
extern "C" {
pub fn strtoull(
__n: *const libc::c_char,
__end_PTR: *mut *mut libc::c_char,
__base: libc::c_int,
) -> libc::c_ulonglong;
}
extern "C" {
pub fn _strtoull_r(
arg1: *mut _reent,
__n: *const libc::c_char,
__end_PTR: *mut *mut libc::c_char,
__base: libc::c_int,
) -> libc::c_ulonglong;
}
extern "C" {
pub fn cfree(arg1: *mut libc::c_void);
}
extern "C" {
pub fn unsetenv(__string: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn _unsetenv_r(arg1: *mut _reent, __string: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn posix_memalign(arg1: *mut *mut libc::c_void, arg2: size_t, arg3: size_t) -> libc::c_int;
}
extern "C" {
pub fn _dtoa_r(
arg1: *mut _reent,
arg2: f64,
arg3: libc::c_int,
arg4: libc::c_int,
arg5: *mut libc::c_int,
arg6: *mut libc::c_int,
arg7: *mut *mut libc::c_char,
) -> *mut libc::c_char;
}
extern "C" {
pub fn _malloc_r(arg1: *mut _reent, arg2: size_t) -> *mut libc::c_void;
}
extern "C" {
pub fn _calloc_r(arg1: *mut _reent, arg2: size_t, arg3: size_t) -> *mut libc::c_void;
}
extern "C" {
pub fn _free_r(arg1: *mut _reent, arg2: *mut libc::c_void);
}
extern "C" {
pub fn _realloc_r(
arg1: *mut _reent,
arg2: *mut libc::c_void,
arg3: size_t,
) -> *mut libc::c_void;
}
extern "C" {
pub fn _mstats_r(arg1: *mut _reent, arg2: *mut libc::c_char);
}
extern "C" {
pub fn _system_r(arg1: *mut _reent, arg2: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn __eprintf(
arg1: *const libc::c_char,
arg2: *const libc::c_char,
arg3: libc::c_uint,
arg4: *const libc::c_char,
);
}
extern "C" {
#[link_name = "\u{1}__bsd_qsort_r"]
pub fn qsort_r(
__base: *mut libc::c_void,
__nmemb: size_t,
__size: size_t,
__thunk: *mut libc::c_void,
_compar: ::core::option::Option<
unsafe extern "C" fn(
arg1: *mut libc::c_void,
arg2: *const libc::c_void,
arg3: *const libc::c_void,
) -> libc::c_int,
>,
);
}
extern "C" {
pub fn _strtold_r(
arg1: *mut _reent,
arg2: *const libc::c_char,
arg3: *mut *mut libc::c_char,
) -> f64;
}
extern "C" {
pub fn strtold(arg1: *const libc::c_char, arg2: *mut *mut libc::c_char) -> f64;
}
extern "C" {
pub fn aligned_alloc(arg1: size_t, arg2: size_t) -> *mut libc::c_void;
}
extern "C" {
pub fn at_quick_exit(arg1: ::core::option::Option<unsafe extern "C" fn()>) -> libc::c_int;
}
extern "C" {
pub fn quick_exit(arg1: libc::c_int);
}
#[repr(u32)]
#[doc = " @addtogroup ets_apis"]
#[doc = " @{"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum ETS_STATUS {
#[doc = "< return successful in ets"]
ETS_OK = 0,
#[doc = "< return failed in ets"]
ETS_FAILED = 1,
}
pub type ETSSignal = u32;
pub type ETSParam = u32;
pub type ETSEvent = ETSEventTag;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct ETSEventTag {
#[doc = "< Event signal, in same task, different Event with different signal"]
pub sig: ETSSignal,
#[doc = "< Event parameter, sometimes without usage, then will be set as 0"]
pub par: ETSParam,
}
pub type ETSTask = ::core::option::Option<unsafe extern "C" fn(e: *mut ETSEvent)>;
pub type ets_idle_cb_t = ::core::option::Option<unsafe extern "C" fn(arg: *mut libc::c_void)>;
extern "C" {
#[doc = " @brief Start the Espressif Task Scheduler, which is an infinit loop. Please do not add code after it."]
#[doc = ""]
#[doc = " @param none"]
#[doc = ""]
#[doc = " @return none"]
pub fn ets_run();
}
extern "C" {
#[doc = " @brief Set the Idle callback, when Tasks are processed, will call the callback before CPU goto sleep."]
#[doc = ""]
#[doc = " @param ets_idle_cb_t func : The callback function."]
#[doc = ""]
#[doc = " @param void *arg : Argument of the callback."]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_set_idle_cb(func: ets_idle_cb_t, arg: *mut libc::c_void);
}
extern "C" {
#[doc = " @brief Init a task with processer, priority, queue to receive Event, queue length."]
#[doc = ""]
#[doc = " @param ETSTask task : The task processer."]
#[doc = ""]
#[doc = " @param uint8_t prio : Task priority, 0-31, bigger num with high priority, one priority with one task."]
#[doc = ""]
#[doc = " @param ETSEvent *queue : Queue belongs to the task, task always receives Events, Queue is circular used."]
#[doc = ""]
#[doc = " @param uint8_t qlen : Queue length."]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_task(task: ETSTask, prio: u8, queue: *mut ETSEvent, qlen: u8);
}
extern "C" {
#[doc = " @brief Post an event to an Task."]
#[doc = ""]
#[doc = " @param uint8_t prio : Priority of the Task."]
#[doc = ""]
#[doc = " @param ETSSignal sig : Event signal."]
#[doc = ""]
#[doc = " @param ETSParam par : Event parameter"]
#[doc = ""]
#[doc = " @return ETS_OK : post successful"]
#[doc = " @return ETS_FAILED : post failed"]
pub fn ets_post(prio: u8, sig: ETSSignal, par: ETSParam) -> ETS_STATUS;
}
extern "C" {
pub static exc_cause_table: [*const libc::c_char; 40usize];
}
extern "C" {
#[doc = " @brief Set Pro cpu Entry code, code can be called in PRO CPU when booting is not completed."]
#[doc = " When Pro CPU booting is completed, Pro CPU will call the Entry code if not NULL."]
#[doc = ""]
#[doc = " @param uint32_t start : the PRO Entry code address value in uint32_t"]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_set_user_start(start: u32);
}
extern "C" {
#[doc = " @brief Set Pro cpu Startup code, code can be called when booting is not completed, or in Entry code."]
#[doc = " When Entry code completed, CPU will call the Startup code if not NULL, else call ets_run."]
#[doc = ""]
#[doc = " @param uint32_t callback : the Startup code address value in uint32_t"]
#[doc = ""]
#[doc = " @return None : post successful"]
pub fn ets_set_startup_callback(callback: u32);
}
extern "C" {
#[doc = " @brief Set App cpu Entry code, code can be called in PRO CPU."]
#[doc = " When APP booting is completed, APP CPU will call the Entry code if not NULL."]
#[doc = ""]
#[doc = " @param uint32_t start : the APP Entry code address value in uint32_t, stored in register APPCPU_CTRL_REG_D."]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_set_appcpu_boot_addr(start: u32);
}
extern "C" {
#[doc = " @brief unpack the image in flash to iram and dram, no using cache."]
#[doc = ""]
#[doc = " @param uint32_t pos : Flash physical address."]
#[doc = ""]
#[doc = " @param uint32_t *entry_addr: the pointer of an variable that can store Entry code address."]
#[doc = ""]
#[doc = " @param bool jump : Jump into the code in the function or not."]
#[doc = ""]
#[doc = " @param bool config : Config the flash when unpacking the image, config should be done only once."]
#[doc = ""]
#[doc = " @return ETS_OK : unpack successful"]
#[doc = " @return ETS_FAILED : unpack failed"]
pub fn ets_unpack_flash_code_legacy(
pos: u32,
entry_addr: *mut u32,
jump: bool,
config: bool,
) -> ETS_STATUS;
}
extern "C" {
#[doc = " @brief unpack the image in flash to iram and dram, using cache, maybe decrypting."]
#[doc = ""]
#[doc = " @param uint32_t pos : Flash physical address."]
#[doc = ""]
#[doc = " @param uint32_t *entry_addr: the pointer of an variable that can store Entry code address."]
#[doc = ""]
#[doc = " @param bool jump : Jump into the code in the function or not."]
#[doc = ""]
#[doc = " @param bool sb_need_check : Do security boot check or not."]
#[doc = ""]
#[doc = " @param bool config : Config the flash when unpacking the image, config should be done only once."]
#[doc = ""]
#[doc = " @return ETS_OK : unpack successful"]
#[doc = " @return ETS_FAILED : unpack failed"]
pub fn ets_unpack_flash_code(
pos: u32,
entry_addr: *mut u32,
jump: bool,
sb_need_check: bool,
config: bool,
) -> ETS_STATUS;
}
extern "C" {
#[doc = " @brief Printf the strings to uart or other devices, similar with printf, simple than printf."]
#[doc = " Can not print float point data format, or longlong data format."]
#[doc = " So we maybe only use this in ROM."]
#[doc = ""]
#[doc = " @param const char *fmt : See printf."]
#[doc = ""]
#[doc = " @param ... : See printf."]
#[doc = ""]
#[doc = " @return int : the length printed to the output device."]
pub fn ets_printf(fmt: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
#[doc = " @brief Output a char to uart, which uart to output(which is in uart module in ROM) is not in scope of the function."]
#[doc = " Can not print float point data format, or longlong data format"]
#[doc = ""]
#[doc = " @param char c : char to output."]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_write_char_uart(c: libc::c_char);
}
extern "C" {
#[doc = " @brief Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput."]
#[doc = " To install putc1, which is defaulted installed as ets_write_char_uart in none silent boot mode, as NULL in silent mode."]
#[doc = ""]
#[doc = " @param void (*)(char) p: Output function to install."]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_install_putc1(p: ::core::option::Option<unsafe extern "C" fn(c: libc::c_char)>);
}
extern "C" {
#[doc = " @brief Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput."]
#[doc = " To install putc2, which is defaulted installed as NULL."]
#[doc = ""]
#[doc = " @param void (*)(char) p: Output function to install."]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_install_putc2(p: ::core::option::Option<unsafe extern "C" fn(c: libc::c_char)>);
}
extern "C" {
#[doc = " @brief Install putc1 as ets_write_char_uart."]
#[doc = " In silent boot mode(to void interfere the UART attached MCU), we can call this function, after booting ok."]
#[doc = ""]
#[doc = " @param None"]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_install_uart_printf();
}
#[doc = " @addtogroup ets_timer_apis"]
#[doc = " @{"]
pub type ETSTimerFunc = ::core::option::Option<unsafe extern "C" fn(timer_arg: *mut libc::c_void)>;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct _ETSTIMER_ {
#[doc = "< timer linker"]
pub timer_next: *mut _ETSTIMER_,
#[doc = "< abstruct time when timer expire"]
pub timer_expire: u32,
#[doc = "< timer period, 0 means timer is not periodic repeated"]
pub timer_period: u32,
#[doc = "< timer handler"]
pub timer_func: ETSTimerFunc,
#[doc = "< timer handler argument"]
pub timer_arg: *mut libc::c_void,
}
pub type ETSTimer = _ETSTIMER_;
extern "C" {
#[doc = " @brief Init ets timer, this timer range is 640 us to 429496 ms"]
#[doc = " In FreeRTOS, please call FreeRTOS apis, never call this api."]
#[doc = ""]
#[doc = " @param None"]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_timer_init();
}
extern "C" {
#[doc = " @brief In FreeRTOS, please call FreeRTOS apis, never call this api."]
#[doc = ""]
#[doc = " @param None"]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_timer_deinit();
}
extern "C" {
#[doc = " @brief Arm an ets timer, this timer range is 640 us to 429496 ms."]
#[doc = " In FreeRTOS, please call FreeRTOS apis, never call this api."]
#[doc = ""]
#[doc = " @param ETSTimer *timer : Timer struct pointer."]
#[doc = ""]
#[doc = " @param uint32_t tmout : Timer value in ms, range is 1 to 429496."]
#[doc = ""]
#[doc = " @param bool repeat : Timer is periodic repeated."]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_timer_arm(timer: *mut ETSTimer, tmout: u32, repeat: bool);
}
extern "C" {
#[doc = " @brief Arm an ets timer, this timer range is 640 us to 429496 ms."]
#[doc = " In FreeRTOS, please call FreeRTOS apis, never call this api."]
#[doc = ""]
#[doc = " @param ETSTimer *timer : Timer struct pointer."]
#[doc = ""]
#[doc = " @param uint32_t tmout : Timer value in us, range is 1 to 429496729."]
#[doc = ""]
#[doc = " @param bool repeat : Timer is periodic repeated."]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_timer_arm_us(ptimer: *mut ETSTimer, us: u32, repeat: bool);
}
extern "C" {
#[doc = " @brief Disarm an ets timer."]
#[doc = " In FreeRTOS, please call FreeRTOS apis, never call this api."]
#[doc = ""]
#[doc = " @param ETSTimer *timer : Timer struct pointer."]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_timer_disarm(timer: *mut ETSTimer);
}
extern "C" {
#[doc = " @brief Set timer callback and argument."]
#[doc = " In FreeRTOS, please call FreeRTOS apis, never call this api."]
#[doc = ""]
#[doc = " @param ETSTimer *timer : Timer struct pointer."]
#[doc = ""]
#[doc = " @param ETSTimerFunc *pfunction : Timer callback."]
#[doc = ""]
#[doc = " @param void *parg : Timer callback argument."]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_timer_setfn(ptimer: *mut ETSTimer, pfunction: ETSTimerFunc, parg: *mut libc::c_void);
}
extern "C" {
#[doc = " @brief Unset timer callback and argument to NULL."]
#[doc = " In FreeRTOS, please call FreeRTOS apis, never call this api."]
#[doc = ""]
#[doc = " @param ETSTimer *timer : Timer struct pointer."]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_timer_done(ptimer: *mut ETSTimer);
}
extern "C" {
#[doc = " @brief CPU do while loop for some time."]
#[doc = " In FreeRTOS task, please call FreeRTOS apis."]
#[doc = ""]
#[doc = " @param uint32_t us : Delay time in us."]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_delay_us(us: u32);
}
extern "C" {
#[doc = " @brief Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate."]
#[doc = " Call this function when CPU frequency is changed."]
#[doc = ""]
#[doc = " @param uint32_t ticks_per_us : CPU ticks per us."]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_update_cpu_frequency(ticks_per_us: u32);
}
extern "C" {
#[doc = " @brief Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate."]
#[doc = ""]
#[doc = " @note This function only sets the tick rate for the current CPU. It is located in ROM,"]
#[doc = " so the deep sleep stub can use it even if IRAM is not initialized yet."]
#[doc = ""]
#[doc = " @param uint32_t ticks_per_us : CPU ticks per us."]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_update_cpu_frequency_rom(ticks_per_us: u32);
}
extern "C" {
#[doc = " @brief Get the real CPU ticks per us to the ets."]
#[doc = " This function do not return real CPU ticks per us, just the record in ets. It can be used to check with the real CPU frequency."]
#[doc = ""]
#[doc = " @param None"]
#[doc = ""]
#[doc = " @return uint32_t : CPU ticks per us record in ets."]
pub fn ets_get_cpu_frequency() -> u32;
}
extern "C" {
#[doc = " @brief Get xtal_freq/analog_8M*256 value calibrated in rtc module."]
#[doc = ""]
#[doc = " @param None"]
#[doc = ""]
#[doc = " @return uint32_t : xtal_freq/analog_8M*256."]
pub fn ets_get_xtal_scale() -> u32;
}
extern "C" {
#[doc = " @brief Get xtal_freq value, If value not stored in RTC_STORE5, than store."]
#[doc = ""]
#[doc = " @param None"]
#[doc = ""]
#[doc = " @return uint32_t : if rtc store the value (RTC_STORE5 high 16 bits and low 16 bits with same value), read from rtc register."]
#[doc = " clock = (REG_READ(RTC_STORE5) & 0xffff) << 12;"]
#[doc = " else if analog_8M in efuse"]
#[doc = " clock = ets_get_xtal_scale() * 15625 * ets_efuse_get_8M_clock() / 40;"]
#[doc = " else clock = 26M."]
pub fn ets_get_detected_xtal_freq() -> u32;
}
#[doc = " @addtogroup ets_intr_apis"]
#[doc = " @{"]
pub type ets_isr_t = ::core::option::Option<unsafe extern "C" fn(arg1: *mut libc::c_void)>;
extern "C" {
#[doc = " @brief Attach a interrupt handler to a CPU interrupt number."]
#[doc = " This function equals to _xtos_set_interrupt_handler_arg(i, func, arg)."]
#[doc = " In FreeRTOS, please call FreeRTOS apis, never call this api."]
#[doc = ""]
#[doc = " @param int i : CPU interrupt number."]
#[doc = ""]
#[doc = " @param ets_isr_t func : Interrupt handler."]
#[doc = ""]
#[doc = " @param void *arg : argument of the handler."]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_isr_attach(i: libc::c_int, func: ets_isr_t, arg: *mut libc::c_void);
}
extern "C" {
#[doc = " @brief Mask the interrupts which show in mask bits."]
#[doc = " This function equals to _xtos_ints_off(mask)."]
#[doc = " In FreeRTOS, please call FreeRTOS apis, never call this api."]
#[doc = ""]
#[doc = " @param uint32_t mask : BIT(i) means mask CPU interrupt number i."]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_isr_mask(mask: u32);
}
extern "C" {
#[doc = " @brief Unmask the interrupts which show in mask bits."]
#[doc = " This function equals to _xtos_ints_on(mask)."]
#[doc = " In FreeRTOS, please call FreeRTOS apis, never call this api."]
#[doc = ""]
#[doc = " @param uint32_t mask : BIT(i) means mask CPU interrupt number i."]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_isr_unmask(unmask: u32);
}
extern "C" {
#[doc = " @brief Lock the interrupt to level 2."]
#[doc = " This function direct set the CPU registers."]
#[doc = " In FreeRTOS, please call FreeRTOS apis, never call this api."]
#[doc = ""]
#[doc = " @param None"]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_intr_lock();
}
extern "C" {
#[doc = " @brief Unlock the interrupt to level 0."]
#[doc = " This function direct set the CPU registers."]
#[doc = " In FreeRTOS, please call FreeRTOS apis, never call this api."]
#[doc = ""]
#[doc = " @param None"]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_intr_unlock();
}
extern "C" {
#[doc = " @brief Unlock the interrupt to level 0, and CPU will go into power save mode(wait interrupt)."]
#[doc = " This function direct set the CPU registers."]
#[doc = " In FreeRTOS, please call FreeRTOS apis, never call this api."]
#[doc = ""]
#[doc = " @param None"]
#[doc = ""]
#[doc = " @return None"]
pub fn ets_waiti0();
}
extern "C" {
#[doc = " @brief Attach an CPU interrupt to a hardware source."]
#[doc = " We have 4 steps to use an interrupt:"]
#[doc = " 1.Attach hardware interrupt source to CPU. intr_matrix_set(0, ETS_WIFI_MAC_INTR_SOURCE, ETS_WMAC_INUM);"]
#[doc = " 2.Set interrupt handler. xt_set_interrupt_handler(ETS_WMAC_INUM, func, NULL);"]
#[doc = " 3.Enable interrupt for CPU. xt_ints_on(1 << ETS_WMAC_INUM);"]
#[doc = " 4.Enable interrupt in the module."]
#[doc = ""]
#[doc = " @param int cpu_no : The CPU which the interrupt number belongs."]
#[doc = ""]
#[doc = " @param uint32_t model_num : The interrupt hardware source number, please see the interrupt hardware source table."]
#[doc = ""]
#[doc = " @param uint32_t intr_num : The interrupt number CPU, please see the interrupt cpu using table."]
#[doc = ""]
#[doc = " @return None"]
pub fn intr_matrix_set(cpu_no: libc::c_int, model_num: u32, intr_num: u32);
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum STATUS {
OK = 0,
FAIL = 1,
PENDING = 2,
BUSY = 3,
CANCEL = 4,
}
pub type TaskFunction_t = ::core::option::Option<unsafe extern "C" fn(arg1: *mut libc::c_void)>;
#[repr(C)]
#[derive(Copy, Clone)]
pub struct XtosCoreState {
pub signature: libc::c_long,
pub restore_label: libc::c_long,
pub aftersave_label: libc::c_long,
pub areg: [libc::c_long; 64usize],
pub caller_regs: [libc::c_long; 16usize],
pub caller_regs_saved: libc::c_long,
pub windowbase: libc::c_long,
pub windowstart: libc::c_long,
pub sar: libc::c_long,
pub epc1: libc::c_long,
pub ps: libc::c_long,
pub excsave1: libc::c_long,
pub depc: libc::c_long,
pub epc: [libc::c_long; 6usize],
pub eps: [libc::c_long; 6usize],
pub excsave: [libc::c_long; 6usize],
pub lcount: libc::c_long,
pub lbeg: libc::c_long,
pub lend: libc::c_long,
pub vecbase: libc::c_long,
pub atomctl: libc::c_long,
pub memctl: libc::c_long,
pub ccount: libc::c_long,
pub ccompare: [libc::c_long; 3usize],
pub intenable: libc::c_long,
pub interrupt: libc::c_long,
pub icount: libc::c_long,
pub icountlevel: libc::c_long,
pub debugcause: libc::c_long,
pub dbreakc: [libc::c_long; 2usize],
pub dbreaka: [libc::c_long; 2usize],
pub ibreaka: [libc::c_long; 2usize],
pub ibreakenable: libc::c_long,
pub misc: [libc::c_long; 4usize],
pub cpenable: libc::c_long,
pub tlbs: [libc::c_long; 16usize],
pub ncp: [libc::c_char; 48usize],
pub cp0: [libc::c_char; 72usize],
}
pub type _xtos_handler_func = ::core::option::Option<unsafe extern "C" fn()>;
pub type _xtos_handler = _xtos_handler_func;
extern "C" {
pub fn _xtos_ints_off(mask: libc::c_uint) -> libc::c_uint;
}
extern "C" {
pub fn _xtos_ints_on(mask: libc::c_uint) -> libc::c_uint;
}
extern "C" {
pub fn _xtos_set_intlevel(intlevel: libc::c_int) -> libc::c_uint;
}
extern "C" {
pub fn _xtos_set_min_intlevel(intlevel: libc::c_int) -> libc::c_uint;
}
extern "C" {
pub fn _xtos_restore_intlevel(restoreval: libc::c_uint) -> libc::c_uint;
}
extern "C" {
pub fn _xtos_restore_just_intlevel(restoreval: libc::c_uint) -> libc::c_uint;
}
extern "C" {
pub fn _xtos_set_interrupt_handler(n: libc::c_int, f: _xtos_handler) -> _xtos_handler;
}
extern "C" {
pub fn _xtos_set_interrupt_handler_arg(
n: libc::c_int,
f: _xtos_handler,
arg: *mut libc::c_void,
) -> _xtos_handler;
}
extern "C" {
pub fn _xtos_set_exception_handler(n: libc::c_int, f: _xtos_handler) -> _xtos_handler;
}
extern "C" {
pub fn _xtos_memep_initrams();
}
extern "C" {
pub fn _xtos_memep_enable(flags: libc::c_int);
}
extern "C" {
pub fn _xtos_dispatch_level1_interrupts();
}
extern "C" {
pub fn _xtos_dispatch_level2_interrupts();
}
extern "C" {
pub fn _xtos_dispatch_level3_interrupts();
}
extern "C" {
pub fn _xtos_dispatch_level4_interrupts();
}
extern "C" {
pub fn _xtos_dispatch_level5_interrupts();
}
extern "C" {
pub fn _xtos_dispatch_level6_interrupts();
}
extern "C" {
pub fn _xtos_read_ints() -> libc::c_uint;
}
extern "C" {
pub fn _xtos_clear_ints(mask: libc::c_uint);
}
extern "C" {
pub fn _xtos_core_shutoff(flags: libc::c_uint) -> libc::c_int;
}
extern "C" {
pub fn _xtos_core_save(
flags: libc::c_uint,
savearea: *mut XtosCoreState,
code: *mut libc::c_void,
) -> libc::c_int;
}
extern "C" {
pub fn _xtos_core_restore(retvalue: libc::c_uint, savearea: *mut XtosCoreState);
}
extern "C" {
pub fn _xtos_timer_0_delta(cycles: libc::c_int);
}
extern "C" {
pub fn _xtos_timer_1_delta(cycles: libc::c_int);
}
extern "C" {
pub fn _xtos_timer_2_delta(cycles: libc::c_int);
}
extern "C" {
#[doc = " Initialize the crosscore interrupt system for this CPU."]
#[doc = " This needs to be called once on every CPU that is used"]
#[doc = " by FreeRTOS."]
#[doc = ""]
#[doc = " If multicore FreeRTOS support is enabled, this will be"]
#[doc = " called automatically by the startup code and should not"]
#[doc = " be called manually."]
pub fn esp_crosscore_int_init();
}
extern "C" {
#[doc = " Send an interrupt to a CPU indicating it should yield its"]
#[doc = " currently running task in favour of a higher-priority task"]
#[doc = " that presumably just woke up."]
#[doc = ""]
#[doc = " This is used internally by FreeRTOS in multicore mode"]
#[doc = " and should not be called by the user."]
#[doc = ""]
#[doc = " @param core_id Core that should do the yielding"]
pub fn esp_crosscore_int_send_yield(core_id: libc::c_int);
}
extern "C" {
#[doc = " Send an interrupt to a CPU indicating it should update its"]
#[doc = " CCOMPARE1 value due to a frequency switch."]
#[doc = ""]
#[doc = " This is used internally when dynamic frequency switching is"]
#[doc = " enabled, and should not be called from application code."]
#[doc = ""]
#[doc = " @param core_id Core that should update its CCOMPARE1 value"]
pub fn esp_crosscore_int_send_freq_switch(core_id: libc::c_int);
}
extern "C" {
#[doc = " Send an interrupt to a CPU indicating it should print its current backtrace"]
#[doc = ""]
#[doc = " This is use internally by the Task Watchdog to dump the backtrace of the"]
#[doc = " opposite core and should not be called from application code."]
#[doc = ""]
#[doc = " @param core_id Core that should print its backtrace"]
pub fn esp_crosscore_int_send_print_backtrace(core_id: libc::c_int);
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_timer {
_unused: [u8; 0],
}
#[doc = " @brief Opaque type representing a single esp_timer"]
pub type esp_timer_handle_t = *mut esp_timer;
#[doc = " @brief Timer callback function type"]
#[doc = " @param arg pointer to opaque user-specific data"]
pub type esp_timer_cb_t = ::core::option::Option<unsafe extern "C" fn(arg: *mut libc::c_void)>;
#[repr(u32)]
#[doc = " @brief Method for dispatching timer callback"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_timer_dispatch_t {
#[doc = "!< Callback is called from timer task"]
ESP_TIMER_TASK = 0,
}
#[doc = " @brief Timer configuration passed to esp_timer_create"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_timer_create_args_t {
#[doc = "!< Function to call when timer expires"]
pub callback: esp_timer_cb_t,
#[doc = "!< Argument to pass to the callback"]
pub arg: *mut libc::c_void,
#[doc = "!< Call the callback from task or from ISR"]
pub dispatch_method: esp_timer_dispatch_t,
#[doc = "!< Timer name, used in esp_timer_dump function"]
pub name: *const libc::c_char,
}
extern "C" {
#[doc = " @brief Initialize esp_timer library"]
#[doc = ""]
#[doc = " @note This function is called from startup code. Applications do not need"]
#[doc = " to call this function before using other esp_timer APIs."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_NO_MEM if allocation has failed"]
#[doc = " - ESP_ERR_INVALID_STATE if already initialized"]
#[doc = " - other errors from interrupt allocator"]
pub fn esp_timer_init() -> esp_err_t;
}
extern "C" {
#[doc = " @brief De-initialize esp_timer library"]
#[doc = ""]
#[doc = " @note Normally this function should not be called from applications"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_STATE if not yet initialized"]
pub fn esp_timer_deinit() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Create an esp_timer instance"]
#[doc = ""]
#[doc = " @note When done using the timer, delete it with esp_timer_delete function."]
#[doc = ""]
#[doc = " @param create_args Pointer to a structure with timer creation arguments."]
#[doc = " Not saved by the library, can be allocated on the stack."]
#[doc = " @param[out] out_handle Output, pointer to esp_timer_handle_t variable which"]
#[doc = " will hold the created timer handle."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if some of the create_args are not valid"]
#[doc = " - ESP_ERR_INVALID_STATE if esp_timer library is not initialized yet"]
#[doc = " - ESP_ERR_NO_MEM if memory allocation fails"]
pub fn esp_timer_create(
create_args: *const esp_timer_create_args_t,
out_handle: *mut esp_timer_handle_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Start one-shot timer"]
#[doc = ""]
#[doc = " Timer should not be running when this function is called."]
#[doc = ""]
#[doc = " @param timer timer handle created using esp_timer_create"]
#[doc = " @param timeout_us timer timeout, in microseconds relative to the current moment"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if the handle is invalid"]
#[doc = " - ESP_ERR_INVALID_STATE if the timer is already running"]
pub fn esp_timer_start_once(timer: esp_timer_handle_t, timeout_us: u64) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Start a periodic timer"]
#[doc = ""]
#[doc = " Timer should not be running when this function is called. This function will"]
#[doc = " start the timer which will trigger every 'period' microseconds."]
#[doc = ""]
#[doc = " @param timer timer handle created using esp_timer_create"]
#[doc = " @param period timer period, in microseconds"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if the handle is invalid"]
#[doc = " - ESP_ERR_INVALID_STATE if the timer is already running"]
pub fn esp_timer_start_periodic(timer: esp_timer_handle_t, period: u64) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Stop the timer"]
#[doc = ""]
#[doc = " This function stops the timer previously started using esp_timer_start_once"]
#[doc = " or esp_timer_start_periodic."]
#[doc = ""]
#[doc = " @param timer timer handle created using esp_timer_create"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_STATE if the timer is not running"]
pub fn esp_timer_stop(timer: esp_timer_handle_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Delete an esp_timer instance"]
#[doc = ""]
#[doc = " The timer must be stopped before deleting. A one-shot timer which has expired"]
#[doc = " does not need to be stopped."]
#[doc = ""]
#[doc = " @param timer timer handle allocated using esp_timer_create"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_STATE if the timer is not running"]
pub fn esp_timer_delete(timer: esp_timer_handle_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get time in microseconds since boot"]
#[doc = " @return number of microseconds since esp_timer_init was called (this normally"]
#[doc = " happens early during application startup)."]
pub fn esp_timer_get_time() -> i64;
}
extern "C" {
#[doc = " @brief Get the timestamp when the next timeout is expected to occur"]
#[doc = " @return Timestamp of the nearest timer event, in microseconds."]
#[doc = " The timebase is the same as for the values returned by esp_timer_get_time."]
pub fn esp_timer_get_next_alarm() -> i64;
}
extern "C" {
#[doc = " @brief Dump the list of timers to a stream"]
#[doc = ""]
#[doc = " If CONFIG_ESP_TIMER_PROFILING option is enabled, this prints the list of all"]
#[doc = " the existing timers. Otherwise, only the list active timers is printed."]
#[doc = ""]
#[doc = " The format is:"]
#[doc = ""]
#[doc = " name period alarm times_armed times_triggered total_callback_run_time"]
#[doc = ""]
#[doc = " where:"]
#[doc = ""]
#[doc = " name — timer name (if CONFIG_ESP_TIMER_PROFILING is defined), or timer pointer"]
#[doc = " period — period of timer, in microseconds, or 0 for one-shot timer"]
#[doc = " alarm - time of the next alarm, in microseconds since boot, or 0 if the timer"]
#[doc = " is not started"]
#[doc = ""]
#[doc = " The following fields are printed if CONFIG_ESP_TIMER_PROFILING is defined:"]
#[doc = ""]
#[doc = " times_armed — number of times the timer was armed via esp_timer_start_X"]
#[doc = " times_triggered - number of times the callback was called"]
#[doc = " total_callback_run_time - total time taken by callback to execute, across all calls"]
#[doc = ""]
#[doc = " @param stream stream (such as stdout) to dump the information to"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_NO_MEM if can not allocate temporary buffer for the output"]
pub fn esp_timer_dump(stream: *mut FILE) -> esp_err_t;
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum watchpoint_trigger_t {
WATCHPOINT_TRIGGER_ON_RO = 0,
WATCHPOINT_TRIGGER_ON_WO = 1,
WATCHPOINT_TRIGGER_ON_RW = 2,
}
extern "C" {
#[doc = " Set and enable breakpoint at an instruction address."]
#[doc = ""]
#[doc = " @note Overwrites previously set breakpoint with same breakpoint ID."]
#[doc = ""]
#[doc = " @param id breakpoint to set [0..SOC_CPU_BREAKPOINTS_NUM - 1]"]
#[doc = " @param addr address to set a breakpoint on"]
pub fn cpu_hal_set_breakpoint(id: libc::c_int, addr: *const libc::c_void);
}
extern "C" {
#[doc = " Clear and disable breakpoint."]
#[doc = ""]
#[doc = " @param id breakpoint to clear [0..SOC_CPU_BREAKPOINTS_NUM - 1]"]
pub fn cpu_hal_clear_breakpoint(id: libc::c_int);
}
extern "C" {
#[doc = " Set and enable a watchpoint, specifying the memory range and trigger operation."]
#[doc = ""]
#[doc = " @param id watchpoint to set [0..SOC_CPU_WATCHPOINTS_NUM - 1]"]
#[doc = " @param addr starting address"]
#[doc = " @param size number of bytes from starting address to watch"]
#[doc = " @param trigger operation on specified memory range that triggers the watchpoint (read, write, read/write)"]
pub fn cpu_hal_set_watchpoint(
id: libc::c_int,
addr: *const libc::c_void,
size: size_t,
trigger: watchpoint_trigger_t,
);
}
extern "C" {
#[doc = " Clear and disable watchpoint."]
#[doc = ""]
#[doc = " @param id watchpoint to clear [0..SOC_CPU_WATCHPOINTS_NUM - 1]"]
pub fn cpu_hal_clear_watchpoint(id: libc::c_int);
}
extern "C" {
#[doc = " Set exception vector table base address."]
#[doc = ""]
#[doc = " @param base address to move the exception vector table to"]
pub fn cpu_hal_set_vecbase(base: *const libc::c_void);
}
extern "C" {
#[doc = " @brief Stall CPU using RTC controller"]
#[doc = " @param cpu_id ID of the CPU to stall (0 = PRO, 1 = APP)"]
pub fn esp_cpu_stall(cpu_id: libc::c_int);
}
extern "C" {
#[doc = " @brief Un-stall CPU using RTC controller"]
#[doc = " @param cpu_id ID of the CPU to un-stall (0 = PRO, 1 = APP)"]
pub fn esp_cpu_unstall(cpu_id: libc::c_int);
}
extern "C" {
#[doc = " @brief Reset CPU using RTC controller"]
#[doc = " @param cpu_id ID of the CPU to reset (0 = PRO, 1 = APP)"]
pub fn esp_cpu_reset(cpu_id: libc::c_int);
}
extern "C" {
#[doc = " @brief Returns true if a JTAG debugger is attached to CPU"]
#[doc = " OCD (on chip debug) port."]
#[doc = ""]
#[doc = " @note If \"Make exception and panic handlers JTAG/OCD aware\""]
#[doc = " is disabled, this function always returns false."]
pub fn esp_cpu_in_ocd_debug_mode() -> bool;
}
pub type esp_cpu_ccount_t = u32;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct soc_memory_type_desc_t {
#[doc = "< Name of this memory type"]
pub name: *const libc::c_char,
#[doc = "< Capabilities for this memory type (as a prioritised set)"]
pub caps: [u32; 3usize],
#[doc = "< If true, this is data memory that is is also mapped in IRAM"]
pub aliased_iram: bool,
#[doc = "< If true, memory of this type is used for ROM stack during startup"]
pub startup_stack: bool,
}
extern "C" {
pub static mut soc_memory_types: [soc_memory_type_desc_t; 0usize];
}
extern "C" {
pub static soc_memory_type_count: size_t;
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct soc_memory_region_t {
#[doc = "< Start address of the region"]
pub start: isize,
#[doc = "< Size of the region in bytes"]
pub size: size_t,
#[doc = "< Type of the region (index into soc_memory_types array)"]
pub type_: size_t,
#[doc = "< If non-zero, is equivalent address in IRAM"]
pub iram_address: isize,
}
extern "C" {
pub static mut soc_memory_regions: [soc_memory_region_t; 0usize];
}
extern "C" {
pub static soc_memory_region_count: size_t;
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct soc_reserved_region_t {
pub start: isize,
pub end: isize,
}
extern "C" {
pub fn soc_get_available_memory_regions(regions: *mut soc_memory_region_t) -> size_t;
}
extern "C" {
pub fn soc_get_available_memory_region_max_count() -> size_t;
}
extern "C" {
pub fn compare_and_set_extram(addr: *mut u32, compare: u32, set: *mut u32);
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct spinlock_t {
pub owner: u32,
pub count: u32,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct multi_heap_info {
_unused: [u8; 0],
}
#[doc = " @brief Opaque handle to a registered heap"]
pub type multi_heap_handle_t = *mut multi_heap_info;
extern "C" {
#[doc = " @brief allocate a chunk of memory with specific alignment"]
#[doc = ""]
#[doc = " @param heap Handle to a registered heap."]
#[doc = " @param size size in bytes of memory chunk"]
#[doc = " @param alignment how the memory must be aligned"]
#[doc = ""]
#[doc = " @return pointer to the memory allocated, NULL on failure"]
pub fn multi_heap_aligned_alloc(
heap: multi_heap_handle_t,
size: size_t,
alignment: size_t,
) -> *mut libc::c_void;
}
extern "C" {
#[doc = " @brief malloc() a buffer in a given heap"]
#[doc = ""]
#[doc = " Semantics are the same as standard malloc(), only the returned buffer will be allocated in the specified heap."]
#[doc = ""]
#[doc = " @param heap Handle to a registered heap."]
#[doc = " @param size Size of desired buffer."]
#[doc = ""]
#[doc = " @return Pointer to new memory, or NULL if allocation fails."]
pub fn multi_heap_malloc(heap: multi_heap_handle_t, size: size_t) -> *mut libc::c_void;
}
extern "C" {
#[doc = " @brief free() a buffer aligned in a given heap."]
#[doc = ""]
#[doc = " @param heap Handle to a registered heap."]
#[doc = " @param p NULL, or a pointer previously returned from multi_heap_aligned_alloc() for the same heap."]
pub fn multi_heap_aligned_free(heap: multi_heap_handle_t, p: *mut libc::c_void);
}
extern "C" {
#[doc = " @brief free() a buffer in a given heap."]
#[doc = ""]
#[doc = " Semantics are the same as standard free(), only the argument 'p' must be NULL or have been allocated in the specified heap."]
#[doc = ""]
#[doc = " @param heap Handle to a registered heap."]
#[doc = " @param p NULL, or a pointer previously returned from multi_heap_malloc() or multi_heap_realloc() for the same heap."]
pub fn multi_heap_free(heap: multi_heap_handle_t, p: *mut libc::c_void);
}
extern "C" {
#[doc = " @brief realloc() a buffer in a given heap."]
#[doc = ""]
#[doc = " Semantics are the same as standard realloc(), only the argument 'p' must be NULL or have been allocated in the specified heap."]
#[doc = ""]
#[doc = " @param heap Handle to a registered heap."]
#[doc = " @param p NULL, or a pointer previously returned from multi_heap_malloc() or multi_heap_realloc() for the same heap."]
#[doc = " @param size Desired new size for buffer."]
#[doc = ""]
#[doc = " @return New buffer of 'size' containing contents of 'p', or NULL if reallocation failed."]
pub fn multi_heap_realloc(
heap: multi_heap_handle_t,
p: *mut libc::c_void,
size: size_t,
) -> *mut libc::c_void;
}
extern "C" {
#[doc = " @brief Return the size that a particular pointer was allocated with."]
#[doc = ""]
#[doc = " @param heap Handle to a registered heap."]
#[doc = " @param p Pointer, must have been previously returned from multi_heap_malloc() or multi_heap_realloc() for the same heap."]
#[doc = ""]
#[doc = " @return Size of the memory allocated at this block. May be more than the original size argument, due"]
#[doc = " to padding and minimum block sizes."]
pub fn multi_heap_get_allocated_size(heap: multi_heap_handle_t, p: *mut libc::c_void)
-> size_t;
}
extern "C" {
#[doc = " @brief Register a new heap for use"]
#[doc = ""]
#[doc = " This function initialises a heap at the specified address, and returns a handle for future heap operations."]
#[doc = ""]
#[doc = " There is no equivalent function for deregistering a heap - if all blocks in the heap are free, you can immediately start using the memory for other purposes."]
#[doc = ""]
#[doc = " @param start Start address of the memory to use for a new heap."]
#[doc = " @param size Size (in bytes) of the new heap."]
#[doc = ""]
#[doc = " @return Handle of a new heap ready for use, or NULL if the heap region was too small to be initialised."]
pub fn multi_heap_register(start: *mut libc::c_void, size: size_t) -> multi_heap_handle_t;
}
extern "C" {
#[doc = " @brief Associate a private lock pointer with a heap"]
#[doc = ""]
#[doc = " The lock argument is supplied to the MULTI_HEAP_LOCK() and MULTI_HEAP_UNLOCK() macros, defined in multi_heap_platform.h."]
#[doc = ""]
#[doc = " The lock in question must be recursive."]
#[doc = ""]
#[doc = " When the heap is first registered, the associated lock is NULL."]
#[doc = ""]
#[doc = " @param heap Handle to a registered heap."]
#[doc = " @param lock Optional pointer to a locking structure to associate with this heap."]
pub fn multi_heap_set_lock(heap: multi_heap_handle_t, lock: *mut libc::c_void);
}
extern "C" {
#[doc = " @brief Dump heap information to stdout"]
#[doc = ""]
#[doc = " For debugging purposes, this function dumps information about every block in the heap to stdout."]
#[doc = ""]
#[doc = " @param heap Handle to a registered heap."]
pub fn multi_heap_dump(heap: multi_heap_handle_t);
}
extern "C" {
#[doc = " @brief Check heap integrity"]
#[doc = ""]
#[doc = " Walks the heap and checks all heap data structures are valid. If any errors are detected, an error-specific message"]
#[doc = " can be optionally printed to stderr. Print behaviour can be overriden at compile time by defining"]
#[doc = " MULTI_CHECK_FAIL_PRINTF in multi_heap_platform.h."]
#[doc = ""]
#[doc = " @param heap Handle to a registered heap."]
#[doc = " @param print_errors If true, errors will be printed to stderr."]
#[doc = " @return true if heap is valid, false otherwise."]
pub fn multi_heap_check(heap: multi_heap_handle_t, print_errors: bool) -> bool;
}
extern "C" {
#[doc = " @brief Return free heap size"]
#[doc = ""]
#[doc = " Returns the number of bytes available in the heap."]
#[doc = ""]
#[doc = " Equivalent to the total_free_bytes member returned by multi_heap_get_heap_info()."]
#[doc = ""]
#[doc = " Note that the heap may be fragmented, so the actual maximum size for a single malloc() may be lower. To know this"]
#[doc = " size, see the largest_free_block member returned by multi_heap_get_heap_info()."]
#[doc = ""]
#[doc = " @param heap Handle to a registered heap."]
#[doc = " @return Number of free bytes."]
pub fn multi_heap_free_size(heap: multi_heap_handle_t) -> size_t;
}
extern "C" {
#[doc = " @brief Return the lifetime minimum free heap size"]
#[doc = ""]
#[doc = " Equivalent to the minimum_free_bytes member returned by multi_heap_get_info()."]
#[doc = ""]
#[doc = " Returns the lifetime \"low water mark\" of possible values returned from multi_free_heap_size(), for the specified"]
#[doc = " heap."]
#[doc = ""]
#[doc = " @param heap Handle to a registered heap."]
#[doc = " @return Number of free bytes."]
pub fn multi_heap_minimum_free_size(heap: multi_heap_handle_t) -> size_t;
}
#[doc = " @brief Structure to access heap metadata via multi_heap_get_info"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct multi_heap_info_t {
#[doc = "< Total free bytes in the heap. Equivalent to multi_free_heap_size()."]
pub total_free_bytes: size_t,
#[doc = "< Total bytes allocated to data in the heap."]
pub total_allocated_bytes: size_t,
#[doc = "< Size of largest free block in the heap. This is the largest malloc-able size."]
pub largest_free_block: size_t,
#[doc = "< Lifetime minimum free heap size. Equivalent to multi_minimum_free_heap_size()."]
pub minimum_free_bytes: size_t,
#[doc = "< Number of (variable size) blocks allocated in the heap."]
pub allocated_blocks: size_t,
#[doc = "< Number of (variable size) free blocks in the heap."]
pub free_blocks: size_t,
#[doc = "< Total number of (variable size) blocks in the heap."]
pub total_blocks: size_t,
}
extern "C" {
#[doc = " @brief Return metadata about a given heap"]
#[doc = ""]
#[doc = " Fills a multi_heap_info_t structure with information about the specified heap."]
#[doc = ""]
#[doc = " @param heap Handle to a registered heap."]
#[doc = " @param info Pointer to a structure to fill with heap metadata."]
pub fn multi_heap_get_info(heap: multi_heap_handle_t, info: *mut multi_heap_info_t);
}
#[doc = " @brief callback called when a allocation operation fails, if registered"]
#[doc = " @param size in bytes of failed allocation"]
#[doc = " @param caps capabillites requested of failed allocation"]
#[doc = " @param function_name function which generated the failure"]
pub type esp_alloc_failed_hook_t = ::core::option::Option<
unsafe extern "C" fn(size: size_t, caps: u32, function_name: *const libc::c_char),
>;
extern "C" {
#[doc = " @brief registers a callback function to be invoked if a memory allocation operation fails"]
#[doc = " @param callback caller defined callback to be invoked"]
#[doc = " @return ESP_OK if callback was registered."]
pub fn heap_caps_register_failed_alloc_callback(callback: esp_alloc_failed_hook_t)
-> esp_err_t;
}
extern "C" {
#[doc = " @brief Allocate a chunk of memory which has the given capabilities"]
#[doc = ""]
#[doc = " Equivalent semantics to libc malloc(), for capability-aware memory."]
#[doc = ""]
#[doc = " In IDF, ``malloc(p)`` is equivalent to ``heap_caps_malloc(p, MALLOC_CAP_8BIT)``."]
#[doc = ""]
#[doc = " @param size Size, in bytes, of the amount of memory to allocate"]
#[doc = " @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type"]
#[doc = " of memory to be returned"]
#[doc = ""]
#[doc = " @return A pointer to the memory allocated on success, NULL on failure"]
pub fn heap_caps_malloc(size: size_t, caps: u32) -> *mut libc::c_void;
}
extern "C" {
#[doc = " @brief Free memory previously allocated via heap_caps_malloc() or heap_caps_realloc()."]
#[doc = ""]
#[doc = " Equivalent semantics to libc free(), for capability-aware memory."]
#[doc = ""]
#[doc = " In IDF, ``free(p)`` is equivalent to ``heap_caps_free(p)``."]
#[doc = ""]
#[doc = " @param ptr Pointer to memory previously returned from heap_caps_malloc() or heap_caps_realloc(). Can be NULL."]
pub fn heap_caps_free(ptr: *mut libc::c_void);
}
extern "C" {
#[doc = " @brief Reallocate memory previously allocated via heap_caps_malloc() or heap_caps_realloc()."]
#[doc = ""]
#[doc = " Equivalent semantics to libc realloc(), for capability-aware memory."]
#[doc = ""]
#[doc = " In IDF, ``realloc(p, s)`` is equivalent to ``heap_caps_realloc(p, s, MALLOC_CAP_8BIT)``."]
#[doc = ""]
#[doc = " 'caps' parameter can be different to the capabilities that any original 'ptr' was allocated with. In this way,"]
#[doc = " realloc can be used to \"move\" a buffer if necessary to ensure it meets a new set of capabilities."]
#[doc = ""]
#[doc = " @param ptr Pointer to previously allocated memory, or NULL for a new allocation."]
#[doc = " @param size Size of the new buffer requested, or 0 to free the buffer."]
#[doc = " @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type"]
#[doc = " of memory desired for the new allocation."]
#[doc = ""]
#[doc = " @return Pointer to a new buffer of size 'size' with capabilities 'caps', or NULL if allocation failed."]
pub fn heap_caps_realloc(
ptr: *mut libc::c_void,
size: size_t,
caps: libc::c_int,
) -> *mut libc::c_void;
}
extern "C" {
#[doc = " @brief Allocate a aligned chunk of memory which has the given capabilities"]
#[doc = ""]
#[doc = " Equivalent semantics to libc aligned_alloc(), for capability-aware memory."]
#[doc = " @param alignment How the pointer received needs to be aligned"]
#[doc = " must be a power of two"]
#[doc = " @param size Size, in bytes, of the amount of memory to allocate"]
#[doc = " @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type"]
#[doc = " of memory to be returned"]
#[doc = ""]
#[doc = " @return A pointer to the memory allocated on success, NULL on failure"]
#[doc = ""]
#[doc = " @note Any memory allocated with heaps_caps_aligned_alloc() MUST"]
#[doc = " be freed with heap_caps_aligned_free() and CANNOT be passed to free()"]
#[doc = ""]
pub fn heap_caps_aligned_alloc(
alignment: size_t,
size: size_t,
caps: libc::c_int,
) -> *mut libc::c_void;
}
extern "C" {
#[doc = " @brief Allocate a aligned chunk of memory which has the given capabilities. The initialized value in the memory is set to zero."]
#[doc = ""]
#[doc = " @param alignment How the pointer received needs to be aligned"]
#[doc = " must be a power of two"]
#[doc = " @param n Number of continuing chunks of memory to allocate"]
#[doc = " @param size Size, in bytes, of a chunk of memory to allocate"]
#[doc = " @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type"]
#[doc = " of memory to be returned"]
#[doc = ""]
#[doc = " @return A pointer to the memory allocated on success, NULL on failure"]
#[doc = ""]
#[doc = " @note Any memory allocated with heap_caps_aligned_calloc() MUST"]
#[doc = " be freed with heap_caps_aligned_free() and CANNOT be passed to free()"]
pub fn heap_caps_aligned_calloc(
alignment: size_t,
n: size_t,
size: size_t,
caps: u32,
) -> *mut libc::c_void;
}
extern "C" {
#[doc = " @brief Used to deallocate memory previously allocated with heap_caps_aligned_alloc"]
#[doc = ""]
#[doc = " @param ptr Pointer to the memory allocated"]
#[doc = " @note This function is aimed to deallocate only memory allocated with"]
#[doc = " heap_caps_aligned_alloc, memory allocated with heap_caps_malloc"]
#[doc = " MUST not be passed to this function"]
pub fn heap_caps_aligned_free(ptr: *mut libc::c_void);
}
extern "C" {
#[doc = " @brief Allocate a chunk of memory which has the given capabilities. The initialized value in the memory is set to zero."]
#[doc = ""]
#[doc = " Equivalent semantics to libc calloc(), for capability-aware memory."]
#[doc = ""]
#[doc = " In IDF, ``calloc(p)`` is equivalent to ``heap_caps_calloc(p, MALLOC_CAP_8BIT)``."]
#[doc = ""]
#[doc = " @param n Number of continuing chunks of memory to allocate"]
#[doc = " @param size Size, in bytes, of a chunk of memory to allocate"]
#[doc = " @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type"]
#[doc = " of memory to be returned"]
#[doc = ""]
#[doc = " @return A pointer to the memory allocated on success, NULL on failure"]
pub fn heap_caps_calloc(n: size_t, size: size_t, caps: u32) -> *mut libc::c_void;
}
extern "C" {
#[doc = " @brief Get the total size of all the regions that have the given capabilities"]
#[doc = ""]
#[doc = " This function takes all regions capable of having the given capabilities allocated in them"]
#[doc = " and adds up the total space they have."]
#[doc = ""]
#[doc = " @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type"]
#[doc = " of memory"]
#[doc = ""]
#[doc = " @return total size in bytes"]
pub fn heap_caps_get_total_size(caps: u32) -> size_t;
}
extern "C" {
#[doc = " @brief Get the total free size of all the regions that have the given capabilities"]
#[doc = ""]
#[doc = " This function takes all regions capable of having the given capabilities allocated in them"]
#[doc = " and adds up the free space they have."]
#[doc = ""]
#[doc = " Note that because of heap fragmentation it is probably not possible to allocate a single block of memory"]
#[doc = " of this size. Use heap_caps_get_largest_free_block() for this purpose."]
#[doc = ""]
#[doc = " @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type"]
#[doc = " of memory"]
#[doc = ""]
#[doc = " @return Amount of free bytes in the regions"]
pub fn heap_caps_get_free_size(caps: u32) -> size_t;
}
extern "C" {
#[doc = " @brief Get the total minimum free memory of all regions with the given capabilities"]
#[doc = ""]
#[doc = " This adds all the low water marks of the regions capable of delivering the memory"]
#[doc = " with the given capabilities."]
#[doc = ""]
#[doc = " Note the result may be less than the global all-time minimum available heap of this kind, as \"low water marks\" are"]
#[doc = " tracked per-region. Individual regions' heaps may have reached their \"low water marks\" at different points in time. However"]
#[doc = " this result still gives a \"worst case\" indication for all-time minimum free heap."]
#[doc = ""]
#[doc = " @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type"]
#[doc = " of memory"]
#[doc = ""]
#[doc = " @return Amount of free bytes in the regions"]
pub fn heap_caps_get_minimum_free_size(caps: u32) -> size_t;
}
extern "C" {
#[doc = " @brief Get the largest free block of memory able to be allocated with the given capabilities."]
#[doc = ""]
#[doc = " Returns the largest value of ``s`` for which ``heap_caps_malloc(s, caps)`` will succeed."]
#[doc = ""]
#[doc = " @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type"]
#[doc = " of memory"]
#[doc = ""]
#[doc = " @return Size of largest free block in bytes."]
pub fn heap_caps_get_largest_free_block(caps: u32) -> size_t;
}
extern "C" {
#[doc = " @brief Get heap info for all regions with the given capabilities."]
#[doc = ""]
#[doc = " Calls multi_heap_info() on all heaps which share the given capabilities. The information returned is an aggregate"]
#[doc = " across all matching heaps. The meanings of fields are the same as defined for multi_heap_info_t, except that"]
#[doc = " ``minimum_free_bytes`` has the same caveats described in heap_caps_get_minimum_free_size()."]
#[doc = ""]
#[doc = " @param info Pointer to a structure which will be filled with relevant"]
#[doc = " heap metadata."]
#[doc = " @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type"]
#[doc = " of memory"]
#[doc = ""]
pub fn heap_caps_get_info(info: *mut multi_heap_info_t, caps: u32);
}
extern "C" {
#[doc = " @brief Print a summary of all memory with the given capabilities."]
#[doc = ""]
#[doc = " Calls multi_heap_info on all heaps which share the given capabilities, and"]
#[doc = " prints a two-line summary for each, then a total summary."]
#[doc = ""]
#[doc = " @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type"]
#[doc = " of memory"]
#[doc = ""]
pub fn heap_caps_print_heap_info(caps: u32);
}
extern "C" {
#[doc = " @brief Check integrity of all heap memory in the system."]
#[doc = ""]
#[doc = " Calls multi_heap_check on all heaps. Optionally print errors if heaps are corrupt."]
#[doc = ""]
#[doc = " Calling this function is equivalent to calling heap_caps_check_integrity"]
#[doc = " with the caps argument set to MALLOC_CAP_INVALID."]
#[doc = ""]
#[doc = " @param print_errors Print specific errors if heap corruption is found."]
#[doc = ""]
#[doc = " @return True if all heaps are valid, False if at least one heap is corrupt."]
pub fn heap_caps_check_integrity_all(print_errors: bool) -> bool;
}
extern "C" {
#[doc = " @brief Check integrity of all heaps with the given capabilities."]
#[doc = ""]
#[doc = " Calls multi_heap_check on all heaps which share the given capabilities. Optionally"]
#[doc = " print errors if the heaps are corrupt."]
#[doc = ""]
#[doc = " See also heap_caps_check_integrity_all to check all heap memory"]
#[doc = " in the system and heap_caps_check_integrity_addr to check memory"]
#[doc = " around a single address."]
#[doc = ""]
#[doc = " @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type"]
#[doc = " of memory"]
#[doc = " @param print_errors Print specific errors if heap corruption is found."]
#[doc = ""]
#[doc = " @return True if all heaps are valid, False if at least one heap is corrupt."]
pub fn heap_caps_check_integrity(caps: u32, print_errors: bool) -> bool;
}
extern "C" {
#[doc = " @brief Check integrity of heap memory around a given address."]
#[doc = ""]
#[doc = " This function can be used to check the integrity of a single region of heap memory,"]
#[doc = " which contains the given address."]
#[doc = ""]
#[doc = " This can be useful if debugging heap integrity for corruption at a known address,"]
#[doc = " as it has a lower overhead than checking all heap regions. Note that if the corrupt"]
#[doc = " address moves around between runs (due to timing or other factors) then this approach"]
#[doc = " won't work and you should call heap_caps_check_integrity or"]
#[doc = " heap_caps_check_integrity_all instead."]
#[doc = ""]
#[doc = " @note The entire heap region around the address is checked, not only the adjacent"]
#[doc = " heap blocks."]
#[doc = ""]
#[doc = " @param addr Address in memory. Check for corruption in region containing this address."]
#[doc = " @param print_errors Print specific errors if heap corruption is found."]
#[doc = ""]
#[doc = " @return True if the heap containing the specified address is valid,"]
#[doc = " False if at least one heap is corrupt or the address doesn't belong to a heap region."]
pub fn heap_caps_check_integrity_addr(addr: isize, print_errors: bool) -> bool;
}
extern "C" {
#[doc = " @brief Enable malloc() in external memory and set limit below which"]
#[doc = " malloc() attempts are placed in internal memory."]
#[doc = ""]
#[doc = " When external memory is in use, the allocation strategy is to initially try to"]
#[doc = " satisfy smaller allocation requests with internal memory and larger requests"]
#[doc = " with external memory. This sets the limit between the two, as well as generally"]
#[doc = " enabling allocation in external memory."]
#[doc = ""]
#[doc = " @param limit Limit, in bytes."]
pub fn heap_caps_malloc_extmem_enable(limit: size_t);
}
extern "C" {
#[doc = " @brief Allocate a chunk of memory as preference in decreasing order."]
#[doc = ""]
#[doc = " @attention The variable parameters are bitwise OR of MALLOC_CAP_* flags indicating the type of memory."]
#[doc = " This API prefers to allocate memory with the first parameter. If failed, allocate memory with"]
#[doc = " the next parameter. It will try in this order until allocating a chunk of memory successfully"]
#[doc = " or fail to allocate memories with any of the parameters."]
#[doc = ""]
#[doc = " @param size Size, in bytes, of the amount of memory to allocate"]
#[doc = " @param num Number of variable paramters"]
#[doc = ""]
#[doc = " @return A pointer to the memory allocated on success, NULL on failure"]
pub fn heap_caps_malloc_prefer(size: size_t, num: size_t, ...) -> *mut libc::c_void;
}
extern "C" {
#[doc = " @brief Allocate a chunk of memory as preference in decreasing order."]
#[doc = ""]
#[doc = " @param ptr Pointer to previously allocated memory, or NULL for a new allocation."]
#[doc = " @param size Size of the new buffer requested, or 0 to free the buffer."]
#[doc = " @param num Number of variable paramters"]
#[doc = ""]
#[doc = " @return Pointer to a new buffer of size 'size', or NULL if allocation failed."]
pub fn heap_caps_realloc_prefer(
ptr: *mut libc::c_void,
size: size_t,
num: size_t,
...
) -> *mut libc::c_void;
}
extern "C" {
#[doc = " @brief Allocate a chunk of memory as preference in decreasing order."]
#[doc = ""]
#[doc = " @param n Number of continuing chunks of memory to allocate"]
#[doc = " @param size Size, in bytes, of a chunk of memory to allocate"]
#[doc = " @param num Number of variable paramters"]
#[doc = ""]
#[doc = " @return A pointer to the memory allocated on success, NULL on failure"]
pub fn heap_caps_calloc_prefer(n: size_t, size: size_t, num: size_t, ...) -> *mut libc::c_void;
}
extern "C" {
#[doc = " @brief Dump the full structure of all heaps with matching capabilities."]
#[doc = ""]
#[doc = " Prints a large amount of output to serial (because of locking limitations,"]
#[doc = " the output bypasses stdout/stderr). For each (variable sized) block"]
#[doc = " in each matching heap, the following output is printed on a single line:"]
#[doc = ""]
#[doc = " - Block address (the data buffer returned by malloc is 4 bytes after this"]
#[doc = " if heap debugging is set to Basic, or 8 bytes otherwise)."]
#[doc = " - Data size (the data size may be larger than the size requested by malloc,"]
#[doc = " either due to heap fragmentation or because of heap debugging level)."]
#[doc = " - Address of next block in the heap."]
#[doc = " - If the block is free, the address of the next free block is also printed."]
#[doc = ""]
#[doc = " @param caps Bitwise OR of MALLOC_CAP_* flags indicating the type"]
#[doc = " of memory"]
pub fn heap_caps_dump(caps: u32);
}
extern "C" {
#[doc = " @brief Dump the full structure of all heaps."]
#[doc = ""]
#[doc = " Covers all registered heaps. Prints a large amount of output to serial."]
#[doc = ""]
#[doc = " Output is the same as for heap_caps_dump."]
#[doc = ""]
pub fn heap_caps_dump_all();
}
extern "C" {
#[doc = " @brief Return the size that a particular pointer was allocated with."]
#[doc = ""]
#[doc = " @param ptr Pointer to currently allocated heap memory. Must be a pointer value previously"]
#[doc = " returned by heap_caps_malloc,malloc,calloc, etc. and not yet freed."]
#[doc = ""]
#[doc = " @note The app will crash with an assertion failure if the pointer is not valid."]
#[doc = ""]
#[doc = " @return Size of the memory allocated at this block."]
#[doc = ""]
pub fn heap_caps_get_allocated_size(ptr: *mut libc::c_void) -> size_t;
}
pub type StackType_t = u8;
pub type BaseType_t = libc::c_int;
pub type UBaseType_t = libc::c_uint;
pub type TickType_t = u32;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct portMUX_TYPE {
pub spinlock: spinlock_t,
}
extern "C" {
pub fn vPortAssertIfInISR();
}
extern "C" {
pub fn vPortEnterCritical(mux: *mut portMUX_TYPE);
}
extern "C" {
pub fn vPortExitCritical(mux: *mut portMUX_TYPE);
}
extern "C" {
pub fn xPortInIsrContext() -> BaseType_t;
}
extern "C" {
pub fn vPortYield();
}
extern "C" {
pub fn _frxt_setup_switch();
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct xMPU_SETTINGS {
pub coproc_area: *mut StackType_t,
}
extern "C" {
pub fn esp_vApplicationIdleHook();
}
extern "C" {
pub fn esp_vApplicationTickHook();
}
extern "C" {
pub fn _xt_coproc_release(coproc_sa_base: *mut libc::c_void);
}
extern "C" {
pub fn vApplicationSleep(xExpectedIdleTime: TickType_t);
}
extern "C" {
pub fn vPortSetStackWatchpoint(pxStackStart: *mut libc::c_void);
}
extern "C" {
#[doc = " Return full IDF version string, same as 'git describe' output."]
#[doc = ""]
#[doc = " @note If you are printing the ESP-IDF version in a log file or other information,"]
#[doc = " this function provides more information than using the numerical version macros."]
#[doc = " For example, numerical version macros don't differentiate between development,"]
#[doc = " pre-release and release versions, but the output of this function does."]
#[doc = ""]
#[doc = " @return constant string from IDF_VER"]
pub fn esp_get_idf_version() -> *const libc::c_char;
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_mac_type_t {
ESP_MAC_WIFI_STA = 0,
ESP_MAC_WIFI_SOFTAP = 1,
ESP_MAC_BT = 2,
ESP_MAC_ETH = 3,
}
#[repr(u32)]
#[doc = " @brief Reset reasons"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_reset_reason_t {
#[doc = "!< Reset reason can not be determined"]
ESP_RST_UNKNOWN = 0,
#[doc = "!< Reset due to power-on event"]
ESP_RST_POWERON = 1,
#[doc = "!< Reset by external pin (not applicable for ESP32)"]
ESP_RST_EXT = 2,
#[doc = "!< Software reset via esp_restart"]
ESP_RST_SW = 3,
#[doc = "!< Software reset due to exception/panic"]
ESP_RST_PANIC = 4,
#[doc = "!< Reset (software or hardware) due to interrupt watchdog"]
ESP_RST_INT_WDT = 5,
#[doc = "!< Reset due to task watchdog"]
ESP_RST_TASK_WDT = 6,
#[doc = "!< Reset due to other watchdogs"]
ESP_RST_WDT = 7,
#[doc = "!< Reset after exiting deep sleep mode"]
ESP_RST_DEEPSLEEP = 8,
#[doc = "!< Brownout reset (software or hardware)"]
ESP_RST_BROWNOUT = 9,
#[doc = "!< Reset over SDIO"]
ESP_RST_SDIO = 10,
}
#[doc = " Shutdown handler type"]
pub type shutdown_handler_t = ::core::option::Option<unsafe extern "C" fn()>;
extern "C" {
#[doc = " @brief Register shutdown handler"]
#[doc = ""]
#[doc = " This function allows you to register a handler that gets invoked before"]
#[doc = " the application is restarted using esp_restart function."]
#[doc = " @param handle function to execute on restart"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_STATE if the handler has already been registered"]
#[doc = " - ESP_ERR_NO_MEM if no more shutdown handler slots are available"]
pub fn esp_register_shutdown_handler(handle: shutdown_handler_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Unregister shutdown handler"]
#[doc = ""]
#[doc = " This function allows you to unregister a handler which was previously"]
#[doc = " registered using esp_register_shutdown_handler function."]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_STATE if the given handler hasn't been registered before"]
pub fn esp_unregister_shutdown_handler(handle: shutdown_handler_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Restart PRO and APP CPUs."]
#[doc = ""]
#[doc = " This function can be called both from PRO and APP CPUs."]
#[doc = " After successful restart, CPU reset reason will be SW_CPU_RESET."]
#[doc = " Peripherals (except for WiFi, BT, UART0, SPI1, and legacy timers) are not reset."]
#[doc = " This function does not return."]
pub fn esp_restart();
}
extern "C" {
#[doc = " @brief Get reason of last reset"]
#[doc = " @return See description of esp_reset_reason_t for explanation of each value."]
pub fn esp_reset_reason() -> esp_reset_reason_t;
}
extern "C" {
#[doc = " @brief Get the size of available heap."]
#[doc = ""]
#[doc = " Note that the returned value may be larger than the maximum contiguous block"]
#[doc = " which can be allocated."]
#[doc = ""]
#[doc = " @return Available heap size, in bytes."]
pub fn esp_get_free_heap_size() -> u32;
}
extern "C" {
#[doc = " @brief Get the minimum heap that has ever been available"]
#[doc = ""]
#[doc = " @return Minimum free heap ever available"]
pub fn esp_get_minimum_free_heap_size() -> u32;
}
extern "C" {
#[doc = " @brief Get one random 32-bit word from hardware RNG"]
#[doc = ""]
#[doc = " The hardware RNG is fully functional whenever an RF subsystem is running (ie Bluetooth or WiFi is enabled). For"]
#[doc = " random values, call this function after WiFi or Bluetooth are started."]
#[doc = ""]
#[doc = " If the RF subsystem is not used by the program, the function bootloader_random_enable() can be called to enable an"]
#[doc = " entropy source. bootloader_random_disable() must be called before RF subsystem or I2S peripheral are used. See these functions'"]
#[doc = " documentation for more details."]
#[doc = ""]
#[doc = " Any time the app is running without an RF subsystem (or bootloader_random) enabled, RNG hardware should be"]
#[doc = " considered a PRNG. A very small amount of entropy is available due to pre-seeding while the IDF"]
#[doc = " bootloader is running, but this should not be relied upon for any use."]
#[doc = ""]
#[doc = " @return Random value between 0 and UINT32_MAX"]
pub fn esp_random() -> u32;
}
extern "C" {
#[doc = " @brief Fill a buffer with random bytes from hardware RNG"]
#[doc = ""]
#[doc = " @note This function has the same restrictions regarding available entropy as esp_random()"]
#[doc = ""]
#[doc = " @param buf Pointer to buffer to fill with random numbers."]
#[doc = " @param len Length of buffer in bytes"]
pub fn esp_fill_random(buf: *mut libc::c_void, len: size_t);
}
extern "C" {
#[doc = " @brief Set base MAC address with the MAC address which is stored in BLK3 of EFUSE or"]
#[doc = " external storage e.g. flash and EEPROM."]
#[doc = ""]
#[doc = " Base MAC address is used to generate the MAC addresses used by the networking interfaces."]
#[doc = " If using base MAC address stored in BLK3 of EFUSE or external storage, call this API to set base MAC"]
#[doc = " address with the MAC address which is stored in BLK3 of EFUSE or external storage before initializing"]
#[doc = " WiFi/BT/Ethernet."]
#[doc = ""]
#[doc = " @note Base MAC must be a unicast MAC (least significant bit of first byte must be zero)."]
#[doc = ""]
#[doc = " @note If not using a valid OUI, set the \"locally administered\" bit"]
#[doc = " (bit value 0x02 in the first byte) to avoid collisions."]
#[doc = ""]
#[doc = " @param mac base MAC address, length: 6 bytes."]
#[doc = ""]
#[doc = " @return ESP_OK on success"]
#[doc = " ESP_ERR_INVALID_ARG If mac is NULL or is not a unicast MAC"]
pub fn esp_base_mac_addr_set(mac: *const u8) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Return base MAC address which is set using esp_base_mac_addr_set."]
#[doc = ""]
#[doc = " @param mac base MAC address, length: 6 bytes."]
#[doc = ""]
#[doc = " @return ESP_OK on success"]
#[doc = " ESP_ERR_INVALID_MAC base MAC address has not been set"]
pub fn esp_base_mac_addr_get(mac: *mut u8) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Return base MAC address which was previously written to BLK3 of EFUSE."]
#[doc = ""]
#[doc = " Base MAC address is used to generate the MAC addresses used by the networking interfaces."]
#[doc = " This API returns the custom base MAC address which was previously written to BLK3 of EFUSE."]
#[doc = " Writing this EFUSE allows setting of a different (non-Espressif) base MAC address. It is also"]
#[doc = " possible to store a custom base MAC address elsewhere, see esp_base_mac_addr_set() for details."]
#[doc = ""]
#[doc = " @param mac base MAC address, length: 6 bytes."]
#[doc = ""]
#[doc = " @return ESP_OK on success"]
#[doc = " ESP_ERR_INVALID_VERSION An invalid MAC version field was read from BLK3 of EFUSE"]
#[doc = " ESP_ERR_INVALID_CRC An invalid MAC CRC was read from BLK3 of EFUSE"]
pub fn esp_efuse_mac_get_custom(mac: *mut u8) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Return base MAC address which is factory-programmed by Espressif in BLK0 of EFUSE."]
#[doc = ""]
#[doc = " @param mac base MAC address, length: 6 bytes."]
#[doc = ""]
#[doc = " @return ESP_OK on success"]
pub fn esp_efuse_mac_get_default(mac: *mut u8) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Read base MAC address and set MAC address of the interface."]
#[doc = ""]
#[doc = " This function first get base MAC address using esp_base_mac_addr_get or reads base MAC address"]
#[doc = " from BLK0 of EFUSE. Then set the MAC address of the interface including wifi station, wifi softap,"]
#[doc = " bluetooth and ethernet."]
#[doc = ""]
#[doc = " @param mac MAC address of the interface, length: 6 bytes."]
#[doc = " @param type type of MAC address, 0:wifi station, 1:wifi softap, 2:bluetooth, 3:ethernet."]
#[doc = ""]
#[doc = " @return ESP_OK on success"]
pub fn esp_read_mac(mac: *mut u8, type_: esp_mac_type_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Derive local MAC address from universal MAC address."]
#[doc = ""]
#[doc = " This function derives a local MAC address from an universal MAC address."]
#[doc = " A `definition of local vs universal MAC address can be found on Wikipedia"]
#[doc = " <https://en.wikipedia.org/wiki/MAC_address#Universal_vs._local>`."]
#[doc = " In ESP32, universal MAC address is generated from base MAC address in EFUSE or other external storage."]
#[doc = " Local MAC address is derived from the universal MAC address."]
#[doc = ""]
#[doc = " @param local_mac Derived local MAC address, length: 6 bytes."]
#[doc = " @param universal_mac Source universal MAC address, length: 6 bytes."]
#[doc = ""]
#[doc = " @return ESP_OK on success"]
pub fn esp_derive_local_mac(local_mac: *mut u8, universal_mac: *const u8) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Trigger a software abort"]
#[doc = ""]
#[doc = " @param details Details that will be displayed during panic handling."]
pub fn esp_system_abort(details: *const libc::c_char);
}
#[repr(u32)]
#[doc = " @brief Chip models"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_chip_model_t {
#[doc = "!< ESP32"]
CHIP_ESP32 = 1,
#[doc = "!< ESP32-S2"]
CHIP_ESP32S2 = 2,
}
#[doc = " @brief The structure represents information about the chip"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_chip_info_t {
#[doc = "!< chip model, one of esp_chip_model_t"]
pub model: esp_chip_model_t,
#[doc = "!< bit mask of CHIP_FEATURE_x feature flags"]
pub features: u32,
#[doc = "!< number of CPU cores"]
pub cores: u8,
#[doc = "!< chip revision number"]
pub revision: u8,
}
extern "C" {
#[doc = " @brief Fill an esp_chip_info_t structure with information about the chip"]
#[doc = " @param[out] out_info structure to be filled"]
pub fn esp_chip_info(out_info: *mut esp_chip_info_t);
}
extern "C" {
pub fn pxPortInitialiseStack(
pxTopOfStack: *mut StackType_t,
pxCode: TaskFunction_t,
pvParameters: *mut libc::c_void,
xRunPrivileged: BaseType_t,
) -> *mut StackType_t;
}
extern "C" {
pub fn xPortStartScheduler() -> BaseType_t;
}
extern "C" {
pub fn vPortEndScheduler();
}
extern "C" {
pub fn vPortYieldOtherCore(coreid: BaseType_t);
}
extern "C" {
pub fn xPortInterruptedFromISRContext() -> BaseType_t;
}
extern "C" {
pub fn vPortStoreTaskMPUSettings(
xMPUSettings: *mut xMPU_SETTINGS,
xRegions: *const xMEMORY_REGION,
pxBottomOfStack: *mut StackType_t,
usStackDepth: u32,
);
}
extern "C" {
pub fn vPortReleaseTaskMPUSettings(xMPUSettings: *mut xMPU_SETTINGS);
}
extern "C" {
pub fn xPortGetTickRateHz() -> u32;
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct xSTATIC_LIST_ITEM {
pub xDummy1: TickType_t,
pub pvDummy2: [*mut libc::c_void; 4usize],
}
pub type StaticListItem_t = xSTATIC_LIST_ITEM;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct xSTATIC_MINI_LIST_ITEM {
pub xDummy1: TickType_t,
pub pvDummy2: [*mut libc::c_void; 2usize],
}
pub type StaticMiniListItem_t = xSTATIC_MINI_LIST_ITEM;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct xSTATIC_LIST {
pub uxDummy1: UBaseType_t,
pub pvDummy2: *mut libc::c_void,
pub xDummy3: StaticMiniListItem_t,
}
pub type StaticList_t = xSTATIC_LIST;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct xSTATIC_TCB {
pub pxDummy1: *mut libc::c_void,
pub xDummy2: xMPU_SETTINGS,
pub xDummy3: [StaticListItem_t; 2usize],
pub uxDummy5: UBaseType_t,
pub pxDummy6: *mut libc::c_void,
pub ucDummy7: [u8; 16usize],
pub uxDummyCoreId: UBaseType_t,
pub pxDummy8: *mut libc::c_void,
pub uxDummy12: [UBaseType_t; 2usize],
pub pvDummy15: [*mut libc::c_void; 1usize],
pub pvDummyLocalStorageCallBack: [*mut libc::c_void; 1usize],
pub xDummy17: _reent,
pub ulDummy18: u32,
pub ucDummy19: u32,
pub uxDummy20: u8,
}
pub type StaticTask_t = xSTATIC_TCB;
#[repr(C)]
#[derive(Copy, Clone)]
pub struct xSTATIC_QUEUE {
pub pvDummy1: [*mut libc::c_void; 3usize],
pub u: xSTATIC_QUEUE__bindgen_ty_1,
pub xDummy3: [StaticList_t; 2usize],
pub uxDummy4: [UBaseType_t; 3usize],
pub pvDummy7: *mut libc::c_void,
pub muxDummy: portMUX_TYPE,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union xSTATIC_QUEUE__bindgen_ty_1 {
pub pvDummy2: *mut libc::c_void,
pub uxDummy2: UBaseType_t,
_bindgen_union_align: u32,
}
pub type StaticQueue_t = xSTATIC_QUEUE;
pub type StaticSemaphore_t = StaticQueue_t;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct xSTATIC_EVENT_GROUP {
pub xDummy1: TickType_t,
pub xDummy2: StaticList_t,
pub muxDummy: portMUX_TYPE,
}
pub type StaticEventGroup_t = xSTATIC_EVENT_GROUP;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct xSTATIC_TIMER {
pub pvDummy1: *mut libc::c_void,
pub xDummy2: StaticListItem_t,
pub xDummy3: TickType_t,
pub uxDummy4: UBaseType_t,
pub pvDummy5: [*mut libc::c_void; 2usize],
}
pub type StaticTimer_t = xSTATIC_TIMER;
#[doc = " Type by which queues are referenced. For example, a call to xQueueCreate()"]
#[doc = " returns an QueueHandle_t variable that can then be used as a parameter to"]
#[doc = " xQueueSend(), xQueueReceive(), etc."]
pub type QueueHandle_t = *mut libc::c_void;
#[doc = " Type by which queue sets are referenced. For example, a call to"]
#[doc = " xQueueCreateSet() returns an xQueueSet variable that can then be used as a"]
#[doc = " parameter to xQueueSelectFromSet(), xQueueAddToSet(), etc."]
pub type QueueSetHandle_t = *mut libc::c_void;
#[doc = " Queue sets can contain both queues and semaphores, so the"]
#[doc = " QueueSetMemberHandle_t is defined as a type to be used where a parameter or"]
#[doc = " return value can be either an QueueHandle_t or an SemaphoreHandle_t."]
pub type QueueSetMemberHandle_t = *mut libc::c_void;
extern "C" {
#[doc = " It is preferred that the macros xQueueSend(), xQueueSendToFront() and"]
#[doc = " xQueueSendToBack() are used in place of calling this function directly."]
#[doc = ""]
#[doc = " Post an item on a queue. The item is queued by copy, not by reference."]
#[doc = " This function must not be called from an interrupt service routine."]
#[doc = " See xQueueSendFromISR () for an alternative which may be used in an ISR."]
#[doc = ""]
#[doc = " @param xQueue The handle to the queue on which the item is to be posted."]
#[doc = ""]
#[doc = " @param pvItemToQueue A pointer to the item that is to be placed on the"]
#[doc = " queue. The size of the items the queue will hold was defined when the"]
#[doc = " queue was created, so this many bytes will be copied from pvItemToQueue"]
#[doc = " into the queue storage area."]
#[doc = ""]
#[doc = " @param xTicksToWait The maximum amount of time the task should block"]
#[doc = " waiting for space to become available on the queue, should it already"]
#[doc = " be full. The call will return immediately if this is set to 0 and the"]
#[doc = " queue is full. The time is defined in tick periods so the constant"]
#[doc = " portTICK_PERIOD_MS should be used to convert to real time if this is required."]
#[doc = ""]
#[doc = " @param xCopyPosition Can take the value queueSEND_TO_BACK to place the"]
#[doc = " item at the back of the queue, or queueSEND_TO_FRONT to place the item"]
#[doc = " at the front of the queue (for high priority messages)."]
#[doc = ""]
#[doc = " @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL."]
#[doc = ""]
#[doc = " Example usage:"]
#[doc = " @code{c}"]
#[doc = " struct AMessage"]
#[doc = " {"]
#[doc = " char ucMessageID;"]
#[doc = " char ucData[ 20 ];"]
#[doc = " } xMessage;"]
#[doc = ""]
#[doc = " uint32_t ulVar = 10UL;"]
#[doc = ""]
#[doc = " void vATask( void *pvParameters )"]
#[doc = " {"]
#[doc = " QueueHandle_t xQueue1, xQueue2;"]
#[doc = " struct AMessage *pxMessage;"]
#[doc = ""]
#[doc = " // Create a queue capable of containing 10 uint32_t values."]
#[doc = " xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );"]
#[doc = ""]
#[doc = " // Create a queue capable of containing 10 pointers to AMessage structures."]
#[doc = " // These should be passed by pointer as they contain a lot of data."]
#[doc = " xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );"]
#[doc = ""]
#[doc = " // ..."]
#[doc = ""]
#[doc = " if( xQueue1 != 0 )"]
#[doc = " {"]
#[doc = " // Send an uint32_t. Wait for 10 ticks for space to become"]
#[doc = " // available if necessary."]
#[doc = " if( xQueueGenericSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10, queueSEND_TO_BACK ) != pdPASS )"]
#[doc = " {"]
#[doc = " // Failed to post the message, even after 10 ticks."]
#[doc = " }"]
#[doc = " }"]
#[doc = ""]
#[doc = " if( xQueue2 != 0 )"]
#[doc = " {"]
#[doc = " // Send a pointer to a struct AMessage object. Don't block if the"]
#[doc = " // queue is already full."]
#[doc = " pxMessage = & xMessage;"]
#[doc = " xQueueGenericSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0, queueSEND_TO_BACK );"]
#[doc = " }"]
#[doc = ""]
#[doc = " // ... Rest of task code."]
#[doc = " }"]
#[doc = " @endcode"]
#[doc = " \\ingroup QueueManagement"]
pub fn xQueueGenericSend(
xQueue: QueueHandle_t,
pvItemToQueue: *const libc::c_void,
xTicksToWait: TickType_t,
xCopyPosition: BaseType_t,
) -> BaseType_t;
}
extern "C" {
#[doc = " A version of xQueuePeek() that can be called from an interrupt service"]
#[doc = " routine (ISR)."]
#[doc = ""]
#[doc = " Receive an item from a queue without removing the item from the queue."]
#[doc = " The item is received by copy so a buffer of adequate size must be"]
#[doc = " provided. The number of bytes copied into the buffer was defined when"]
#[doc = " the queue was created."]
#[doc = ""]
#[doc = " Successfully received items remain on the queue so will be returned again"]
#[doc = " by the next call, or a call to xQueueReceive()."]
#[doc = ""]
#[doc = " @param xQueue The handle to the queue from which the item is to be"]
#[doc = " received."]
#[doc = ""]
#[doc = " @param pvBuffer Pointer to the buffer into which the received item will"]
#[doc = " be copied."]
#[doc = ""]
#[doc = " @return pdTRUE if an item was successfully received from the queue,"]
#[doc = " otherwise pdFALSE."]
#[doc = ""]
#[doc = " \\ingroup QueueManagement"]
pub fn xQueuePeekFromISR(xQueue: QueueHandle_t, pvBuffer: *mut libc::c_void) -> BaseType_t;
}
extern "C" {
#[doc = " It is preferred that the macro xQueueReceive() be used rather than calling"]
#[doc = " this function directly."]
#[doc = ""]
#[doc = " Receive an item from a queue. The item is received by copy so a buffer of"]
#[doc = " adequate size must be provided. The number of bytes copied into the buffer"]
#[doc = " was defined when the queue was created."]
#[doc = ""]
#[doc = " This function must not be used in an interrupt service routine. See"]
#[doc = " xQueueReceiveFromISR for an alternative that can."]
#[doc = ""]
#[doc = " @param xQueue The handle to the queue from which the item is to be"]
#[doc = " received."]
#[doc = ""]
#[doc = " @param pvBuffer Pointer to the buffer into which the received item will"]
#[doc = " be copied."]
#[doc = ""]
#[doc = " @param xTicksToWait The maximum amount of time the task should block"]
#[doc = " waiting for an item to receive should the queue be empty at the time"]
#[doc = " of the call.\t The time is defined in tick periods so the constant"]
#[doc = " portTICK_PERIOD_MS should be used to convert to real time if this is required."]
#[doc = " xQueueGenericReceive() will return immediately if the queue is empty and"]
#[doc = " xTicksToWait is 0."]
#[doc = ""]
#[doc = " @param xJustPeek When set to true, the item received from the queue is not"]
#[doc = " actually removed from the queue - meaning a subsequent call to"]
#[doc = " xQueueReceive() will return the same item. When set to false, the item"]
#[doc = " being received from the queue is also removed from the queue."]
#[doc = ""]
#[doc = " @return pdTRUE if an item was successfully received from the queue,"]
#[doc = " otherwise pdFALSE."]
#[doc = ""]
#[doc = " Example usage:"]
#[doc = " @code{c}"]
#[doc = " struct AMessage"]
#[doc = " {"]
#[doc = " \tchar ucMessageID;"]
#[doc = " \tchar ucData[ 20 ];"]
#[doc = " } xMessage;"]
#[doc = ""]
#[doc = " QueueHandle_t xQueue;"]
#[doc = ""]
#[doc = " // Task to create a queue and post a value."]
#[doc = " void vATask( void *pvParameters )"]
#[doc = " {"]
#[doc = " struct AMessage *pxMessage;"]
#[doc = ""]
#[doc = " \t// Create a queue capable of containing 10 pointers to AMessage structures."]
#[doc = " \t// These should be passed by pointer as they contain a lot of data."]
#[doc = " \txQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );"]
#[doc = " \tif( xQueue == 0 )"]
#[doc = " \t{"]
#[doc = " \t\t// Failed to create the queue."]
#[doc = " \t}"]
#[doc = ""]
#[doc = " \t// ..."]
#[doc = ""]
#[doc = " \t// Send a pointer to a struct AMessage object. Don't block if the"]
#[doc = " \t// queue is already full."]
#[doc = " \tpxMessage = & xMessage;"]
#[doc = " \txQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );"]
#[doc = ""]
#[doc = " \t// ... Rest of task code."]
#[doc = " }"]
#[doc = ""]
#[doc = " // Task to receive from the queue."]
#[doc = " void vADifferentTask( void *pvParameters )"]
#[doc = " {"]
#[doc = " struct AMessage *pxRxedMessage;"]
#[doc = ""]
#[doc = " \tif( xQueue != 0 )"]
#[doc = " \t{"]
#[doc = " \t\t// Receive a message on the created queue. Block for 10 ticks if a"]
#[doc = " \t\t// message is not immediately available."]
#[doc = " \t\tif( xQueueGenericReceive( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )"]
#[doc = " \t\t{"]
#[doc = " \t\t\t// pcRxedMessage now points to the struct AMessage variable posted"]
#[doc = " \t\t\t// by vATask."]
#[doc = " \t\t}"]
#[doc = " \t}"]
#[doc = ""]
#[doc = " \t// ... Rest of task code."]
#[doc = " }"]
#[doc = " @endcode"]
#[doc = " \\ingroup QueueManagement"]
pub fn xQueueGenericReceive(
xQueue: QueueHandle_t,
pvBuffer: *mut libc::c_void,
xTicksToWait: TickType_t,
xJustPeek: BaseType_t,
) -> BaseType_t;
}
extern "C" {
#[doc = " Return the number of messages stored in a queue."]
#[doc = ""]
#[doc = " @param xQueue A handle to the queue being queried."]
#[doc = ""]
#[doc = " @return The number of messages available in the queue."]
#[doc = ""]
#[doc = " \\ingroup QueueManagement"]
pub fn uxQueueMessagesWaiting(xQueue: QueueHandle_t) -> UBaseType_t;
}
extern "C" {
#[doc = " Return the number of free spaces available in a queue. This is equal to the"]
#[doc = " number of items that can be sent to the queue before the queue becomes full"]
#[doc = " if no items are removed."]
#[doc = ""]
#[doc = " @param xQueue A handle to the queue being queried."]
#[doc = ""]
#[doc = " @return The number of spaces available in the queue."]
#[doc = ""]
#[doc = " \\ingroup QueueManagement"]
pub fn uxQueueSpacesAvailable(xQueue: QueueHandle_t) -> UBaseType_t;
}
extern "C" {
#[doc = " Delete a queue - freeing all the memory allocated for storing of items"]
#[doc = " placed on the queue."]
#[doc = ""]
#[doc = " @param xQueue A handle to the queue to be deleted."]
#[doc = ""]
#[doc = " \\ingroup QueueManagement"]
pub fn vQueueDelete(xQueue: QueueHandle_t);
}
extern "C" {
#[doc = "@{*/"]
#[doc = " It is preferred that the macros xQueueSendFromISR(),"]
#[doc = " xQueueSendToFrontFromISR() and xQueueSendToBackFromISR() be used in place"]
#[doc = " of calling this function directly. xQueueGiveFromISR() is an"]
#[doc = " equivalent for use by semaphores that don't actually copy any data."]
#[doc = ""]
#[doc = " Post an item on a queue. It is safe to use this function from within an"]
#[doc = " interrupt service routine."]
#[doc = ""]
#[doc = " Items are queued by copy not reference so it is preferable to only"]
#[doc = " queue small items, especially when called from an ISR. In most cases"]
#[doc = " it would be preferable to store a pointer to the item being queued."]
#[doc = ""]
#[doc = " @param xQueue The handle to the queue on which the item is to be posted."]
#[doc = ""]
#[doc = " @param pvItemToQueue A pointer to the item that is to be placed on the"]
#[doc = " queue. The size of the items the queue will hold was defined when the"]
#[doc = " queue was created, so this many bytes will be copied from pvItemToQueue"]
#[doc = " into the queue storage area."]
#[doc = ""]
#[doc = " @param[out] pxHigherPriorityTaskWoken xQueueGenericSendFromISR() will set"]
#[doc = " *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task"]
#[doc = " to unblock, and the unblocked task has a priority higher than the currently"]
#[doc = " running task. If xQueueGenericSendFromISR() sets this value to pdTRUE then"]
#[doc = " a context switch should be requested before the interrupt is exited."]
#[doc = ""]
#[doc = " @param xCopyPosition Can take the value queueSEND_TO_BACK to place the"]
#[doc = " item at the back of the queue, or queueSEND_TO_FRONT to place the item"]
#[doc = " at the front of the queue (for high priority messages)."]
#[doc = ""]
#[doc = " @return pdTRUE if the data was successfully sent to the queue, otherwise"]
#[doc = " errQUEUE_FULL."]
#[doc = ""]
#[doc = " Example usage for buffered IO (where the ISR can obtain more than one value"]
#[doc = " per call):"]
#[doc = " @code{c}"]
#[doc = " void vBufferISR( void )"]
#[doc = " {"]
#[doc = " char cIn;"]
#[doc = " BaseType_t xHigherPriorityTaskWokenByPost;"]
#[doc = ""]
#[doc = " \t// We have not woken a task at the start of the ISR."]
#[doc = " \txHigherPriorityTaskWokenByPost = pdFALSE;"]
#[doc = ""]
#[doc = " \t// Loop until the buffer is empty."]
#[doc = " \tdo"]
#[doc = " \t{"]
#[doc = " \t\t// Obtain a byte from the buffer."]
#[doc = " \t\tcIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );"]
#[doc = ""]
#[doc = " \t\t// Post each byte."]
#[doc = " \t\txQueueGenericSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWokenByPost, queueSEND_TO_BACK );"]
#[doc = ""]
#[doc = " \t} while( portINPUT_BYTE( BUFFER_COUNT ) );"]
#[doc = ""]
#[doc = " \t// Now the buffer is empty we can switch context if necessary. Note that the"]
#[doc = " \t// name of the yield function required is port specific."]
#[doc = " \tif( xHigherPriorityTaskWokenByPost )"]
#[doc = " \t{"]
#[doc = " \t\ttaskYIELD_YIELD_FROM_ISR();"]
#[doc = " \t}"]
#[doc = " }"]
#[doc = " @endcode"]
#[doc = " \\ingroup QueueManagement"]
pub fn xQueueGenericSendFromISR(
xQueue: QueueHandle_t,
pvItemToQueue: *const libc::c_void,
pxHigherPriorityTaskWoken: *mut BaseType_t,
xCopyPosition: BaseType_t,
) -> BaseType_t;
}
extern "C" {
pub fn xQueueGiveFromISR(
xQueue: QueueHandle_t,
pxHigherPriorityTaskWoken: *mut BaseType_t,
) -> BaseType_t;
}
extern "C" {
#[doc = " Receive an item from a queue. It is safe to use this function from within an"]
#[doc = " interrupt service routine."]
#[doc = ""]
#[doc = " @param xQueue The handle to the queue from which the item is to be"]
#[doc = " received."]
#[doc = ""]
#[doc = " @param pvBuffer Pointer to the buffer into which the received item will"]
#[doc = " be copied."]
#[doc = ""]
#[doc = " @param[out] pxHigherPriorityTaskWoken A task may be blocked waiting for space to become"]
#[doc = " available on the queue. If xQueueReceiveFromISR causes such a task to"]
#[doc = " unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will"]
#[doc = " remain unchanged."]
#[doc = ""]
#[doc = " @return pdTRUE if an item was successfully received from the queue,"]
#[doc = " otherwise pdFALSE."]
#[doc = ""]
#[doc = " Example usage:"]
#[doc = " @code{c}"]
#[doc = " QueueHandle_t xQueue;"]
#[doc = ""]
#[doc = " // Function to create a queue and post some values."]
#[doc = " void vAFunction( void *pvParameters )"]
#[doc = " {"]
#[doc = " char cValueToPost;"]
#[doc = " const TickType_t xTicksToWait = ( TickType_t )0xff;"]
#[doc = ""]
#[doc = " \t// Create a queue capable of containing 10 characters."]
#[doc = " \txQueue = xQueueCreate( 10, sizeof( char ) );"]
#[doc = " \tif( xQueue == 0 )"]
#[doc = " \t{"]
#[doc = " \t\t// Failed to create the queue."]
#[doc = " \t}"]
#[doc = ""]
#[doc = " \t// ..."]
#[doc = ""]
#[doc = " \t// Post some characters that will be used within an ISR. If the queue"]
#[doc = " \t// is full then this task will block for xTicksToWait ticks."]
#[doc = " \tcValueToPost = 'a';"]
#[doc = " \txQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );"]
#[doc = " \tcValueToPost = 'b';"]
#[doc = " \txQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );"]
#[doc = ""]
#[doc = " \t// ... keep posting characters ... this task may block when the queue"]
#[doc = " \t// becomes full."]
#[doc = ""]
#[doc = " \tcValueToPost = 'c';"]
#[doc = " \txQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );"]
#[doc = " }"]
#[doc = ""]
#[doc = " // ISR that outputs all the characters received on the queue."]
#[doc = " void vISR_Routine( void )"]
#[doc = " {"]
#[doc = " BaseType_t xTaskWokenByReceive = pdFALSE;"]
#[doc = " char cRxedChar;"]
#[doc = ""]
#[doc = " \twhile( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) )"]
#[doc = " \t{"]
#[doc = " \t\t// A character was received. Output the character now."]
#[doc = " \t\tvOutputCharacter( cRxedChar );"]
#[doc = ""]
#[doc = " \t\t// If removing the character from the queue woke the task that was"]
#[doc = " \t\t// posting onto the queue cTaskWokenByReceive will have been set to"]
#[doc = " \t\t// pdTRUE. No matter how many times this loop iterates only one"]
#[doc = " \t\t// task will be woken."]
#[doc = " \t}"]
#[doc = ""]
#[doc = " \tif( cTaskWokenByPost != ( char ) pdFALSE;"]
#[doc = " \t{"]
#[doc = " \t\ttaskYIELD ();"]
#[doc = " \t}"]
#[doc = " }"]
#[doc = " @endcode"]
#[doc = " \\ingroup QueueManagement"]
pub fn xQueueReceiveFromISR(
xQueue: QueueHandle_t,
pvBuffer: *mut libc::c_void,
pxHigherPriorityTaskWoken: *mut BaseType_t,
) -> BaseType_t;
}
extern "C" {
#[doc = "@{*/"]
#[doc = " Utilities to query queues that are safe to use from an ISR. These utilities"]
#[doc = " should be used only from witin an ISR, or within a critical section."]
pub fn xQueueIsQueueEmptyFromISR(xQueue: QueueHandle_t) -> BaseType_t;
}
extern "C" {
pub fn xQueueIsQueueFullFromISR(xQueue: QueueHandle_t) -> BaseType_t;
}
extern "C" {
pub fn uxQueueMessagesWaitingFromISR(xQueue: QueueHandle_t) -> UBaseType_t;
}
extern "C" {
#[doc = " @cond */"]
#[doc = " xQueueAltGenericSend() is an alternative version of xQueueGenericSend()."]
#[doc = " Likewise xQueueAltGenericReceive() is an alternative version of"]
#[doc = " xQueueGenericReceive()."]
#[doc = ""]
#[doc = " The source code that implements the alternative (Alt) API is much"]
#[doc = " simpler\tbecause it executes everything from within a critical section."]
#[doc = " This is\tthe approach taken by many other RTOSes, but FreeRTOS.org has the"]
#[doc = " preferred fully featured API too. The fully featured API has more"]
#[doc = " complex\tcode that takes longer to execute, but makes much less use of"]
#[doc = " critical sections. Therefore the alternative API sacrifices interrupt"]
#[doc = " responsiveness to gain execution speed, whereas the fully featured API"]
#[doc = " sacrifices execution speed to ensure better interrupt responsiveness."]
pub fn xQueueAltGenericSend(
xQueue: QueueHandle_t,
pvItemToQueue: *const libc::c_void,
xTicksToWait: TickType_t,
xCopyPosition: BaseType_t,
) -> BaseType_t;
}
extern "C" {
pub fn xQueueAltGenericReceive(
xQueue: QueueHandle_t,
pvBuffer: *mut libc::c_void,
xTicksToWait: TickType_t,
xJustPeeking: BaseType_t,
) -> BaseType_t;
}
extern "C" {
pub fn xQueueCRSendFromISR(
xQueue: QueueHandle_t,
pvItemToQueue: *const libc::c_void,
xCoRoutinePreviouslyWoken: BaseType_t,
) -> BaseType_t;
}
extern "C" {
pub fn xQueueCRReceiveFromISR(
xQueue: QueueHandle_t,
pvBuffer: *mut libc::c_void,
pxTaskWoken: *mut BaseType_t,
) -> BaseType_t;
}
extern "C" {
pub fn xQueueCRSend(
xQueue: QueueHandle_t,
pvItemToQueue: *const libc::c_void,
xTicksToWait: TickType_t,
) -> BaseType_t;
}
extern "C" {
pub fn xQueueCRReceive(
xQueue: QueueHandle_t,
pvBuffer: *mut libc::c_void,
xTicksToWait: TickType_t,
) -> BaseType_t;
}
extern "C" {
pub fn xQueueCreateMutex(ucQueueType: u8) -> QueueHandle_t;
}
extern "C" {
pub fn xQueueCreateMutexStatic(
ucQueueType: u8,
pxStaticQueue: *mut StaticQueue_t,
) -> QueueHandle_t;
}
extern "C" {
pub fn xQueueCreateCountingSemaphore(
uxMaxCount: UBaseType_t,
uxInitialCount: UBaseType_t,
) -> QueueHandle_t;
}
extern "C" {
pub fn xQueueCreateCountingSemaphoreStatic(
uxMaxCount: UBaseType_t,
uxInitialCount: UBaseType_t,
pxStaticQueue: *mut StaticQueue_t,
) -> QueueHandle_t;
}
extern "C" {
pub fn xQueueGetMutexHolder(xSemaphore: QueueHandle_t) -> *mut libc::c_void;
}
extern "C" {
pub fn xQueueTakeMutexRecursive(xMutex: QueueHandle_t, xTicksToWait: TickType_t) -> BaseType_t;
}
extern "C" {
pub fn xQueueGiveMutexRecursive(pxMutex: QueueHandle_t) -> BaseType_t;
}
extern "C" {
pub fn xQueueGenericCreate(
uxQueueLength: UBaseType_t,
uxItemSize: UBaseType_t,
ucQueueType: u8,
) -> QueueHandle_t;
}
extern "C" {
#[doc = " Queue sets provide a mechanism to allow a task to block (pend) on a read"]
#[doc = " operation from multiple queues or semaphores simultaneously."]
#[doc = ""]
#[doc = " See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this"]
#[doc = " function."]
#[doc = ""]
#[doc = " A queue set must be explicitly created using a call to xQueueCreateSet()"]
#[doc = " before it can be used. Once created, standard FreeRTOS queues and semaphores"]
#[doc = " can be added to the set using calls to xQueueAddToSet()."]
#[doc = " xQueueSelectFromSet() is then used to determine which, if any, of the queues"]
#[doc = " or semaphores contained in the set is in a state where a queue read or"]
#[doc = " semaphore take operation would be successful."]
#[doc = ""]
#[doc = " Note 1: See the documentation on http://wwwFreeRTOS.org/RTOS-queue-sets.html"]
#[doc = " for reasons why queue sets are very rarely needed in practice as there are"]
#[doc = " simpler methods of blocking on multiple objects."]
#[doc = ""]
#[doc = " Note 2: Blocking on a queue set that contains a mutex will not cause the"]
#[doc = " mutex holder to inherit the priority of the blocked task."]
#[doc = ""]
#[doc = " Note 3: An additional 4 bytes of RAM is required for each space in a every"]
#[doc = " queue added to a queue set. Therefore counting semaphores that have a high"]
#[doc = " maximum count value should not be added to a queue set."]
#[doc = ""]
#[doc = " Note 4: A receive (in the case of a queue) or take (in the case of a"]
#[doc = " semaphore) operation must not be performed on a member of a queue set unless"]
#[doc = " a call to xQueueSelectFromSet() has first returned a handle to that set member."]
#[doc = ""]
#[doc = " @param uxEventQueueLength Queue sets store events that occur on"]
#[doc = " the queues and semaphores contained in the set. uxEventQueueLength specifies"]
#[doc = " the maximum number of events that can be queued at once. To be absolutely"]
#[doc = " certain that events are not lost uxEventQueueLength should be set to the"]
#[doc = " total sum of the length of the queues added to the set, where binary"]
#[doc = " semaphores and mutexes have a length of 1, and counting semaphores have a"]
#[doc = " length set by their maximum count value. Examples:"]
#[doc = " + If a queue set is to hold a queue of length 5, another queue of length 12,"]
#[doc = " and a binary semaphore, then uxEventQueueLength should be set to"]
#[doc = " (5 + 12 + 1), or 18."]
#[doc = " + If a queue set is to hold three binary semaphores then uxEventQueueLength"]
#[doc = " should be set to (1 + 1 + 1 ), or 3."]
#[doc = " + If a queue set is to hold a counting semaphore that has a maximum count of"]
#[doc = " 5, and a counting semaphore that has a maximum count of 3, then"]
#[doc = " uxEventQueueLength should be set to (5 + 3), or 8."]
#[doc = ""]
#[doc = " @return If the queue set is created successfully then a handle to the created"]
#[doc = " queue set is returned. Otherwise NULL is returned."]
pub fn xQueueCreateSet(uxEventQueueLength: UBaseType_t) -> QueueSetHandle_t;
}
extern "C" {
#[doc = " Adds a queue or semaphore to a queue set that was previously created by a"]
#[doc = " call to xQueueCreateSet()."]
#[doc = ""]
#[doc = " See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this"]
#[doc = " function."]
#[doc = ""]
#[doc = " Note 1: A receive (in the case of a queue) or take (in the case of a"]
#[doc = " semaphore) operation must not be performed on a member of a queue set unless"]
#[doc = " a call to xQueueSelectFromSet() has first returned a handle to that set member."]
#[doc = ""]
#[doc = " @param xQueueOrSemaphore The handle of the queue or semaphore being added to"]
#[doc = " the queue set (cast to an QueueSetMemberHandle_t type)."]
#[doc = ""]
#[doc = " @param xQueueSet The handle of the queue set to which the queue or semaphore"]
#[doc = " is being added."]
#[doc = ""]
#[doc = " @return If the queue or semaphore was successfully added to the queue set"]
#[doc = " then pdPASS is returned. If the queue could not be successfully added to the"]
#[doc = " queue set because it is already a member of a different queue set then pdFAIL"]
#[doc = " is returned."]
pub fn xQueueAddToSet(
xQueueOrSemaphore: QueueSetMemberHandle_t,
xQueueSet: QueueSetHandle_t,
) -> BaseType_t;
}
extern "C" {
#[doc = " Removes a queue or semaphore from a queue set. A queue or semaphore can only"]
#[doc = " be removed from a set if the queue or semaphore is empty."]
#[doc = ""]
#[doc = " See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this"]
#[doc = " function."]
#[doc = ""]
#[doc = " @param xQueueOrSemaphore The handle of the queue or semaphore being removed"]
#[doc = " from the queue set (cast to an QueueSetMemberHandle_t type)."]
#[doc = ""]
#[doc = " @param xQueueSet The handle of the queue set in which the queue or semaphore"]
#[doc = " is included."]
#[doc = ""]
#[doc = " @return If the queue or semaphore was successfully removed from the queue set"]
#[doc = " then pdPASS is returned. If the queue was not in the queue set, or the"]
#[doc = " queue (or semaphore) was not empty, then pdFAIL is returned."]
pub fn xQueueRemoveFromSet(
xQueueOrSemaphore: QueueSetMemberHandle_t,
xQueueSet: QueueSetHandle_t,
) -> BaseType_t;
}
extern "C" {
#[doc = " xQueueSelectFromSet() selects from the members of a queue set a queue or"]
#[doc = " semaphore that either contains data (in the case of a queue) or is available"]
#[doc = " to take (in the case of a semaphore). xQueueSelectFromSet() effectively"]
#[doc = " allows a task to block (pend) on a read operation on all the queues and"]
#[doc = " semaphores in a queue set simultaneously."]
#[doc = ""]
#[doc = " See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this"]
#[doc = " function."]
#[doc = ""]
#[doc = " Note 1: See the documentation on http://wwwFreeRTOS.org/RTOS-queue-sets.html"]
#[doc = " for reasons why queue sets are very rarely needed in practice as there are"]
#[doc = " simpler methods of blocking on multiple objects."]
#[doc = ""]
#[doc = " Note 2: Blocking on a queue set that contains a mutex will not cause the"]
#[doc = " mutex holder to inherit the priority of the blocked task."]
#[doc = ""]
#[doc = " Note 3: A receive (in the case of a queue) or take (in the case of a"]
#[doc = " semaphore) operation must not be performed on a member of a queue set unless"]
#[doc = " a call to xQueueSelectFromSet() has first returned a handle to that set member."]
#[doc = ""]
#[doc = " @param xQueueSet The queue set on which the task will (potentially) block."]
#[doc = ""]
#[doc = " @param xTicksToWait The maximum time, in ticks, that the calling task will"]
#[doc = " remain in the Blocked state (with other tasks executing) to wait for a member"]
#[doc = " of the queue set to be ready for a successful queue read or semaphore take"]
#[doc = " operation."]
#[doc = ""]
#[doc = " @return xQueueSelectFromSet() will return the handle of a queue (cast to"]
#[doc = " a QueueSetMemberHandle_t type) contained in the queue set that contains data,"]
#[doc = " or the handle of a semaphore (cast to a QueueSetMemberHandle_t type) contained"]
#[doc = " in the queue set that is available, or NULL if no such queue or semaphore"]
#[doc = " exists before before the specified block time expires."]
pub fn xQueueSelectFromSet(
xQueueSet: QueueSetHandle_t,
xTicksToWait: TickType_t,
) -> QueueSetMemberHandle_t;
}
extern "C" {
#[doc = " A version of xQueueSelectFromSet() that can be used from an ISR."]
pub fn xQueueSelectFromSetFromISR(xQueueSet: QueueSetHandle_t) -> QueueSetMemberHandle_t;
}
extern "C" {
#[doc = " @cond"]
pub fn vQueueWaitForMessageRestricted(xQueue: QueueHandle_t, xTicksToWait: TickType_t);
}
extern "C" {
pub fn xQueueGenericReset(xQueue: QueueHandle_t, xNewQueue: BaseType_t) -> BaseType_t;
}
extern "C" {
pub fn vQueueSetQueueNumber(xQueue: QueueHandle_t, uxQueueNumber: UBaseType_t);
}
extern "C" {
pub fn uxQueueGetQueueNumber(xQueue: QueueHandle_t) -> UBaseType_t;
}
extern "C" {
pub fn ucQueueGetQueueType(xQueue: QueueHandle_t) -> u8;
}
pub type SemaphoreHandle_t = QueueHandle_t;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct xLIST_ITEM {
pub xItemValue: TickType_t,
pub pxNext: *mut xLIST_ITEM,
pub pxPrevious: *mut xLIST_ITEM,
pub pvOwner: *mut libc::c_void,
pub pvContainer: *mut libc::c_void,
}
pub type ListItem_t = xLIST_ITEM;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct xMINI_LIST_ITEM {
pub xItemValue: TickType_t,
pub pxNext: *mut xLIST_ITEM,
pub pxPrevious: *mut xLIST_ITEM,
}
pub type MiniListItem_t = xMINI_LIST_ITEM;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct xLIST {
pub uxNumberOfItems: UBaseType_t,
pub pxIndex: *mut ListItem_t,
pub xListEnd: MiniListItem_t,
}
pub type List_t = xLIST;
extern "C" {
pub fn vListInitialise(pxList: *mut List_t);
}
extern "C" {
pub fn vListInitialiseItem(pxItem: *mut ListItem_t);
}
extern "C" {
pub fn vListInsert(pxList: *mut List_t, pxNewListItem: *mut ListItem_t);
}
extern "C" {
pub fn vListInsertEnd(pxList: *mut List_t, pxNewListItem: *mut ListItem_t);
}
extern "C" {
pub fn uxListRemove(pxItemToRemove: *mut ListItem_t) -> UBaseType_t;
}
#[doc = " task. h"]
#[doc = ""]
#[doc = " Type by which tasks are referenced. For example, a call to xTaskCreate"]
#[doc = " returns (via a pointer parameter) an TaskHandle_t variable that can then"]
#[doc = " be used as a parameter to vTaskDelete to delete the task."]
#[doc = ""]
#[doc = " \\ingroup Tasks"]
pub type TaskHandle_t = *mut libc::c_void;
#[doc = " Defines the prototype to which the application task hook function must"]
#[doc = " conform."]
pub type TaskHookFunction_t =
::core::option::Option<unsafe extern "C" fn(arg1: *mut libc::c_void) -> BaseType_t>;
#[repr(u32)]
#[doc = " Task states returned by eTaskGetState."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum eTaskState {
#[doc = "< A task is querying the state of itself, so must be running."]
eRunning = 0,
#[doc = "< The task being queried is in a read or pending ready list."]
eReady = 1,
#[doc = "< The task being queried is in the Blocked state."]
eBlocked = 2,
#[doc = "< The task being queried is in the Suspended state, or is in the Blocked state with an infinite time out."]
eSuspended = 3,
#[doc = "< The task being queried has been deleted, but its TCB has not yet been freed."]
eDeleted = 4,
}
#[repr(u32)]
#[doc = " Actions that can be performed when vTaskNotify() is called."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum eNotifyAction {
#[doc = "< Notify the task without updating its notify value."]
eNoAction = 0,
#[doc = "< Set bits in the task's notification value."]
eSetBits = 1,
#[doc = "< Increment the task's notification value."]
eIncrement = 2,
#[doc = "< Set the task's notification value to a specific value even if the previous value has not yet been read by the task."]
eSetValueWithOverwrite = 3,
#[doc = "< Set the task's notification value if the previous value has been read by the task."]
eSetValueWithoutOverwrite = 4,
}
#[doc = " @cond */"]
#[doc = " Used internally only."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct xTIME_OUT {
pub xOverflowCount: BaseType_t,
pub xTimeOnEntering: TickType_t,
}
pub type TimeOut_t = xTIME_OUT;
#[doc = " Defines the memory ranges allocated to the task when an MPU is used."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct xMEMORY_REGION {
pub pvBaseAddress: *mut libc::c_void,
pub ulLengthInBytes: u32,
pub ulParameters: u32,
}
pub type MemoryRegion_t = xMEMORY_REGION;
#[doc = " Parameters required to create an MPU protected task."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct xTASK_PARAMETERS {
pub pvTaskCode: TaskFunction_t,
pub pcName: *const libc::c_char,
pub usStackDepth: u32,
pub pvParameters: *mut libc::c_void,
pub uxPriority: UBaseType_t,
pub puxStackBuffer: *mut StackType_t,
pub xRegions: [MemoryRegion_t; 1usize],
}
pub type TaskParameters_t = xTASK_PARAMETERS;
#[doc = " Used with the uxTaskGetSystemState() function to return the state of each task in the system."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct xTASK_STATUS {
#[doc = "< The handle of the task to which the rest of the information in the structure relates."]
pub xHandle: TaskHandle_t,
#[doc = "< A pointer to the task's name. This value will be invalid if the task was deleted since the structure was populated!"]
pub pcTaskName: *const libc::c_char,
#[doc = "< A number unique to the task."]
pub xTaskNumber: UBaseType_t,
#[doc = "< The state in which the task existed when the structure was populated."]
pub eCurrentState: eTaskState,
#[doc = "< The priority at which the task was running (may be inherited) when the structure was populated."]
pub uxCurrentPriority: UBaseType_t,
#[doc = "< The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex. Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h."]
pub uxBasePriority: UBaseType_t,
#[doc = "< The total run time allocated to the task so far, as defined by the run time stats clock. See http://www.freertos.org/rtos-run-time-stats.html. Only valid when configGENERATE_RUN_TIME_STATS is defined as 1 in FreeRTOSConfig.h."]
pub ulRunTimeCounter: u32,
#[doc = "< Points to the lowest address of the task's stack area."]
pub pxStackBase: *mut StackType_t,
#[doc = "< The minimum amount of stack space that has remained for the task since the task was created. The closer this value is to zero the closer the task has come to overflowing its stack."]
pub usStackHighWaterMark: u32,
}
pub type TaskStatus_t = xTASK_STATUS;
#[doc = " Used with the uxTaskGetSnapshotAll() function to save memory snapshot of each task in the system."]
#[doc = " We need this struct because TCB_t is defined (hidden) in tasks.c."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct xTASK_SNAPSHOT {
#[doc = "< Address of task control block."]
pub pxTCB: *mut libc::c_void,
#[doc = "< Points to the location of the last item placed on the tasks stack."]
pub pxTopOfStack: *mut StackType_t,
#[doc = "< Points to the end of the stack. pxTopOfStack < pxEndOfStack, stack grows hi2lo"]
#[doc = "pxTopOfStack > pxEndOfStack, stack grows lo2hi"]
pub pxEndOfStack: *mut StackType_t,
#[doc = "< Current state of the task. Can be running or suspended"]
pub eState: eTaskState,
#[doc = "< CPU where this task was running"]
pub xCpuId: BaseType_t,
}
pub type TaskSnapshot_t = xTASK_SNAPSHOT;
#[repr(u32)]
#[doc = " Possible return values for eTaskConfirmSleepModeStatus()."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum eSleepModeStatus {
#[doc = "< A task has been made ready or a context switch pended since portSUPPORESS_TICKS_AND_SLEEP() was called - abort entering a sleep mode."]
eAbortSleep = 0,
#[doc = "< Enter a sleep mode that will not last any longer than the expected idle time."]
eStandardSleep = 1,
#[doc = "< No tasks are waiting for a timeout so it is safe to enter a sleep mode that can only be exited by an external interrupt."]
eNoTasksWaitingTimeout = 2,
}
extern "C" {
pub fn xTaskCreatePinnedToCore(
pvTaskCode: TaskFunction_t,
pcName: *const libc::c_char,
usStackDepth: u32,
pvParameters: *mut libc::c_void,
uxPriority: UBaseType_t,
pvCreatedTask: *mut TaskHandle_t,
xCoreID: BaseType_t,
) -> BaseType_t;
}
extern "C" {
pub fn xTaskCreateRestricted(
pxTaskDefinition: *const TaskParameters_t,
pxCreatedTask: *mut TaskHandle_t,
) -> BaseType_t;
}
extern "C" {
#[doc = " Memory regions are assigned to a restricted task when the task is created by"]
#[doc = " a call to xTaskCreateRestricted(). These regions can be redefined using"]
#[doc = " vTaskAllocateMPURegions()."]
#[doc = ""]
#[doc = " @param xTask The handle of the task being updated."]
#[doc = ""]
#[doc = " @param xRegions A pointer to an MemoryRegion_t structure that contains the"]
#[doc = " new memory region definitions."]
#[doc = ""]
#[doc = " Example usage:"]
#[doc = ""]
#[doc = " @code{c}"]
#[doc = " // Define an array of MemoryRegion_t structures that configures an MPU region"]
#[doc = " // allowing read/write access for 1024 bytes starting at the beginning of the"]
#[doc = " // ucOneKByte array. The other two of the maximum 3 definable regions are"]
#[doc = " // unused so set to zero."]
#[doc = " static const MemoryRegion_t xAltRegions[ portNUM_CONFIGURABLE_REGIONS ] ="]
#[doc = " {"]
#[doc = " \t// Base address\t\tLength\t\tParameters"]
#[doc = " \t{ ucOneKByte,\t\t1024,\t\tportMPU_REGION_READ_WRITE },"]
#[doc = " \t{ 0,\t\t\t\t0,\t\t\t0 },"]
#[doc = " \t{ 0,\t\t\t\t0,\t\t\t0 }"]
#[doc = " };"]
#[doc = ""]
#[doc = " void vATask( void *pvParameters )"]
#[doc = " {"]
#[doc = " \t// This task was created such that it has access to certain regions of"]
#[doc = " \t// memory as defined by the MPU configuration. At some point it is"]
#[doc = " \t// desired that these MPU regions are replaced with that defined in the"]
#[doc = " \t// xAltRegions const struct above. Use a call to vTaskAllocateMPURegions()"]
#[doc = " \t// for this purpose. NULL is used as the task handle to indicate that this"]
#[doc = " \t// function should modify the MPU regions of the calling task."]
#[doc = " \tvTaskAllocateMPURegions( NULL, xAltRegions );"]
#[doc = ""]
#[doc = " \t// Now the task can continue its function, but from this point on can only"]
#[doc = " \t// access its stack and the ucOneKByte array (unless any other statically"]
#[doc = " \t// defined or shared regions have been declared elsewhere)."]
#[doc = " }"]
#[doc = " @endcode"]
#[doc = " \\ingroup Tasks"]
pub fn vTaskAllocateMPURegions(xTask: TaskHandle_t, pxRegions: *const MemoryRegion_t);
}
extern "C" {
#[doc = " Remove a task from the RTOS real time kernel's management."]
#[doc = ""]
#[doc = " The task being deleted will be removed from all ready, blocked, suspended"]
#[doc = " and event lists."]
#[doc = ""]
#[doc = " INCLUDE_vTaskDelete must be defined as 1 for this function to be available."]
#[doc = " See the configuration section for more information."]
#[doc = ""]
#[doc = " @note The idle task is responsible for freeing the kernel allocated"]
#[doc = " memory from tasks that have been deleted. It is therefore important that"]
#[doc = " the idle task is not starved of microcontroller processing time if your"]
#[doc = " application makes any calls to vTaskDelete (). Memory allocated by the"]
#[doc = " task code is not automatically freed, and should be freed before the task"]
#[doc = " is deleted."]
#[doc = ""]
#[doc = " See the demo application file death.c for sample code that utilises"]
#[doc = " vTaskDelete ()."]
#[doc = ""]
#[doc = " @param xTaskToDelete The handle of the task to be deleted. Passing NULL will"]
#[doc = " cause the calling task to be deleted."]
#[doc = ""]
#[doc = " Example usage:"]
#[doc = " @code{c}"]
#[doc = " void vOtherFunction( void )"]
#[doc = " {"]
#[doc = " TaskHandle_t xHandle;"]
#[doc = ""]
#[doc = " \t // Create the task, storing the handle."]
#[doc = " \t xTaskCreate( vTaskCode, \"NAME\", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );"]
#[doc = ""]
#[doc = " \t // Use the handle to delete the task."]
#[doc = " \t vTaskDelete( xHandle );"]
#[doc = " }"]
#[doc = " @endcode"]
#[doc = " \\ingroup Tasks"]
pub fn vTaskDelete(xTaskToDelete: TaskHandle_t);
}
extern "C" {
#[doc = " Delay a task for a given number of ticks."]
#[doc = ""]
#[doc = " The actual time that the task remains blocked depends on the tick rate."]
#[doc = " The constant portTICK_PERIOD_MS can be used to calculate real time from"]
#[doc = " the tick rate - with the resolution of one tick period."]
#[doc = ""]
#[doc = " INCLUDE_vTaskDelay must be defined as 1 for this function to be available."]
#[doc = " See the configuration section for more information."]
#[doc = ""]
#[doc = " vTaskDelay() specifies a time at which the task wishes to unblock relative to"]
#[doc = " the time at which vTaskDelay() is called. For example, specifying a block"]
#[doc = " period of 100 ticks will cause the task to unblock 100 ticks after"]
#[doc = " vTaskDelay() is called. vTaskDelay() does not therefore provide a good method"]
#[doc = " of controlling the frequency of a periodic task as the path taken through the"]
#[doc = " code, as well as other task and interrupt activity, will effect the frequency"]
#[doc = " at which vTaskDelay() gets called and therefore the time at which the task"]
#[doc = " next executes. See vTaskDelayUntil() for an alternative API function designed"]
#[doc = " to facilitate fixed frequency execution. It does this by specifying an"]
#[doc = " absolute time (rather than a relative time) at which the calling task should"]
#[doc = " unblock."]
#[doc = ""]
#[doc = " @param xTicksToDelay The amount of time, in tick periods, that"]
#[doc = " the calling task should block."]
#[doc = ""]
#[doc = " Example usage:"]
#[doc = " @code{c}"]
#[doc = " void vTaskFunction( void * pvParameters )"]
#[doc = " {"]
#[doc = " // Block for 500ms."]
#[doc = " const TickType_t xDelay = 500 / portTICK_PERIOD_MS;"]
#[doc = ""]
#[doc = " \t for( ;; )"]
#[doc = " \t {"]
#[doc = " \t\t // Simply toggle the LED every 500ms, blocking between each toggle."]
#[doc = " \t\t vToggleLED();"]
#[doc = " \t\t vTaskDelay( xDelay );"]
#[doc = " \t }"]
#[doc = " }"]
#[doc = " @endcode"]
#[doc = " \\ingroup TaskCtrl"]
pub fn vTaskDelay(xTicksToDelay: TickType_t);
}
extern "C" {
#[doc = " Delay a task until a specified time."]
#[doc = ""]
#[doc = " INCLUDE_vTaskDelayUntil must be defined as 1 for this function to be available."]
#[doc = " See the configuration section for more information."]
#[doc = ""]
#[doc = " This function can be used by periodic tasks to ensure a constant execution frequency."]
#[doc = ""]
#[doc = " This function differs from vTaskDelay () in one important aspect: vTaskDelay () will"]
#[doc = " cause a task to block for the specified number of ticks from the time vTaskDelay () is"]
#[doc = " called. It is therefore difficult to use vTaskDelay () by itself to generate a fixed"]
#[doc = " execution frequency as the time between a task starting to execute and that task"]
#[doc = " calling vTaskDelay () may not be fixed [the task may take a different path though the"]
#[doc = " code between calls, or may get interrupted or preempted a different number of times"]
#[doc = " each time it executes]."]
#[doc = ""]
#[doc = " Whereas vTaskDelay () specifies a wake time relative to the time at which the function"]
#[doc = " is called, vTaskDelayUntil () specifies the absolute (exact) time at which it wishes to"]
#[doc = " unblock."]
#[doc = ""]
#[doc = " The constant portTICK_PERIOD_MS can be used to calculate real time from the tick"]
#[doc = " rate - with the resolution of one tick period."]
#[doc = ""]
#[doc = " @param pxPreviousWakeTime Pointer to a variable that holds the time at which the"]
#[doc = " task was last unblocked. The variable must be initialised with the current time"]
#[doc = " prior to its first use (see the example below). Following this the variable is"]
#[doc = " automatically updated within vTaskDelayUntil ()."]
#[doc = ""]
#[doc = " @param xTimeIncrement The cycle time period. The task will be unblocked at"]
#[doc = " time *pxPreviousWakeTime + xTimeIncrement. Calling vTaskDelayUntil with the"]
#[doc = " same xTimeIncrement parameter value will cause the task to execute with"]
#[doc = " a fixed interface period."]
#[doc = ""]
#[doc = " Example usage:"]
#[doc = " @code{c}"]
#[doc = " // Perform an action every 10 ticks."]
#[doc = " void vTaskFunction( void * pvParameters )"]
#[doc = " {"]
#[doc = " TickType_t xLastWakeTime;"]
#[doc = " const TickType_t xFrequency = 10;"]
#[doc = ""]
#[doc = " \t // Initialise the xLastWakeTime variable with the current time."]
#[doc = " \t xLastWakeTime = xTaskGetTickCount ();"]
#[doc = " \t for( ;; )"]
#[doc = " \t {"]
#[doc = " \t\t // Wait for the next cycle."]
#[doc = " \t\t vTaskDelayUntil( &xLastWakeTime, xFrequency );"]
#[doc = ""]
#[doc = " \t\t // Perform action here."]
#[doc = " \t }"]
#[doc = " }"]
#[doc = " @endcode"]
#[doc = " \\ingroup TaskCtrl"]
pub fn vTaskDelayUntil(pxPreviousWakeTime: *mut TickType_t, xTimeIncrement: TickType_t);
}
extern "C" {
#[doc = " Obtain the priority of any task."]
#[doc = ""]
#[doc = " INCLUDE_uxTaskPriorityGet must be defined as 1 for this function to be available."]
#[doc = " See the configuration section for more information."]
#[doc = ""]
#[doc = " @param xTask Handle of the task to be queried. Passing a NULL"]
#[doc = " handle results in the priority of the calling task being returned."]
#[doc = ""]
#[doc = " @return The priority of xTask."]
#[doc = ""]
#[doc = " Example usage:"]
#[doc = " @code{c}"]
#[doc = " void vAFunction( void )"]
#[doc = " {"]
#[doc = " TaskHandle_t xHandle;"]
#[doc = ""]
#[doc = " // Create a task, storing the handle."]
#[doc = " xTaskCreate( vTaskCode, \"NAME\", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );"]
#[doc = ""]
#[doc = " // ..."]
#[doc = ""]
#[doc = " // Use the handle to obtain the priority of the created task."]
#[doc = " // It was created with tskIDLE_PRIORITY, but may have changed"]
#[doc = " // it itself."]
#[doc = " if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY )"]
#[doc = " {"]
#[doc = " // The task has changed it's priority."]
#[doc = " }"]
#[doc = ""]
#[doc = " // ..."]
#[doc = ""]
#[doc = " // Is our priority higher than the created task?"]
#[doc = " if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) )"]
#[doc = " {"]
#[doc = " // Our priority (obtained using NULL handle) is higher."]
#[doc = " }"]
#[doc = " }"]
#[doc = " @endcode"]
#[doc = " \\ingroup TaskCtrl"]
pub fn uxTaskPriorityGet(xTask: TaskHandle_t) -> UBaseType_t;
}
extern "C" {
#[doc = " A version of uxTaskPriorityGet() that can be used from an ISR."]
#[doc = ""]
#[doc = " @param xTask Handle of the task to be queried. Passing a NULL"]
#[doc = " handle results in the priority of the calling task being returned."]
#[doc = ""]
#[doc = " @return The priority of xTask."]
#[doc = ""]
pub fn uxTaskPriorityGetFromISR(xTask: TaskHandle_t) -> UBaseType_t;
}
extern "C" {
#[doc = " Obtain the state of any task."]
#[doc = ""]
#[doc = " States are encoded by the eTaskState enumerated type."]
#[doc = ""]
#[doc = " INCLUDE_eTaskGetState must be defined as 1 for this function to be available."]
#[doc = " See the configuration section for more information."]
#[doc = ""]
#[doc = " @param xTask Handle of the task to be queried."]
#[doc = ""]
#[doc = " @return The state of xTask at the time the function was called. Note the"]
#[doc = " state of the task might change between the function being called, and the"]
#[doc = " functions return value being tested by the calling task."]
pub fn eTaskGetState(xTask: TaskHandle_t) -> eTaskState;
}
extern "C" {
#[doc = " Set the priority of any task."]
#[doc = ""]
#[doc = " INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available."]
#[doc = " See the configuration section for more information."]
#[doc = ""]
#[doc = " A context switch will occur before the function returns if the priority"]
#[doc = " being set is higher than the currently executing task."]
#[doc = ""]
#[doc = " @param xTask Handle to the task for which the priority is being set."]
#[doc = " Passing a NULL handle results in the priority of the calling task being set."]
#[doc = ""]
#[doc = " @param uxNewPriority The priority to which the task will be set."]
#[doc = ""]
#[doc = " Example usage:"]
#[doc = " @code{c}"]
#[doc = " void vAFunction( void )"]
#[doc = " {"]
#[doc = " TaskHandle_t xHandle;"]
#[doc = ""]
#[doc = " // Create a task, storing the handle."]
#[doc = " xTaskCreate( vTaskCode, \"NAME\", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );"]
#[doc = ""]
#[doc = " // ..."]
#[doc = ""]
#[doc = " // Use the handle to raise the priority of the created task."]
#[doc = " vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 );"]
#[doc = ""]
#[doc = " // ..."]
#[doc = ""]
#[doc = " // Use a NULL handle to raise our priority to the same value."]
#[doc = " vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 );"]
#[doc = " }"]
#[doc = " @endcode"]
#[doc = " \\ingroup TaskCtrl"]
pub fn vTaskPrioritySet(xTask: TaskHandle_t, uxNewPriority: UBaseType_t);
}
extern "C" {
#[doc = " Suspend a task."]
#[doc = ""]
#[doc = " INCLUDE_vTaskSuspend must be defined as 1 for this function to be available."]
#[doc = " See the configuration section for more information."]
#[doc = ""]
#[doc = " When suspended, a task will never get any microcontroller processing time,"]
#[doc = " no matter what its priority."]
#[doc = ""]
#[doc = " Calls to vTaskSuspend are not accumulative -"]
#[doc = " i.e. calling vTaskSuspend () twice on the same task still only requires one"]
#[doc = " call to vTaskResume () to ready the suspended task."]
#[doc = ""]
#[doc = " @param xTaskToSuspend Handle to the task being suspended. Passing a NULL"]
#[doc = " handle will cause the calling task to be suspended."]
#[doc = ""]
#[doc = " Example usage:"]
#[doc = " @code{c}"]
#[doc = " void vAFunction( void )"]
#[doc = " {"]
#[doc = " TaskHandle_t xHandle;"]
#[doc = ""]
#[doc = " // Create a task, storing the handle."]
#[doc = " xTaskCreate( vTaskCode, \"NAME\", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );"]
#[doc = ""]
#[doc = " // ..."]
#[doc = ""]
#[doc = " // Use the handle to suspend the created task."]
#[doc = " vTaskSuspend( xHandle );"]
#[doc = ""]
#[doc = " // ..."]
#[doc = ""]
#[doc = " // The created task will not run during this period, unless"]
#[doc = " // another task calls vTaskResume( xHandle )."]
#[doc = ""]
#[doc = " //..."]
#[doc = ""]
#[doc = ""]
#[doc = " // Suspend ourselves."]
#[doc = " vTaskSuspend( NULL );"]
#[doc = ""]
#[doc = " // We cannot get here unless another task calls vTaskResume"]
#[doc = " // with our handle as the parameter."]
#[doc = " }"]
#[doc = " @endcode"]
#[doc = " \\ingroup TaskCtrl"]
pub fn vTaskSuspend(xTaskToSuspend: TaskHandle_t);
}
extern "C" {
#[doc = " Resumes a suspended task."]
#[doc = ""]
#[doc = " INCLUDE_vTaskSuspend must be defined as 1 for this function to be available."]
#[doc = " See the configuration section for more information."]
#[doc = ""]
#[doc = " A task that has been suspended by one or more calls to vTaskSuspend ()"]
#[doc = " will be made available for running again by a single call to"]
#[doc = " vTaskResume ()."]
#[doc = ""]
#[doc = " @param xTaskToResume Handle to the task being readied."]
#[doc = ""]
#[doc = " Example usage:"]
#[doc = " @code{c}"]
#[doc = " void vAFunction( void )"]
#[doc = " {"]
#[doc = " TaskHandle_t xHandle;"]
#[doc = ""]
#[doc = " // Create a task, storing the handle."]
#[doc = " xTaskCreate( vTaskCode, \"NAME\", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );"]
#[doc = ""]
#[doc = " // ..."]
#[doc = ""]
#[doc = " // Use the handle to suspend the created task."]
#[doc = " vTaskSuspend( xHandle );"]
#[doc = ""]
#[doc = " // ..."]
#[doc = ""]
#[doc = " // The created task will not run during this period, unless"]
#[doc = " // another task calls vTaskResume( xHandle )."]
#[doc = ""]
#[doc = " //..."]
#[doc = ""]
#[doc = ""]
#[doc = " // Resume the suspended task ourselves."]
#[doc = " vTaskResume( xHandle );"]
#[doc = ""]
#[doc = " // The created task will once again get microcontroller processing"]
#[doc = " // time in accordance with its priority within the system."]
#[doc = " }"]
#[doc = " @endcode"]
#[doc = " \\ingroup TaskCtrl"]
pub fn vTaskResume(xTaskToResume: TaskHandle_t);
}
extern "C" {
#[doc = " An implementation of vTaskResume() that can be called from within an ISR."]
#[doc = ""]
#[doc = " INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be"]
#[doc = " available. See the configuration section for more information."]
#[doc = ""]
#[doc = " A task that has been suspended by one or more calls to vTaskSuspend ()"]
#[doc = " will be made available for running again by a single call to"]
#[doc = " xTaskResumeFromISR ()."]
#[doc = ""]
#[doc = " xTaskResumeFromISR() should not be used to synchronise a task with an"]
#[doc = " interrupt if there is a chance that the interrupt could arrive prior to the"]
#[doc = " task being suspended - as this can lead to interrupts being missed. Use of a"]
#[doc = " semaphore as a synchronisation mechanism would avoid this eventuality."]
#[doc = ""]
#[doc = " @param xTaskToResume Handle to the task being readied."]
#[doc = ""]
#[doc = " @return pdTRUE if resuming the task should result in a context switch,"]
#[doc = " otherwise pdFALSE. This is used by the ISR to determine if a context switch"]
#[doc = " may be required following the ISR."]
#[doc = ""]
#[doc = " \\ingroup TaskCtrl"]
pub fn xTaskResumeFromISR(xTaskToResume: TaskHandle_t) -> BaseType_t;
}
extern "C" {
#[doc = " @cond */"]
#[doc = " Starts the real time kernel tick processing."]
#[doc = ""]
#[doc = " After calling the kernel has control over which tasks are executed and when."]
#[doc = ""]
#[doc = " See the demo application file main.c for an example of creating"]
#[doc = " tasks and starting the kernel."]
#[doc = ""]
#[doc = " Example usage:"]
#[doc = " @code{c}"]
#[doc = " void vAFunction( void )"]
#[doc = " {"]
#[doc = " // Create at least one task before starting the kernel."]
#[doc = " xTaskCreate( vTaskCode, \"NAME\", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );"]
#[doc = ""]
#[doc = " // Start the real time kernel with preemption."]
#[doc = " vTaskStartScheduler ();"]
#[doc = ""]
#[doc = " // Will not get here unless a task calls vTaskEndScheduler ()"]
#[doc = " }"]
#[doc = " @endcode"]
#[doc = ""]
#[doc = " \\ingroup SchedulerControl"]
pub fn vTaskStartScheduler();
}
extern "C" {
#[doc = " Stops the real time kernel tick."]
#[doc = ""]
#[doc = " @note At the time of writing only the x86 real mode port, which runs on a PC"]
#[doc = " in place of DOS, implements this function."]
#[doc = ""]
#[doc = " All created tasks will be automatically deleted and multitasking"]
#[doc = " (either preemptive or cooperative) will stop."]
#[doc = " Execution then resumes from the point where vTaskStartScheduler ()"]
#[doc = " was called, as if vTaskStartScheduler () had just returned."]
#[doc = ""]
#[doc = " See the demo application file main. c in the demo/PC directory for an"]
#[doc = " example that uses vTaskEndScheduler ()."]
#[doc = ""]
#[doc = " vTaskEndScheduler () requires an exit function to be defined within the"]
#[doc = " portable layer (see vPortEndScheduler () in port. c for the PC port). This"]
#[doc = " performs hardware specific operations such as stopping the kernel tick."]
#[doc = ""]
#[doc = " vTaskEndScheduler () will cause all of the resources allocated by the"]
#[doc = " kernel to be freed - but will not free resources allocated by application"]
#[doc = " tasks."]
#[doc = ""]
#[doc = " Example usage:"]
#[doc = " @code{c}"]
#[doc = " void vTaskCode( void * pvParameters )"]
#[doc = " {"]
#[doc = " for( ;; )"]
#[doc = " {"]
#[doc = " // Task code goes here."]
#[doc = ""]
#[doc = " // At some point we want to end the real time kernel processing"]
#[doc = " // so call ..."]
#[doc = " vTaskEndScheduler ();"]
#[doc = " }"]
#[doc = " }"]
#[doc = ""]
#[doc = " void vAFunction( void )"]
#[doc = " {"]
#[doc = " // Create at least one task before starting the kernel."]
#[doc = " xTaskCreate( vTaskCode, \"NAME\", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );"]
#[doc = ""]
#[doc = " // Start the real time kernel with preemption."]
#[doc = " vTaskStartScheduler ();"]
#[doc = ""]
#[doc = " // Will only get here when the vTaskCode () task has called"]
#[doc = " // vTaskEndScheduler (). When we get here we are back to single task"]
#[doc = " // execution."]
#[doc = " }"]
#[doc = " @endcode"]
#[doc = " \\ingroup SchedulerControl"]
pub fn vTaskEndScheduler();
}
extern "C" {
#[doc = " Suspends the scheduler without disabling interrupts."]
#[doc = ""]
#[doc = " Context switches will not occur while the scheduler is suspended."]
#[doc = ""]
#[doc = " After calling vTaskSuspendAll () the calling task will continue to execute"]
#[doc = " without risk of being swapped out until a call to xTaskResumeAll () has been"]
#[doc = " made."]
#[doc = ""]
#[doc = " API functions that have the potential to cause a context switch (for example,"]
#[doc = " vTaskDelayUntil(), xQueueSend(), etc.) must not be called while the scheduler"]
#[doc = " is suspended."]
#[doc = ""]
#[doc = " Example usage:"]
#[doc = " @code{c}"]
#[doc = " void vTask1( void * pvParameters )"]
#[doc = " {"]
#[doc = " for( ;; )"]
#[doc = " {"]
#[doc = " // Task code goes here."]
#[doc = ""]
#[doc = " // ..."]
#[doc = ""]
#[doc = " // At some point the task wants to perform a long operation during"]
#[doc = " // which it does not want to get swapped out. It cannot use"]
#[doc = " // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the"]
#[doc = " // operation may cause interrupts to be missed - including the"]
#[doc = " // ticks."]
#[doc = ""]
#[doc = " // Prevent the real time kernel swapping out the task."]
#[doc = " vTaskSuspendAll ();"]
#[doc = ""]
#[doc = " // Perform the operation here. There is no need to use critical"]
#[doc = " // sections as we have all the microcontroller processing time."]
#[doc = " // During this time interrupts will still operate and the kernel"]
#[doc = " // tick count will be maintained."]
#[doc = ""]
#[doc = " // ..."]
#[doc = ""]
#[doc = " // The operation is complete. Restart the kernel."]
#[doc = " xTaskResumeAll ();"]
#[doc = " }"]
#[doc = " }"]
#[doc = " @endcode"]
#[doc = " \\ingroup SchedulerControl"]
pub fn vTaskSuspendAll();
}
extern "C" {
#[doc = " Resumes scheduler activity after it was suspended by a call to"]
#[doc = " vTaskSuspendAll()."]
#[doc = ""]
#[doc = " xTaskResumeAll() only resumes the scheduler. It does not unsuspend tasks"]
#[doc = " that were previously suspended by a call to vTaskSuspend()."]
#[doc = ""]
#[doc = " @return If resuming the scheduler caused a context switch then pdTRUE is"]
#[doc = "\t\t returned, otherwise pdFALSE is returned."]
#[doc = ""]
#[doc = " Example usage:"]
#[doc = " @code{c}"]
#[doc = " void vTask1( void * pvParameters )"]
#[doc = " {"]
#[doc = " for( ;; )"]
#[doc = " {"]
#[doc = " // Task code goes here."]
#[doc = ""]
#[doc = " // ..."]
#[doc = ""]
#[doc = " // At some point the task wants to perform a long operation during"]
#[doc = " // which it does not want to get swapped out. It cannot use"]
#[doc = " // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the"]
#[doc = " // operation may cause interrupts to be missed - including the"]
#[doc = " // ticks."]
#[doc = ""]
#[doc = " // Prevent the real time kernel swapping out the task."]
#[doc = " vTaskSuspendAll ();"]
#[doc = ""]
#[doc = " // Perform the operation here. There is no need to use critical"]
#[doc = " // sections as we have all the microcontroller processing time."]
#[doc = " // During this time interrupts will still operate and the real"]
#[doc = " // time kernel tick count will be maintained."]
#[doc = ""]
#[doc = " // ..."]
#[doc = ""]
#[doc = " // The operation is complete. Restart the kernel. We want to force"]
#[doc = " // a context switch - but there is no point if resuming the scheduler"]
#[doc = " // caused a context switch already."]
#[doc = " if( !xTaskResumeAll () )"]
#[doc = " {"]
#[doc = " taskYIELD ();"]
#[doc = " }"]
#[doc = " }"]
#[doc = " }"]
#[doc = " @endcode"]
#[doc = " \\ingroup SchedulerControl"]
pub fn xTaskResumeAll() -> BaseType_t;
}
extern "C" {
#[doc = " Get tick count"]
#[doc = ""]
#[doc = " @return The count of ticks since vTaskStartScheduler was called."]
#[doc = ""]
#[doc = " \\ingroup TaskUtils"]
pub fn xTaskGetTickCount() -> TickType_t;
}
extern "C" {
#[doc = " Get tick count from ISR"]
#[doc = ""]
#[doc = " @return The count of ticks since vTaskStartScheduler was called."]
#[doc = ""]
#[doc = " This is a version of xTaskGetTickCount() that is safe to be called from an"]
#[doc = " ISR - provided that TickType_t is the natural word size of the"]
#[doc = " microcontroller being used or interrupt nesting is either not supported or"]
#[doc = " not being used."]
#[doc = ""]
#[doc = " \\ingroup TaskUtils"]
pub fn xTaskGetTickCountFromISR() -> TickType_t;
}
extern "C" {
#[doc = " Get current number of tasks"]
#[doc = ""]
#[doc = " @return The number of tasks that the real time kernel is currently managing."]
#[doc = " This includes all ready, blocked and suspended tasks. A task that"]
#[doc = " has been deleted but not yet freed by the idle task will also be"]
#[doc = " included in the count."]
#[doc = ""]
#[doc = " \\ingroup TaskUtils"]
pub fn uxTaskGetNumberOfTasks() -> UBaseType_t;
}
extern "C" {
#[doc = " Get task name"]
#[doc = ""]
#[doc = " @return The text (human readable) name of the task referenced by the handle"]
#[doc = " xTaskToQuery. A task can query its own name by either passing in its own"]
#[doc = " handle, or by setting xTaskToQuery to NULL. INCLUDE_pcTaskGetTaskName must be"]
#[doc = " set to 1 in FreeRTOSConfig.h for pcTaskGetTaskName() to be available."]
#[doc = ""]
#[doc = " \\ingroup TaskUtils"]
pub fn pcTaskGetTaskName(xTaskToQuery: TaskHandle_t) -> *mut libc::c_char;
}
extern "C" {
#[doc = " Returns the high water mark of the stack associated with xTask."]
#[doc = ""]
#[doc = " INCLUDE_uxTaskGetStackHighWaterMark must be set to 1 in FreeRTOSConfig.h for"]
#[doc = " this function to be available."]
#[doc = ""]
#[doc = " High water mark is the minimum free stack space there has been (in bytes"]
#[doc = " rather than words as found in vanilla FreeRTOS) since the task started."]
#[doc = " The smaller the returned number the closer the task has come to overflowing its stack."]
#[doc = ""]
#[doc = " @param xTask Handle of the task associated with the stack to be checked."]
#[doc = " Set xTask to NULL to check the stack of the calling task."]
#[doc = ""]
#[doc = " @return The smallest amount of free stack space there has been (in bytes"]
#[doc = " rather than words as found in vanilla FreeRTOS) since the task referenced by"]
#[doc = " xTask was created."]
pub fn uxTaskGetStackHighWaterMark(xTask: TaskHandle_t) -> UBaseType_t;
}
extern "C" {
#[doc = " Returns the start of the stack associated with xTask."]
#[doc = ""]
#[doc = " INCLUDE_pxTaskGetStackStart must be set to 1 in FreeRTOSConfig.h for"]
#[doc = " this function to be available."]
#[doc = ""]
#[doc = " Returns the highest stack memory address on architectures where the stack grows down"]
#[doc = " from high memory, and the lowest memory address on architectures where the"]
#[doc = " stack grows up from low memory."]
#[doc = ""]
#[doc = " @param xTask Handle of the task associated with the stack returned."]
#[doc = " Set xTask to NULL to return the stack of the calling task."]
#[doc = ""]
#[doc = " @return A pointer to the start of the stack."]
pub fn pxTaskGetStackStart(xTask: TaskHandle_t) -> *mut u8;
}
extern "C" {
#[doc = " Set local storage pointer specific to the given task."]
#[doc = ""]
#[doc = " Each task contains an array of pointers that is dimensioned by the"]
#[doc = " configNUM_THREAD_LOCAL_STORAGE_POINTERS setting in FreeRTOSConfig.h."]
#[doc = " The kernel does not use the pointers itself, so the application writer"]
#[doc = " can use the pointers for any purpose they wish."]
#[doc = ""]
#[doc = " @param xTaskToSet Task to set thread local storage pointer for"]
#[doc = " @param xIndex The index of the pointer to set, from 0 to"]
#[doc = " configNUM_THREAD_LOCAL_STORAGE_POINTERS - 1."]
#[doc = " @param pvValue Pointer value to set."]
pub fn vTaskSetThreadLocalStoragePointer(
xTaskToSet: TaskHandle_t,
xIndex: BaseType_t,
pvValue: *mut libc::c_void,
);
}
extern "C" {
#[doc = " Get local storage pointer specific to the given task."]
#[doc = ""]
#[doc = " Each task contains an array of pointers that is dimensioned by the"]
#[doc = " configNUM_THREAD_LOCAL_STORAGE_POINTERS setting in FreeRTOSConfig.h."]
#[doc = " The kernel does not use the pointers itself, so the application writer"]
#[doc = " can use the pointers for any purpose they wish."]
#[doc = ""]
#[doc = " @param xTaskToQuery Task to get thread local storage pointer for"]
#[doc = " @param xIndex The index of the pointer to get, from 0 to"]
#[doc = " configNUM_THREAD_LOCAL_STORAGE_POINTERS - 1."]
#[doc = " @return Pointer value"]
pub fn pvTaskGetThreadLocalStoragePointer(
xTaskToQuery: TaskHandle_t,
xIndex: BaseType_t,
) -> *mut libc::c_void;
}
#[doc = " Prototype of local storage pointer deletion callback."]
pub type TlsDeleteCallbackFunction_t =
::core::option::Option<unsafe extern "C" fn(arg1: libc::c_int, arg2: *mut libc::c_void)>;
extern "C" {
#[doc = " Set local storage pointer and deletion callback."]
#[doc = ""]
#[doc = " Each task contains an array of pointers that is dimensioned by the"]
#[doc = " configNUM_THREAD_LOCAL_STORAGE_POINTERS setting in FreeRTOSConfig.h."]
#[doc = " The kernel does not use the pointers itself, so the application writer"]
#[doc = " can use the pointers for any purpose they wish."]
#[doc = ""]
#[doc = " Local storage pointers set for a task can reference dynamically"]
#[doc = " allocated resources. This function is similar to"]
#[doc = " vTaskSetThreadLocalStoragePointer, but provides a way to release"]
#[doc = " these resources when the task gets deleted. For each pointer,"]
#[doc = " a callback function can be set. This function will be called"]
#[doc = " when task is deleted, with the local storage pointer index"]
#[doc = " and value as arguments."]
#[doc = ""]
#[doc = " @param xTaskToSet Task to set thread local storage pointer for"]
#[doc = " @param xIndex The index of the pointer to set, from 0 to"]
#[doc = " configNUM_THREAD_LOCAL_STORAGE_POINTERS - 1."]
#[doc = " @param pvValue Pointer value to set."]
#[doc = " @param pvDelCallback Function to call to dispose of the local"]
#[doc = " storage pointer when the task is deleted."]
pub fn vTaskSetThreadLocalStoragePointerAndDelCallback(
xTaskToSet: TaskHandle_t,
xIndex: BaseType_t,
pvValue: *mut libc::c_void,
pvDelCallback: TlsDeleteCallbackFunction_t,
);
}
extern "C" {
#[doc = " Calls the hook function associated with xTask. Passing xTask as NULL has"]
#[doc = " the effect of calling the Running tasks (the calling task) hook function."]
#[doc = ""]
#[doc = " @param xTask Handle of the task to call the hook for."]
#[doc = " @param pvParameter Parameter passed to the hook function for the task to interpret as it"]
#[doc = " wants. The return value is the value returned by the task hook function"]
#[doc = " registered by the user."]
pub fn xTaskCallApplicationTaskHook(
xTask: TaskHandle_t,
pvParameter: *mut libc::c_void,
) -> BaseType_t;
}
extern "C" {
#[doc = " Get the handle of idle task for the current CPU."]
#[doc = ""]
#[doc = " xTaskGetIdleTaskHandle() is only available if"]
#[doc = " INCLUDE_xTaskGetIdleTaskHandle is set to 1 in FreeRTOSConfig.h."]
#[doc = ""]
#[doc = " @return The handle of the idle task. It is not valid to call"]
#[doc = " xTaskGetIdleTaskHandle() before the scheduler has been started."]
pub fn xTaskGetIdleTaskHandle() -> TaskHandle_t;
}
extern "C" {
#[doc = " Get the handle of idle task for the given CPU."]
#[doc = ""]
#[doc = " xTaskGetIdleTaskHandleForCPU() is only available if"]
#[doc = " INCLUDE_xTaskGetIdleTaskHandle is set to 1 in FreeRTOSConfig.h."]
#[doc = ""]
#[doc = " @param cpuid The CPU to get the handle for"]
#[doc = ""]
#[doc = " @return Idle task handle of a given cpu. It is not valid to call"]
#[doc = " xTaskGetIdleTaskHandleForCPU() before the scheduler has been started."]
pub fn xTaskGetIdleTaskHandleForCPU(cpuid: UBaseType_t) -> TaskHandle_t;
}
extern "C" {
#[doc = " Get the state of tasks in the system."]
#[doc = ""]
#[doc = " configUSE_TRACE_FACILITY must be defined as 1 in FreeRTOSConfig.h for"]
#[doc = " uxTaskGetSystemState() to be available."]
#[doc = ""]
#[doc = " uxTaskGetSystemState() populates an TaskStatus_t structure for each task in"]
#[doc = " the system. TaskStatus_t structures contain, among other things, members"]
#[doc = " for the task handle, task name, task priority, task state, and total amount"]
#[doc = " of run time consumed by the task. See the TaskStatus_t structure"]
#[doc = " definition in this file for the full member list."]
#[doc = ""]
#[doc = " @note This function is intended for debugging use only as its use results in"]
#[doc = " the scheduler remaining suspended for an extended period."]
#[doc = ""]
#[doc = " @param pxTaskStatusArray A pointer to an array of TaskStatus_t structures."]
#[doc = " The array must contain at least one TaskStatus_t structure for each task"]
#[doc = " that is under the control of the RTOS. The number of tasks under the control"]
#[doc = " of the RTOS can be determined using the uxTaskGetNumberOfTasks() API function."]
#[doc = ""]
#[doc = " @param uxArraySize The size of the array pointed to by the pxTaskStatusArray"]
#[doc = " parameter. The size is specified as the number of indexes in the array, or"]
#[doc = " the number of TaskStatus_t structures contained in the array, not by the"]
#[doc = " number of bytes in the array."]
#[doc = ""]
#[doc = " @param pulTotalRunTime If configGENERATE_RUN_TIME_STATS is set to 1 in"]
#[doc = " FreeRTOSConfig.h then *pulTotalRunTime is set by uxTaskGetSystemState() to the"]
#[doc = " total run time (as defined by the run time stats clock, see"]
#[doc = " http://www.freertos.org/rtos-run-time-stats.html) since the target booted."]
#[doc = " pulTotalRunTime can be set to NULL to omit the total run time information."]
#[doc = ""]
#[doc = " @return The number of TaskStatus_t structures that were populated by"]
#[doc = " uxTaskGetSystemState(). This should equal the number returned by the"]
#[doc = " uxTaskGetNumberOfTasks() API function, but will be zero if the value passed"]
#[doc = " in the uxArraySize parameter was too small."]
#[doc = ""]
#[doc = " Example usage:"]
#[doc = " @code{c}"]
#[doc = " // This example demonstrates how a human readable table of run time stats"]
#[doc = " // information is generated from raw data provided by uxTaskGetSystemState()."]
#[doc = " // The human readable table is written to pcWriteBuffer"]
#[doc = " void vTaskGetRunTimeStats( char *pcWriteBuffer )"]
#[doc = " {"]
#[doc = " TaskStatus_t *pxTaskStatusArray;"]
#[doc = " volatile UBaseType_t uxArraySize, x;"]
#[doc = " uint32_t ulTotalRunTime, ulStatsAsPercentage;"]
#[doc = ""]
#[doc = " // Make sure the write buffer does not contain a string."]
#[doc = " *pcWriteBuffer = 0x00;"]
#[doc = ""]
#[doc = " // Take a snapshot of the number of tasks in case it changes while this"]
#[doc = " // function is executing."]
#[doc = " uxArraySize = uxTaskGetNumberOfTasks();"]
#[doc = ""]
#[doc = " // Allocate a TaskStatus_t structure for each task. An array could be"]
#[doc = " // allocated statically at compile time."]
#[doc = " pxTaskStatusArray = pvPortMalloc( uxArraySize * sizeof( TaskStatus_t ) );"]
#[doc = ""]
#[doc = " if( pxTaskStatusArray != NULL )"]
#[doc = " {"]
#[doc = " // Generate raw status information about each task."]
#[doc = " uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalRunTime );"]
#[doc = ""]
#[doc = " // For percentage calculations."]
#[doc = " ulTotalRunTime /= 100UL;"]
#[doc = ""]
#[doc = " // Avoid divide by zero errors."]
#[doc = " if( ulTotalRunTime > 0 )"]
#[doc = " {"]
#[doc = " // For each populated position in the pxTaskStatusArray array,"]
#[doc = " // format the raw data as human readable ASCII data"]
#[doc = " for( x = 0; x < uxArraySize; x++ )"]
#[doc = " {"]
#[doc = " // What percentage of the total run time has the task used?"]
#[doc = " // This will always be rounded down to the nearest integer."]
#[doc = " // ulTotalRunTimeDiv100 has already been divided by 100."]
#[doc = " ulStatsAsPercentage = pxTaskStatusArray[ x ].ulRunTimeCounter / ulTotalRunTime;"]
#[doc = ""]
#[doc = " if( ulStatsAsPercentage > 0UL )"]
#[doc = " {"]
#[doc = " sprintf( pcWriteBuffer, \"%s\\t\\t%lu\\t\\t%lu%%\\r\\n\", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter, ulStatsAsPercentage );"]
#[doc = " }"]
#[doc = " else"]
#[doc = " {"]
#[doc = " // If the percentage is zero here then the task has"]
#[doc = " // consumed less than 1% of the total run time."]
#[doc = " sprintf( pcWriteBuffer, \"%s\\t\\t%lu\\t\\t<1%%\\r\\n\", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter );"]
#[doc = " }"]
#[doc = ""]
#[doc = " pcWriteBuffer += strlen( ( char * ) pcWriteBuffer );"]
#[doc = " }"]
#[doc = " }"]
#[doc = ""]
#[doc = " // The array is no longer needed, free the memory it consumes."]
#[doc = " vPortFree( pxTaskStatusArray );"]
#[doc = " }"]
#[doc = " }"]
#[doc = " @endcode"]
pub fn uxTaskGetSystemState(
pxTaskStatusArray: *mut TaskStatus_t,
uxArraySize: UBaseType_t,
pulTotalRunTime: *mut u32,
) -> UBaseType_t;
}
extern "C" {
#[doc = " List all the current tasks."]
#[doc = ""]
#[doc = " configUSE_TRACE_FACILITY and configUSE_STATS_FORMATTING_FUNCTIONS must"]
#[doc = " both be defined as 1 for this function to be available. See the"]
#[doc = " configuration section of the FreeRTOS.org website for more information."]
#[doc = ""]
#[doc = " @note This function will disable interrupts for its duration. It is"]
#[doc = " not intended for normal application runtime use but as a debug aid."]
#[doc = ""]
#[doc = " Lists all the current tasks, along with their current state and stack"]
#[doc = " usage high water mark."]
#[doc = ""]
#[doc = " Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or"]
#[doc = " suspended ('S')."]
#[doc = ""]
#[doc = " @note This function is provided for convenience only, and is used by many of the"]
#[doc = " demo applications. Do not consider it to be part of the scheduler."]
#[doc = ""]
#[doc = " vTaskList() calls uxTaskGetSystemState(), then formats part of the"]
#[doc = " uxTaskGetSystemState() output into a human readable table that displays task"]
#[doc = " names, states and stack usage."]
#[doc = ""]
#[doc = " vTaskList() has a dependency on the sprintf() C library function that might"]
#[doc = " bloat the code size, use a lot of stack, and provide different results on"]
#[doc = " different platforms. An alternative, tiny, third party, and limited"]
#[doc = " functionality implementation of sprintf() is provided in many of the"]
#[doc = " FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note"]
#[doc = " printf-stdarg.c does not provide a full snprintf() implementation!)."]
#[doc = ""]
#[doc = " It is recommended that production systems call uxTaskGetSystemState()"]
#[doc = " directly to get access to raw stats data, rather than indirectly through a"]
#[doc = " call to vTaskList()."]
#[doc = ""]
#[doc = " @param pcWriteBuffer A buffer into which the above mentioned details"]
#[doc = " will be written, in ASCII form. This buffer is assumed to be large"]
#[doc = " enough to contain the generated report. Approximately 40 bytes per"]
#[doc = " task should be sufficient."]
#[doc = ""]
#[doc = " \\ingroup TaskUtils"]
pub fn vTaskList(pcWriteBuffer: *mut libc::c_char);
}
extern "C" {
#[doc = " Get the state of running tasks as a string"]
#[doc = ""]
#[doc = " configGENERATE_RUN_TIME_STATS and configUSE_STATS_FORMATTING_FUNCTIONS"]
#[doc = " must both be defined as 1 for this function to be available. The application"]
#[doc = " must also then provide definitions for"]
#[doc = " portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and portGET_RUN_TIME_COUNTER_VALUE()"]
#[doc = " to configure a peripheral timer/counter and return the timers current count"]
#[doc = " value respectively. The counter should be at least 10 times the frequency of"]
#[doc = " the tick count."]
#[doc = ""]
#[doc = " @note This function will disable interrupts for its duration. It is"]
#[doc = " not intended for normal application runtime use but as a debug aid."]
#[doc = ""]
#[doc = " Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total"]
#[doc = " accumulated execution time being stored for each task. The resolution"]
#[doc = " of the accumulated time value depends on the frequency of the timer"]
#[doc = " configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro."]
#[doc = " Calling vTaskGetRunTimeStats() writes the total execution time of each"]
#[doc = " task into a buffer, both as an absolute count value and as a percentage"]
#[doc = " of the total system execution time."]
#[doc = ""]
#[doc = " @note This function is provided for convenience only, and is used by many of the"]
#[doc = " demo applications. Do not consider it to be part of the scheduler."]
#[doc = ""]
#[doc = " vTaskGetRunTimeStats() calls uxTaskGetSystemState(), then formats part of the"]
#[doc = " uxTaskGetSystemState() output into a human readable table that displays the"]
#[doc = " amount of time each task has spent in the Running state in both absolute and"]
#[doc = " percentage terms."]
#[doc = ""]
#[doc = " vTaskGetRunTimeStats() has a dependency on the sprintf() C library function"]
#[doc = " that might bloat the code size, use a lot of stack, and provide different"]
#[doc = " results on different platforms. An alternative, tiny, third party, and"]
#[doc = " limited functionality implementation of sprintf() is provided in many of the"]
#[doc = " FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note"]
#[doc = " printf-stdarg.c does not provide a full snprintf() implementation!)."]
#[doc = ""]
#[doc = " It is recommended that production systems call uxTaskGetSystemState() directly"]
#[doc = " to get access to raw stats data, rather than indirectly through a call to"]
#[doc = " vTaskGetRunTimeStats()."]
#[doc = ""]
#[doc = " @param pcWriteBuffer A buffer into which the execution times will be"]
#[doc = " written, in ASCII form. This buffer is assumed to be large enough to"]
#[doc = " contain the generated report. Approximately 40 bytes per task should"]
#[doc = " be sufficient."]
#[doc = ""]
#[doc = " \\ingroup TaskUtils"]
pub fn vTaskGetRunTimeStats(pcWriteBuffer: *mut libc::c_char);
}
extern "C" {
#[doc = " Send task notification."]
#[doc = ""]
#[doc = " configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this"]
#[doc = " function to be available."]
#[doc = ""]
#[doc = " When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private"]
#[doc = " \"notification value\", which is a 32-bit unsigned integer (uint32_t)."]
#[doc = ""]
#[doc = " Events can be sent to a task using an intermediary object. Examples of such"]
#[doc = " objects are queues, semaphores, mutexes and event groups. Task notifications"]
#[doc = " are a method of sending an event directly to a task without the need for such"]
#[doc = " an intermediary object."]
#[doc = ""]
#[doc = " A notification sent to a task can optionally perform an action, such as"]
#[doc = " update, overwrite or increment the task's notification value. In that way"]
#[doc = " task notifications can be used to send data to a task, or be used as light"]
#[doc = " weight and fast binary or counting semaphores."]
#[doc = ""]
#[doc = " A notification sent to a task will remain pending until it is cleared by the"]
#[doc = " task calling xTaskNotifyWait() or ulTaskNotifyTake(). If the task was"]
#[doc = " already in the Blocked state to wait for a notification when the notification"]
#[doc = " arrives then the task will automatically be removed from the Blocked state"]
#[doc = " (unblocked) and the notification cleared."]
#[doc = ""]
#[doc = " A task can use xTaskNotifyWait() to [optionally] block to wait for a"]
#[doc = " notification to be pending, or ulTaskNotifyTake() to [optionally] block"]
#[doc = " to wait for its notification value to have a non-zero value. The task does"]
#[doc = " not consume any CPU time while it is in the Blocked state."]
#[doc = ""]
#[doc = " See http://www.FreeRTOS.org/RTOS-task-notifications.html for details."]
#[doc = ""]
#[doc = " @param xTaskToNotify The handle of the task being notified. The handle to a"]
#[doc = " task can be returned from the xTaskCreate() API function used to create the"]
#[doc = " task, and the handle of the currently running task can be obtained by calling"]
#[doc = " xTaskGetCurrentTaskHandle()."]
#[doc = ""]
#[doc = " @param ulValue Data that can be sent with the notification. How the data is"]
#[doc = " used depends on the value of the eAction parameter."]
#[doc = ""]
#[doc = " @param eAction Specifies how the notification updates the task's notification"]
#[doc = " value, if at all. Valid values for eAction are as follows:"]
#[doc = "\t- eSetBits:"]
#[doc = "\t The task's notification value is bitwise ORed with ulValue. xTaskNofify()"]
#[doc = " \t always returns pdPASS in this case."]
#[doc = ""]
#[doc = "\t- eIncrement:"]
#[doc = "\t The task's notification value is incremented. ulValue is not used and"]
#[doc = "\t xTaskNotify() always returns pdPASS in this case."]
#[doc = ""]
#[doc = "\t- eSetValueWithOverwrite:"]
#[doc = "\t The task's notification value is set to the value of ulValue, even if the"]
#[doc = "\t task being notified had not yet processed the previous notification (the"]
#[doc = "\t task already had a notification pending). xTaskNotify() always returns"]
#[doc = "\t pdPASS in this case."]
#[doc = ""]
#[doc = "\t- eSetValueWithoutOverwrite:"]
#[doc = "\t If the task being notified did not already have a notification pending then"]
#[doc = "\t the task's notification value is set to ulValue and xTaskNotify() will"]
#[doc = "\t return pdPASS. If the task being notified already had a notification"]
#[doc = "\t pending then no action is performed and pdFAIL is returned."]
#[doc = ""]
#[doc = "\t- eNoAction:"]
#[doc = "\t The task receives a notification without its notification value being"]
#[doc = "\t\u{a0}\u{a0}updated. ulValue is not used and xTaskNotify() always returns pdPASS in"]
#[doc = "\t this case."]
#[doc = ""]
#[doc = " @return Dependent on the value of eAction. See the description of the"]
#[doc = " eAction parameter."]
#[doc = ""]
#[doc = " \\ingroup TaskNotifications"]
pub fn xTaskNotify(
xTaskToNotify: TaskHandle_t,
ulValue: u32,
eAction: eNotifyAction,
) -> BaseType_t;
}
extern "C" {
#[doc = " Send task notification from an ISR."]
#[doc = ""]
#[doc = " configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this"]
#[doc = " function to be available."]
#[doc = ""]
#[doc = " When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private"]
#[doc = " \"notification value\", which is a 32-bit unsigned integer (uint32_t)."]
#[doc = ""]
#[doc = " A version of xTaskNotify() that can be used from an interrupt service routine"]
#[doc = " (ISR)."]
#[doc = ""]
#[doc = " Events can be sent to a task using an intermediary object. Examples of such"]
#[doc = " objects are queues, semaphores, mutexes and event groups. Task notifications"]
#[doc = " are a method of sending an event directly to a task without the need for such"]
#[doc = " an intermediary object."]
#[doc = ""]
#[doc = " A notification sent to a task can optionally perform an action, such as"]
#[doc = " update, overwrite or increment the task's notification value. In that way"]
#[doc = " task notifications can be used to send data to a task, or be used as light"]
#[doc = " weight and fast binary or counting semaphores."]
#[doc = ""]
#[doc = " A notification sent to a task will remain pending until it is cleared by the"]
#[doc = " task calling xTaskNotifyWait() or ulTaskNotifyTake(). If the task was"]
#[doc = " already in the Blocked state to wait for a notification when the notification"]
#[doc = " arrives then the task will automatically be removed from the Blocked state"]
#[doc = " (unblocked) and the notification cleared."]
#[doc = ""]
#[doc = " A task can use xTaskNotifyWait() to [optionally] block to wait for a"]
#[doc = " notification to be pending, or ulTaskNotifyTake() to [optionally] block"]
#[doc = " to wait for its notification value to have a non-zero value. The task does"]
#[doc = " not consume any CPU time while it is in the Blocked state."]
#[doc = ""]
#[doc = " See http://www.FreeRTOS.org/RTOS-task-notifications.html for details."]
#[doc = ""]
#[doc = " @param xTaskToNotify The handle of the task being notified. The handle to a"]
#[doc = " task can be returned from the xTaskCreate() API function used to create the"]
#[doc = " task, and the handle of the currently running task can be obtained by calling"]
#[doc = " xTaskGetCurrentTaskHandle()."]
#[doc = ""]
#[doc = " @param ulValue Data that can be sent with the notification. How the data is"]
#[doc = " used depends on the value of the eAction parameter."]
#[doc = ""]
#[doc = " @param eAction Specifies how the notification updates the task's notification"]
#[doc = " value, if at all. Valid values for eAction are as follows:"]
#[doc = "\t- eSetBits:"]
#[doc = "\t The task's notification value is bitwise ORed with ulValue. xTaskNofify()"]
#[doc = " \t always returns pdPASS in this case."]
#[doc = ""]
#[doc = "\t- eIncrement:"]
#[doc = "\t The task's notification value is incremented. ulValue is not used and"]
#[doc = "\t xTaskNotify() always returns pdPASS in this case."]
#[doc = ""]
#[doc = "\t- eSetValueWithOverwrite:"]
#[doc = "\t The task's notification value is set to the value of ulValue, even if the"]
#[doc = "\t task being notified had not yet processed the previous notification (the"]
#[doc = "\t task already had a notification pending). xTaskNotify() always returns"]
#[doc = "\t pdPASS in this case."]
#[doc = ""]
#[doc = "\t- eSetValueWithoutOverwrite:"]
#[doc = "\t If the task being notified did not already have a notification pending then"]
#[doc = "\t the task's notification value is set to ulValue and xTaskNotify() will"]
#[doc = "\t return pdPASS. If the task being notified already had a notification"]
#[doc = "\t pending then no action is performed and pdFAIL is returned."]
#[doc = ""]
#[doc = "\t- eNoAction:"]
#[doc = "\t The task receives a notification without its notification value being"]
#[doc = "\t updated. ulValue is not used and xTaskNotify() always returns pdPASS in"]
#[doc = "\t this case."]
#[doc = ""]
#[doc = " @param pxHigherPriorityTaskWoken xTaskNotifyFromISR() will set"]
#[doc = " *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the"]
#[doc = " task to which the notification was sent to leave the Blocked state, and the"]
#[doc = " unblocked task has a priority higher than the currently running task. If"]
#[doc = " xTaskNotifyFromISR() sets this value to pdTRUE then a context switch should"]
#[doc = " be requested before the interrupt is exited. How a context switch is"]
#[doc = " requested from an ISR is dependent on the port - see the documentation page"]
#[doc = " for the port in use."]
#[doc = ""]
#[doc = " @return Dependent on the value of eAction. See the description of the"]
#[doc = " eAction parameter."]
#[doc = ""]
#[doc = " \\ingroup TaskNotifications"]
pub fn xTaskNotifyFromISR(
xTaskToNotify: TaskHandle_t,
ulValue: u32,
eAction: eNotifyAction,
pxHigherPriorityTaskWoken: *mut BaseType_t,
) -> BaseType_t;
}
extern "C" {
#[doc = " Wait for task notification"]
#[doc = ""]
#[doc = " configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this"]
#[doc = " function to be available."]
#[doc = ""]
#[doc = " When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private"]
#[doc = " \"notification value\", which is a 32-bit unsigned integer (uint32_t)."]
#[doc = ""]
#[doc = " Events can be sent to a task using an intermediary object. Examples of such"]
#[doc = " objects are queues, semaphores, mutexes and event groups. Task notifications"]
#[doc = " are a method of sending an event directly to a task without the need for such"]
#[doc = " an intermediary object."]
#[doc = ""]
#[doc = " A notification sent to a task can optionally perform an action, such as"]
#[doc = " update, overwrite or increment the task's notification value. In that way"]
#[doc = " task notifications can be used to send data to a task, or be used as light"]
#[doc = " weight and fast binary or counting semaphores."]
#[doc = ""]
#[doc = " A notification sent to a task will remain pending until it is cleared by the"]
#[doc = " task calling xTaskNotifyWait() or ulTaskNotifyTake(). If the task was"]
#[doc = " already in the Blocked state to wait for a notification when the notification"]
#[doc = " arrives then the task will automatically be removed from the Blocked state"]
#[doc = " (unblocked) and the notification cleared."]
#[doc = ""]
#[doc = " A task can use xTaskNotifyWait() to [optionally] block to wait for a"]
#[doc = " notification to be pending, or ulTaskNotifyTake() to [optionally] block"]
#[doc = " to wait for its notification value to have a non-zero value. The task does"]
#[doc = " not consume any CPU time while it is in the Blocked state."]
#[doc = ""]
#[doc = " See http://www.FreeRTOS.org/RTOS-task-notifications.html for details."]
#[doc = ""]
#[doc = " @param ulBitsToClearOnEntry Bits that are set in ulBitsToClearOnEntry value"]
#[doc = " will be cleared in the calling task's notification value before the task"]
#[doc = " checks to see if any notifications are pending, and optionally blocks if no"]
#[doc = " notifications are pending. Setting ulBitsToClearOnEntry to ULONG_MAX (if"]
#[doc = " limits.h is included) or 0xffffffffUL (if limits.h is not included) will have"]
#[doc = " the effect of resetting the task's notification value to 0. Setting"]
#[doc = " ulBitsToClearOnEntry to 0 will leave the task's notification value unchanged."]
#[doc = ""]
#[doc = " @param ulBitsToClearOnExit If a notification is pending or received before"]
#[doc = " the calling task exits the xTaskNotifyWait() function then the task's"]
#[doc = " notification value (see the xTaskNotify() API function) is passed out using"]
#[doc = " the pulNotificationValue parameter. Then any bits that are set in"]
#[doc = " ulBitsToClearOnExit will be cleared in the task's notification value (note"]
#[doc = " *pulNotificationValue is set before any bits are cleared). Setting"]
#[doc = " ulBitsToClearOnExit to ULONG_MAX (if limits.h is included) or 0xffffffffUL"]
#[doc = " (if limits.h is not included) will have the effect of resetting the task's"]
#[doc = " notification value to 0 before the function exits. Setting"]
#[doc = " ulBitsToClearOnExit to 0 will leave the task's notification value unchanged"]
#[doc = " when the function exits (in which case the value passed out in"]
#[doc = " pulNotificationValue will match the task's notification value)."]
#[doc = ""]
#[doc = " @param pulNotificationValue Used to pass the task's notification value out"]
#[doc = " of the function. Note the value passed out will not be effected by the"]
#[doc = " clearing of any bits caused by ulBitsToClearOnExit being non-zero."]
#[doc = ""]
#[doc = " @param xTicksToWait The maximum amount of time that the task should wait in"]
#[doc = " the Blocked state for a notification to be received, should a notification"]
#[doc = " not already be pending when xTaskNotifyWait() was called. The task"]
#[doc = " will not consume any processing time while it is in the Blocked state. This"]
#[doc = " is specified in kernel ticks, the macro pdMS_TO_TICSK( value_in_ms ) can be"]
#[doc = " used to convert a time specified in milliseconds to a time specified in"]
#[doc = " ticks."]
#[doc = ""]
#[doc = " @return If a notification was received (including notifications that were"]
#[doc = " already pending when xTaskNotifyWait was called) then pdPASS is"]
#[doc = " returned. Otherwise pdFAIL is returned."]
#[doc = ""]
#[doc = " \\ingroup TaskNotifications"]
pub fn xTaskNotifyWait(
ulBitsToClearOnEntry: u32,
ulBitsToClearOnExit: u32,
pulNotificationValue: *mut u32,
xTicksToWait: TickType_t,
) -> BaseType_t;
}
extern "C" {
#[doc = " Simplified macro for sending task notification from ISR."]
#[doc = ""]
#[doc = " configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this macro"]
#[doc = " to be available."]
#[doc = ""]
#[doc = " When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private"]
#[doc = " \"notification value\", which is a 32-bit unsigned integer (uint32_t)."]
#[doc = ""]
#[doc = " A version of xTaskNotifyGive() that can be called from an interrupt service"]
#[doc = " routine (ISR)."]
#[doc = ""]
#[doc = " Events can be sent to a task using an intermediary object. Examples of such"]
#[doc = " objects are queues, semaphores, mutexes and event groups. Task notifications"]
#[doc = " are a method of sending an event directly to a task without the need for such"]
#[doc = " an intermediary object."]
#[doc = ""]
#[doc = " A notification sent to a task can optionally perform an action, such as"]
#[doc = " update, overwrite or increment the task's notification value. In that way"]
#[doc = " task notifications can be used to send data to a task, or be used as light"]
#[doc = " weight and fast binary or counting semaphores."]
#[doc = ""]
#[doc = " vTaskNotifyGiveFromISR() is intended for use when task notifications are"]
#[doc = " used as light weight and faster binary or counting semaphore equivalents."]
#[doc = " Actual FreeRTOS semaphores are given from an ISR using the"]
#[doc = " xSemaphoreGiveFromISR() API function, the equivalent action that instead uses"]
#[doc = " a task notification is vTaskNotifyGiveFromISR()."]
#[doc = ""]
#[doc = " When task notifications are being used as a binary or counting semaphore"]
#[doc = " equivalent then the task being notified should wait for the notification"]
#[doc = " using the ulTaskNotificationTake() API function rather than the"]
#[doc = " xTaskNotifyWait() API function."]
#[doc = ""]
#[doc = " See http://www.FreeRTOS.org/RTOS-task-notifications.html for more details."]
#[doc = ""]
#[doc = " @param xTaskToNotify The handle of the task being notified. The handle to a"]
#[doc = " task can be returned from the xTaskCreate() API function used to create the"]
#[doc = " task, and the handle of the currently running task can be obtained by calling"]
#[doc = " xTaskGetCurrentTaskHandle()."]
#[doc = ""]
#[doc = " @param pxHigherPriorityTaskWoken vTaskNotifyGiveFromISR() will set"]
#[doc = " *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the"]
#[doc = " task to which the notification was sent to leave the Blocked state, and the"]
#[doc = " unblocked task has a priority higher than the currently running task. If"]
#[doc = " vTaskNotifyGiveFromISR() sets this value to pdTRUE then a context switch"]
#[doc = " should be requested before the interrupt is exited. How a context switch is"]
#[doc = " requested from an ISR is dependent on the port - see the documentation page"]
#[doc = " for the port in use."]
#[doc = ""]
#[doc = " \\ingroup TaskNotifications"]
pub fn vTaskNotifyGiveFromISR(
xTaskToNotify: TaskHandle_t,
pxHigherPriorityTaskWoken: *mut BaseType_t,
);
}
extern "C" {
#[doc = " Simplified macro for receiving task notification."]
#[doc = ""]
#[doc = " configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this"]
#[doc = " function to be available."]
#[doc = ""]
#[doc = " When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private"]
#[doc = " \"notification value\", which is a 32-bit unsigned integer (uint32_t)."]
#[doc = ""]
#[doc = " Events can be sent to a task using an intermediary object. Examples of such"]
#[doc = " objects are queues, semaphores, mutexes and event groups. Task notifications"]
#[doc = " are a method of sending an event directly to a task without the need for such"]
#[doc = " an intermediary object."]
#[doc = ""]
#[doc = " A notification sent to a task can optionally perform an action, such as"]
#[doc = " update, overwrite or increment the task's notification value. In that way"]
#[doc = " task notifications can be used to send data to a task, or be used as light"]
#[doc = " weight and fast binary or counting semaphores."]
#[doc = ""]
#[doc = " ulTaskNotifyTake() is intended for use when a task notification is used as a"]
#[doc = " faster and lighter weight binary or counting semaphore alternative. Actual"]
#[doc = " FreeRTOS semaphores are taken using the xSemaphoreTake() API function, the"]
#[doc = " equivalent action that instead uses a task notification is"]
#[doc = " ulTaskNotifyTake()."]
#[doc = ""]
#[doc = " When a task is using its notification value as a binary or counting semaphore"]
#[doc = " other tasks should send notifications to it using the xTaskNotifyGive()"]
#[doc = " macro, or xTaskNotify() function with the eAction parameter set to"]
#[doc = " eIncrement."]
#[doc = ""]
#[doc = " ulTaskNotifyTake() can either clear the task's notification value to"]
#[doc = " zero on exit, in which case the notification value acts like a binary"]
#[doc = " semaphore, or decrement the task's notification value on exit, in which case"]
#[doc = " the notification value acts like a counting semaphore."]
#[doc = ""]
#[doc = " A task can use ulTaskNotifyTake() to [optionally] block to wait for a"]
#[doc = " the task's notification value to be non-zero. The task does not consume any"]
#[doc = " CPU time while it is in the Blocked state."]
#[doc = ""]
#[doc = " Where as xTaskNotifyWait() will return when a notification is pending,"]
#[doc = " ulTaskNotifyTake() will return when the task's notification value is"]
#[doc = " not zero."]
#[doc = ""]
#[doc = " See http://www.FreeRTOS.org/RTOS-task-notifications.html for details."]
#[doc = ""]
#[doc = " @param xClearCountOnExit if xClearCountOnExit is pdFALSE then the task's"]
#[doc = " notification value is decremented when the function exits. In this way the"]
#[doc = " notification value acts like a counting semaphore. If xClearCountOnExit is"]
#[doc = " not pdFALSE then the task's notification value is cleared to zero when the"]
#[doc = " function exits. In this way the notification value acts like a binary"]
#[doc = " semaphore."]
#[doc = ""]
#[doc = " @param xTicksToWait The maximum amount of time that the task should wait in"]
#[doc = " the Blocked state for the task's notification value to be greater than zero,"]
#[doc = " should the count not already be greater than zero when"]
#[doc = " ulTaskNotifyTake() was called. The task will not consume any processing"]
#[doc = " time while it is in the Blocked state. This is specified in kernel ticks,"]
#[doc = " the macro pdMS_TO_TICSK( value_in_ms ) can be used to convert a time"]
#[doc = " specified in milliseconds to a time specified in ticks."]
#[doc = ""]
#[doc = " @return The task's notification count before it is either cleared to zero or"]
#[doc = " decremented (see the xClearCountOnExit parameter)."]
#[doc = ""]
#[doc = " \\ingroup TaskNotifications"]
pub fn ulTaskNotifyTake(xClearCountOnExit: BaseType_t, xTicksToWait: TickType_t) -> u32;
}
extern "C" {
#[doc = " @cond"]
pub fn xTaskIncrementTick() -> BaseType_t;
}
extern "C" {
pub fn vTaskPlaceOnEventList(pxEventList: *mut List_t, xTicksToWait: TickType_t);
}
extern "C" {
pub fn vTaskPlaceOnUnorderedEventList(
pxEventList: *mut List_t,
xItemValue: TickType_t,
xTicksToWait: TickType_t,
);
}
extern "C" {
pub fn vTaskPlaceOnEventListRestricted(pxEventList: *mut List_t, xTicksToWait: TickType_t);
}
extern "C" {
pub fn xTaskRemoveFromEventList(pxEventList: *const List_t) -> BaseType_t;
}
extern "C" {
pub fn xTaskRemoveFromUnorderedEventList(
pxEventListItem: *mut ListItem_t,
xItemValue: TickType_t,
) -> BaseType_t;
}
extern "C" {
pub fn vTaskSwitchContext();
}
extern "C" {
pub fn uxTaskResetEventItemValue() -> TickType_t;
}
extern "C" {
pub fn xTaskGetCurrentTaskHandle() -> TaskHandle_t;
}
extern "C" {
pub fn xTaskGetCurrentTaskHandleForCPU(cpuid: BaseType_t) -> TaskHandle_t;
}
extern "C" {
pub fn vTaskSetTimeOutState(pxTimeOut: *mut TimeOut_t);
}
extern "C" {
pub fn xTaskCheckForTimeOut(
pxTimeOut: *mut TimeOut_t,
pxTicksToWait: *mut TickType_t,
) -> BaseType_t;
}
extern "C" {
pub fn vTaskMissedYield();
}
extern "C" {
pub fn xTaskGetSchedulerState() -> BaseType_t;
}
extern "C" {
pub fn vTaskPriorityInherit(pxMutexHolder: TaskHandle_t);
}
extern "C" {
pub fn xTaskPriorityDisinherit(pxMutexHolder: TaskHandle_t) -> BaseType_t;
}
extern "C" {
pub fn uxTaskGetTaskNumber(xTask: TaskHandle_t) -> UBaseType_t;
}
extern "C" {
pub fn xTaskGetAffinity(xTask: TaskHandle_t) -> BaseType_t;
}
extern "C" {
pub fn vTaskSetTaskNumber(xTask: TaskHandle_t, uxHandle: UBaseType_t);
}
extern "C" {
pub fn vTaskStepTick(xTicksToJump: TickType_t);
}
extern "C" {
pub fn eTaskConfirmSleepModeStatus() -> eSleepModeStatus;
}
extern "C" {
pub fn pvTaskIncrementMutexHeldCount() -> *mut libc::c_void;
}
extern "C" {
pub fn uxTaskGetSnapshotAll(
pxTaskSnapshotArray: *mut TaskSnapshot_t,
uxArraySize: UBaseType_t,
pxTcbSz: *mut UBaseType_t,
) -> UBaseType_t;
}
#[doc = " Type by which ring buffers are referenced. For example, a call to xRingbufferCreate()"]
#[doc = " returns a RingbufHandle_t variable that can then be used as a parameter to"]
#[doc = " xRingbufferSend(), xRingbufferReceive(), etc."]
pub type RingbufHandle_t = *mut libc::c_void;
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum RingbufferType_t {
#[doc = " No-split buffers will only store an item in contiguous memory and will"]
#[doc = " never split an item. Each item requires an 8 byte overhead for a header"]
#[doc = " and will always internally occupy a 32-bit aligned size of space."]
RINGBUF_TYPE_NOSPLIT = 0,
#[doc = " Allow-split buffers will split an item into two parts if necessary in"]
#[doc = " order to store it. Each item requires an 8 byte overhead for a header,"]
#[doc = " splitting incurs an extra header. Each item will always internally occupy"]
#[doc = " a 32-bit aligned size of space."]
RINGBUF_TYPE_ALLOWSPLIT = 1,
#[doc = " Byte buffers store data as a sequence of bytes and do not maintain separate"]
#[doc = " items, therefore byte buffers have no overhead. All data is stored as a"]
#[doc = " sequence of byte and any number of bytes can be sent or retrieved each"]
#[doc = " time."]
RINGBUF_TYPE_BYTEBUF = 2,
#[doc = " Byte buffers store data as a sequence of bytes and do not maintain separate"]
#[doc = " items, therefore byte buffers have no overhead. All data is stored as a"]
#[doc = " sequence of byte and any number of bytes can be sent or retrieved each"]
#[doc = " time."]
RINGBUF_TYPE_MAX = 3,
}
extern "C" {
#[doc = " @brief Create a ring buffer"]
#[doc = ""]
#[doc = " @param[in] xBufferSize Size of the buffer in bytes. Note that items require"]
#[doc = " space for overhead in no-split/allow-split buffers"]
#[doc = " @param[in] xBufferType Type of ring buffer, see documentation."]
#[doc = ""]
#[doc = " @note xBufferSize of no-split/allow-split buffers will be rounded up to the nearest 32-bit aligned size."]
#[doc = ""]
#[doc = " @return A handle to the created ring buffer, or NULL in case of error."]
pub fn xRingbufferCreate(xBufferSize: size_t, xBufferType: RingbufferType_t)
-> RingbufHandle_t;
}
extern "C" {
#[doc = " @brief Create a ring buffer of type RINGBUF_TYPE_NOSPLIT for a fixed item_size"]
#[doc = ""]
#[doc = " This API is similar to xRingbufferCreate(), but it will internally allocate"]
#[doc = " additional space for the headers."]
#[doc = ""]
#[doc = " @param[in] xItemSize Size of each item to be put into the ring buffer"]
#[doc = " @param[in] xItemNum Maximum number of items the buffer needs to hold simultaneously"]
#[doc = ""]
#[doc = " @return A RingbufHandle_t handle to the created ring buffer, or NULL in case of error."]
pub fn xRingbufferCreateNoSplit(xItemSize: size_t, xItemNum: size_t) -> RingbufHandle_t;
}
extern "C" {
#[doc = " @brief Insert an item into the ring buffer"]
#[doc = ""]
#[doc = " Attempt to insert an item into the ring buffer. This function will block until"]
#[doc = " enough free space is available or until it times out."]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer to insert the item into"]
#[doc = " @param[in] pvItem Pointer to data to insert. NULL is allowed if xItemSize is 0."]
#[doc = " @param[in] xItemSize Size of data to insert."]
#[doc = " @param[in] xTicksToWait Ticks to wait for room in the ring buffer."]
#[doc = ""]
#[doc = " @note For no-split/allow-split ring buffers, the actual size of memory that"]
#[doc = " the item will occupy will be rounded up to the nearest 32-bit aligned"]
#[doc = " size. This is done to ensure all items are always stored in 32-bit"]
#[doc = " aligned fashion."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - pdTRUE if succeeded"]
#[doc = " - pdFALSE on time-out or when the data is larger than the maximum permissible size of the buffer"]
pub fn xRingbufferSend(
xRingbuffer: RingbufHandle_t,
pvItem: *const libc::c_void,
xItemSize: size_t,
xTicksToWait: TickType_t,
) -> BaseType_t;
}
extern "C" {
#[doc = " @brief Insert an item into the ring buffer in an ISR"]
#[doc = ""]
#[doc = " Attempt to insert an item into the ring buffer from an ISR. This function"]
#[doc = " will return immediately if there is insufficient free space in the buffer."]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer to insert the item into"]
#[doc = " @param[in] pvItem Pointer to data to insert. NULL is allowed if xItemSize is 0."]
#[doc = " @param[in] xItemSize Size of data to insert."]
#[doc = " @param[out] pxHigherPriorityTaskWoken Value pointed to will be set to pdTRUE if the function woke up a higher priority task."]
#[doc = ""]
#[doc = " @note For no-split/allow-split ring buffers, the actual size of memory that"]
#[doc = " the item will occupy will be rounded up to the nearest 32-bit aligned"]
#[doc = " size. This is done to ensure all items are always stored in 32-bit"]
#[doc = " aligned fashion."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - pdTRUE if succeeded"]
#[doc = " - pdFALSE when the ring buffer does not have space."]
pub fn xRingbufferSendFromISR(
xRingbuffer: RingbufHandle_t,
pvItem: *const libc::c_void,
xItemSize: size_t,
pxHigherPriorityTaskWoken: *mut BaseType_t,
) -> BaseType_t;
}
extern "C" {
#[doc = " @brief Acquire memory from the ring buffer to be written to by an external"]
#[doc = " source and to be sent later."]
#[doc = ""]
#[doc = " Attempt to allocate buffer for an item to be sent into the ring buffer. This"]
#[doc = " function will block until enough free space is available or until it"]
#[doc = " timesout."]
#[doc = ""]
#[doc = " The item, as well as the following items ``SendAcquire`` or ``Send`` after it,"]
#[doc = " will not be able to be read from the ring buffer until this item is actually"]
#[doc = " sent into the ring buffer."]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer to allocate the memory"]
#[doc = " @param[out] ppvItem Double pointer to memory acquired (set to NULL if no memory were retrieved)"]
#[doc = " @param[in] xItemSize Size of item to acquire."]
#[doc = " @param[in] xTicksToWait Ticks to wait for room in the ring buffer."]
#[doc = ""]
#[doc = " @note Only applicable for no-split ring buffers now, the actual size of"]
#[doc = " memory that the item will occupy will be rounded up to the nearest 32-bit"]
#[doc = " aligned size. This is done to ensure all items are always stored in 32-bit"]
#[doc = " aligned fashion."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - pdTRUE if succeeded"]
#[doc = " - pdFALSE on time-out or when the data is larger than the maximum permissible size of the buffer"]
pub fn xRingbufferSendAcquire(
xRingbuffer: RingbufHandle_t,
ppvItem: *mut *mut libc::c_void,
xItemSize: size_t,
xTicksToWait: TickType_t,
) -> BaseType_t;
}
extern "C" {
#[doc = " @brief Actually send an item into the ring buffer allocated before by"]
#[doc = " ``xRingbufferSendAcquire``."]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer to insert the item into"]
#[doc = " @param[in] pvItem Pointer to item in allocated memory to insert."]
#[doc = ""]
#[doc = " @note Only applicable for no-split ring buffers. Only call for items"]
#[doc = " allocated by ``xRingbufferSendAcquire``."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - pdTRUE if succeeded"]
#[doc = " - pdFALSE if fail for some reason."]
pub fn xRingbufferSendComplete(
xRingbuffer: RingbufHandle_t,
pvItem: *mut libc::c_void,
) -> BaseType_t;
}
extern "C" {
#[doc = " @brief Retrieve an item from the ring buffer"]
#[doc = ""]
#[doc = " Attempt to retrieve an item from the ring buffer. This function will block"]
#[doc = " until an item is available or until it times out."]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer to retrieve the item from"]
#[doc = " @param[out] pxItemSize Pointer to a variable to which the size of the retrieved item will be written."]
#[doc = " @param[in] xTicksToWait Ticks to wait for items in the ring buffer."]
#[doc = ""]
#[doc = " @note A call to vRingbufferReturnItem() is required after this to free the item retrieved."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - Pointer to the retrieved item on success; *pxItemSize filled with the length of the item."]
#[doc = " - NULL on timeout, *pxItemSize is untouched in that case."]
pub fn xRingbufferReceive(
xRingbuffer: RingbufHandle_t,
pxItemSize: *mut size_t,
xTicksToWait: TickType_t,
) -> *mut libc::c_void;
}
extern "C" {
#[doc = " @brief Retrieve an item from the ring buffer in an ISR"]
#[doc = ""]
#[doc = " Attempt to retrieve an item from the ring buffer. This function returns immediately"]
#[doc = " if there are no items available for retrieval"]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer to retrieve the item from"]
#[doc = " @param[out] pxItemSize Pointer to a variable to which the size of the"]
#[doc = " retrieved item will be written."]
#[doc = ""]
#[doc = " @note A call to vRingbufferReturnItemFromISR() is required after this to free the item retrieved."]
#[doc = " @note Byte buffers do not allow multiple retrievals before returning an item"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - Pointer to the retrieved item on success; *pxItemSize filled with the length of the item."]
#[doc = " - NULL when the ring buffer is empty, *pxItemSize is untouched in that case."]
pub fn xRingbufferReceiveFromISR(
xRingbuffer: RingbufHandle_t,
pxItemSize: *mut size_t,
) -> *mut libc::c_void;
}
extern "C" {
#[doc = " @brief Retrieve a split item from an allow-split ring buffer"]
#[doc = ""]
#[doc = " Attempt to retrieve a split item from an allow-split ring buffer. If the item"]
#[doc = " is not split, only a single item is retried. If the item is split, both parts"]
#[doc = " will be retrieved. This function will block until an item is available or"]
#[doc = " until it times out."]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer to retrieve the item from"]
#[doc = " @param[out] ppvHeadItem Double pointer to first part (set to NULL if no items were retrieved)"]
#[doc = " @param[out] ppvTailItem Double pointer to second part (set to NULL if item is not split)"]
#[doc = " @param[out] pxHeadItemSize Pointer to size of first part (unmodified if no items were retrieved)"]
#[doc = " @param[out] pxTailItemSize Pointer to size of second part (unmodified if item is not split)"]
#[doc = " @param[in] xTicksToWait Ticks to wait for items in the ring buffer."]
#[doc = ""]
#[doc = " @note Call(s) to vRingbufferReturnItem() is required after this to free up the item(s) retrieved."]
#[doc = " @note This function should only be called on allow-split buffers"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - pdTRUE if an item (split or unsplit) was retrieved"]
#[doc = " - pdFALSE when no item was retrieved"]
pub fn xRingbufferReceiveSplit(
xRingbuffer: RingbufHandle_t,
ppvHeadItem: *mut *mut libc::c_void,
ppvTailItem: *mut *mut libc::c_void,
pxHeadItemSize: *mut size_t,
pxTailItemSize: *mut size_t,
xTicksToWait: TickType_t,
) -> BaseType_t;
}
extern "C" {
#[doc = " @brief Retrieve a split item from an allow-split ring buffer in an ISR"]
#[doc = ""]
#[doc = " Attempt to retrieve a split item from an allow-split ring buffer. If the item"]
#[doc = " is not split, only a single item is retried. If the item is split, both parts"]
#[doc = " will be retrieved. This function returns immediately if there are no items"]
#[doc = " available for retrieval"]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer to retrieve the item from"]
#[doc = " @param[out] ppvHeadItem Double pointer to first part (set to NULL if no items were retrieved)"]
#[doc = " @param[out] ppvTailItem Double pointer to second part (set to NULL if item is not split)"]
#[doc = " @param[out] pxHeadItemSize Pointer to size of first part (unmodified if no items were retrieved)"]
#[doc = " @param[out] pxTailItemSize Pointer to size of second part (unmodified if item is not split)"]
#[doc = ""]
#[doc = " @note Calls to vRingbufferReturnItemFromISR() is required after this to free up the item(s) retrieved."]
#[doc = " @note This function should only be called on allow-split buffers"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - pdTRUE if an item (split or unsplit) was retrieved"]
#[doc = " - pdFALSE when no item was retrieved"]
pub fn xRingbufferReceiveSplitFromISR(
xRingbuffer: RingbufHandle_t,
ppvHeadItem: *mut *mut libc::c_void,
ppvTailItem: *mut *mut libc::c_void,
pxHeadItemSize: *mut size_t,
pxTailItemSize: *mut size_t,
) -> BaseType_t;
}
extern "C" {
#[doc = " @brief Retrieve bytes from a byte buffer, specifying the maximum amount of bytes to retrieve"]
#[doc = ""]
#[doc = " Attempt to retrieve data from a byte buffer whilst specifying a maximum number"]
#[doc = " of bytes to retrieve. This function will block until there is data available"]
#[doc = " for retrieval or until it times out."]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer to retrieve the item from"]
#[doc = " @param[out] pxItemSize Pointer to a variable to which the size of the retrieved item will be written."]
#[doc = " @param[in] xTicksToWait Ticks to wait for items in the ring buffer."]
#[doc = " @param[in] xMaxSize Maximum number of bytes to return."]
#[doc = ""]
#[doc = " @note A call to vRingbufferReturnItem() is required after this to free up the data retrieved."]
#[doc = " @note This function should only be called on byte buffers"]
#[doc = " @note Byte buffers do not allow multiple retrievals before returning an item"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - Pointer to the retrieved item on success; *pxItemSize filled with"]
#[doc = " the length of the item."]
#[doc = " - NULL on timeout, *pxItemSize is untouched in that case."]
pub fn xRingbufferReceiveUpTo(
xRingbuffer: RingbufHandle_t,
pxItemSize: *mut size_t,
xTicksToWait: TickType_t,
xMaxSize: size_t,
) -> *mut libc::c_void;
}
extern "C" {
#[doc = " @brief Retrieve bytes from a byte buffer, specifying the maximum amount of"]
#[doc = " bytes to retrieve. Call this from an ISR."]
#[doc = ""]
#[doc = " Attempt to retrieve bytes from a byte buffer whilst specifying a maximum number"]
#[doc = " of bytes to retrieve. This function will return immediately if there is no data"]
#[doc = " available for retrieval."]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer to retrieve the item from"]
#[doc = " @param[out] pxItemSize Pointer to a variable to which the size of the retrieved item will be written."]
#[doc = " @param[in] xMaxSize Maximum number of bytes to return."]
#[doc = ""]
#[doc = " @note A call to vRingbufferReturnItemFromISR() is required after this to free up the data received."]
#[doc = " @note This function should only be called on byte buffers"]
#[doc = " @note Byte buffers do not allow multiple retrievals before returning an item"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - Pointer to the retrieved item on success; *pxItemSize filled with"]
#[doc = " the length of the item."]
#[doc = " - NULL when the ring buffer is empty, *pxItemSize is untouched in that case."]
pub fn xRingbufferReceiveUpToFromISR(
xRingbuffer: RingbufHandle_t,
pxItemSize: *mut size_t,
xMaxSize: size_t,
) -> *mut libc::c_void;
}
extern "C" {
#[doc = " @brief Return a previously-retrieved item to the ring buffer"]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer the item was retrieved from"]
#[doc = " @param[in] pvItem Item that was received earlier"]
#[doc = ""]
#[doc = " @note If a split item is retrieved, both parts should be returned by calling this function twice"]
pub fn vRingbufferReturnItem(xRingbuffer: RingbufHandle_t, pvItem: *mut libc::c_void);
}
extern "C" {
#[doc = " @brief Return a previously-retrieved item to the ring buffer from an ISR"]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer the item was retrieved from"]
#[doc = " @param[in] pvItem Item that was received earlier"]
#[doc = " @param[out] pxHigherPriorityTaskWoken Value pointed to will be set to pdTRUE"]
#[doc = " if the function woke up a higher priority task."]
#[doc = ""]
#[doc = " @note If a split item is retrieved, both parts should be returned by calling this function twice"]
pub fn vRingbufferReturnItemFromISR(
xRingbuffer: RingbufHandle_t,
pvItem: *mut libc::c_void,
pxHigherPriorityTaskWoken: *mut BaseType_t,
);
}
extern "C" {
#[doc = " @brief Delete a ring buffer"]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer to delete"]
#[doc = ""]
#[doc = " @note This function will not deallocate any memory if the ring buffer was"]
#[doc = " created using xRingbufferCreateStatic(). Deallocation must be done"]
#[doc = " manually be the user."]
pub fn vRingbufferDelete(xRingbuffer: RingbufHandle_t);
}
extern "C" {
#[doc = " @brief Get maximum size of an item that can be placed in the ring buffer"]
#[doc = ""]
#[doc = " This function returns the maximum size an item can have if it was placed in"]
#[doc = " an empty ring buffer."]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer to query"]
#[doc = ""]
#[doc = " @note The max item size for a no-split buffer is limited to"]
#[doc = " ((buffer_size/2)-header_size). This limit is imposed so that an item"]
#[doc = " of max item size can always be sent to the an empty no-split buffer"]
#[doc = " regardless of the internal positions of the buffer's read/write/free"]
#[doc = " pointers."]
#[doc = ""]
#[doc = " @return Maximum size, in bytes, of an item that can be placed in a ring buffer."]
pub fn xRingbufferGetMaxItemSize(xRingbuffer: RingbufHandle_t) -> size_t;
}
extern "C" {
#[doc = " @brief Get current free size available for an item/data in the buffer"]
#[doc = ""]
#[doc = " This gives the real time free space available for an item/data in the ring"]
#[doc = " buffer. This represents the maximum size an item/data can have if it was"]
#[doc = " currently sent to the ring buffer."]
#[doc = ""]
#[doc = " @warning This API is not thread safe. So, if multiple threads are accessing"]
#[doc = " the same ring buffer, it is the application's responsibility to"]
#[doc = " ensure atomic access to this API and the subsequent Send"]
#[doc = ""]
#[doc = " @note An empty no-split buffer has a max current free size for an item"]
#[doc = " that is limited to ((buffer_size/2)-header_size). See API reference"]
#[doc = " for xRingbufferGetMaxItemSize()."]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer to query"]
#[doc = ""]
#[doc = " @return Current free size, in bytes, available for an entry"]
pub fn xRingbufferGetCurFreeSize(xRingbuffer: RingbufHandle_t) -> size_t;
}
extern "C" {
#[doc = " @brief Add the ring buffer's read semaphore to a queue set."]
#[doc = ""]
#[doc = " The ring buffer's read semaphore indicates that data has been written"]
#[doc = " to the ring buffer. This function adds the ring buffer's read semaphore to"]
#[doc = " a queue set."]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer to add to the queue set"]
#[doc = " @param[in] xQueueSet Queue set to add the ring buffer's read semaphore to"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - pdTRUE on success, pdFALSE otherwise"]
pub fn xRingbufferAddToQueueSetRead(
xRingbuffer: RingbufHandle_t,
xQueueSet: QueueSetHandle_t,
) -> BaseType_t;
}
extern "C" {
#[doc = " @brief Check if the selected queue set member is the ring buffer's read semaphore"]
#[doc = ""]
#[doc = " This API checks if queue set member returned from xQueueSelectFromSet()"]
#[doc = " is the read semaphore of this ring buffer. If so, this indicates the ring buffer"]
#[doc = " has items waiting to be retrieved."]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer which should be checked"]
#[doc = " @param[in] xMember Member returned from xQueueSelectFromSet"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - pdTRUE when semaphore belongs to ring buffer"]
#[doc = " - pdFALSE otherwise."]
pub fn xRingbufferCanRead(
xRingbuffer: RingbufHandle_t,
xMember: QueueSetMemberHandle_t,
) -> BaseType_t;
}
extern "C" {
#[doc = " @brief Remove the ring buffer's read semaphore from a queue set."]
#[doc = ""]
#[doc = " This specifically removes a ring buffer's read semaphore from a queue set. The"]
#[doc = " read semaphore is used to indicate when data has been written to the ring buffer"]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer to remove from the queue set"]
#[doc = " @param[in] xQueueSet Queue set to remove the ring buffer's read semaphore from"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - pdTRUE on success"]
#[doc = " - pdFALSE otherwise"]
pub fn xRingbufferRemoveFromQueueSetRead(
xRingbuffer: RingbufHandle_t,
xQueueSet: QueueSetHandle_t,
) -> BaseType_t;
}
extern "C" {
#[doc = " @brief Get information about ring buffer status"]
#[doc = ""]
#[doc = " Get information of the a ring buffer's current status such as"]
#[doc = " free/read/write pointer positions, and number of items waiting to be retrieved."]
#[doc = " Arguments can be set to NULL if they are not required."]
#[doc = ""]
#[doc = " @param[in] xRingbuffer Ring buffer to remove from the queue set"]
#[doc = " @param[out] uxFree Pointer use to store free pointer position"]
#[doc = " @param[out] uxRead Pointer use to store read pointer position"]
#[doc = " @param[out] uxWrite Pointer use to store write pointer position"]
#[doc = " @param[out] uxAcquire Pointer use to store acquire pointer position"]
#[doc = " @param[out] uxItemsWaiting Pointer use to store number of items (bytes for byte buffer) waiting to be retrieved"]
pub fn vRingbufferGetInfo(
xRingbuffer: RingbufHandle_t,
uxFree: *mut UBaseType_t,
uxRead: *mut UBaseType_t,
uxWrite: *mut UBaseType_t,
uxAcquire: *mut UBaseType_t,
uxItemsWaiting: *mut UBaseType_t,
);
}
extern "C" {
#[doc = " @brief Debugging function to print the internal pointers in the ring buffer"]
#[doc = ""]
#[doc = " @param xRingbuffer Ring buffer to show"]
pub fn xRingbufferPrintInfo(xRingbuffer: RingbufHandle_t);
}
#[doc = " @brief I2C port number, can be I2C_NUM_0 ~ (I2C_NUM_MAX-1)."]
pub type i2c_port_t = libc::c_int;
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum i2c_mode_t {
#[doc = "< I2C slave mode"]
I2C_MODE_SLAVE = 0,
#[doc = "< I2C master mode"]
I2C_MODE_MASTER = 1,
I2C_MODE_MAX = 2,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum i2c_rw_t {
#[doc = "< I2C write data"]
I2C_MASTER_WRITE = 0,
#[doc = "< I2C read data"]
I2C_MASTER_READ = 1,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum i2c_opmode_t {
#[doc = "<I2C restart command"]
I2C_CMD_RESTART = 0,
#[doc = "<I2C write command"]
I2C_CMD_WRITE = 1,
#[doc = "<I2C read command"]
I2C_CMD_READ = 2,
#[doc = "<I2C stop command"]
I2C_CMD_STOP = 3,
#[doc = "<I2C end command"]
I2C_CMD_END = 4,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum i2c_trans_mode_t {
#[doc = "< I2C data msb first"]
I2C_DATA_MODE_MSB_FIRST = 0,
#[doc = "< I2C data lsb first"]
I2C_DATA_MODE_LSB_FIRST = 1,
I2C_DATA_MODE_MAX = 2,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum i2c_addr_mode_t {
#[doc = "< I2C 7bit address for slave mode"]
I2C_ADDR_BIT_7 = 0,
#[doc = "< I2C 10bit address for slave mode"]
I2C_ADDR_BIT_10 = 1,
I2C_ADDR_BIT_MAX = 2,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum i2c_ack_type_t {
#[doc = "< I2C ack for each byte read"]
I2C_MASTER_ACK = 0,
#[doc = "< I2C nack for each byte read"]
I2C_MASTER_NACK = 1,
#[doc = "< I2C nack for the last byte"]
I2C_MASTER_LAST_NACK = 2,
I2C_MASTER_ACK_MAX = 3,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum i2c_sclk_t {
#[doc = "< I2C source clock from REF_TICK"]
I2C_SCLK_REF_TICK = 0,
#[doc = "< I2C source clock from APB"]
I2C_SCLK_APB = 1,
}
#[doc = " @brief I2C initialization parameters"]
#[repr(C)]
#[derive(Copy, Clone)]
pub struct i2c_config_t {
#[doc = "< I2C mode"]
pub mode: i2c_mode_t,
#[doc = "< GPIO number for I2C sda signal"]
pub sda_io_num: libc::c_int,
#[doc = "< GPIO number for I2C scl signal"]
pub scl_io_num: libc::c_int,
#[doc = "< Internal GPIO pull mode for I2C sda signal"]
pub sda_pullup_en: bool,
#[doc = "< Internal GPIO pull mode for I2C scl signal"]
pub scl_pullup_en: bool,
pub __bindgen_anon_1: i2c_config_t__bindgen_ty_1,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2c_config_t__bindgen_ty_1 {
#[doc = "< I2C master config"]
pub master: i2c_config_t__bindgen_ty_1__bindgen_ty_1,
#[doc = "< I2C slave config"]
pub slave: i2c_config_t__bindgen_ty_1__bindgen_ty_2,
_bindgen_union_align: u32,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct i2c_config_t__bindgen_ty_1__bindgen_ty_1 {
#[doc = "< I2C clock frequency for master mode, (no higher than 1MHz for now)"]
pub clk_speed: u32,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct i2c_config_t__bindgen_ty_1__bindgen_ty_2 {
#[doc = "< I2C 10bit address mode enable for slave mode"]
pub addr_10bit_en: u8,
#[doc = "< I2C address for slave mode"]
pub slave_addr: u16,
}
pub type i2c_cmd_handle_t = *mut libc::c_void;
extern "C" {
#[doc = " @brief I2C driver install"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param mode I2C mode( master or slave )"]
#[doc = " @param slv_rx_buf_len receiving buffer size for slave mode"]
#[doc = " @note"]
#[doc = " Only slave mode will use this value, driver will ignore this value in master mode."]
#[doc = " @param slv_tx_buf_len sending buffer size for slave mode"]
#[doc = " @note"]
#[doc = " Only slave mode will use this value, driver will ignore this value in master mode."]
#[doc = " @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)"]
#[doc = " ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info."]
#[doc = " @note"]
#[doc = " In master mode, if the cache is likely to be disabled(such as write flash) and the slave is time-sensitive,"]
#[doc = " `ESP_INTR_FLAG_IRAM` is suggested to be used. In this case, please use the memory allocated from internal RAM in i2c read and write function,"]
#[doc = " because we can not access the psram(if psram is enabled) in interrupt handle function when cache is disabled."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
#[doc = " - ESP_FAIL Driver install error"]
pub fn i2c_driver_install(
i2c_num: i2c_port_t,
mode: i2c_mode_t,
slv_rx_buf_len: size_t,
slv_tx_buf_len: size_t,
intr_alloc_flags: libc::c_int,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief I2C driver delete"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_driver_delete(i2c_num: i2c_port_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief I2C parameter initialization"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param i2c_conf pointer to I2C parameter settings"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_param_config(i2c_num: i2c_port_t, i2c_conf: *const i2c_config_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief reset I2C tx hardware fifo"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_reset_tx_fifo(i2c_num: i2c_port_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief reset I2C rx fifo"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_reset_rx_fifo(i2c_num: i2c_port_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief I2C isr handler register"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param fn isr handler function"]
#[doc = " @param arg parameter for isr handler function"]
#[doc = " @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)"]
#[doc = " ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info."]
#[doc = " @param handle handle return from esp_intr_alloc."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_isr_register(
i2c_num: i2c_port_t,
fn_: ::core::option::Option<unsafe extern "C" fn(arg1: *mut libc::c_void)>,
arg: *mut libc::c_void,
intr_alloc_flags: libc::c_int,
handle: *mut intr_handle_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief to delete and free I2C isr."]
#[doc = ""]
#[doc = " @param handle handle of isr."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_isr_free(handle: intr_handle_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Configure GPIO signal for I2C sck and sda"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param sda_io_num GPIO number for I2C sda signal"]
#[doc = " @param scl_io_num GPIO number for I2C scl signal"]
#[doc = " @param sda_pullup_en Whether to enable the internal pullup for sda pin"]
#[doc = " @param scl_pullup_en Whether to enable the internal pullup for scl pin"]
#[doc = " @param mode I2C mode"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_set_pin(
i2c_num: i2c_port_t,
sda_io_num: libc::c_int,
scl_io_num: libc::c_int,
sda_pullup_en: bool,
scl_pullup_en: bool,
mode: i2c_mode_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Create and init I2C command link"]
#[doc = " @note"]
#[doc = " Before we build I2C command link, we need to call i2c_cmd_link_create() to create"]
#[doc = " a command link."]
#[doc = " After we finish sending the commands, we need to call i2c_cmd_link_delete() to"]
#[doc = " release and return the resources."]
#[doc = ""]
#[doc = " @return i2c command link handler"]
pub fn i2c_cmd_link_create() -> i2c_cmd_handle_t;
}
extern "C" {
#[doc = " @brief Free I2C command link"]
#[doc = " @note"]
#[doc = " Before we build I2C command link, we need to call i2c_cmd_link_create() to create"]
#[doc = " a command link."]
#[doc = " After we finish sending the commands, we need to call i2c_cmd_link_delete() to"]
#[doc = " release and return the resources."]
#[doc = ""]
#[doc = " @param cmd_handle I2C command handle"]
pub fn i2c_cmd_link_delete(cmd_handle: i2c_cmd_handle_t);
}
extern "C" {
#[doc = " @brief Queue command for I2C master to generate a start signal"]
#[doc = " @note"]
#[doc = " Only call this function in I2C master mode"]
#[doc = " Call i2c_master_cmd_begin() to send all queued commands"]
#[doc = ""]
#[doc = " @param cmd_handle I2C cmd link"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_master_start(cmd_handle: i2c_cmd_handle_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Queue command for I2C master to write one byte to I2C bus"]
#[doc = " @note"]
#[doc = " Only call this function in I2C master mode"]
#[doc = " Call i2c_master_cmd_begin() to send all queued commands"]
#[doc = ""]
#[doc = " @param cmd_handle I2C cmd link"]
#[doc = " @param data I2C one byte command to write to bus"]
#[doc = " @param ack_en enable ack check for master"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_master_write_byte(cmd_handle: i2c_cmd_handle_t, data: u8, ack_en: bool)
-> esp_err_t;
}
extern "C" {
#[doc = " @brief Queue command for I2C master to write buffer to I2C bus"]
#[doc = " @note"]
#[doc = " Only call this function in I2C master mode"]
#[doc = " Call i2c_master_cmd_begin() to send all queued commands"]
#[doc = ""]
#[doc = " @param cmd_handle I2C cmd link"]
#[doc = " @param data data to send"]
#[doc = " @note"]
#[doc = " If the psram is enabled and intr_flag is `ESP_INTR_FLAG_IRAM`, please use the memory allocated from internal RAM."]
#[doc = " @param data_len data length"]
#[doc = " @param ack_en enable ack check for master"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_master_write(
cmd_handle: i2c_cmd_handle_t,
data: *mut u8,
data_len: size_t,
ack_en: bool,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Queue command for I2C master to read one byte from I2C bus"]
#[doc = " @note"]
#[doc = " Only call this function in I2C master mode"]
#[doc = " Call i2c_master_cmd_begin() to send all queued commands"]
#[doc = ""]
#[doc = " @param cmd_handle I2C cmd link"]
#[doc = " @param data pointer accept the data byte"]
#[doc = " @note"]
#[doc = " If the psram is enabled and intr_flag is `ESP_INTR_FLAG_IRAM`, please use the memory allocated from internal RAM."]
#[doc = " @param ack ack value for read command"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_master_read_byte(
cmd_handle: i2c_cmd_handle_t,
data: *mut u8,
ack: i2c_ack_type_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Queue command for I2C master to read data from I2C bus"]
#[doc = " @note"]
#[doc = " Only call this function in I2C master mode"]
#[doc = " Call i2c_master_cmd_begin() to send all queued commands"]
#[doc = ""]
#[doc = " @param cmd_handle I2C cmd link"]
#[doc = " @param data data buffer to accept the data from bus"]
#[doc = " @note"]
#[doc = " If the psram is enabled and intr_flag is `ESP_INTR_FLAG_IRAM`, please use the memory allocated from internal RAM."]
#[doc = " @param data_len read data length"]
#[doc = " @param ack ack value for read command"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_master_read(
cmd_handle: i2c_cmd_handle_t,
data: *mut u8,
data_len: size_t,
ack: i2c_ack_type_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Queue command for I2C master to generate a stop signal"]
#[doc = " @note"]
#[doc = " Only call this function in I2C master mode"]
#[doc = " Call i2c_master_cmd_begin() to send all queued commands"]
#[doc = ""]
#[doc = " @param cmd_handle I2C cmd link"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_master_stop(cmd_handle: i2c_cmd_handle_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief I2C master send queued commands."]
#[doc = " This function will trigger sending all queued commands."]
#[doc = " The task will be blocked until all the commands have been sent out."]
#[doc = " The I2C APIs are not thread-safe, if you want to use one I2C port in different tasks,"]
#[doc = " you need to take care of the multi-thread issue."]
#[doc = " @note"]
#[doc = " Only call this function in I2C master mode"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param cmd_handle I2C command handler"]
#[doc = " @param ticks_to_wait maximum wait ticks."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
#[doc = " - ESP_FAIL Sending command error, slave doesn't ACK the transfer."]
#[doc = " - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode."]
#[doc = " - ESP_ERR_TIMEOUT Operation timeout because the bus is busy."]
pub fn i2c_master_cmd_begin(
i2c_num: i2c_port_t,
cmd_handle: i2c_cmd_handle_t,
ticks_to_wait: TickType_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief I2C slave write data to internal ringbuffer, when tx fifo empty, isr will fill the hardware"]
#[doc = " fifo from the internal ringbuffer"]
#[doc = " @note"]
#[doc = " Only call this function in I2C slave mode"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param data data pointer to write into internal buffer"]
#[doc = " @param size data size"]
#[doc = " @param ticks_to_wait Maximum waiting ticks"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_FAIL(-1) Parameter error"]
#[doc = " - Others(>=0) The number of data bytes that pushed to the I2C slave buffer."]
pub fn i2c_slave_write_buffer(
i2c_num: i2c_port_t,
data: *const u8,
size: libc::c_int,
ticks_to_wait: TickType_t,
) -> libc::c_int;
}
extern "C" {
#[doc = " @brief I2C slave read data from internal buffer. When I2C slave receive data, isr will copy received data"]
#[doc = " from hardware rx fifo to internal ringbuffer. Then users can read from internal ringbuffer."]
#[doc = " @note"]
#[doc = " Only call this function in I2C slave mode"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param data data pointer to accept data from internal buffer"]
#[doc = " @param max_size Maximum data size to read"]
#[doc = " @param ticks_to_wait Maximum waiting ticks"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_FAIL(-1) Parameter error"]
#[doc = " - Others(>=0) The number of data bytes that read from I2C slave buffer."]
pub fn i2c_slave_read_buffer(
i2c_num: i2c_port_t,
data: *mut u8,
max_size: size_t,
ticks_to_wait: TickType_t,
) -> libc::c_int;
}
extern "C" {
#[doc = " @brief set I2C master clock period"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param high_period clock cycle number during SCL is high level, high_period is a 14 bit value"]
#[doc = " @param low_period clock cycle number during SCL is low level, low_period is a 14 bit value"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_set_period(
i2c_num: i2c_port_t,
high_period: libc::c_int,
low_period: libc::c_int,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief get I2C master clock period"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param high_period pointer to get clock cycle number during SCL is high level, will get a 14 bit value"]
#[doc = " @param low_period pointer to get clock cycle number during SCL is low level, will get a 14 bit value"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_get_period(
i2c_num: i2c_port_t,
high_period: *mut libc::c_int,
low_period: *mut libc::c_int,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief enable hardware filter on I2C bus"]
#[doc = " Sometimes the I2C bus is disturbed by high frequency noise(about 20ns), or the rising edge of"]
#[doc = " the SCL clock is very slow, these may cause the master state machine broken. enable hardware"]
#[doc = " filter can filter out high frequency interference and make the master more stable."]
#[doc = " @note"]
#[doc = " Enable filter will slow the SCL clock."]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param cyc_num the APB cycles need to be filtered(0<= cyc_num <=7)."]
#[doc = " When the period of a pulse is less than cyc_num * APB_cycle, the I2C controller will ignore this pulse."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_filter_enable(i2c_num: i2c_port_t, cyc_num: u8) -> esp_err_t;
}
extern "C" {
#[doc = " @brief disable filter on I2C bus"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_filter_disable(i2c_num: i2c_port_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief set I2C master start signal timing"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param setup_time clock number between the falling-edge of SDA and rising-edge of SCL for start mark, it's a 10-bit value."]
#[doc = " @param hold_time clock num between the falling-edge of SDA and falling-edge of SCL for start mark, it's a 10-bit value."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_set_start_timing(
i2c_num: i2c_port_t,
setup_time: libc::c_int,
hold_time: libc::c_int,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief get I2C master start signal timing"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param setup_time pointer to get setup time"]
#[doc = " @param hold_time pointer to get hold time"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_get_start_timing(
i2c_num: i2c_port_t,
setup_time: *mut libc::c_int,
hold_time: *mut libc::c_int,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief set I2C master stop signal timing"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param setup_time clock num between the rising-edge of SCL and the rising-edge of SDA, it's a 10-bit value."]
#[doc = " @param hold_time clock number after the STOP bit's rising-edge, it's a 14-bit value."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_set_stop_timing(
i2c_num: i2c_port_t,
setup_time: libc::c_int,
hold_time: libc::c_int,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief get I2C master stop signal timing"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param setup_time pointer to get setup time."]
#[doc = " @param hold_time pointer to get hold time."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_get_stop_timing(
i2c_num: i2c_port_t,
setup_time: *mut libc::c_int,
hold_time: *mut libc::c_int,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief set I2C data signal timing"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param sample_time clock number I2C used to sample data on SDA after the rising-edge of SCL, it's a 10-bit value"]
#[doc = " @param hold_time clock number I2C used to hold the data after the falling-edge of SCL, it's a 10-bit value"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_set_data_timing(
i2c_num: i2c_port_t,
sample_time: libc::c_int,
hold_time: libc::c_int,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief get I2C data signal timing"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param sample_time pointer to get sample time"]
#[doc = " @param hold_time pointer to get hold time"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_get_data_timing(
i2c_num: i2c_port_t,
sample_time: *mut libc::c_int,
hold_time: *mut libc::c_int,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief set I2C timeout value"]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param timeout timeout value for I2C bus (unit: APB 80Mhz clock cycle)"]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_set_timeout(i2c_num: i2c_port_t, timeout: libc::c_int) -> esp_err_t;
}
extern "C" {
#[doc = " @brief get I2C timeout value"]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param timeout pointer to get timeout value"]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_get_timeout(i2c_num: i2c_port_t, timeout: *mut libc::c_int) -> esp_err_t;
}
extern "C" {
#[doc = " @brief set I2C data transfer mode"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param tx_trans_mode I2C sending data mode"]
#[doc = " @param rx_trans_mode I2C receving data mode"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_set_data_mode(
i2c_num: i2c_port_t,
tx_trans_mode: i2c_trans_mode_t,
rx_trans_mode: i2c_trans_mode_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief get I2C data transfer mode"]
#[doc = ""]
#[doc = " @param i2c_num I2C port number"]
#[doc = " @param tx_trans_mode pointer to get I2C sending data mode"]
#[doc = " @param rx_trans_mode pointer to get I2C receiving data mode"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2c_get_data_mode(
i2c_num: i2c_port_t,
tx_trans_mode: *mut i2c_trans_mode_t,
rx_trans_mode: *mut i2c_trans_mode_t,
) -> esp_err_t;
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum periph_module_t {
PERIPH_LEDC_MODULE = 0,
PERIPH_UART0_MODULE = 1,
PERIPH_UART1_MODULE = 2,
PERIPH_UART2_MODULE = 3,
PERIPH_I2C0_MODULE = 4,
PERIPH_I2C1_MODULE = 5,
PERIPH_I2S0_MODULE = 6,
PERIPH_I2S1_MODULE = 7,
PERIPH_TIMG0_MODULE = 8,
PERIPH_TIMG1_MODULE = 9,
PERIPH_PWM0_MODULE = 10,
PERIPH_PWM1_MODULE = 11,
PERIPH_PWM2_MODULE = 12,
PERIPH_PWM3_MODULE = 13,
PERIPH_UHCI0_MODULE = 14,
PERIPH_UHCI1_MODULE = 15,
PERIPH_RMT_MODULE = 16,
PERIPH_PCNT_MODULE = 17,
PERIPH_SPI_MODULE = 18,
PERIPH_HSPI_MODULE = 19,
PERIPH_VSPI_MODULE = 20,
PERIPH_SPI_DMA_MODULE = 21,
PERIPH_SDMMC_MODULE = 22,
PERIPH_SDIO_SLAVE_MODULE = 23,
PERIPH_CAN_MODULE = 24,
PERIPH_EMAC_MODULE = 25,
PERIPH_RNG_MODULE = 26,
PERIPH_WIFI_MODULE = 27,
PERIPH_BT_MODULE = 28,
PERIPH_WIFI_BT_COMMON_MODULE = 29,
PERIPH_BT_BASEBAND_MODULE = 30,
PERIPH_BT_LC_MODULE = 31,
PERIPH_AES_MODULE = 32,
PERIPH_SHA_MODULE = 33,
PERIPH_RSA_MODULE = 34,
PERIPH_MODULE_MAX = 35,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub struct i2s_dev_s {
pub reserved_0: u32,
pub reserved_4: u32,
pub conf: i2s_dev_s__bindgen_ty_1,
pub int_raw: i2s_dev_s__bindgen_ty_2,
pub int_st: i2s_dev_s__bindgen_ty_3,
pub int_ena: i2s_dev_s__bindgen_ty_4,
pub int_clr: i2s_dev_s__bindgen_ty_5,
pub timing: i2s_dev_s__bindgen_ty_6,
pub fifo_conf: i2s_dev_s__bindgen_ty_7,
pub rx_eof_num: u32,
pub conf_single_data: u32,
pub conf_chan: i2s_dev_s__bindgen_ty_8,
pub out_link: i2s_dev_s__bindgen_ty_9,
pub in_link: i2s_dev_s__bindgen_ty_10,
pub out_eof_des_addr: u32,
pub in_eof_des_addr: u32,
pub out_eof_bfr_des_addr: u32,
pub ahb_test: i2s_dev_s__bindgen_ty_11,
pub in_link_dscr: u32,
pub in_link_dscr_bf0: u32,
pub in_link_dscr_bf1: u32,
pub out_link_dscr: u32,
pub out_link_dscr_bf0: u32,
pub out_link_dscr_bf1: u32,
pub lc_conf: i2s_dev_s__bindgen_ty_12,
pub out_fifo_push: i2s_dev_s__bindgen_ty_13,
pub in_fifo_pop: i2s_dev_s__bindgen_ty_14,
pub lc_state0: u32,
pub lc_state1: u32,
pub lc_hung_conf: i2s_dev_s__bindgen_ty_15,
pub reserved_78: u32,
pub reserved_7c: u32,
pub cvsd_conf0: i2s_dev_s__bindgen_ty_16,
pub cvsd_conf1: i2s_dev_s__bindgen_ty_17,
pub cvsd_conf2: i2s_dev_s__bindgen_ty_18,
pub plc_conf0: i2s_dev_s__bindgen_ty_19,
pub plc_conf1: i2s_dev_s__bindgen_ty_20,
pub plc_conf2: i2s_dev_s__bindgen_ty_21,
pub esco_conf0: i2s_dev_s__bindgen_ty_22,
pub sco_conf0: i2s_dev_s__bindgen_ty_23,
pub conf1: i2s_dev_s__bindgen_ty_24,
pub pd_conf: i2s_dev_s__bindgen_ty_25,
pub conf2: i2s_dev_s__bindgen_ty_26,
pub clkm_conf: i2s_dev_s__bindgen_ty_27,
pub sample_rate_conf: i2s_dev_s__bindgen_ty_28,
pub pdm_conf: i2s_dev_s__bindgen_ty_29,
pub pdm_freq_conf: i2s_dev_s__bindgen_ty_30,
pub state: i2s_dev_s__bindgen_ty_31,
pub reserved_c0: u32,
pub reserved_c4: u32,
pub reserved_c8: u32,
pub reserved_cc: u32,
pub reserved_d0: u32,
pub reserved_d4: u32,
pub reserved_d8: u32,
pub reserved_dc: u32,
pub reserved_e0: u32,
pub reserved_e4: u32,
pub reserved_e8: u32,
pub reserved_ec: u32,
pub reserved_f0: u32,
pub reserved_f4: u32,
pub reserved_f8: u32,
pub date: u32,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_1 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_1__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_1__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl i2s_dev_s__bindgen_ty_1__bindgen_ty_1 {
#[inline]
pub fn tx_reset(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_reset(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_reset(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_reset(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_fifo_reset(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_fifo_reset(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_fifo_reset(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_fifo_reset(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_start(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_start(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_start(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_start(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_slave_mod(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_slave_mod(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_slave_mod(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_slave_mod(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_right_first(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_right_first(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_right_first(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_right_first(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_msb_shift(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_msb_shift(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_msb_shift(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_msb_shift(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_short_sync(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_short_sync(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_short_sync(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_short_sync(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_mono(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_mono(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_mono(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_mono(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_msb_right(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_msb_right(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_msb_right(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_msb_right(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 1u8, val as u64)
}
}
#[inline]
pub fn sig_loopback(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 1u8) as u32) }
}
#[inline]
pub fn set_sig_loopback(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved19(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 13u8) as u32) }
}
#[inline]
pub fn set_reserved19(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 13u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
tx_reset: u32,
rx_reset: u32,
tx_fifo_reset: u32,
rx_fifo_reset: u32,
tx_start: u32,
rx_start: u32,
tx_slave_mod: u32,
rx_slave_mod: u32,
tx_right_first: u32,
rx_right_first: u32,
tx_msb_shift: u32,
rx_msb_shift: u32,
tx_short_sync: u32,
rx_short_sync: u32,
tx_mono: u32,
rx_mono: u32,
tx_msb_right: u32,
rx_msb_right: u32,
sig_loopback: u32,
reserved19: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let tx_reset: u32 = unsafe { ::core::mem::transmute(tx_reset) };
tx_reset as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let rx_reset: u32 = unsafe { ::core::mem::transmute(rx_reset) };
rx_reset as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let tx_fifo_reset: u32 = unsafe { ::core::mem::transmute(tx_fifo_reset) };
tx_fifo_reset as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let rx_fifo_reset: u32 = unsafe { ::core::mem::transmute(rx_fifo_reset) };
rx_fifo_reset as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let tx_start: u32 = unsafe { ::core::mem::transmute(tx_start) };
tx_start as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let rx_start: u32 = unsafe { ::core::mem::transmute(rx_start) };
rx_start as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let tx_slave_mod: u32 = unsafe { ::core::mem::transmute(tx_slave_mod) };
tx_slave_mod as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let rx_slave_mod: u32 = unsafe { ::core::mem::transmute(rx_slave_mod) };
rx_slave_mod as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let tx_right_first: u32 = unsafe { ::core::mem::transmute(tx_right_first) };
tx_right_first as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let rx_right_first: u32 = unsafe { ::core::mem::transmute(rx_right_first) };
rx_right_first as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let tx_msb_shift: u32 = unsafe { ::core::mem::transmute(tx_msb_shift) };
tx_msb_shift as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let rx_msb_shift: u32 = unsafe { ::core::mem::transmute(rx_msb_shift) };
rx_msb_shift as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let tx_short_sync: u32 = unsafe { ::core::mem::transmute(tx_short_sync) };
tx_short_sync as u64
});
__bindgen_bitfield_unit.set(13usize, 1u8, {
let rx_short_sync: u32 = unsafe { ::core::mem::transmute(rx_short_sync) };
rx_short_sync as u64
});
__bindgen_bitfield_unit.set(14usize, 1u8, {
let tx_mono: u32 = unsafe { ::core::mem::transmute(tx_mono) };
tx_mono as u64
});
__bindgen_bitfield_unit.set(15usize, 1u8, {
let rx_mono: u32 = unsafe { ::core::mem::transmute(rx_mono) };
rx_mono as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let tx_msb_right: u32 = unsafe { ::core::mem::transmute(tx_msb_right) };
tx_msb_right as u64
});
__bindgen_bitfield_unit.set(17usize, 1u8, {
let rx_msb_right: u32 = unsafe { ::core::mem::transmute(rx_msb_right) };
rx_msb_right as u64
});
__bindgen_bitfield_unit.set(18usize, 1u8, {
let sig_loopback: u32 = unsafe { ::core::mem::transmute(sig_loopback) };
sig_loopback as u64
});
__bindgen_bitfield_unit.set(19usize, 13u8, {
let reserved19: u32 = unsafe { ::core::mem::transmute(reserved19) };
reserved19 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_2 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_2__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_2__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl i2s_dev_s__bindgen_ty_2__bindgen_ty_1 {
#[inline]
pub fn rx_take_data(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_take_data(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_put_data(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_put_data(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_wfull(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_wfull(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_rempty(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_rempty(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_wfull(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_wfull(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_rempty(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_rempty(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_hung(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_hung(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_hung(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_hung(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_done(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_done(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_suc_eof(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_suc_eof(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_err_eof(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_err_eof(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_done(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_done(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_eof(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_eof(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_dscr_err(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_dscr_err(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_dscr_err(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_dscr_err(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_dscr_empty(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_dscr_empty(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_total_eof(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_total_eof(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved17(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 15u8) as u32) }
}
#[inline]
pub fn set_reserved17(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 15u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
rx_take_data: u32,
tx_put_data: u32,
rx_wfull: u32,
rx_rempty: u32,
tx_wfull: u32,
tx_rempty: u32,
rx_hung: u32,
tx_hung: u32,
in_done: u32,
in_suc_eof: u32,
in_err_eof: u32,
out_done: u32,
out_eof: u32,
in_dscr_err: u32,
out_dscr_err: u32,
in_dscr_empty: u32,
out_total_eof: u32,
reserved17: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let rx_take_data: u32 = unsafe { ::core::mem::transmute(rx_take_data) };
rx_take_data as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let tx_put_data: u32 = unsafe { ::core::mem::transmute(tx_put_data) };
tx_put_data as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let rx_wfull: u32 = unsafe { ::core::mem::transmute(rx_wfull) };
rx_wfull as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let rx_rempty: u32 = unsafe { ::core::mem::transmute(rx_rempty) };
rx_rempty as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let tx_wfull: u32 = unsafe { ::core::mem::transmute(tx_wfull) };
tx_wfull as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let tx_rempty: u32 = unsafe { ::core::mem::transmute(tx_rempty) };
tx_rempty as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let rx_hung: u32 = unsafe { ::core::mem::transmute(rx_hung) };
rx_hung as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let tx_hung: u32 = unsafe { ::core::mem::transmute(tx_hung) };
tx_hung as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let in_done: u32 = unsafe { ::core::mem::transmute(in_done) };
in_done as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let in_suc_eof: u32 = unsafe { ::core::mem::transmute(in_suc_eof) };
in_suc_eof as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let in_err_eof: u32 = unsafe { ::core::mem::transmute(in_err_eof) };
in_err_eof as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let out_done: u32 = unsafe { ::core::mem::transmute(out_done) };
out_done as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let out_eof: u32 = unsafe { ::core::mem::transmute(out_eof) };
out_eof as u64
});
__bindgen_bitfield_unit.set(13usize, 1u8, {
let in_dscr_err: u32 = unsafe { ::core::mem::transmute(in_dscr_err) };
in_dscr_err as u64
});
__bindgen_bitfield_unit.set(14usize, 1u8, {
let out_dscr_err: u32 = unsafe { ::core::mem::transmute(out_dscr_err) };
out_dscr_err as u64
});
__bindgen_bitfield_unit.set(15usize, 1u8, {
let in_dscr_empty: u32 = unsafe { ::core::mem::transmute(in_dscr_empty) };
in_dscr_empty as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let out_total_eof: u32 = unsafe { ::core::mem::transmute(out_total_eof) };
out_total_eof as u64
});
__bindgen_bitfield_unit.set(17usize, 15u8, {
let reserved17: u32 = unsafe { ::core::mem::transmute(reserved17) };
reserved17 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_3 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_3__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_3__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl i2s_dev_s__bindgen_ty_3__bindgen_ty_1 {
#[inline]
pub fn rx_take_data(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_take_data(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_put_data(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_put_data(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_wfull(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_wfull(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_rempty(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_rempty(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_wfull(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_wfull(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_rempty(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_rempty(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_hung(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_hung(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_hung(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_hung(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_done(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_done(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_suc_eof(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_suc_eof(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_err_eof(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_err_eof(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_done(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_done(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_eof(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_eof(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_dscr_err(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_dscr_err(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_dscr_err(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_dscr_err(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_dscr_empty(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_dscr_empty(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_total_eof(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_total_eof(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved17(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 15u8) as u32) }
}
#[inline]
pub fn set_reserved17(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 15u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
rx_take_data: u32,
tx_put_data: u32,
rx_wfull: u32,
rx_rempty: u32,
tx_wfull: u32,
tx_rempty: u32,
rx_hung: u32,
tx_hung: u32,
in_done: u32,
in_suc_eof: u32,
in_err_eof: u32,
out_done: u32,
out_eof: u32,
in_dscr_err: u32,
out_dscr_err: u32,
in_dscr_empty: u32,
out_total_eof: u32,
reserved17: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let rx_take_data: u32 = unsafe { ::core::mem::transmute(rx_take_data) };
rx_take_data as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let tx_put_data: u32 = unsafe { ::core::mem::transmute(tx_put_data) };
tx_put_data as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let rx_wfull: u32 = unsafe { ::core::mem::transmute(rx_wfull) };
rx_wfull as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let rx_rempty: u32 = unsafe { ::core::mem::transmute(rx_rempty) };
rx_rempty as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let tx_wfull: u32 = unsafe { ::core::mem::transmute(tx_wfull) };
tx_wfull as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let tx_rempty: u32 = unsafe { ::core::mem::transmute(tx_rempty) };
tx_rempty as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let rx_hung: u32 = unsafe { ::core::mem::transmute(rx_hung) };
rx_hung as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let tx_hung: u32 = unsafe { ::core::mem::transmute(tx_hung) };
tx_hung as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let in_done: u32 = unsafe { ::core::mem::transmute(in_done) };
in_done as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let in_suc_eof: u32 = unsafe { ::core::mem::transmute(in_suc_eof) };
in_suc_eof as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let in_err_eof: u32 = unsafe { ::core::mem::transmute(in_err_eof) };
in_err_eof as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let out_done: u32 = unsafe { ::core::mem::transmute(out_done) };
out_done as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let out_eof: u32 = unsafe { ::core::mem::transmute(out_eof) };
out_eof as u64
});
__bindgen_bitfield_unit.set(13usize, 1u8, {
let in_dscr_err: u32 = unsafe { ::core::mem::transmute(in_dscr_err) };
in_dscr_err as u64
});
__bindgen_bitfield_unit.set(14usize, 1u8, {
let out_dscr_err: u32 = unsafe { ::core::mem::transmute(out_dscr_err) };
out_dscr_err as u64
});
__bindgen_bitfield_unit.set(15usize, 1u8, {
let in_dscr_empty: u32 = unsafe { ::core::mem::transmute(in_dscr_empty) };
in_dscr_empty as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let out_total_eof: u32 = unsafe { ::core::mem::transmute(out_total_eof) };
out_total_eof as u64
});
__bindgen_bitfield_unit.set(17usize, 15u8, {
let reserved17: u32 = unsafe { ::core::mem::transmute(reserved17) };
reserved17 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_4 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_4__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_4__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl i2s_dev_s__bindgen_ty_4__bindgen_ty_1 {
#[inline]
pub fn rx_take_data(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_take_data(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_put_data(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_put_data(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_wfull(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_wfull(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_rempty(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_rempty(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_wfull(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_wfull(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_rempty(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_rempty(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_hung(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_hung(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_hung(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_hung(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_done(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_done(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_suc_eof(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_suc_eof(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_err_eof(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_err_eof(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_done(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_done(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_eof(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_eof(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_dscr_err(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_dscr_err(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_dscr_err(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_dscr_err(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_dscr_empty(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_dscr_empty(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_total_eof(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_total_eof(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved17(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 15u8) as u32) }
}
#[inline]
pub fn set_reserved17(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 15u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
rx_take_data: u32,
tx_put_data: u32,
rx_wfull: u32,
rx_rempty: u32,
tx_wfull: u32,
tx_rempty: u32,
rx_hung: u32,
tx_hung: u32,
in_done: u32,
in_suc_eof: u32,
in_err_eof: u32,
out_done: u32,
out_eof: u32,
in_dscr_err: u32,
out_dscr_err: u32,
in_dscr_empty: u32,
out_total_eof: u32,
reserved17: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let rx_take_data: u32 = unsafe { ::core::mem::transmute(rx_take_data) };
rx_take_data as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let tx_put_data: u32 = unsafe { ::core::mem::transmute(tx_put_data) };
tx_put_data as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let rx_wfull: u32 = unsafe { ::core::mem::transmute(rx_wfull) };
rx_wfull as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let rx_rempty: u32 = unsafe { ::core::mem::transmute(rx_rempty) };
rx_rempty as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let tx_wfull: u32 = unsafe { ::core::mem::transmute(tx_wfull) };
tx_wfull as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let tx_rempty: u32 = unsafe { ::core::mem::transmute(tx_rempty) };
tx_rempty as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let rx_hung: u32 = unsafe { ::core::mem::transmute(rx_hung) };
rx_hung as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let tx_hung: u32 = unsafe { ::core::mem::transmute(tx_hung) };
tx_hung as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let in_done: u32 = unsafe { ::core::mem::transmute(in_done) };
in_done as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let in_suc_eof: u32 = unsafe { ::core::mem::transmute(in_suc_eof) };
in_suc_eof as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let in_err_eof: u32 = unsafe { ::core::mem::transmute(in_err_eof) };
in_err_eof as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let out_done: u32 = unsafe { ::core::mem::transmute(out_done) };
out_done as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let out_eof: u32 = unsafe { ::core::mem::transmute(out_eof) };
out_eof as u64
});
__bindgen_bitfield_unit.set(13usize, 1u8, {
let in_dscr_err: u32 = unsafe { ::core::mem::transmute(in_dscr_err) };
in_dscr_err as u64
});
__bindgen_bitfield_unit.set(14usize, 1u8, {
let out_dscr_err: u32 = unsafe { ::core::mem::transmute(out_dscr_err) };
out_dscr_err as u64
});
__bindgen_bitfield_unit.set(15usize, 1u8, {
let in_dscr_empty: u32 = unsafe { ::core::mem::transmute(in_dscr_empty) };
in_dscr_empty as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let out_total_eof: u32 = unsafe { ::core::mem::transmute(out_total_eof) };
out_total_eof as u64
});
__bindgen_bitfield_unit.set(17usize, 15u8, {
let reserved17: u32 = unsafe { ::core::mem::transmute(reserved17) };
reserved17 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_5 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_5__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_5__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl i2s_dev_s__bindgen_ty_5__bindgen_ty_1 {
#[inline]
pub fn take_data(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_take_data(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn put_data(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_put_data(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_wfull(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_wfull(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_rempty(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_rempty(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_wfull(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_wfull(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_rempty(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_rempty(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_hung(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_hung(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_hung(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_hung(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_done(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_done(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_suc_eof(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_suc_eof(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_err_eof(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_err_eof(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_done(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_done(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_eof(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_eof(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_dscr_err(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_dscr_err(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_dscr_err(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_dscr_err(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_dscr_empty(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_dscr_empty(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_total_eof(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_total_eof(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved17(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 15u8) as u32) }
}
#[inline]
pub fn set_reserved17(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 15u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
take_data: u32,
put_data: u32,
rx_wfull: u32,
rx_rempty: u32,
tx_wfull: u32,
tx_rempty: u32,
rx_hung: u32,
tx_hung: u32,
in_done: u32,
in_suc_eof: u32,
in_err_eof: u32,
out_done: u32,
out_eof: u32,
in_dscr_err: u32,
out_dscr_err: u32,
in_dscr_empty: u32,
out_total_eof: u32,
reserved17: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let take_data: u32 = unsafe { ::core::mem::transmute(take_data) };
take_data as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let put_data: u32 = unsafe { ::core::mem::transmute(put_data) };
put_data as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let rx_wfull: u32 = unsafe { ::core::mem::transmute(rx_wfull) };
rx_wfull as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let rx_rempty: u32 = unsafe { ::core::mem::transmute(rx_rempty) };
rx_rempty as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let tx_wfull: u32 = unsafe { ::core::mem::transmute(tx_wfull) };
tx_wfull as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let tx_rempty: u32 = unsafe { ::core::mem::transmute(tx_rempty) };
tx_rempty as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let rx_hung: u32 = unsafe { ::core::mem::transmute(rx_hung) };
rx_hung as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let tx_hung: u32 = unsafe { ::core::mem::transmute(tx_hung) };
tx_hung as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let in_done: u32 = unsafe { ::core::mem::transmute(in_done) };
in_done as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let in_suc_eof: u32 = unsafe { ::core::mem::transmute(in_suc_eof) };
in_suc_eof as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let in_err_eof: u32 = unsafe { ::core::mem::transmute(in_err_eof) };
in_err_eof as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let out_done: u32 = unsafe { ::core::mem::transmute(out_done) };
out_done as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let out_eof: u32 = unsafe { ::core::mem::transmute(out_eof) };
out_eof as u64
});
__bindgen_bitfield_unit.set(13usize, 1u8, {
let in_dscr_err: u32 = unsafe { ::core::mem::transmute(in_dscr_err) };
in_dscr_err as u64
});
__bindgen_bitfield_unit.set(14usize, 1u8, {
let out_dscr_err: u32 = unsafe { ::core::mem::transmute(out_dscr_err) };
out_dscr_err as u64
});
__bindgen_bitfield_unit.set(15usize, 1u8, {
let in_dscr_empty: u32 = unsafe { ::core::mem::transmute(in_dscr_empty) };
in_dscr_empty as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let out_total_eof: u32 = unsafe { ::core::mem::transmute(out_total_eof) };
out_total_eof as u64
});
__bindgen_bitfield_unit.set(17usize, 15u8, {
let reserved17: u32 = unsafe { ::core::mem::transmute(reserved17) };
reserved17 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_6 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_6__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_6__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl i2s_dev_s__bindgen_ty_6__bindgen_ty_1 {
#[inline]
pub fn tx_bck_in_delay(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 2u8) as u32) }
}
#[inline]
pub fn set_tx_bck_in_delay(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 2u8, val as u64)
}
}
#[inline]
pub fn tx_ws_in_delay(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 2u8) as u32) }
}
#[inline]
pub fn set_tx_ws_in_delay(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 2u8, val as u64)
}
}
#[inline]
pub fn rx_bck_in_delay(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 2u8) as u32) }
}
#[inline]
pub fn set_rx_bck_in_delay(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 2u8, val as u64)
}
}
#[inline]
pub fn rx_ws_in_delay(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 2u8) as u32) }
}
#[inline]
pub fn set_rx_ws_in_delay(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 2u8, val as u64)
}
}
#[inline]
pub fn rx_sd_in_delay(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 2u8) as u32) }
}
#[inline]
pub fn set_rx_sd_in_delay(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 2u8, val as u64)
}
}
#[inline]
pub fn tx_bck_out_delay(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 2u8) as u32) }
}
#[inline]
pub fn set_tx_bck_out_delay(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 2u8, val as u64)
}
}
#[inline]
pub fn tx_ws_out_delay(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 2u8) as u32) }
}
#[inline]
pub fn set_tx_ws_out_delay(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 2u8, val as u64)
}
}
#[inline]
pub fn tx_sd_out_delay(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 2u8) as u32) }
}
#[inline]
pub fn set_tx_sd_out_delay(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 2u8, val as u64)
}
}
#[inline]
pub fn rx_ws_out_delay(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 2u8) as u32) }
}
#[inline]
pub fn set_rx_ws_out_delay(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 2u8, val as u64)
}
}
#[inline]
pub fn rx_bck_out_delay(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 2u8) as u32) }
}
#[inline]
pub fn set_rx_bck_out_delay(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 2u8, val as u64)
}
}
#[inline]
pub fn tx_dsync_sw(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_dsync_sw(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_dsync_sw(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(21usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_dsync_sw(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(21usize, 1u8, val as u64)
}
}
#[inline]
pub fn data_enable_delay(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 2u8) as u32) }
}
#[inline]
pub fn set_data_enable_delay(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 2u8, val as u64)
}
}
#[inline]
pub fn tx_bck_in_inv(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_bck_in_inv(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved25(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 7u8) as u32) }
}
#[inline]
pub fn set_reserved25(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 7u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
tx_bck_in_delay: u32,
tx_ws_in_delay: u32,
rx_bck_in_delay: u32,
rx_ws_in_delay: u32,
rx_sd_in_delay: u32,
tx_bck_out_delay: u32,
tx_ws_out_delay: u32,
tx_sd_out_delay: u32,
rx_ws_out_delay: u32,
rx_bck_out_delay: u32,
tx_dsync_sw: u32,
rx_dsync_sw: u32,
data_enable_delay: u32,
tx_bck_in_inv: u32,
reserved25: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 2u8, {
let tx_bck_in_delay: u32 = unsafe { ::core::mem::transmute(tx_bck_in_delay) };
tx_bck_in_delay as u64
});
__bindgen_bitfield_unit.set(2usize, 2u8, {
let tx_ws_in_delay: u32 = unsafe { ::core::mem::transmute(tx_ws_in_delay) };
tx_ws_in_delay as u64
});
__bindgen_bitfield_unit.set(4usize, 2u8, {
let rx_bck_in_delay: u32 = unsafe { ::core::mem::transmute(rx_bck_in_delay) };
rx_bck_in_delay as u64
});
__bindgen_bitfield_unit.set(6usize, 2u8, {
let rx_ws_in_delay: u32 = unsafe { ::core::mem::transmute(rx_ws_in_delay) };
rx_ws_in_delay as u64
});
__bindgen_bitfield_unit.set(8usize, 2u8, {
let rx_sd_in_delay: u32 = unsafe { ::core::mem::transmute(rx_sd_in_delay) };
rx_sd_in_delay as u64
});
__bindgen_bitfield_unit.set(10usize, 2u8, {
let tx_bck_out_delay: u32 = unsafe { ::core::mem::transmute(tx_bck_out_delay) };
tx_bck_out_delay as u64
});
__bindgen_bitfield_unit.set(12usize, 2u8, {
let tx_ws_out_delay: u32 = unsafe { ::core::mem::transmute(tx_ws_out_delay) };
tx_ws_out_delay as u64
});
__bindgen_bitfield_unit.set(14usize, 2u8, {
let tx_sd_out_delay: u32 = unsafe { ::core::mem::transmute(tx_sd_out_delay) };
tx_sd_out_delay as u64
});
__bindgen_bitfield_unit.set(16usize, 2u8, {
let rx_ws_out_delay: u32 = unsafe { ::core::mem::transmute(rx_ws_out_delay) };
rx_ws_out_delay as u64
});
__bindgen_bitfield_unit.set(18usize, 2u8, {
let rx_bck_out_delay: u32 = unsafe { ::core::mem::transmute(rx_bck_out_delay) };
rx_bck_out_delay as u64
});
__bindgen_bitfield_unit.set(20usize, 1u8, {
let tx_dsync_sw: u32 = unsafe { ::core::mem::transmute(tx_dsync_sw) };
tx_dsync_sw as u64
});
__bindgen_bitfield_unit.set(21usize, 1u8, {
let rx_dsync_sw: u32 = unsafe { ::core::mem::transmute(rx_dsync_sw) };
rx_dsync_sw as u64
});
__bindgen_bitfield_unit.set(22usize, 2u8, {
let data_enable_delay: u32 = unsafe { ::core::mem::transmute(data_enable_delay) };
data_enable_delay as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let tx_bck_in_inv: u32 = unsafe { ::core::mem::transmute(tx_bck_in_inv) };
tx_bck_in_inv as u64
});
__bindgen_bitfield_unit.set(25usize, 7u8, {
let reserved25: u32 = unsafe { ::core::mem::transmute(reserved25) };
reserved25 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_7 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_7__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_7__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl i2s_dev_s__bindgen_ty_7__bindgen_ty_1 {
#[inline]
pub fn rx_data_num(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 6u8) as u32) }
}
#[inline]
pub fn set_rx_data_num(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 6u8, val as u64)
}
}
#[inline]
pub fn tx_data_num(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 6u8) as u32) }
}
#[inline]
pub fn set_tx_data_num(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 6u8, val as u64)
}
}
#[inline]
pub fn dscr_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_dscr_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_fifo_mod(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 3u8) as u32) }
}
#[inline]
pub fn set_tx_fifo_mod(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 3u8, val as u64)
}
}
#[inline]
pub fn rx_fifo_mod(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 3u8) as u32) }
}
#[inline]
pub fn set_rx_fifo_mod(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 3u8, val as u64)
}
}
#[inline]
pub fn tx_fifo_mod_force_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_fifo_mod_force_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_fifo_mod_force_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_fifo_mod_force_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved21(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(21usize, 11u8) as u32) }
}
#[inline]
pub fn set_reserved21(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(21usize, 11u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
rx_data_num: u32,
tx_data_num: u32,
dscr_en: u32,
tx_fifo_mod: u32,
rx_fifo_mod: u32,
tx_fifo_mod_force_en: u32,
rx_fifo_mod_force_en: u32,
reserved21: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 6u8, {
let rx_data_num: u32 = unsafe { ::core::mem::transmute(rx_data_num) };
rx_data_num as u64
});
__bindgen_bitfield_unit.set(6usize, 6u8, {
let tx_data_num: u32 = unsafe { ::core::mem::transmute(tx_data_num) };
tx_data_num as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let dscr_en: u32 = unsafe { ::core::mem::transmute(dscr_en) };
dscr_en as u64
});
__bindgen_bitfield_unit.set(13usize, 3u8, {
let tx_fifo_mod: u32 = unsafe { ::core::mem::transmute(tx_fifo_mod) };
tx_fifo_mod as u64
});
__bindgen_bitfield_unit.set(16usize, 3u8, {
let rx_fifo_mod: u32 = unsafe { ::core::mem::transmute(rx_fifo_mod) };
rx_fifo_mod as u64
});
__bindgen_bitfield_unit.set(19usize, 1u8, {
let tx_fifo_mod_force_en: u32 = unsafe { ::core::mem::transmute(tx_fifo_mod_force_en) };
tx_fifo_mod_force_en as u64
});
__bindgen_bitfield_unit.set(20usize, 1u8, {
let rx_fifo_mod_force_en: u32 = unsafe { ::core::mem::transmute(rx_fifo_mod_force_en) };
rx_fifo_mod_force_en as u64
});
__bindgen_bitfield_unit.set(21usize, 11u8, {
let reserved21: u32 = unsafe { ::core::mem::transmute(reserved21) };
reserved21 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_8 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_8__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_8__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl i2s_dev_s__bindgen_ty_8__bindgen_ty_1 {
#[inline]
pub fn tx_chan_mod(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 3u8) as u32) }
}
#[inline]
pub fn set_tx_chan_mod(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 3u8, val as u64)
}
}
#[inline]
pub fn rx_chan_mod(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 2u8) as u32) }
}
#[inline]
pub fn set_rx_chan_mod(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 2u8, val as u64)
}
}
#[inline]
pub fn reserved5(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 27u8) as u32) }
}
#[inline]
pub fn set_reserved5(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 27u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
tx_chan_mod: u32,
rx_chan_mod: u32,
reserved5: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 3u8, {
let tx_chan_mod: u32 = unsafe { ::core::mem::transmute(tx_chan_mod) };
tx_chan_mod as u64
});
__bindgen_bitfield_unit.set(3usize, 2u8, {
let rx_chan_mod: u32 = unsafe { ::core::mem::transmute(rx_chan_mod) };
rx_chan_mod as u64
});
__bindgen_bitfield_unit.set(5usize, 27u8, {
let reserved5: u32 = unsafe { ::core::mem::transmute(reserved5) };
reserved5 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_9 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_9__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_9__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl i2s_dev_s__bindgen_ty_9__bindgen_ty_1 {
#[inline]
pub fn addr(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 20u8) as u32) }
}
#[inline]
pub fn set_addr(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 20u8, val as u64)
}
}
#[inline]
pub fn reserved20(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 8u8) as u32) }
}
#[inline]
pub fn set_reserved20(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 8u8, val as u64)
}
}
#[inline]
pub fn stop(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 1u8) as u32) }
}
#[inline]
pub fn set_stop(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 1u8, val as u64)
}
}
#[inline]
pub fn start(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 1u8) as u32) }
}
#[inline]
pub fn set_start(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 1u8, val as u64)
}
}
#[inline]
pub fn restart(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_restart(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn park(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_park(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
addr: u32,
reserved20: u32,
stop: u32,
start: u32,
restart: u32,
park: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 20u8, {
let addr: u32 = unsafe { ::core::mem::transmute(addr) };
addr as u64
});
__bindgen_bitfield_unit.set(20usize, 8u8, {
let reserved20: u32 = unsafe { ::core::mem::transmute(reserved20) };
reserved20 as u64
});
__bindgen_bitfield_unit.set(28usize, 1u8, {
let stop: u32 = unsafe { ::core::mem::transmute(stop) };
stop as u64
});
__bindgen_bitfield_unit.set(29usize, 1u8, {
let start: u32 = unsafe { ::core::mem::transmute(start) };
start as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let restart: u32 = unsafe { ::core::mem::transmute(restart) };
restart as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let park: u32 = unsafe { ::core::mem::transmute(park) };
park as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_10 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_10__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_10__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl i2s_dev_s__bindgen_ty_10__bindgen_ty_1 {
#[inline]
pub fn addr(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 20u8) as u32) }
}
#[inline]
pub fn set_addr(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 20u8, val as u64)
}
}
#[inline]
pub fn reserved20(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 8u8) as u32) }
}
#[inline]
pub fn set_reserved20(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 8u8, val as u64)
}
}
#[inline]
pub fn stop(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 1u8) as u32) }
}
#[inline]
pub fn set_stop(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 1u8, val as u64)
}
}
#[inline]
pub fn start(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 1u8) as u32) }
}
#[inline]
pub fn set_start(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 1u8, val as u64)
}
}
#[inline]
pub fn restart(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_restart(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn park(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_park(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
addr: u32,
reserved20: u32,
stop: u32,
start: u32,
restart: u32,
park: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 20u8, {
let addr: u32 = unsafe { ::core::mem::transmute(addr) };
addr as u64
});
__bindgen_bitfield_unit.set(20usize, 8u8, {
let reserved20: u32 = unsafe { ::core::mem::transmute(reserved20) };
reserved20 as u64
});
__bindgen_bitfield_unit.set(28usize, 1u8, {
let stop: u32 = unsafe { ::core::mem::transmute(stop) };
stop as u64
});
__bindgen_bitfield_unit.set(29usize, 1u8, {
let start: u32 = unsafe { ::core::mem::transmute(start) };
start as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let restart: u32 = unsafe { ::core::mem::transmute(restart) };
restart as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let park: u32 = unsafe { ::core::mem::transmute(park) };
park as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_11 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_11__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_11__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl i2s_dev_s__bindgen_ty_11__bindgen_ty_1 {
#[inline]
pub fn mode(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 3u8) as u32) }
}
#[inline]
pub fn set_mode(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 3u8, val as u64)
}
}
#[inline]
pub fn reserved3(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_reserved3(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn addr(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 2u8) as u32) }
}
#[inline]
pub fn set_addr(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 2u8, val as u64)
}
}
#[inline]
pub fn reserved6(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 26u8) as u32) }
}
#[inline]
pub fn set_reserved6(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 26u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
mode: u32,
reserved3: u32,
addr: u32,
reserved6: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 3u8, {
let mode: u32 = unsafe { ::core::mem::transmute(mode) };
mode as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let reserved3: u32 = unsafe { ::core::mem::transmute(reserved3) };
reserved3 as u64
});
__bindgen_bitfield_unit.set(4usize, 2u8, {
let addr: u32 = unsafe { ::core::mem::transmute(addr) };
addr as u64
});
__bindgen_bitfield_unit.set(6usize, 26u8, {
let reserved6: u32 = unsafe { ::core::mem::transmute(reserved6) };
reserved6 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_12 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_12__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_12__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl i2s_dev_s__bindgen_ty_12__bindgen_ty_1 {
#[inline]
pub fn in_rst(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_rst(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_rst(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_rst(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn ahbm_fifo_rst(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_ahbm_fifo_rst(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn ahbm_rst(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_ahbm_rst(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_loop_test(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_loop_test(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn in_loop_test(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_in_loop_test(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_auto_wrback(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_auto_wrback(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_no_restart_clr(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_no_restart_clr(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_eof_mode(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_eof_mode(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn outdscr_burst_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_outdscr_burst_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn indscr_burst_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_indscr_burst_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn out_data_burst_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_out_data_burst_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn check_owner(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_check_owner(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn mem_trans_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 1u8) as u32) }
}
#[inline]
pub fn set_mem_trans_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved14(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 18u8) as u32) }
}
#[inline]
pub fn set_reserved14(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 18u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
in_rst: u32,
out_rst: u32,
ahbm_fifo_rst: u32,
ahbm_rst: u32,
out_loop_test: u32,
in_loop_test: u32,
out_auto_wrback: u32,
out_no_restart_clr: u32,
out_eof_mode: u32,
outdscr_burst_en: u32,
indscr_burst_en: u32,
out_data_burst_en: u32,
check_owner: u32,
mem_trans_en: u32,
reserved14: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let in_rst: u32 = unsafe { ::core::mem::transmute(in_rst) };
in_rst as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let out_rst: u32 = unsafe { ::core::mem::transmute(out_rst) };
out_rst as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let ahbm_fifo_rst: u32 = unsafe { ::core::mem::transmute(ahbm_fifo_rst) };
ahbm_fifo_rst as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let ahbm_rst: u32 = unsafe { ::core::mem::transmute(ahbm_rst) };
ahbm_rst as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let out_loop_test: u32 = unsafe { ::core::mem::transmute(out_loop_test) };
out_loop_test as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let in_loop_test: u32 = unsafe { ::core::mem::transmute(in_loop_test) };
in_loop_test as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let out_auto_wrback: u32 = unsafe { ::core::mem::transmute(out_auto_wrback) };
out_auto_wrback as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let out_no_restart_clr: u32 = unsafe { ::core::mem::transmute(out_no_restart_clr) };
out_no_restart_clr as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let out_eof_mode: u32 = unsafe { ::core::mem::transmute(out_eof_mode) };
out_eof_mode as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let outdscr_burst_en: u32 = unsafe { ::core::mem::transmute(outdscr_burst_en) };
outdscr_burst_en as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let indscr_burst_en: u32 = unsafe { ::core::mem::transmute(indscr_burst_en) };
indscr_burst_en as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let out_data_burst_en: u32 = unsafe { ::core::mem::transmute(out_data_burst_en) };
out_data_burst_en as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let check_owner: u32 = unsafe { ::core::mem::transmute(check_owner) };
check_owner as u64
});
__bindgen_bitfield_unit.set(13usize, 1u8, {
let mem_trans_en: u32 = unsafe { ::core::mem::transmute(mem_trans_en) };
mem_trans_en as u64
});
__bindgen_bitfield_unit.set(14usize, 18u8, {
let reserved14: u32 = unsafe { ::core::mem::transmute(reserved14) };
reserved14 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_13 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_13__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_13__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl i2s_dev_s__bindgen_ty_13__bindgen_ty_1 {
#[inline]
pub fn wdata(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 9u8) as u32) }
}
#[inline]
pub fn set_wdata(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 9u8, val as u64)
}
}
#[inline]
pub fn reserved9(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 7u8) as u32) }
}
#[inline]
pub fn set_reserved9(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 7u8, val as u64)
}
}
#[inline]
pub fn push(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_push(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved17(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 15u8) as u32) }
}
#[inline]
pub fn set_reserved17(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 15u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
wdata: u32,
reserved9: u32,
push: u32,
reserved17: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 9u8, {
let wdata: u32 = unsafe { ::core::mem::transmute(wdata) };
wdata as u64
});
__bindgen_bitfield_unit.set(9usize, 7u8, {
let reserved9: u32 = unsafe { ::core::mem::transmute(reserved9) };
reserved9 as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let push: u32 = unsafe { ::core::mem::transmute(push) };
push as u64
});
__bindgen_bitfield_unit.set(17usize, 15u8, {
let reserved17: u32 = unsafe { ::core::mem::transmute(reserved17) };
reserved17 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_14 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_14__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_14__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl i2s_dev_s__bindgen_ty_14__bindgen_ty_1 {
#[inline]
pub fn rdata(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 12u8) as u32) }
}
#[inline]
pub fn set_rdata(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 12u8, val as u64)
}
}
#[inline]
pub fn reserved12(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 4u8) as u32) }
}
#[inline]
pub fn set_reserved12(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 4u8, val as u64)
}
}
#[inline]
pub fn pop(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_pop(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved17(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 15u8) as u32) }
}
#[inline]
pub fn set_reserved17(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 15u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
rdata: u32,
reserved12: u32,
pop: u32,
reserved17: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 12u8, {
let rdata: u32 = unsafe { ::core::mem::transmute(rdata) };
rdata as u64
});
__bindgen_bitfield_unit.set(12usize, 4u8, {
let reserved12: u32 = unsafe { ::core::mem::transmute(reserved12) };
reserved12 as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let pop: u32 = unsafe { ::core::mem::transmute(pop) };
pop as u64
});
__bindgen_bitfield_unit.set(17usize, 15u8, {
let reserved17: u32 = unsafe { ::core::mem::transmute(reserved17) };
reserved17 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_15 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_15__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_15__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl i2s_dev_s__bindgen_ty_15__bindgen_ty_1 {
#[inline]
pub fn fifo_timeout(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_fifo_timeout(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn fifo_timeout_shift(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 3u8) as u32) }
}
#[inline]
pub fn set_fifo_timeout_shift(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 3u8, val as u64)
}
}
#[inline]
pub fn fifo_timeout_ena(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_fifo_timeout_ena(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved12(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 20u8) as u32) }
}
#[inline]
pub fn set_reserved12(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 20u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
fifo_timeout: u32,
fifo_timeout_shift: u32,
fifo_timeout_ena: u32,
reserved12: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let fifo_timeout: u32 = unsafe { ::core::mem::transmute(fifo_timeout) };
fifo_timeout as u64
});
__bindgen_bitfield_unit.set(8usize, 3u8, {
let fifo_timeout_shift: u32 = unsafe { ::core::mem::transmute(fifo_timeout_shift) };
fifo_timeout_shift as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let fifo_timeout_ena: u32 = unsafe { ::core::mem::transmute(fifo_timeout_ena) };
fifo_timeout_ena as u64
});
__bindgen_bitfield_unit.set(12usize, 20u8, {
let reserved12: u32 = unsafe { ::core::mem::transmute(reserved12) };
reserved12 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_16 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_16__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_16__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl i2s_dev_s__bindgen_ty_16__bindgen_ty_1 {
#[inline]
pub fn y_max(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 16u8) as u32) }
}
#[inline]
pub fn set_y_max(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 16u8, val as u64)
}
}
#[inline]
pub fn y_min(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 16u8) as u32) }
}
#[inline]
pub fn set_y_min(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 16u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(y_max: u32, y_min: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 16u8, {
let y_max: u32 = unsafe { ::core::mem::transmute(y_max) };
y_max as u64
});
__bindgen_bitfield_unit.set(16usize, 16u8, {
let y_min: u32 = unsafe { ::core::mem::transmute(y_min) };
y_min as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_17 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_17__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_17__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl i2s_dev_s__bindgen_ty_17__bindgen_ty_1 {
#[inline]
pub fn sigma_max(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 16u8) as u32) }
}
#[inline]
pub fn set_sigma_max(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 16u8, val as u64)
}
}
#[inline]
pub fn sigma_min(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 16u8) as u32) }
}
#[inline]
pub fn set_sigma_min(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 16u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
sigma_max: u32,
sigma_min: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 16u8, {
let sigma_max: u32 = unsafe { ::core::mem::transmute(sigma_max) };
sigma_max as u64
});
__bindgen_bitfield_unit.set(16usize, 16u8, {
let sigma_min: u32 = unsafe { ::core::mem::transmute(sigma_min) };
sigma_min as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_18 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_18__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_18__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl i2s_dev_s__bindgen_ty_18__bindgen_ty_1 {
#[inline]
pub fn cvsd_k(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 3u8) as u32) }
}
#[inline]
pub fn set_cvsd_k(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 3u8, val as u64)
}
}
#[inline]
pub fn cvsd_j(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 3u8) as u32) }
}
#[inline]
pub fn set_cvsd_j(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 3u8, val as u64)
}
}
#[inline]
pub fn cvsd_beta(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 10u8) as u32) }
}
#[inline]
pub fn set_cvsd_beta(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 10u8, val as u64)
}
}
#[inline]
pub fn cvsd_h(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 3u8) as u32) }
}
#[inline]
pub fn set_cvsd_h(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 3u8, val as u64)
}
}
#[inline]
pub fn reserved19(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 13u8) as u32) }
}
#[inline]
pub fn set_reserved19(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 13u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
cvsd_k: u32,
cvsd_j: u32,
cvsd_beta: u32,
cvsd_h: u32,
reserved19: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 3u8, {
let cvsd_k: u32 = unsafe { ::core::mem::transmute(cvsd_k) };
cvsd_k as u64
});
__bindgen_bitfield_unit.set(3usize, 3u8, {
let cvsd_j: u32 = unsafe { ::core::mem::transmute(cvsd_j) };
cvsd_j as u64
});
__bindgen_bitfield_unit.set(6usize, 10u8, {
let cvsd_beta: u32 = unsafe { ::core::mem::transmute(cvsd_beta) };
cvsd_beta as u64
});
__bindgen_bitfield_unit.set(16usize, 3u8, {
let cvsd_h: u32 = unsafe { ::core::mem::transmute(cvsd_h) };
cvsd_h as u64
});
__bindgen_bitfield_unit.set(19usize, 13u8, {
let reserved19: u32 = unsafe { ::core::mem::transmute(reserved19) };
reserved19 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_19 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_19__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_19__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl i2s_dev_s__bindgen_ty_19__bindgen_ty_1 {
#[inline]
pub fn good_pack_max(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 6u8) as u32) }
}
#[inline]
pub fn set_good_pack_max(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 6u8, val as u64)
}
}
#[inline]
pub fn n_err_seg(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 3u8) as u32) }
}
#[inline]
pub fn set_n_err_seg(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 3u8, val as u64)
}
}
#[inline]
pub fn shift_rate(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 3u8) as u32) }
}
#[inline]
pub fn set_shift_rate(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 3u8, val as u64)
}
}
#[inline]
pub fn max_slide_sample(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 8u8) as u32) }
}
#[inline]
pub fn set_max_slide_sample(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 8u8, val as u64)
}
}
#[inline]
pub fn pack_len_8k(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 5u8) as u32) }
}
#[inline]
pub fn set_pack_len_8k(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 5u8, val as u64)
}
}
#[inline]
pub fn n_min_err(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 3u8) as u32) }
}
#[inline]
pub fn set_n_min_err(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 3u8, val as u64)
}
}
#[inline]
pub fn reserved28(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 4u8) as u32) }
}
#[inline]
pub fn set_reserved28(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 4u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
good_pack_max: u32,
n_err_seg: u32,
shift_rate: u32,
max_slide_sample: u32,
pack_len_8k: u32,
n_min_err: u32,
reserved28: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 6u8, {
let good_pack_max: u32 = unsafe { ::core::mem::transmute(good_pack_max) };
good_pack_max as u64
});
__bindgen_bitfield_unit.set(6usize, 3u8, {
let n_err_seg: u32 = unsafe { ::core::mem::transmute(n_err_seg) };
n_err_seg as u64
});
__bindgen_bitfield_unit.set(9usize, 3u8, {
let shift_rate: u32 = unsafe { ::core::mem::transmute(shift_rate) };
shift_rate as u64
});
__bindgen_bitfield_unit.set(12usize, 8u8, {
let max_slide_sample: u32 = unsafe { ::core::mem::transmute(max_slide_sample) };
max_slide_sample as u64
});
__bindgen_bitfield_unit.set(20usize, 5u8, {
let pack_len_8k: u32 = unsafe { ::core::mem::transmute(pack_len_8k) };
pack_len_8k as u64
});
__bindgen_bitfield_unit.set(25usize, 3u8, {
let n_min_err: u32 = unsafe { ::core::mem::transmute(n_min_err) };
n_min_err as u64
});
__bindgen_bitfield_unit.set(28usize, 4u8, {
let reserved28: u32 = unsafe { ::core::mem::transmute(reserved28) };
reserved28 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_20 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_20__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_20__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl i2s_dev_s__bindgen_ty_20__bindgen_ty_1 {
#[inline]
pub fn bad_cef_atten_para(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_bad_cef_atten_para(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn bad_cef_atten_para_shift(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 4u8) as u32) }
}
#[inline]
pub fn set_bad_cef_atten_para_shift(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 4u8, val as u64)
}
}
#[inline]
pub fn bad_ola_win2_para_shift(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 4u8) as u32) }
}
#[inline]
pub fn set_bad_ola_win2_para_shift(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 4u8, val as u64)
}
}
#[inline]
pub fn bad_ola_win2_para(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 8u8) as u32) }
}
#[inline]
pub fn set_bad_ola_win2_para(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 8u8, val as u64)
}
}
#[inline]
pub fn slide_win_len(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 8u8) as u32) }
}
#[inline]
pub fn set_slide_win_len(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 8u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
bad_cef_atten_para: u32,
bad_cef_atten_para_shift: u32,
bad_ola_win2_para_shift: u32,
bad_ola_win2_para: u32,
slide_win_len: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let bad_cef_atten_para: u32 = unsafe { ::core::mem::transmute(bad_cef_atten_para) };
bad_cef_atten_para as u64
});
__bindgen_bitfield_unit.set(8usize, 4u8, {
let bad_cef_atten_para_shift: u32 =
unsafe { ::core::mem::transmute(bad_cef_atten_para_shift) };
bad_cef_atten_para_shift as u64
});
__bindgen_bitfield_unit.set(12usize, 4u8, {
let bad_ola_win2_para_shift: u32 =
unsafe { ::core::mem::transmute(bad_ola_win2_para_shift) };
bad_ola_win2_para_shift as u64
});
__bindgen_bitfield_unit.set(16usize, 8u8, {
let bad_ola_win2_para: u32 = unsafe { ::core::mem::transmute(bad_ola_win2_para) };
bad_ola_win2_para as u64
});
__bindgen_bitfield_unit.set(24usize, 8u8, {
let slide_win_len: u32 = unsafe { ::core::mem::transmute(slide_win_len) };
slide_win_len as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_21 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_21__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_21__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl i2s_dev_s__bindgen_ty_21__bindgen_ty_1 {
#[inline]
pub fn cvsd_seg_mod(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 2u8) as u32) }
}
#[inline]
pub fn set_cvsd_seg_mod(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 2u8, val as u64)
}
}
#[inline]
pub fn min_period(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 5u8) as u32) }
}
#[inline]
pub fn set_min_period(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 5u8, val as u64)
}
}
#[inline]
pub fn reserved7(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 25u8) as u32) }
}
#[inline]
pub fn set_reserved7(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 25u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
cvsd_seg_mod: u32,
min_period: u32,
reserved7: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 2u8, {
let cvsd_seg_mod: u32 = unsafe { ::core::mem::transmute(cvsd_seg_mod) };
cvsd_seg_mod as u64
});
__bindgen_bitfield_unit.set(2usize, 5u8, {
let min_period: u32 = unsafe { ::core::mem::transmute(min_period) };
min_period as u64
});
__bindgen_bitfield_unit.set(7usize, 25u8, {
let reserved7: u32 = unsafe { ::core::mem::transmute(reserved7) };
reserved7 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_22 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_22__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_22__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl i2s_dev_s__bindgen_ty_22__bindgen_ty_1 {
#[inline]
pub fn en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn chan_mod(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_chan_mod(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn cvsd_dec_pack_err(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_cvsd_dec_pack_err(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn cvsd_pack_len_8k(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 5u8) as u32) }
}
#[inline]
pub fn set_cvsd_pack_len_8k(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 5u8, val as u64)
}
}
#[inline]
pub fn cvsd_inf_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_cvsd_inf_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn cvsd_dec_start(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_cvsd_dec_start(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn cvsd_dec_reset(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_cvsd_dec_reset(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn plc_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_plc_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn plc2dma_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_plc2dma_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved13(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 19u8) as u32) }
}
#[inline]
pub fn set_reserved13(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 19u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
en: u32,
chan_mod: u32,
cvsd_dec_pack_err: u32,
cvsd_pack_len_8k: u32,
cvsd_inf_en: u32,
cvsd_dec_start: u32,
cvsd_dec_reset: u32,
plc_en: u32,
plc2dma_en: u32,
reserved13: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let en: u32 = unsafe { ::core::mem::transmute(en) };
en as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let chan_mod: u32 = unsafe { ::core::mem::transmute(chan_mod) };
chan_mod as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let cvsd_dec_pack_err: u32 = unsafe { ::core::mem::transmute(cvsd_dec_pack_err) };
cvsd_dec_pack_err as u64
});
__bindgen_bitfield_unit.set(3usize, 5u8, {
let cvsd_pack_len_8k: u32 = unsafe { ::core::mem::transmute(cvsd_pack_len_8k) };
cvsd_pack_len_8k as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let cvsd_inf_en: u32 = unsafe { ::core::mem::transmute(cvsd_inf_en) };
cvsd_inf_en as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let cvsd_dec_start: u32 = unsafe { ::core::mem::transmute(cvsd_dec_start) };
cvsd_dec_start as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let cvsd_dec_reset: u32 = unsafe { ::core::mem::transmute(cvsd_dec_reset) };
cvsd_dec_reset as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let plc_en: u32 = unsafe { ::core::mem::transmute(plc_en) };
plc_en as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let plc2dma_en: u32 = unsafe { ::core::mem::transmute(plc2dma_en) };
plc2dma_en as u64
});
__bindgen_bitfield_unit.set(13usize, 19u8, {
let reserved13: u32 = unsafe { ::core::mem::transmute(reserved13) };
reserved13 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_23 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_23__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_23__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl i2s_dev_s__bindgen_ty_23__bindgen_ty_1 {
#[inline]
pub fn with_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_with_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn no_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_no_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn cvsd_enc_start(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_cvsd_enc_start(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn cvsd_enc_reset(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_cvsd_enc_reset(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved4(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 28u8) as u32) }
}
#[inline]
pub fn set_reserved4(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 28u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
with_en: u32,
no_en: u32,
cvsd_enc_start: u32,
cvsd_enc_reset: u32,
reserved4: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let with_en: u32 = unsafe { ::core::mem::transmute(with_en) };
with_en as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let no_en: u32 = unsafe { ::core::mem::transmute(no_en) };
no_en as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let cvsd_enc_start: u32 = unsafe { ::core::mem::transmute(cvsd_enc_start) };
cvsd_enc_start as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let cvsd_enc_reset: u32 = unsafe { ::core::mem::transmute(cvsd_enc_reset) };
cvsd_enc_reset as u64
});
__bindgen_bitfield_unit.set(4usize, 28u8, {
let reserved4: u32 = unsafe { ::core::mem::transmute(reserved4) };
reserved4 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_24 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_24__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_24__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl i2s_dev_s__bindgen_ty_24__bindgen_ty_1 {
#[inline]
pub fn tx_pcm_conf(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 3u8) as u32) }
}
#[inline]
pub fn set_tx_pcm_conf(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 3u8, val as u64)
}
}
#[inline]
pub fn tx_pcm_bypass(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_pcm_bypass(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_pcm_conf(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 3u8) as u32) }
}
#[inline]
pub fn set_rx_pcm_conf(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 3u8, val as u64)
}
}
#[inline]
pub fn rx_pcm_bypass(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_pcm_bypass(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_stop_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_stop_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_zeros_rm_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_zeros_rm_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved10(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 22u8) as u32) }
}
#[inline]
pub fn set_reserved10(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 22u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
tx_pcm_conf: u32,
tx_pcm_bypass: u32,
rx_pcm_conf: u32,
rx_pcm_bypass: u32,
tx_stop_en: u32,
tx_zeros_rm_en: u32,
reserved10: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 3u8, {
let tx_pcm_conf: u32 = unsafe { ::core::mem::transmute(tx_pcm_conf) };
tx_pcm_conf as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let tx_pcm_bypass: u32 = unsafe { ::core::mem::transmute(tx_pcm_bypass) };
tx_pcm_bypass as u64
});
__bindgen_bitfield_unit.set(4usize, 3u8, {
let rx_pcm_conf: u32 = unsafe { ::core::mem::transmute(rx_pcm_conf) };
rx_pcm_conf as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let rx_pcm_bypass: u32 = unsafe { ::core::mem::transmute(rx_pcm_bypass) };
rx_pcm_bypass as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let tx_stop_en: u32 = unsafe { ::core::mem::transmute(tx_stop_en) };
tx_stop_en as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let tx_zeros_rm_en: u32 = unsafe { ::core::mem::transmute(tx_zeros_rm_en) };
tx_zeros_rm_en as u64
});
__bindgen_bitfield_unit.set(10usize, 22u8, {
let reserved10: u32 = unsafe { ::core::mem::transmute(reserved10) };
reserved10 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_25 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_25__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_25__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl i2s_dev_s__bindgen_ty_25__bindgen_ty_1 {
#[inline]
pub fn fifo_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_fifo_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn fifo_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_fifo_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn plc_mem_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_plc_mem_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn plc_mem_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_plc_mem_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved4(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 28u8) as u32) }
}
#[inline]
pub fn set_reserved4(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 28u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
fifo_force_pd: u32,
fifo_force_pu: u32,
plc_mem_force_pd: u32,
plc_mem_force_pu: u32,
reserved4: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let fifo_force_pd: u32 = unsafe { ::core::mem::transmute(fifo_force_pd) };
fifo_force_pd as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let fifo_force_pu: u32 = unsafe { ::core::mem::transmute(fifo_force_pu) };
fifo_force_pu as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let plc_mem_force_pd: u32 = unsafe { ::core::mem::transmute(plc_mem_force_pd) };
plc_mem_force_pd as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let plc_mem_force_pu: u32 = unsafe { ::core::mem::transmute(plc_mem_force_pu) };
plc_mem_force_pu as u64
});
__bindgen_bitfield_unit.set(4usize, 28u8, {
let reserved4: u32 = unsafe { ::core::mem::transmute(reserved4) };
reserved4 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_26 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_26__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_26__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl i2s_dev_s__bindgen_ty_26__bindgen_ty_1 {
#[inline]
pub fn camera_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_camera_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn lcd_tx_wrx2_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_lcd_tx_wrx2_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn lcd_tx_sdx2_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_lcd_tx_sdx2_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn data_enable_test_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_data_enable_test_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn data_enable(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_data_enable(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn lcd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_lcd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn ext_adc_start_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_ext_adc_start_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_valid_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_valid_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved8(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved8(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 24u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
camera_en: u32,
lcd_tx_wrx2_en: u32,
lcd_tx_sdx2_en: u32,
data_enable_test_en: u32,
data_enable: u32,
lcd_en: u32,
ext_adc_start_en: u32,
inter_valid_en: u32,
reserved8: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let camera_en: u32 = unsafe { ::core::mem::transmute(camera_en) };
camera_en as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let lcd_tx_wrx2_en: u32 = unsafe { ::core::mem::transmute(lcd_tx_wrx2_en) };
lcd_tx_wrx2_en as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let lcd_tx_sdx2_en: u32 = unsafe { ::core::mem::transmute(lcd_tx_sdx2_en) };
lcd_tx_sdx2_en as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let data_enable_test_en: u32 = unsafe { ::core::mem::transmute(data_enable_test_en) };
data_enable_test_en as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let data_enable: u32 = unsafe { ::core::mem::transmute(data_enable) };
data_enable as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let lcd_en: u32 = unsafe { ::core::mem::transmute(lcd_en) };
lcd_en as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let ext_adc_start_en: u32 = unsafe { ::core::mem::transmute(ext_adc_start_en) };
ext_adc_start_en as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let inter_valid_en: u32 = unsafe { ::core::mem::transmute(inter_valid_en) };
inter_valid_en as u64
});
__bindgen_bitfield_unit.set(8usize, 24u8, {
let reserved8: u32 = unsafe { ::core::mem::transmute(reserved8) };
reserved8 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_27 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_27__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_27__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl i2s_dev_s__bindgen_ty_27__bindgen_ty_1 {
#[inline]
pub fn clkm_div_num(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_clkm_div_num(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn clkm_div_b(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 6u8) as u32) }
}
#[inline]
pub fn set_clkm_div_b(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 6u8, val as u64)
}
}
#[inline]
pub fn clkm_div_a(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 6u8) as u32) }
}
#[inline]
pub fn set_clkm_div_a(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 6u8, val as u64)
}
}
#[inline]
pub fn clk_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 1u8) as u32) }
}
#[inline]
pub fn set_clk_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 1u8, val as u64)
}
}
#[inline]
pub fn clka_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(21usize, 1u8) as u32) }
}
#[inline]
pub fn set_clka_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(21usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved22(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 10u8) as u32) }
}
#[inline]
pub fn set_reserved22(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 10u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
clkm_div_num: u32,
clkm_div_b: u32,
clkm_div_a: u32,
clk_en: u32,
clka_en: u32,
reserved22: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let clkm_div_num: u32 = unsafe { ::core::mem::transmute(clkm_div_num) };
clkm_div_num as u64
});
__bindgen_bitfield_unit.set(8usize, 6u8, {
let clkm_div_b: u32 = unsafe { ::core::mem::transmute(clkm_div_b) };
clkm_div_b as u64
});
__bindgen_bitfield_unit.set(14usize, 6u8, {
let clkm_div_a: u32 = unsafe { ::core::mem::transmute(clkm_div_a) };
clkm_div_a as u64
});
__bindgen_bitfield_unit.set(20usize, 1u8, {
let clk_en: u32 = unsafe { ::core::mem::transmute(clk_en) };
clk_en as u64
});
__bindgen_bitfield_unit.set(21usize, 1u8, {
let clka_en: u32 = unsafe { ::core::mem::transmute(clka_en) };
clka_en as u64
});
__bindgen_bitfield_unit.set(22usize, 10u8, {
let reserved22: u32 = unsafe { ::core::mem::transmute(reserved22) };
reserved22 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_28 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_28__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_28__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl i2s_dev_s__bindgen_ty_28__bindgen_ty_1 {
#[inline]
pub fn tx_bck_div_num(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 6u8) as u32) }
}
#[inline]
pub fn set_tx_bck_div_num(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 6u8, val as u64)
}
}
#[inline]
pub fn rx_bck_div_num(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 6u8) as u32) }
}
#[inline]
pub fn set_rx_bck_div_num(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 6u8, val as u64)
}
}
#[inline]
pub fn tx_bits_mod(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 6u8) as u32) }
}
#[inline]
pub fn set_tx_bits_mod(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 6u8, val as u64)
}
}
#[inline]
pub fn rx_bits_mod(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 6u8) as u32) }
}
#[inline]
pub fn set_rx_bits_mod(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 6u8, val as u64)
}
}
#[inline]
pub fn reserved24(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 8u8) as u32) }
}
#[inline]
pub fn set_reserved24(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 8u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
tx_bck_div_num: u32,
rx_bck_div_num: u32,
tx_bits_mod: u32,
rx_bits_mod: u32,
reserved24: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 6u8, {
let tx_bck_div_num: u32 = unsafe { ::core::mem::transmute(tx_bck_div_num) };
tx_bck_div_num as u64
});
__bindgen_bitfield_unit.set(6usize, 6u8, {
let rx_bck_div_num: u32 = unsafe { ::core::mem::transmute(rx_bck_div_num) };
rx_bck_div_num as u64
});
__bindgen_bitfield_unit.set(12usize, 6u8, {
let tx_bits_mod: u32 = unsafe { ::core::mem::transmute(tx_bits_mod) };
tx_bits_mod as u64
});
__bindgen_bitfield_unit.set(18usize, 6u8, {
let rx_bits_mod: u32 = unsafe { ::core::mem::transmute(rx_bits_mod) };
rx_bits_mod as u64
});
__bindgen_bitfield_unit.set(24usize, 8u8, {
let reserved24: u32 = unsafe { ::core::mem::transmute(reserved24) };
reserved24 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_29 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_29__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_29__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl i2s_dev_s__bindgen_ty_29__bindgen_ty_1 {
#[inline]
pub fn tx_pdm_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_pdm_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_pdm_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_pdm_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn pcm2pdm_conv_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_pcm2pdm_conv_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn pdm2pcm_conv_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_pdm2pcm_conv_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_sinc_osr2(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 4u8) as u32) }
}
#[inline]
pub fn set_tx_sinc_osr2(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 4u8, val as u64)
}
}
#[inline]
pub fn tx_prescale(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 8u8) as u32) }
}
#[inline]
pub fn set_tx_prescale(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 8u8, val as u64)
}
}
#[inline]
pub fn tx_hp_in_shift(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 2u8) as u32) }
}
#[inline]
pub fn set_tx_hp_in_shift(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 2u8, val as u64)
}
}
#[inline]
pub fn tx_lp_in_shift(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 2u8) as u32) }
}
#[inline]
pub fn set_tx_lp_in_shift(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 2u8, val as u64)
}
}
#[inline]
pub fn tx_sinc_in_shift(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 2u8) as u32) }
}
#[inline]
pub fn set_tx_sinc_in_shift(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 2u8, val as u64)
}
}
#[inline]
pub fn tx_sigmadelta_in_shift(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 2u8) as u32) }
}
#[inline]
pub fn set_tx_sigmadelta_in_shift(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 2u8, val as u64)
}
}
#[inline]
pub fn rx_sinc_dsr_16_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_sinc_dsr_16_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn txhp_bypass(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 1u8) as u32) }
}
#[inline]
pub fn set_txhp_bypass(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved26(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 6u8) as u32) }
}
#[inline]
pub fn set_reserved26(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 6u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
tx_pdm_en: u32,
rx_pdm_en: u32,
pcm2pdm_conv_en: u32,
pdm2pcm_conv_en: u32,
tx_sinc_osr2: u32,
tx_prescale: u32,
tx_hp_in_shift: u32,
tx_lp_in_shift: u32,
tx_sinc_in_shift: u32,
tx_sigmadelta_in_shift: u32,
rx_sinc_dsr_16_en: u32,
txhp_bypass: u32,
reserved26: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let tx_pdm_en: u32 = unsafe { ::core::mem::transmute(tx_pdm_en) };
tx_pdm_en as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let rx_pdm_en: u32 = unsafe { ::core::mem::transmute(rx_pdm_en) };
rx_pdm_en as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let pcm2pdm_conv_en: u32 = unsafe { ::core::mem::transmute(pcm2pdm_conv_en) };
pcm2pdm_conv_en as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let pdm2pcm_conv_en: u32 = unsafe { ::core::mem::transmute(pdm2pcm_conv_en) };
pdm2pcm_conv_en as u64
});
__bindgen_bitfield_unit.set(4usize, 4u8, {
let tx_sinc_osr2: u32 = unsafe { ::core::mem::transmute(tx_sinc_osr2) };
tx_sinc_osr2 as u64
});
__bindgen_bitfield_unit.set(8usize, 8u8, {
let tx_prescale: u32 = unsafe { ::core::mem::transmute(tx_prescale) };
tx_prescale as u64
});
__bindgen_bitfield_unit.set(16usize, 2u8, {
let tx_hp_in_shift: u32 = unsafe { ::core::mem::transmute(tx_hp_in_shift) };
tx_hp_in_shift as u64
});
__bindgen_bitfield_unit.set(18usize, 2u8, {
let tx_lp_in_shift: u32 = unsafe { ::core::mem::transmute(tx_lp_in_shift) };
tx_lp_in_shift as u64
});
__bindgen_bitfield_unit.set(20usize, 2u8, {
let tx_sinc_in_shift: u32 = unsafe { ::core::mem::transmute(tx_sinc_in_shift) };
tx_sinc_in_shift as u64
});
__bindgen_bitfield_unit.set(22usize, 2u8, {
let tx_sigmadelta_in_shift: u32 =
unsafe { ::core::mem::transmute(tx_sigmadelta_in_shift) };
tx_sigmadelta_in_shift as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let rx_sinc_dsr_16_en: u32 = unsafe { ::core::mem::transmute(rx_sinc_dsr_16_en) };
rx_sinc_dsr_16_en as u64
});
__bindgen_bitfield_unit.set(25usize, 1u8, {
let txhp_bypass: u32 = unsafe { ::core::mem::transmute(txhp_bypass) };
txhp_bypass as u64
});
__bindgen_bitfield_unit.set(26usize, 6u8, {
let reserved26: u32 = unsafe { ::core::mem::transmute(reserved26) };
reserved26 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_30 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_30__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_30__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl i2s_dev_s__bindgen_ty_30__bindgen_ty_1 {
#[inline]
pub fn tx_pdm_fs(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 10u8) as u32) }
}
#[inline]
pub fn set_tx_pdm_fs(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 10u8, val as u64)
}
}
#[inline]
pub fn tx_pdm_fp(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 10u8) as u32) }
}
#[inline]
pub fn set_tx_pdm_fp(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 10u8, val as u64)
}
}
#[inline]
pub fn reserved20(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 12u8) as u32) }
}
#[inline]
pub fn set_reserved20(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 12u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
tx_pdm_fs: u32,
tx_pdm_fp: u32,
reserved20: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 10u8, {
let tx_pdm_fs: u32 = unsafe { ::core::mem::transmute(tx_pdm_fs) };
tx_pdm_fs as u64
});
__bindgen_bitfield_unit.set(10usize, 10u8, {
let tx_pdm_fp: u32 = unsafe { ::core::mem::transmute(tx_pdm_fp) };
tx_pdm_fp as u64
});
__bindgen_bitfield_unit.set(20usize, 12u8, {
let reserved20: u32 = unsafe { ::core::mem::transmute(reserved20) };
reserved20 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union i2s_dev_s__bindgen_ty_31 {
pub __bindgen_anon_1: i2s_dev_s__bindgen_ty_31__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct i2s_dev_s__bindgen_ty_31__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl i2s_dev_s__bindgen_ty_31__bindgen_ty_1 {
#[inline]
pub fn tx_idle(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_idle(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn tx_fifo_reset_back(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_tx_fifo_reset_back(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn rx_fifo_reset_back(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_rx_fifo_reset_back(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved3(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 29u8) as u32) }
}
#[inline]
pub fn set_reserved3(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 29u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
tx_idle: u32,
tx_fifo_reset_back: u32,
rx_fifo_reset_back: u32,
reserved3: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let tx_idle: u32 = unsafe { ::core::mem::transmute(tx_idle) };
tx_idle as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let tx_fifo_reset_back: u32 = unsafe { ::core::mem::transmute(tx_fifo_reset_back) };
tx_fifo_reset_back as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let rx_fifo_reset_back: u32 = unsafe { ::core::mem::transmute(rx_fifo_reset_back) };
rx_fifo_reset_back as u64
});
__bindgen_bitfield_unit.set(3usize, 29u8, {
let reserved3: u32 = unsafe { ::core::mem::transmute(reserved3) };
reserved3 as u64
});
__bindgen_bitfield_unit
}
}
pub type i2s_dev_t = i2s_dev_s;
extern "C" {
pub static mut I2S0: i2s_dev_t;
}
extern "C" {
pub static mut I2S1: i2s_dev_t;
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct i2s_signal_conn_t {
pub o_bck_in_sig: u8,
pub o_ws_in_sig: u8,
pub o_bck_out_sig: u8,
pub o_ws_out_sig: u8,
pub o_data_out_sig: u8,
pub i_bck_in_sig: u8,
pub i_ws_in_sig: u8,
pub i_bck_out_sig: u8,
pub i_ws_out_sig: u8,
pub i_data_in_sig: u8,
pub irq: u8,
pub module: periph_module_t,
}
extern "C" {
pub static i2s_periph_signal: [i2s_signal_conn_t; 2usize];
}
#[repr(C)]
#[derive(Copy, Clone)]
pub struct rtc_io_dev_s {
pub out: rtc_io_dev_s__bindgen_ty_1,
pub out_w1ts: rtc_io_dev_s__bindgen_ty_2,
pub out_w1tc: rtc_io_dev_s__bindgen_ty_3,
pub enable: rtc_io_dev_s__bindgen_ty_4,
pub enable_w1ts: rtc_io_dev_s__bindgen_ty_5,
pub enable_w1tc: rtc_io_dev_s__bindgen_ty_6,
pub status: rtc_io_dev_s__bindgen_ty_7,
pub status_w1ts: rtc_io_dev_s__bindgen_ty_8,
pub status_w1tc: rtc_io_dev_s__bindgen_ty_9,
pub in_val: rtc_io_dev_s__bindgen_ty_10,
pub pin: [rtc_io_dev_s__bindgen_ty_11; 18usize],
pub debug_sel: rtc_io_dev_s__bindgen_ty_12,
pub dig_pad_hold: u32,
pub hall_sens: rtc_io_dev_s__bindgen_ty_13,
pub sensor_pads: rtc_io_dev_s__bindgen_ty_14,
pub adc_pad: rtc_io_dev_s__bindgen_ty_15,
pub pad_dac: [rtc_io_dev_s__bindgen_ty_16; 2usize],
pub xtal_32k_pad: rtc_io_dev_s__bindgen_ty_17,
pub touch_cfg: rtc_io_dev_s__bindgen_ty_18,
pub touch_pad: [rtc_io_dev_s__bindgen_ty_19; 10usize],
pub ext_wakeup0: rtc_io_dev_s__bindgen_ty_20,
pub xtl_ext_ctr: rtc_io_dev_s__bindgen_ty_21,
pub sar_i2c_io: rtc_io_dev_s__bindgen_ty_22,
pub date: rtc_io_dev_s__bindgen_ty_23,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_1 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_1__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_1__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_io_dev_s__bindgen_ty_1__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 14u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 14u8, val as u64)
}
}
#[inline]
pub fn data(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 18u8) as u32) }
}
#[inline]
pub fn set_data(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 18u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(reserved0: u32, data: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 14u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(14usize, 18u8, {
let data: u32 = unsafe { ::core::mem::transmute(data) };
data as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_2 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_2__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_2__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_io_dev_s__bindgen_ty_2__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 14u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 14u8, val as u64)
}
}
#[inline]
pub fn w1ts(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 18u8) as u32) }
}
#[inline]
pub fn set_w1ts(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 18u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(reserved0: u32, w1ts: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 14u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(14usize, 18u8, {
let w1ts: u32 = unsafe { ::core::mem::transmute(w1ts) };
w1ts as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_3 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_3__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_3__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_io_dev_s__bindgen_ty_3__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 14u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 14u8, val as u64)
}
}
#[inline]
pub fn w1tc(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 18u8) as u32) }
}
#[inline]
pub fn set_w1tc(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 18u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(reserved0: u32, w1tc: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 14u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(14usize, 18u8, {
let w1tc: u32 = unsafe { ::core::mem::transmute(w1tc) };
w1tc as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_4 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_4__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_4__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_io_dev_s__bindgen_ty_4__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 14u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 14u8, val as u64)
}
}
#[inline]
pub fn enable(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 18u8) as u32) }
}
#[inline]
pub fn set_enable(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 18u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(reserved0: u32, enable: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 14u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(14usize, 18u8, {
let enable: u32 = unsafe { ::core::mem::transmute(enable) };
enable as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_5 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_5__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_5__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_io_dev_s__bindgen_ty_5__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 14u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 14u8, val as u64)
}
}
#[inline]
pub fn w1ts(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 18u8) as u32) }
}
#[inline]
pub fn set_w1ts(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 18u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(reserved0: u32, w1ts: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 14u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(14usize, 18u8, {
let w1ts: u32 = unsafe { ::core::mem::transmute(w1ts) };
w1ts as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_6 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_6__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_6__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_io_dev_s__bindgen_ty_6__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 14u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 14u8, val as u64)
}
}
#[inline]
pub fn w1tc(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 18u8) as u32) }
}
#[inline]
pub fn set_w1tc(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 18u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(reserved0: u32, w1tc: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 14u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(14usize, 18u8, {
let w1tc: u32 = unsafe { ::core::mem::transmute(w1tc) };
w1tc as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_7 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_7__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_7__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_io_dev_s__bindgen_ty_7__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 14u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 14u8, val as u64)
}
}
#[inline]
pub fn status(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 18u8) as u32) }
}
#[inline]
pub fn set_status(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 18u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(reserved0: u32, status: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 14u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(14usize, 18u8, {
let status: u32 = unsafe { ::core::mem::transmute(status) };
status as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_8 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_8__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_8__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_io_dev_s__bindgen_ty_8__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 14u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 14u8, val as u64)
}
}
#[inline]
pub fn w1ts(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 18u8) as u32) }
}
#[inline]
pub fn set_w1ts(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 18u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(reserved0: u32, w1ts: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 14u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(14usize, 18u8, {
let w1ts: u32 = unsafe { ::core::mem::transmute(w1ts) };
w1ts as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_9 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_9__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_9__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_io_dev_s__bindgen_ty_9__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 14u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 14u8, val as u64)
}
}
#[inline]
pub fn w1tc(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 18u8) as u32) }
}
#[inline]
pub fn set_w1tc(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 18u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(reserved0: u32, w1tc: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 14u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(14usize, 18u8, {
let w1tc: u32 = unsafe { ::core::mem::transmute(w1tc) };
w1tc as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_10 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_10__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_10__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_io_dev_s__bindgen_ty_10__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 14u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 14u8, val as u64)
}
}
#[inline]
pub fn in_(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 18u8) as u32) }
}
#[inline]
pub fn set_in(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 18u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(reserved0: u32, in_: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 14u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(14usize, 18u8, {
let in_: u32 = unsafe { ::core::mem::transmute(in_) };
in_ as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_11 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_11__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_11__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_io_dev_s__bindgen_ty_11__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 2u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 2u8, val as u64)
}
}
#[inline]
pub fn pad_driver(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_pad_driver(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved3(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 4u8) as u32) }
}
#[inline]
pub fn set_reserved3(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 4u8, val as u64)
}
}
#[inline]
pub fn int_type(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 3u8) as u32) }
}
#[inline]
pub fn set_int_type(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 3u8, val as u64)
}
}
#[inline]
pub fn wakeup_enable(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_wakeup_enable(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved11(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 21u8) as u32) }
}
#[inline]
pub fn set_reserved11(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 21u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
pad_driver: u32,
reserved3: u32,
int_type: u32,
wakeup_enable: u32,
reserved11: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 2u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let pad_driver: u32 = unsafe { ::core::mem::transmute(pad_driver) };
pad_driver as u64
});
__bindgen_bitfield_unit.set(3usize, 4u8, {
let reserved3: u32 = unsafe { ::core::mem::transmute(reserved3) };
reserved3 as u64
});
__bindgen_bitfield_unit.set(7usize, 3u8, {
let int_type: u32 = unsafe { ::core::mem::transmute(int_type) };
int_type as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let wakeup_enable: u32 = unsafe { ::core::mem::transmute(wakeup_enable) };
wakeup_enable as u64
});
__bindgen_bitfield_unit.set(11usize, 21u8, {
let reserved11: u32 = unsafe { ::core::mem::transmute(reserved11) };
reserved11 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_12 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_12__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_12__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl rtc_io_dev_s__bindgen_ty_12__bindgen_ty_1 {
#[inline]
pub fn sel0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 5u8) as u32) }
}
#[inline]
pub fn set_sel0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 5u8, val as u64)
}
}
#[inline]
pub fn sel1(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 5u8) as u32) }
}
#[inline]
pub fn set_sel1(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 5u8, val as u64)
}
}
#[inline]
pub fn sel2(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 5u8) as u32) }
}
#[inline]
pub fn set_sel2(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 5u8, val as u64)
}
}
#[inline]
pub fn sel3(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 5u8) as u32) }
}
#[inline]
pub fn set_sel3(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 5u8, val as u64)
}
}
#[inline]
pub fn sel4(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 5u8) as u32) }
}
#[inline]
pub fn set_sel4(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 5u8, val as u64)
}
}
#[inline]
pub fn no_gating_12m(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 1u8) as u32) }
}
#[inline]
pub fn set_no_gating_12m(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved26(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 6u8) as u32) }
}
#[inline]
pub fn set_reserved26(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 6u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
sel0: u32,
sel1: u32,
sel2: u32,
sel3: u32,
sel4: u32,
no_gating_12m: u32,
reserved26: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 5u8, {
let sel0: u32 = unsafe { ::core::mem::transmute(sel0) };
sel0 as u64
});
__bindgen_bitfield_unit.set(5usize, 5u8, {
let sel1: u32 = unsafe { ::core::mem::transmute(sel1) };
sel1 as u64
});
__bindgen_bitfield_unit.set(10usize, 5u8, {
let sel2: u32 = unsafe { ::core::mem::transmute(sel2) };
sel2 as u64
});
__bindgen_bitfield_unit.set(15usize, 5u8, {
let sel3: u32 = unsafe { ::core::mem::transmute(sel3) };
sel3 as u64
});
__bindgen_bitfield_unit.set(20usize, 5u8, {
let sel4: u32 = unsafe { ::core::mem::transmute(sel4) };
sel4 as u64
});
__bindgen_bitfield_unit.set(25usize, 1u8, {
let no_gating_12m: u32 = unsafe { ::core::mem::transmute(no_gating_12m) };
no_gating_12m as u64
});
__bindgen_bitfield_unit.set(26usize, 6u8, {
let reserved26: u32 = unsafe { ::core::mem::transmute(reserved26) };
reserved26 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_13 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_13__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_13__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_io_dev_s__bindgen_ty_13__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 30u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 30u8, val as u64)
}
}
#[inline]
pub fn hall_phase(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_hall_phase(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn xpd_hall(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_xpd_hall(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
hall_phase: u32,
xpd_hall: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 30u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let hall_phase: u32 = unsafe { ::core::mem::transmute(hall_phase) };
hall_phase as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let xpd_hall: u32 = unsafe { ::core::mem::transmute(xpd_hall) };
xpd_hall as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_14 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_14__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_14__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl rtc_io_dev_s__bindgen_ty_14__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 4u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 4u8, val as u64)
}
}
#[inline]
pub fn sense4_fun_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense4_fun_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense4_slp_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense4_slp_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense4_slp_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense4_slp_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense4_fun_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 2u8) as u32) }
}
#[inline]
pub fn set_sense4_fun_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 2u8, val as u64)
}
}
#[inline]
pub fn sense3_fun_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense3_fun_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense3_slp_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense3_slp_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense3_slp_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense3_slp_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense3_fun_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 2u8) as u32) }
}
#[inline]
pub fn set_sense3_fun_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 2u8, val as u64)
}
}
#[inline]
pub fn sense2_fun_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense2_fun_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense2_slp_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense2_slp_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense2_slp_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense2_slp_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense2_fun_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 2u8) as u32) }
}
#[inline]
pub fn set_sense2_fun_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 2u8, val as u64)
}
}
#[inline]
pub fn sense1_fun_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense1_fun_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense1_slp_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense1_slp_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense1_slp_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(21usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense1_slp_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(21usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense1_fun_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 2u8) as u32) }
}
#[inline]
pub fn set_sense1_fun_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 2u8, val as u64)
}
}
#[inline]
pub fn sense4_mux_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense4_mux_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense3_mux_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense3_mux_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense2_mux_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense2_mux_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense1_mux_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense1_mux_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense4_hold(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense4_hold(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense3_hold(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense3_hold(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense2_hold(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense2_hold(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense1_hold(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense1_hold(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
sense4_fun_ie: u32,
sense4_slp_ie: u32,
sense4_slp_sel: u32,
sense4_fun_sel: u32,
sense3_fun_ie: u32,
sense3_slp_ie: u32,
sense3_slp_sel: u32,
sense3_fun_sel: u32,
sense2_fun_ie: u32,
sense2_slp_ie: u32,
sense2_slp_sel: u32,
sense2_fun_sel: u32,
sense1_fun_ie: u32,
sense1_slp_ie: u32,
sense1_slp_sel: u32,
sense1_fun_sel: u32,
sense4_mux_sel: u32,
sense3_mux_sel: u32,
sense2_mux_sel: u32,
sense1_mux_sel: u32,
sense4_hold: u32,
sense3_hold: u32,
sense2_hold: u32,
sense1_hold: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 4u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let sense4_fun_ie: u32 = unsafe { ::core::mem::transmute(sense4_fun_ie) };
sense4_fun_ie as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let sense4_slp_ie: u32 = unsafe { ::core::mem::transmute(sense4_slp_ie) };
sense4_slp_ie as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let sense4_slp_sel: u32 = unsafe { ::core::mem::transmute(sense4_slp_sel) };
sense4_slp_sel as u64
});
__bindgen_bitfield_unit.set(7usize, 2u8, {
let sense4_fun_sel: u32 = unsafe { ::core::mem::transmute(sense4_fun_sel) };
sense4_fun_sel as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let sense3_fun_ie: u32 = unsafe { ::core::mem::transmute(sense3_fun_ie) };
sense3_fun_ie as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let sense3_slp_ie: u32 = unsafe { ::core::mem::transmute(sense3_slp_ie) };
sense3_slp_ie as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let sense3_slp_sel: u32 = unsafe { ::core::mem::transmute(sense3_slp_sel) };
sense3_slp_sel as u64
});
__bindgen_bitfield_unit.set(12usize, 2u8, {
let sense3_fun_sel: u32 = unsafe { ::core::mem::transmute(sense3_fun_sel) };
sense3_fun_sel as u64
});
__bindgen_bitfield_unit.set(14usize, 1u8, {
let sense2_fun_ie: u32 = unsafe { ::core::mem::transmute(sense2_fun_ie) };
sense2_fun_ie as u64
});
__bindgen_bitfield_unit.set(15usize, 1u8, {
let sense2_slp_ie: u32 = unsafe { ::core::mem::transmute(sense2_slp_ie) };
sense2_slp_ie as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let sense2_slp_sel: u32 = unsafe { ::core::mem::transmute(sense2_slp_sel) };
sense2_slp_sel as u64
});
__bindgen_bitfield_unit.set(17usize, 2u8, {
let sense2_fun_sel: u32 = unsafe { ::core::mem::transmute(sense2_fun_sel) };
sense2_fun_sel as u64
});
__bindgen_bitfield_unit.set(19usize, 1u8, {
let sense1_fun_ie: u32 = unsafe { ::core::mem::transmute(sense1_fun_ie) };
sense1_fun_ie as u64
});
__bindgen_bitfield_unit.set(20usize, 1u8, {
let sense1_slp_ie: u32 = unsafe { ::core::mem::transmute(sense1_slp_ie) };
sense1_slp_ie as u64
});
__bindgen_bitfield_unit.set(21usize, 1u8, {
let sense1_slp_sel: u32 = unsafe { ::core::mem::transmute(sense1_slp_sel) };
sense1_slp_sel as u64
});
__bindgen_bitfield_unit.set(22usize, 2u8, {
let sense1_fun_sel: u32 = unsafe { ::core::mem::transmute(sense1_fun_sel) };
sense1_fun_sel as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let sense4_mux_sel: u32 = unsafe { ::core::mem::transmute(sense4_mux_sel) };
sense4_mux_sel as u64
});
__bindgen_bitfield_unit.set(25usize, 1u8, {
let sense3_mux_sel: u32 = unsafe { ::core::mem::transmute(sense3_mux_sel) };
sense3_mux_sel as u64
});
__bindgen_bitfield_unit.set(26usize, 1u8, {
let sense2_mux_sel: u32 = unsafe { ::core::mem::transmute(sense2_mux_sel) };
sense2_mux_sel as u64
});
__bindgen_bitfield_unit.set(27usize, 1u8, {
let sense1_mux_sel: u32 = unsafe { ::core::mem::transmute(sense1_mux_sel) };
sense1_mux_sel as u64
});
__bindgen_bitfield_unit.set(28usize, 1u8, {
let sense4_hold: u32 = unsafe { ::core::mem::transmute(sense4_hold) };
sense4_hold as u64
});
__bindgen_bitfield_unit.set(29usize, 1u8, {
let sense3_hold: u32 = unsafe { ::core::mem::transmute(sense3_hold) };
sense3_hold as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let sense2_hold: u32 = unsafe { ::core::mem::transmute(sense2_hold) };
sense2_hold as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let sense1_hold: u32 = unsafe { ::core::mem::transmute(sense1_hold) };
sense1_hold as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_15 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_15__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_15__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_io_dev_s__bindgen_ty_15__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 18u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 18u8, val as u64)
}
}
#[inline]
pub fn adc2_fun_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 1u8) as u32) }
}
#[inline]
pub fn set_adc2_fun_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 1u8, val as u64)
}
}
#[inline]
pub fn adc2_slp_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 1u8) as u32) }
}
#[inline]
pub fn set_adc2_slp_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 1u8, val as u64)
}
}
#[inline]
pub fn adc2_slp_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 1u8) as u32) }
}
#[inline]
pub fn set_adc2_slp_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 1u8, val as u64)
}
}
#[inline]
pub fn adc2_fun_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(21usize, 2u8) as u32) }
}
#[inline]
pub fn set_adc2_fun_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(21usize, 2u8, val as u64)
}
}
#[inline]
pub fn adc1_fun_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(23usize, 1u8) as u32) }
}
#[inline]
pub fn set_adc1_fun_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(23usize, 1u8, val as u64)
}
}
#[inline]
pub fn adc1_slp_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_adc1_slp_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn adc1_slp_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 1u8) as u32) }
}
#[inline]
pub fn set_adc1_slp_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 1u8, val as u64)
}
}
#[inline]
pub fn adc1_fun_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 2u8) as u32) }
}
#[inline]
pub fn set_adc1_fun_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 2u8, val as u64)
}
}
#[inline]
pub fn adc2_mux_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 1u8) as u32) }
}
#[inline]
pub fn set_adc2_mux_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 1u8, val as u64)
}
}
#[inline]
pub fn adc1_mux_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 1u8) as u32) }
}
#[inline]
pub fn set_adc1_mux_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 1u8, val as u64)
}
}
#[inline]
pub fn adc2_hold(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_adc2_hold(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn adc1_hold(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_adc1_hold(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
adc2_fun_ie: u32,
adc2_slp_ie: u32,
adc2_slp_sel: u32,
adc2_fun_sel: u32,
adc1_fun_ie: u32,
adc1_slp_ie: u32,
adc1_slp_sel: u32,
adc1_fun_sel: u32,
adc2_mux_sel: u32,
adc1_mux_sel: u32,
adc2_hold: u32,
adc1_hold: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 18u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(18usize, 1u8, {
let adc2_fun_ie: u32 = unsafe { ::core::mem::transmute(adc2_fun_ie) };
adc2_fun_ie as u64
});
__bindgen_bitfield_unit.set(19usize, 1u8, {
let adc2_slp_ie: u32 = unsafe { ::core::mem::transmute(adc2_slp_ie) };
adc2_slp_ie as u64
});
__bindgen_bitfield_unit.set(20usize, 1u8, {
let adc2_slp_sel: u32 = unsafe { ::core::mem::transmute(adc2_slp_sel) };
adc2_slp_sel as u64
});
__bindgen_bitfield_unit.set(21usize, 2u8, {
let adc2_fun_sel: u32 = unsafe { ::core::mem::transmute(adc2_fun_sel) };
adc2_fun_sel as u64
});
__bindgen_bitfield_unit.set(23usize, 1u8, {
let adc1_fun_ie: u32 = unsafe { ::core::mem::transmute(adc1_fun_ie) };
adc1_fun_ie as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let adc1_slp_ie: u32 = unsafe { ::core::mem::transmute(adc1_slp_ie) };
adc1_slp_ie as u64
});
__bindgen_bitfield_unit.set(25usize, 1u8, {
let adc1_slp_sel: u32 = unsafe { ::core::mem::transmute(adc1_slp_sel) };
adc1_slp_sel as u64
});
__bindgen_bitfield_unit.set(26usize, 2u8, {
let adc1_fun_sel: u32 = unsafe { ::core::mem::transmute(adc1_fun_sel) };
adc1_fun_sel as u64
});
__bindgen_bitfield_unit.set(28usize, 1u8, {
let adc2_mux_sel: u32 = unsafe { ::core::mem::transmute(adc2_mux_sel) };
adc2_mux_sel as u64
});
__bindgen_bitfield_unit.set(29usize, 1u8, {
let adc1_mux_sel: u32 = unsafe { ::core::mem::transmute(adc1_mux_sel) };
adc1_mux_sel as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let adc2_hold: u32 = unsafe { ::core::mem::transmute(adc2_hold) };
adc2_hold as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let adc1_hold: u32 = unsafe { ::core::mem::transmute(adc1_hold) };
adc1_hold as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_16 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_16__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_16__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl rtc_io_dev_s__bindgen_ty_16__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 10u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 10u8, val as u64)
}
}
#[inline]
pub fn dac_xpd_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_dac_xpd_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn fun_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_fun_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn slp_oe(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_slp_oe(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn slp_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 1u8) as u32) }
}
#[inline]
pub fn set_slp_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 1u8, val as u64)
}
}
#[inline]
pub fn slp_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 1u8) as u32) }
}
#[inline]
pub fn set_slp_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 1u8, val as u64)
}
}
#[inline]
pub fn fun_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 2u8) as u32) }
}
#[inline]
pub fn set_fun_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 2u8, val as u64)
}
}
#[inline]
pub fn mux_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 1u8) as u32) }
}
#[inline]
pub fn set_mux_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 1u8, val as u64)
}
}
#[inline]
pub fn xpd_dac(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 1u8) as u32) }
}
#[inline]
pub fn set_xpd_dac(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 1u8, val as u64)
}
}
#[inline]
pub fn dac(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 8u8) as u32) }
}
#[inline]
pub fn set_dac(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 8u8, val as u64)
}
}
#[inline]
pub fn rue(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 1u8) as u32) }
}
#[inline]
pub fn set_rue(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 1u8, val as u64)
}
}
#[inline]
pub fn rde(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 1u8) as u32) }
}
#[inline]
pub fn set_rde(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 1u8, val as u64)
}
}
#[inline]
pub fn hold(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 1u8) as u32) }
}
#[inline]
pub fn set_hold(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 1u8, val as u64)
}
}
#[inline]
pub fn drv(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 2u8) as u32) }
}
#[inline]
pub fn set_drv(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 2u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
dac_xpd_force: u32,
fun_ie: u32,
slp_oe: u32,
slp_ie: u32,
slp_sel: u32,
fun_sel: u32,
mux_sel: u32,
xpd_dac: u32,
dac: u32,
rue: u32,
rde: u32,
hold: u32,
drv: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 10u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let dac_xpd_force: u32 = unsafe { ::core::mem::transmute(dac_xpd_force) };
dac_xpd_force as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let fun_ie: u32 = unsafe { ::core::mem::transmute(fun_ie) };
fun_ie as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let slp_oe: u32 = unsafe { ::core::mem::transmute(slp_oe) };
slp_oe as u64
});
__bindgen_bitfield_unit.set(13usize, 1u8, {
let slp_ie: u32 = unsafe { ::core::mem::transmute(slp_ie) };
slp_ie as u64
});
__bindgen_bitfield_unit.set(14usize, 1u8, {
let slp_sel: u32 = unsafe { ::core::mem::transmute(slp_sel) };
slp_sel as u64
});
__bindgen_bitfield_unit.set(15usize, 2u8, {
let fun_sel: u32 = unsafe { ::core::mem::transmute(fun_sel) };
fun_sel as u64
});
__bindgen_bitfield_unit.set(17usize, 1u8, {
let mux_sel: u32 = unsafe { ::core::mem::transmute(mux_sel) };
mux_sel as u64
});
__bindgen_bitfield_unit.set(18usize, 1u8, {
let xpd_dac: u32 = unsafe { ::core::mem::transmute(xpd_dac) };
xpd_dac as u64
});
__bindgen_bitfield_unit.set(19usize, 8u8, {
let dac: u32 = unsafe { ::core::mem::transmute(dac) };
dac as u64
});
__bindgen_bitfield_unit.set(27usize, 1u8, {
let rue: u32 = unsafe { ::core::mem::transmute(rue) };
rue as u64
});
__bindgen_bitfield_unit.set(28usize, 1u8, {
let rde: u32 = unsafe { ::core::mem::transmute(rde) };
rde as u64
});
__bindgen_bitfield_unit.set(29usize, 1u8, {
let hold: u32 = unsafe { ::core::mem::transmute(hold) };
hold as u64
});
__bindgen_bitfield_unit.set(30usize, 2u8, {
let drv: u32 = unsafe { ::core::mem::transmute(drv) };
drv as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_17 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_17__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_17__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl rtc_io_dev_s__bindgen_ty_17__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn dbias_xtal_32k(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 2u8) as u32) }
}
#[inline]
pub fn set_dbias_xtal_32k(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 2u8, val as u64)
}
}
#[inline]
pub fn dres_xtal_32k(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 2u8) as u32) }
}
#[inline]
pub fn set_dres_xtal_32k(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 2u8, val as u64)
}
}
#[inline]
pub fn x32p_fun_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_x32p_fun_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn x32p_slp_oe(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_x32p_slp_oe(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn x32p_slp_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_x32p_slp_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn x32p_slp_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_x32p_slp_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn x32p_fun_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 2u8) as u32) }
}
#[inline]
pub fn set_x32p_fun_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 2u8, val as u64)
}
}
#[inline]
pub fn x32n_fun_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_x32n_fun_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn x32n_slp_oe(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_x32n_slp_oe(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn x32n_slp_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 1u8) as u32) }
}
#[inline]
pub fn set_x32n_slp_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 1u8, val as u64)
}
}
#[inline]
pub fn x32n_slp_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 1u8) as u32) }
}
#[inline]
pub fn set_x32n_slp_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 1u8, val as u64)
}
}
#[inline]
pub fn x32n_fun_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 2u8) as u32) }
}
#[inline]
pub fn set_x32n_fun_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 2u8, val as u64)
}
}
#[inline]
pub fn x32p_mux_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 1u8) as u32) }
}
#[inline]
pub fn set_x32p_mux_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 1u8, val as u64)
}
}
#[inline]
pub fn x32n_mux_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 1u8) as u32) }
}
#[inline]
pub fn set_x32n_mux_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 1u8, val as u64)
}
}
#[inline]
pub fn xpd_xtal_32k(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 1u8) as u32) }
}
#[inline]
pub fn set_xpd_xtal_32k(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 1u8, val as u64)
}
}
#[inline]
pub fn dac_xtal_32k(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 2u8) as u32) }
}
#[inline]
pub fn set_dac_xtal_32k(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 2u8, val as u64)
}
}
#[inline]
pub fn x32p_rue(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 1u8) as u32) }
}
#[inline]
pub fn set_x32p_rue(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 1u8, val as u64)
}
}
#[inline]
pub fn x32p_rde(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(23usize, 1u8) as u32) }
}
#[inline]
pub fn set_x32p_rde(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(23usize, 1u8, val as u64)
}
}
#[inline]
pub fn x32p_hold(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_x32p_hold(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn x32p_drv(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 2u8) as u32) }
}
#[inline]
pub fn set_x32p_drv(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 2u8, val as u64)
}
}
#[inline]
pub fn x32n_rue(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 1u8) as u32) }
}
#[inline]
pub fn set_x32n_rue(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 1u8, val as u64)
}
}
#[inline]
pub fn x32n_rde(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 1u8) as u32) }
}
#[inline]
pub fn set_x32n_rde(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 1u8, val as u64)
}
}
#[inline]
pub fn x32n_hold(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 1u8) as u32) }
}
#[inline]
pub fn set_x32n_hold(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 1u8, val as u64)
}
}
#[inline]
pub fn x32n_drv(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 2u8) as u32) }
}
#[inline]
pub fn set_x32n_drv(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 2u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
dbias_xtal_32k: u32,
dres_xtal_32k: u32,
x32p_fun_ie: u32,
x32p_slp_oe: u32,
x32p_slp_ie: u32,
x32p_slp_sel: u32,
x32p_fun_sel: u32,
x32n_fun_ie: u32,
x32n_slp_oe: u32,
x32n_slp_ie: u32,
x32n_slp_sel: u32,
x32n_fun_sel: u32,
x32p_mux_sel: u32,
x32n_mux_sel: u32,
xpd_xtal_32k: u32,
dac_xtal_32k: u32,
x32p_rue: u32,
x32p_rde: u32,
x32p_hold: u32,
x32p_drv: u32,
x32n_rue: u32,
x32n_rde: u32,
x32n_hold: u32,
x32n_drv: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(1usize, 2u8, {
let dbias_xtal_32k: u32 = unsafe { ::core::mem::transmute(dbias_xtal_32k) };
dbias_xtal_32k as u64
});
__bindgen_bitfield_unit.set(3usize, 2u8, {
let dres_xtal_32k: u32 = unsafe { ::core::mem::transmute(dres_xtal_32k) };
dres_xtal_32k as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let x32p_fun_ie: u32 = unsafe { ::core::mem::transmute(x32p_fun_ie) };
x32p_fun_ie as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let x32p_slp_oe: u32 = unsafe { ::core::mem::transmute(x32p_slp_oe) };
x32p_slp_oe as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let x32p_slp_ie: u32 = unsafe { ::core::mem::transmute(x32p_slp_ie) };
x32p_slp_ie as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let x32p_slp_sel: u32 = unsafe { ::core::mem::transmute(x32p_slp_sel) };
x32p_slp_sel as u64
});
__bindgen_bitfield_unit.set(9usize, 2u8, {
let x32p_fun_sel: u32 = unsafe { ::core::mem::transmute(x32p_fun_sel) };
x32p_fun_sel as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let x32n_fun_ie: u32 = unsafe { ::core::mem::transmute(x32n_fun_ie) };
x32n_fun_ie as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let x32n_slp_oe: u32 = unsafe { ::core::mem::transmute(x32n_slp_oe) };
x32n_slp_oe as u64
});
__bindgen_bitfield_unit.set(13usize, 1u8, {
let x32n_slp_ie: u32 = unsafe { ::core::mem::transmute(x32n_slp_ie) };
x32n_slp_ie as u64
});
__bindgen_bitfield_unit.set(14usize, 1u8, {
let x32n_slp_sel: u32 = unsafe { ::core::mem::transmute(x32n_slp_sel) };
x32n_slp_sel as u64
});
__bindgen_bitfield_unit.set(15usize, 2u8, {
let x32n_fun_sel: u32 = unsafe { ::core::mem::transmute(x32n_fun_sel) };
x32n_fun_sel as u64
});
__bindgen_bitfield_unit.set(17usize, 1u8, {
let x32p_mux_sel: u32 = unsafe { ::core::mem::transmute(x32p_mux_sel) };
x32p_mux_sel as u64
});
__bindgen_bitfield_unit.set(18usize, 1u8, {
let x32n_mux_sel: u32 = unsafe { ::core::mem::transmute(x32n_mux_sel) };
x32n_mux_sel as u64
});
__bindgen_bitfield_unit.set(19usize, 1u8, {
let xpd_xtal_32k: u32 = unsafe { ::core::mem::transmute(xpd_xtal_32k) };
xpd_xtal_32k as u64
});
__bindgen_bitfield_unit.set(20usize, 2u8, {
let dac_xtal_32k: u32 = unsafe { ::core::mem::transmute(dac_xtal_32k) };
dac_xtal_32k as u64
});
__bindgen_bitfield_unit.set(22usize, 1u8, {
let x32p_rue: u32 = unsafe { ::core::mem::transmute(x32p_rue) };
x32p_rue as u64
});
__bindgen_bitfield_unit.set(23usize, 1u8, {
let x32p_rde: u32 = unsafe { ::core::mem::transmute(x32p_rde) };
x32p_rde as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let x32p_hold: u32 = unsafe { ::core::mem::transmute(x32p_hold) };
x32p_hold as u64
});
__bindgen_bitfield_unit.set(25usize, 2u8, {
let x32p_drv: u32 = unsafe { ::core::mem::transmute(x32p_drv) };
x32p_drv as u64
});
__bindgen_bitfield_unit.set(27usize, 1u8, {
let x32n_rue: u32 = unsafe { ::core::mem::transmute(x32n_rue) };
x32n_rue as u64
});
__bindgen_bitfield_unit.set(28usize, 1u8, {
let x32n_rde: u32 = unsafe { ::core::mem::transmute(x32n_rde) };
x32n_rde as u64
});
__bindgen_bitfield_unit.set(29usize, 1u8, {
let x32n_hold: u32 = unsafe { ::core::mem::transmute(x32n_hold) };
x32n_hold as u64
});
__bindgen_bitfield_unit.set(30usize, 2u8, {
let x32n_drv: u32 = unsafe { ::core::mem::transmute(x32n_drv) };
x32n_drv as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_18 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_18__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_18__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_io_dev_s__bindgen_ty_18__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 23u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 23u8, val as u64)
}
}
#[inline]
pub fn dcur(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(23usize, 2u8) as u32) }
}
#[inline]
pub fn set_dcur(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(23usize, 2u8, val as u64)
}
}
#[inline]
pub fn drange(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 2u8) as u32) }
}
#[inline]
pub fn set_drange(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 2u8, val as u64)
}
}
#[inline]
pub fn drefl(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 2u8) as u32) }
}
#[inline]
pub fn set_drefl(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 2u8, val as u64)
}
}
#[inline]
pub fn drefh(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 2u8) as u32) }
}
#[inline]
pub fn set_drefh(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 2u8, val as u64)
}
}
#[inline]
pub fn xpd_bias(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_xpd_bias(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
dcur: u32,
drange: u32,
drefl: u32,
drefh: u32,
xpd_bias: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 23u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(23usize, 2u8, {
let dcur: u32 = unsafe { ::core::mem::transmute(dcur) };
dcur as u64
});
__bindgen_bitfield_unit.set(25usize, 2u8, {
let drange: u32 = unsafe { ::core::mem::transmute(drange) };
drange as u64
});
__bindgen_bitfield_unit.set(27usize, 2u8, {
let drefl: u32 = unsafe { ::core::mem::transmute(drefl) };
drefl as u64
});
__bindgen_bitfield_unit.set(29usize, 2u8, {
let drefh: u32 = unsafe { ::core::mem::transmute(drefh) };
drefh as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let xpd_bias: u32 = unsafe { ::core::mem::transmute(xpd_bias) };
xpd_bias as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_19 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_19__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_19__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl rtc_io_dev_s__bindgen_ty_19__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 12u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 12u8, val as u64)
}
}
#[inline]
pub fn to_gpio(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_to_gpio(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn fun_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 1u8) as u32) }
}
#[inline]
pub fn set_fun_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 1u8, val as u64)
}
}
#[inline]
pub fn slp_oe(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 1u8) as u32) }
}
#[inline]
pub fn set_slp_oe(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 1u8, val as u64)
}
}
#[inline]
pub fn slp_ie(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 1u8) as u32) }
}
#[inline]
pub fn set_slp_ie(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 1u8, val as u64)
}
}
#[inline]
pub fn slp_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_slp_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn fun_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 2u8) as u32) }
}
#[inline]
pub fn set_fun_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 2u8, val as u64)
}
}
#[inline]
pub fn mux_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 1u8) as u32) }
}
#[inline]
pub fn set_mux_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 1u8, val as u64)
}
}
#[inline]
pub fn xpd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 1u8) as u32) }
}
#[inline]
pub fn set_xpd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 1u8, val as u64)
}
}
#[inline]
pub fn tie_opt(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(21usize, 1u8) as u32) }
}
#[inline]
pub fn set_tie_opt(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(21usize, 1u8, val as u64)
}
}
#[inline]
pub fn start(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 1u8) as u32) }
}
#[inline]
pub fn set_start(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 1u8, val as u64)
}
}
#[inline]
pub fn dac(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(23usize, 3u8) as u32) }
}
#[inline]
pub fn set_dac(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(23usize, 3u8, val as u64)
}
}
#[inline]
pub fn reserved26(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 1u8) as u32) }
}
#[inline]
pub fn set_reserved26(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 1u8, val as u64)
}
}
#[inline]
pub fn rue(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 1u8) as u32) }
}
#[inline]
pub fn set_rue(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 1u8, val as u64)
}
}
#[inline]
pub fn rde(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 1u8) as u32) }
}
#[inline]
pub fn set_rde(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 1u8, val as u64)
}
}
#[inline]
pub fn drv(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 2u8) as u32) }
}
#[inline]
pub fn set_drv(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 2u8, val as u64)
}
}
#[inline]
pub fn hold(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_hold(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
to_gpio: u32,
fun_ie: u32,
slp_oe: u32,
slp_ie: u32,
slp_sel: u32,
fun_sel: u32,
mux_sel: u32,
xpd: u32,
tie_opt: u32,
start: u32,
dac: u32,
reserved26: u32,
rue: u32,
rde: u32,
drv: u32,
hold: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 12u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let to_gpio: u32 = unsafe { ::core::mem::transmute(to_gpio) };
to_gpio as u64
});
__bindgen_bitfield_unit.set(13usize, 1u8, {
let fun_ie: u32 = unsafe { ::core::mem::transmute(fun_ie) };
fun_ie as u64
});
__bindgen_bitfield_unit.set(14usize, 1u8, {
let slp_oe: u32 = unsafe { ::core::mem::transmute(slp_oe) };
slp_oe as u64
});
__bindgen_bitfield_unit.set(15usize, 1u8, {
let slp_ie: u32 = unsafe { ::core::mem::transmute(slp_ie) };
slp_ie as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let slp_sel: u32 = unsafe { ::core::mem::transmute(slp_sel) };
slp_sel as u64
});
__bindgen_bitfield_unit.set(17usize, 2u8, {
let fun_sel: u32 = unsafe { ::core::mem::transmute(fun_sel) };
fun_sel as u64
});
__bindgen_bitfield_unit.set(19usize, 1u8, {
let mux_sel: u32 = unsafe { ::core::mem::transmute(mux_sel) };
mux_sel as u64
});
__bindgen_bitfield_unit.set(20usize, 1u8, {
let xpd: u32 = unsafe { ::core::mem::transmute(xpd) };
xpd as u64
});
__bindgen_bitfield_unit.set(21usize, 1u8, {
let tie_opt: u32 = unsafe { ::core::mem::transmute(tie_opt) };
tie_opt as u64
});
__bindgen_bitfield_unit.set(22usize, 1u8, {
let start: u32 = unsafe { ::core::mem::transmute(start) };
start as u64
});
__bindgen_bitfield_unit.set(23usize, 3u8, {
let dac: u32 = unsafe { ::core::mem::transmute(dac) };
dac as u64
});
__bindgen_bitfield_unit.set(26usize, 1u8, {
let reserved26: u32 = unsafe { ::core::mem::transmute(reserved26) };
reserved26 as u64
});
__bindgen_bitfield_unit.set(27usize, 1u8, {
let rue: u32 = unsafe { ::core::mem::transmute(rue) };
rue as u64
});
__bindgen_bitfield_unit.set(28usize, 1u8, {
let rde: u32 = unsafe { ::core::mem::transmute(rde) };
rde as u64
});
__bindgen_bitfield_unit.set(29usize, 2u8, {
let drv: u32 = unsafe { ::core::mem::transmute(drv) };
drv as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let hold: u32 = unsafe { ::core::mem::transmute(hold) };
hold as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_20 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_20__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_20__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_io_dev_s__bindgen_ty_20__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 27u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 27u8, val as u64)
}
}
#[inline]
pub fn sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 5u8) as u32) }
}
#[inline]
pub fn set_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 5u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(reserved0: u32, sel: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 27u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(27usize, 5u8, {
let sel: u32 = unsafe { ::core::mem::transmute(sel) };
sel as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_21 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_21__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_21__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_io_dev_s__bindgen_ty_21__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 27u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 27u8, val as u64)
}
}
#[inline]
pub fn sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 5u8) as u32) }
}
#[inline]
pub fn set_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 5u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(reserved0: u32, sel: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 27u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(27usize, 5u8, {
let sel: u32 = unsafe { ::core::mem::transmute(sel) };
sel as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_22 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_22__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_22__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_io_dev_s__bindgen_ty_22__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 23u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 23u8, val as u64)
}
}
#[inline]
pub fn debug_bit_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(23usize, 5u8) as u32) }
}
#[inline]
pub fn set_debug_bit_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(23usize, 5u8, val as u64)
}
}
#[inline]
pub fn scl_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 2u8) as u32) }
}
#[inline]
pub fn set_scl_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 2u8, val as u64)
}
}
#[inline]
pub fn sda_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 2u8) as u32) }
}
#[inline]
pub fn set_sda_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 2u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
debug_bit_sel: u32,
scl_sel: u32,
sda_sel: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 23u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(23usize, 5u8, {
let debug_bit_sel: u32 = unsafe { ::core::mem::transmute(debug_bit_sel) };
debug_bit_sel as u64
});
__bindgen_bitfield_unit.set(28usize, 2u8, {
let scl_sel: u32 = unsafe { ::core::mem::transmute(scl_sel) };
scl_sel as u64
});
__bindgen_bitfield_unit.set(30usize, 2u8, {
let sda_sel: u32 = unsafe { ::core::mem::transmute(sda_sel) };
sda_sel as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_io_dev_s__bindgen_ty_23 {
pub __bindgen_anon_1: rtc_io_dev_s__bindgen_ty_23__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_dev_s__bindgen_ty_23__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_io_dev_s__bindgen_ty_23__bindgen_ty_1 {
#[inline]
pub fn date(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 28u8) as u32) }
}
#[inline]
pub fn set_date(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 28u8, val as u64)
}
}
#[inline]
pub fn reserved28(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 4u8) as u32) }
}
#[inline]
pub fn set_reserved28(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 4u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(date: u32, reserved28: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 28u8, {
let date: u32 = unsafe { ::core::mem::transmute(date) };
date as u64
});
__bindgen_bitfield_unit.set(28usize, 4u8, {
let reserved28: u32 = unsafe { ::core::mem::transmute(reserved28) };
reserved28 as u64
});
__bindgen_bitfield_unit
}
}
pub type rtc_io_dev_t = rtc_io_dev_s;
extern "C" {
pub static mut RTCIO: rtc_io_dev_t;
}
#[repr(C)]
#[derive(Copy, Clone)]
pub struct rtc_cntl_dev_s {
pub options0: rtc_cntl_dev_s__bindgen_ty_1,
pub slp_timer0: u32,
pub slp_timer1: rtc_cntl_dev_s__bindgen_ty_2,
pub time_update: rtc_cntl_dev_s__bindgen_ty_3,
pub time0: u32,
pub time1: rtc_cntl_dev_s__bindgen_ty_4,
pub state0: rtc_cntl_dev_s__bindgen_ty_5,
pub timer1: rtc_cntl_dev_s__bindgen_ty_6,
pub timer2: rtc_cntl_dev_s__bindgen_ty_7,
pub timer3: rtc_cntl_dev_s__bindgen_ty_8,
pub timer4: rtc_cntl_dev_s__bindgen_ty_9,
pub timer5: rtc_cntl_dev_s__bindgen_ty_10,
pub ana_conf: rtc_cntl_dev_s__bindgen_ty_11,
pub reset_state: rtc_cntl_dev_s__bindgen_ty_12,
pub wakeup_state: rtc_cntl_dev_s__bindgen_ty_13,
pub int_ena: rtc_cntl_dev_s__bindgen_ty_14,
pub int_raw: rtc_cntl_dev_s__bindgen_ty_15,
pub int_st: rtc_cntl_dev_s__bindgen_ty_16,
pub int_clr: rtc_cntl_dev_s__bindgen_ty_17,
pub rtc_store0: u32,
pub rtc_store1: u32,
pub rtc_store2: u32,
pub rtc_store3: u32,
pub ext_xtl_conf: rtc_cntl_dev_s__bindgen_ty_18,
pub ext_wakeup_conf: rtc_cntl_dev_s__bindgen_ty_19,
pub slp_reject_conf: rtc_cntl_dev_s__bindgen_ty_20,
pub cpu_period_conf: rtc_cntl_dev_s__bindgen_ty_21,
pub sdio_act_conf: rtc_cntl_dev_s__bindgen_ty_22,
pub clk_conf: rtc_cntl_dev_s__bindgen_ty_23,
pub sdio_conf: rtc_cntl_dev_s__bindgen_ty_24,
pub bias_conf: rtc_cntl_dev_s__bindgen_ty_25,
pub rtc: rtc_cntl_dev_s__bindgen_ty_26,
pub rtc_pwc: rtc_cntl_dev_s__bindgen_ty_27,
pub dig_pwc: rtc_cntl_dev_s__bindgen_ty_28,
pub dig_iso: rtc_cntl_dev_s__bindgen_ty_29,
pub wdt_config0: rtc_cntl_dev_s__bindgen_ty_30,
pub wdt_config1: u32,
pub wdt_config2: u32,
pub wdt_config3: u32,
pub wdt_config4: u32,
pub wdt_feed: rtc_cntl_dev_s__bindgen_ty_31,
pub wdt_wprotect: u32,
pub test_mux: rtc_cntl_dev_s__bindgen_ty_32,
pub sw_cpu_stall: rtc_cntl_dev_s__bindgen_ty_33,
pub store4: u32,
pub store5: u32,
pub store6: u32,
pub store7: u32,
pub diag0: u32,
pub diag1: u32,
pub hold_force: rtc_cntl_dev_s__bindgen_ty_34,
pub ext_wakeup1: rtc_cntl_dev_s__bindgen_ty_35,
pub ext_wakeup1_status: rtc_cntl_dev_s__bindgen_ty_36,
pub brown_out: rtc_cntl_dev_s__bindgen_ty_37,
pub reserved_39: u32,
pub reserved_3d: u32,
pub reserved_41: u32,
pub reserved_45: u32,
pub reserved_49: u32,
pub reserved_4d: u32,
pub date: rtc_cntl_dev_s__bindgen_ty_38,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_1 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_1__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_1__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl rtc_cntl_dev_s__bindgen_ty_1__bindgen_ty_1 {
#[inline]
pub fn sw_stall_appcpu_c0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 2u8) as u32) }
}
#[inline]
pub fn set_sw_stall_appcpu_c0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 2u8, val as u64)
}
}
#[inline]
pub fn sw_stall_procpu_c0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 2u8) as u32) }
}
#[inline]
pub fn set_sw_stall_procpu_c0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 2u8, val as u64)
}
}
#[inline]
pub fn sw_appcpu_rst(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_sw_appcpu_rst(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn sw_procpu_rst(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_sw_procpu_rst(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn bb_i2c_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_bb_i2c_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn bb_i2c_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_bb_i2c_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn bbpll_i2c_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_bbpll_i2c_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn bbpll_i2c_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_bbpll_i2c_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn bbpll_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_bbpll_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn bbpll_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_bbpll_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn xtl_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_xtl_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn xtl_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 1u8) as u32) }
}
#[inline]
pub fn set_xtl_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 1u8, val as u64)
}
}
#[inline]
pub fn bias_sleep_folw_8m(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 1u8) as u32) }
}
#[inline]
pub fn set_bias_sleep_folw_8m(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 1u8, val as u64)
}
}
#[inline]
pub fn bias_force_sleep(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 1u8) as u32) }
}
#[inline]
pub fn set_bias_force_sleep(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 1u8, val as u64)
}
}
#[inline]
pub fn bias_force_nosleep(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_bias_force_nosleep(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn bias_i2c_folw_8m(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 1u8) as u32) }
}
#[inline]
pub fn set_bias_i2c_folw_8m(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 1u8, val as u64)
}
}
#[inline]
pub fn bias_i2c_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 1u8) as u32) }
}
#[inline]
pub fn set_bias_i2c_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 1u8, val as u64)
}
}
#[inline]
pub fn bias_i2c_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 1u8) as u32) }
}
#[inline]
pub fn set_bias_i2c_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 1u8, val as u64)
}
}
#[inline]
pub fn bias_core_folw_8m(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 1u8) as u32) }
}
#[inline]
pub fn set_bias_core_folw_8m(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 1u8, val as u64)
}
}
#[inline]
pub fn bias_core_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(21usize, 1u8) as u32) }
}
#[inline]
pub fn set_bias_core_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(21usize, 1u8, val as u64)
}
}
#[inline]
pub fn bias_core_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 1u8) as u32) }
}
#[inline]
pub fn set_bias_core_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 1u8, val as u64)
}
}
#[inline]
pub fn xtl_force_iso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(23usize, 1u8) as u32) }
}
#[inline]
pub fn set_xtl_force_iso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(23usize, 1u8, val as u64)
}
}
#[inline]
pub fn pll_force_iso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_pll_force_iso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn analog_force_iso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 1u8) as u32) }
}
#[inline]
pub fn set_analog_force_iso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 1u8, val as u64)
}
}
#[inline]
pub fn xtl_force_noiso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 1u8) as u32) }
}
#[inline]
pub fn set_xtl_force_noiso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 1u8, val as u64)
}
}
#[inline]
pub fn pll_force_noiso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 1u8) as u32) }
}
#[inline]
pub fn set_pll_force_noiso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 1u8, val as u64)
}
}
#[inline]
pub fn analog_force_noiso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 1u8) as u32) }
}
#[inline]
pub fn set_analog_force_noiso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 1u8, val as u64)
}
}
#[inline]
pub fn dg_wrap_force_rst(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 1u8) as u32) }
}
#[inline]
pub fn set_dg_wrap_force_rst(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 1u8, val as u64)
}
}
#[inline]
pub fn dg_wrap_force_norst(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_dg_wrap_force_norst(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn sw_sys_rst(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_sw_sys_rst(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
sw_stall_appcpu_c0: u32,
sw_stall_procpu_c0: u32,
sw_appcpu_rst: u32,
sw_procpu_rst: u32,
bb_i2c_force_pd: u32,
bb_i2c_force_pu: u32,
bbpll_i2c_force_pd: u32,
bbpll_i2c_force_pu: u32,
bbpll_force_pd: u32,
bbpll_force_pu: u32,
xtl_force_pd: u32,
xtl_force_pu: u32,
bias_sleep_folw_8m: u32,
bias_force_sleep: u32,
bias_force_nosleep: u32,
bias_i2c_folw_8m: u32,
bias_i2c_force_pd: u32,
bias_i2c_force_pu: u32,
bias_core_folw_8m: u32,
bias_core_force_pd: u32,
bias_core_force_pu: u32,
xtl_force_iso: u32,
pll_force_iso: u32,
analog_force_iso: u32,
xtl_force_noiso: u32,
pll_force_noiso: u32,
analog_force_noiso: u32,
dg_wrap_force_rst: u32,
dg_wrap_force_norst: u32,
sw_sys_rst: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 2u8, {
let sw_stall_appcpu_c0: u32 = unsafe { ::core::mem::transmute(sw_stall_appcpu_c0) };
sw_stall_appcpu_c0 as u64
});
__bindgen_bitfield_unit.set(2usize, 2u8, {
let sw_stall_procpu_c0: u32 = unsafe { ::core::mem::transmute(sw_stall_procpu_c0) };
sw_stall_procpu_c0 as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let sw_appcpu_rst: u32 = unsafe { ::core::mem::transmute(sw_appcpu_rst) };
sw_appcpu_rst as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let sw_procpu_rst: u32 = unsafe { ::core::mem::transmute(sw_procpu_rst) };
sw_procpu_rst as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let bb_i2c_force_pd: u32 = unsafe { ::core::mem::transmute(bb_i2c_force_pd) };
bb_i2c_force_pd as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let bb_i2c_force_pu: u32 = unsafe { ::core::mem::transmute(bb_i2c_force_pu) };
bb_i2c_force_pu as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let bbpll_i2c_force_pd: u32 = unsafe { ::core::mem::transmute(bbpll_i2c_force_pd) };
bbpll_i2c_force_pd as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let bbpll_i2c_force_pu: u32 = unsafe { ::core::mem::transmute(bbpll_i2c_force_pu) };
bbpll_i2c_force_pu as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let bbpll_force_pd: u32 = unsafe { ::core::mem::transmute(bbpll_force_pd) };
bbpll_force_pd as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let bbpll_force_pu: u32 = unsafe { ::core::mem::transmute(bbpll_force_pu) };
bbpll_force_pu as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let xtl_force_pd: u32 = unsafe { ::core::mem::transmute(xtl_force_pd) };
xtl_force_pd as u64
});
__bindgen_bitfield_unit.set(13usize, 1u8, {
let xtl_force_pu: u32 = unsafe { ::core::mem::transmute(xtl_force_pu) };
xtl_force_pu as u64
});
__bindgen_bitfield_unit.set(14usize, 1u8, {
let bias_sleep_folw_8m: u32 = unsafe { ::core::mem::transmute(bias_sleep_folw_8m) };
bias_sleep_folw_8m as u64
});
__bindgen_bitfield_unit.set(15usize, 1u8, {
let bias_force_sleep: u32 = unsafe { ::core::mem::transmute(bias_force_sleep) };
bias_force_sleep as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let bias_force_nosleep: u32 = unsafe { ::core::mem::transmute(bias_force_nosleep) };
bias_force_nosleep as u64
});
__bindgen_bitfield_unit.set(17usize, 1u8, {
let bias_i2c_folw_8m: u32 = unsafe { ::core::mem::transmute(bias_i2c_folw_8m) };
bias_i2c_folw_8m as u64
});
__bindgen_bitfield_unit.set(18usize, 1u8, {
let bias_i2c_force_pd: u32 = unsafe { ::core::mem::transmute(bias_i2c_force_pd) };
bias_i2c_force_pd as u64
});
__bindgen_bitfield_unit.set(19usize, 1u8, {
let bias_i2c_force_pu: u32 = unsafe { ::core::mem::transmute(bias_i2c_force_pu) };
bias_i2c_force_pu as u64
});
__bindgen_bitfield_unit.set(20usize, 1u8, {
let bias_core_folw_8m: u32 = unsafe { ::core::mem::transmute(bias_core_folw_8m) };
bias_core_folw_8m as u64
});
__bindgen_bitfield_unit.set(21usize, 1u8, {
let bias_core_force_pd: u32 = unsafe { ::core::mem::transmute(bias_core_force_pd) };
bias_core_force_pd as u64
});
__bindgen_bitfield_unit.set(22usize, 1u8, {
let bias_core_force_pu: u32 = unsafe { ::core::mem::transmute(bias_core_force_pu) };
bias_core_force_pu as u64
});
__bindgen_bitfield_unit.set(23usize, 1u8, {
let xtl_force_iso: u32 = unsafe { ::core::mem::transmute(xtl_force_iso) };
xtl_force_iso as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let pll_force_iso: u32 = unsafe { ::core::mem::transmute(pll_force_iso) };
pll_force_iso as u64
});
__bindgen_bitfield_unit.set(25usize, 1u8, {
let analog_force_iso: u32 = unsafe { ::core::mem::transmute(analog_force_iso) };
analog_force_iso as u64
});
__bindgen_bitfield_unit.set(26usize, 1u8, {
let xtl_force_noiso: u32 = unsafe { ::core::mem::transmute(xtl_force_noiso) };
xtl_force_noiso as u64
});
__bindgen_bitfield_unit.set(27usize, 1u8, {
let pll_force_noiso: u32 = unsafe { ::core::mem::transmute(pll_force_noiso) };
pll_force_noiso as u64
});
__bindgen_bitfield_unit.set(28usize, 1u8, {
let analog_force_noiso: u32 = unsafe { ::core::mem::transmute(analog_force_noiso) };
analog_force_noiso as u64
});
__bindgen_bitfield_unit.set(29usize, 1u8, {
let dg_wrap_force_rst: u32 = unsafe { ::core::mem::transmute(dg_wrap_force_rst) };
dg_wrap_force_rst as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let dg_wrap_force_norst: u32 = unsafe { ::core::mem::transmute(dg_wrap_force_norst) };
dg_wrap_force_norst as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let sw_sys_rst: u32 = unsafe { ::core::mem::transmute(sw_sys_rst) };
sw_sys_rst as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_2 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_2__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_2__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl rtc_cntl_dev_s__bindgen_ty_2__bindgen_ty_1 {
#[inline]
pub fn slp_val_hi(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 16u8) as u32) }
}
#[inline]
pub fn set_slp_val_hi(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 16u8, val as u64)
}
}
#[inline]
pub fn main_timer_alarm_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_main_timer_alarm_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved17(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 15u8) as u32) }
}
#[inline]
pub fn set_reserved17(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 15u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
slp_val_hi: u32,
main_timer_alarm_en: u32,
reserved17: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 16u8, {
let slp_val_hi: u32 = unsafe { ::core::mem::transmute(slp_val_hi) };
slp_val_hi as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let main_timer_alarm_en: u32 = unsafe { ::core::mem::transmute(main_timer_alarm_en) };
main_timer_alarm_en as u64
});
__bindgen_bitfield_unit.set(17usize, 15u8, {
let reserved17: u32 = unsafe { ::core::mem::transmute(reserved17) };
reserved17 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_3 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_3__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_3__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_3__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 30u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 30u8, val as u64)
}
}
#[inline]
pub fn valid(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_valid(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn update(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_update(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
valid: u32,
update: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 30u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let valid: u32 = unsafe { ::core::mem::transmute(valid) };
valid as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let update: u32 = unsafe { ::core::mem::transmute(update) };
update as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_4 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_4__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_4__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl rtc_cntl_dev_s__bindgen_ty_4__bindgen_ty_1 {
#[inline]
pub fn time_hi(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 16u8) as u32) }
}
#[inline]
pub fn set_time_hi(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 16u8, val as u64)
}
}
#[inline]
pub fn reserved16(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 16u8) as u32) }
}
#[inline]
pub fn set_reserved16(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 16u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
time_hi: u32,
reserved16: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 16u8, {
let time_hi: u32 = unsafe { ::core::mem::transmute(time_hi) };
time_hi as u64
});
__bindgen_bitfield_unit.set(16usize, 16u8, {
let reserved16: u32 = unsafe { ::core::mem::transmute(reserved16) };
reserved16 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_5 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_5__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_5__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_5__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 20u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 20u8, val as u64)
}
}
#[inline]
pub fn touch_wakeup_force_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 1u8) as u32) }
}
#[inline]
pub fn set_touch_wakeup_force_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 1u8, val as u64)
}
}
#[inline]
pub fn ulp_cp_wakeup_force_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(21usize, 1u8) as u32) }
}
#[inline]
pub fn set_ulp_cp_wakeup_force_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(21usize, 1u8, val as u64)
}
}
#[inline]
pub fn apb2rtc_bridge_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 1u8) as u32) }
}
#[inline]
pub fn set_apb2rtc_bridge_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 1u8, val as u64)
}
}
#[inline]
pub fn touch_slp_timer_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(23usize, 1u8) as u32) }
}
#[inline]
pub fn set_touch_slp_timer_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(23usize, 1u8, val as u64)
}
}
#[inline]
pub fn ulp_cp_slp_timer_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_ulp_cp_slp_timer_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved25(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 3u8) as u32) }
}
#[inline]
pub fn set_reserved25(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 3u8, val as u64)
}
}
#[inline]
pub fn sdio_active_ind(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 1u8) as u32) }
}
#[inline]
pub fn set_sdio_active_ind(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 1u8, val as u64)
}
}
#[inline]
pub fn slp_wakeup(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 1u8) as u32) }
}
#[inline]
pub fn set_slp_wakeup(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 1u8, val as u64)
}
}
#[inline]
pub fn slp_reject(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_slp_reject(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn sleep_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_sleep_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
touch_wakeup_force_en: u32,
ulp_cp_wakeup_force_en: u32,
apb2rtc_bridge_sel: u32,
touch_slp_timer_en: u32,
ulp_cp_slp_timer_en: u32,
reserved25: u32,
sdio_active_ind: u32,
slp_wakeup: u32,
slp_reject: u32,
sleep_en: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 20u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(20usize, 1u8, {
let touch_wakeup_force_en: u32 =
unsafe { ::core::mem::transmute(touch_wakeup_force_en) };
touch_wakeup_force_en as u64
});
__bindgen_bitfield_unit.set(21usize, 1u8, {
let ulp_cp_wakeup_force_en: u32 =
unsafe { ::core::mem::transmute(ulp_cp_wakeup_force_en) };
ulp_cp_wakeup_force_en as u64
});
__bindgen_bitfield_unit.set(22usize, 1u8, {
let apb2rtc_bridge_sel: u32 = unsafe { ::core::mem::transmute(apb2rtc_bridge_sel) };
apb2rtc_bridge_sel as u64
});
__bindgen_bitfield_unit.set(23usize, 1u8, {
let touch_slp_timer_en: u32 = unsafe { ::core::mem::transmute(touch_slp_timer_en) };
touch_slp_timer_en as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let ulp_cp_slp_timer_en: u32 = unsafe { ::core::mem::transmute(ulp_cp_slp_timer_en) };
ulp_cp_slp_timer_en as u64
});
__bindgen_bitfield_unit.set(25usize, 3u8, {
let reserved25: u32 = unsafe { ::core::mem::transmute(reserved25) };
reserved25 as u64
});
__bindgen_bitfield_unit.set(28usize, 1u8, {
let sdio_active_ind: u32 = unsafe { ::core::mem::transmute(sdio_active_ind) };
sdio_active_ind as u64
});
__bindgen_bitfield_unit.set(29usize, 1u8, {
let slp_wakeup: u32 = unsafe { ::core::mem::transmute(slp_wakeup) };
slp_wakeup as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let slp_reject: u32 = unsafe { ::core::mem::transmute(slp_reject) };
slp_reject as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let sleep_en: u32 = unsafe { ::core::mem::transmute(sleep_en) };
sleep_en as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_6 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_6__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_6__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl rtc_cntl_dev_s__bindgen_ty_6__bindgen_ty_1 {
#[inline]
pub fn cpu_stall_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_cpu_stall_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn cpu_stall_wait(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 5u8) as u32) }
}
#[inline]
pub fn set_cpu_stall_wait(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 5u8, val as u64)
}
}
#[inline]
pub fn ck8m_wait(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 8u8) as u32) }
}
#[inline]
pub fn set_ck8m_wait(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 8u8, val as u64)
}
}
#[inline]
pub fn xtl_buf_wait(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 10u8) as u32) }
}
#[inline]
pub fn set_xtl_buf_wait(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 10u8, val as u64)
}
}
#[inline]
pub fn pll_buf_wait(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 8u8) as u32) }
}
#[inline]
pub fn set_pll_buf_wait(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 8u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
cpu_stall_en: u32,
cpu_stall_wait: u32,
ck8m_wait: u32,
xtl_buf_wait: u32,
pll_buf_wait: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let cpu_stall_en: u32 = unsafe { ::core::mem::transmute(cpu_stall_en) };
cpu_stall_en as u64
});
__bindgen_bitfield_unit.set(1usize, 5u8, {
let cpu_stall_wait: u32 = unsafe { ::core::mem::transmute(cpu_stall_wait) };
cpu_stall_wait as u64
});
__bindgen_bitfield_unit.set(6usize, 8u8, {
let ck8m_wait: u32 = unsafe { ::core::mem::transmute(ck8m_wait) };
ck8m_wait as u64
});
__bindgen_bitfield_unit.set(14usize, 10u8, {
let xtl_buf_wait: u32 = unsafe { ::core::mem::transmute(xtl_buf_wait) };
xtl_buf_wait as u64
});
__bindgen_bitfield_unit.set(24usize, 8u8, {
let pll_buf_wait: u32 = unsafe { ::core::mem::transmute(pll_buf_wait) };
pll_buf_wait as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_7 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_7__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_7__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl rtc_cntl_dev_s__bindgen_ty_7__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 15u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 15u8, val as u64)
}
}
#[inline]
pub fn ulpcp_touch_start_wait(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 9u8) as u32) }
}
#[inline]
pub fn set_ulpcp_touch_start_wait(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 9u8, val as u64)
}
}
#[inline]
pub fn min_time_ck8m_off(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 8u8) as u32) }
}
#[inline]
pub fn set_min_time_ck8m_off(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 8u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
ulpcp_touch_start_wait: u32,
min_time_ck8m_off: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 15u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(15usize, 9u8, {
let ulpcp_touch_start_wait: u32 =
unsafe { ::core::mem::transmute(ulpcp_touch_start_wait) };
ulpcp_touch_start_wait as u64
});
__bindgen_bitfield_unit.set(24usize, 8u8, {
let min_time_ck8m_off: u32 = unsafe { ::core::mem::transmute(min_time_ck8m_off) };
min_time_ck8m_off as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_8 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_8__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_8__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl rtc_cntl_dev_s__bindgen_ty_8__bindgen_ty_1 {
#[inline]
pub fn wifi_wait_timer(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 9u8) as u32) }
}
#[inline]
pub fn set_wifi_wait_timer(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 9u8, val as u64)
}
}
#[inline]
pub fn wifi_powerup_timer(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 7u8) as u32) }
}
#[inline]
pub fn set_wifi_powerup_timer(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 7u8, val as u64)
}
}
#[inline]
pub fn rom_ram_wait_timer(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 9u8) as u32) }
}
#[inline]
pub fn set_rom_ram_wait_timer(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 9u8, val as u64)
}
}
#[inline]
pub fn rom_ram_powerup_timer(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 7u8) as u32) }
}
#[inline]
pub fn set_rom_ram_powerup_timer(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 7u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
wifi_wait_timer: u32,
wifi_powerup_timer: u32,
rom_ram_wait_timer: u32,
rom_ram_powerup_timer: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 9u8, {
let wifi_wait_timer: u32 = unsafe { ::core::mem::transmute(wifi_wait_timer) };
wifi_wait_timer as u64
});
__bindgen_bitfield_unit.set(9usize, 7u8, {
let wifi_powerup_timer: u32 = unsafe { ::core::mem::transmute(wifi_powerup_timer) };
wifi_powerup_timer as u64
});
__bindgen_bitfield_unit.set(16usize, 9u8, {
let rom_ram_wait_timer: u32 = unsafe { ::core::mem::transmute(rom_ram_wait_timer) };
rom_ram_wait_timer as u64
});
__bindgen_bitfield_unit.set(25usize, 7u8, {
let rom_ram_powerup_timer: u32 =
unsafe { ::core::mem::transmute(rom_ram_powerup_timer) };
rom_ram_powerup_timer as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_9 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_9__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_9__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl rtc_cntl_dev_s__bindgen_ty_9__bindgen_ty_1 {
#[inline]
pub fn rtc_wait_timer(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 9u8) as u32) }
}
#[inline]
pub fn set_rtc_wait_timer(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 9u8, val as u64)
}
}
#[inline]
pub fn rtc_powerup_timer(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 7u8) as u32) }
}
#[inline]
pub fn set_rtc_powerup_timer(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 7u8, val as u64)
}
}
#[inline]
pub fn dg_wrap_wait_timer(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 9u8) as u32) }
}
#[inline]
pub fn set_dg_wrap_wait_timer(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 9u8, val as u64)
}
}
#[inline]
pub fn dg_wrap_powerup_timer(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 7u8) as u32) }
}
#[inline]
pub fn set_dg_wrap_powerup_timer(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 7u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
rtc_wait_timer: u32,
rtc_powerup_timer: u32,
dg_wrap_wait_timer: u32,
dg_wrap_powerup_timer: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 9u8, {
let rtc_wait_timer: u32 = unsafe { ::core::mem::transmute(rtc_wait_timer) };
rtc_wait_timer as u64
});
__bindgen_bitfield_unit.set(9usize, 7u8, {
let rtc_powerup_timer: u32 = unsafe { ::core::mem::transmute(rtc_powerup_timer) };
rtc_powerup_timer as u64
});
__bindgen_bitfield_unit.set(16usize, 9u8, {
let dg_wrap_wait_timer: u32 = unsafe { ::core::mem::transmute(dg_wrap_wait_timer) };
dg_wrap_wait_timer as u64
});
__bindgen_bitfield_unit.set(25usize, 7u8, {
let dg_wrap_powerup_timer: u32 =
unsafe { ::core::mem::transmute(dg_wrap_powerup_timer) };
dg_wrap_powerup_timer as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_10 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_10__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_10__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl rtc_cntl_dev_s__bindgen_ty_10__bindgen_ty_1 {
#[inline]
pub fn ulp_cp_subtimer_prediv(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_ulp_cp_subtimer_prediv(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn min_slp_val(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 8u8) as u32) }
}
#[inline]
pub fn set_min_slp_val(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 8u8, val as u64)
}
}
#[inline]
pub fn rtcmem_wait_timer(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 9u8) as u32) }
}
#[inline]
pub fn set_rtcmem_wait_timer(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 9u8, val as u64)
}
}
#[inline]
pub fn rtcmem_powerup_timer(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 7u8) as u32) }
}
#[inline]
pub fn set_rtcmem_powerup_timer(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 7u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
ulp_cp_subtimer_prediv: u32,
min_slp_val: u32,
rtcmem_wait_timer: u32,
rtcmem_powerup_timer: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let ulp_cp_subtimer_prediv: u32 =
unsafe { ::core::mem::transmute(ulp_cp_subtimer_prediv) };
ulp_cp_subtimer_prediv as u64
});
__bindgen_bitfield_unit.set(8usize, 8u8, {
let min_slp_val: u32 = unsafe { ::core::mem::transmute(min_slp_val) };
min_slp_val as u64
});
__bindgen_bitfield_unit.set(16usize, 9u8, {
let rtcmem_wait_timer: u32 = unsafe { ::core::mem::transmute(rtcmem_wait_timer) };
rtcmem_wait_timer as u64
});
__bindgen_bitfield_unit.set(25usize, 7u8, {
let rtcmem_powerup_timer: u32 = unsafe { ::core::mem::transmute(rtcmem_powerup_timer) };
rtcmem_powerup_timer as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_11 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_11__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_11__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_11__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 23u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 23u8, val as u64)
}
}
#[inline]
pub fn plla_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(23usize, 1u8) as u32) }
}
#[inline]
pub fn set_plla_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(23usize, 1u8, val as u64)
}
}
#[inline]
pub fn plla_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_plla_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn bbpll_cal_slp_start(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 1u8) as u32) }
}
#[inline]
pub fn set_bbpll_cal_slp_start(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 1u8, val as u64)
}
}
#[inline]
pub fn pvtmon_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 1u8) as u32) }
}
#[inline]
pub fn set_pvtmon_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 1u8, val as u64)
}
}
#[inline]
pub fn txrf_i2c_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 1u8) as u32) }
}
#[inline]
pub fn set_txrf_i2c_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 1u8, val as u64)
}
}
#[inline]
pub fn rfrx_pbus_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 1u8) as u32) }
}
#[inline]
pub fn set_rfrx_pbus_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved29(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 1u8) as u32) }
}
#[inline]
pub fn set_reserved29(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 1u8, val as u64)
}
}
#[inline]
pub fn ckgen_i2c_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_ckgen_i2c_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn pll_i2c_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_pll_i2c_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
plla_force_pd: u32,
plla_force_pu: u32,
bbpll_cal_slp_start: u32,
pvtmon_pu: u32,
txrf_i2c_pu: u32,
rfrx_pbus_pu: u32,
reserved29: u32,
ckgen_i2c_pu: u32,
pll_i2c_pu: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 23u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(23usize, 1u8, {
let plla_force_pd: u32 = unsafe { ::core::mem::transmute(plla_force_pd) };
plla_force_pd as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let plla_force_pu: u32 = unsafe { ::core::mem::transmute(plla_force_pu) };
plla_force_pu as u64
});
__bindgen_bitfield_unit.set(25usize, 1u8, {
let bbpll_cal_slp_start: u32 = unsafe { ::core::mem::transmute(bbpll_cal_slp_start) };
bbpll_cal_slp_start as u64
});
__bindgen_bitfield_unit.set(26usize, 1u8, {
let pvtmon_pu: u32 = unsafe { ::core::mem::transmute(pvtmon_pu) };
pvtmon_pu as u64
});
__bindgen_bitfield_unit.set(27usize, 1u8, {
let txrf_i2c_pu: u32 = unsafe { ::core::mem::transmute(txrf_i2c_pu) };
txrf_i2c_pu as u64
});
__bindgen_bitfield_unit.set(28usize, 1u8, {
let rfrx_pbus_pu: u32 = unsafe { ::core::mem::transmute(rfrx_pbus_pu) };
rfrx_pbus_pu as u64
});
__bindgen_bitfield_unit.set(29usize, 1u8, {
let reserved29: u32 = unsafe { ::core::mem::transmute(reserved29) };
reserved29 as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let ckgen_i2c_pu: u32 = unsafe { ::core::mem::transmute(ckgen_i2c_pu) };
ckgen_i2c_pu as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let pll_i2c_pu: u32 = unsafe { ::core::mem::transmute(pll_i2c_pu) };
pll_i2c_pu as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_12 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_12__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_12__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_12__bindgen_ty_1 {
#[inline]
pub fn reset_cause_procpu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 6u8) as u32) }
}
#[inline]
pub fn set_reset_cause_procpu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 6u8, val as u64)
}
}
#[inline]
pub fn reset_cause_appcpu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 6u8) as u32) }
}
#[inline]
pub fn set_reset_cause_appcpu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 6u8, val as u64)
}
}
#[inline]
pub fn appcpu_stat_vector_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_appcpu_stat_vector_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn procpu_stat_vector_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 1u8) as u32) }
}
#[inline]
pub fn set_procpu_stat_vector_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved14(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 18u8) as u32) }
}
#[inline]
pub fn set_reserved14(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 18u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reset_cause_procpu: u32,
reset_cause_appcpu: u32,
appcpu_stat_vector_sel: u32,
procpu_stat_vector_sel: u32,
reserved14: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 6u8, {
let reset_cause_procpu: u32 = unsafe { ::core::mem::transmute(reset_cause_procpu) };
reset_cause_procpu as u64
});
__bindgen_bitfield_unit.set(6usize, 6u8, {
let reset_cause_appcpu: u32 = unsafe { ::core::mem::transmute(reset_cause_appcpu) };
reset_cause_appcpu as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let appcpu_stat_vector_sel: u32 =
unsafe { ::core::mem::transmute(appcpu_stat_vector_sel) };
appcpu_stat_vector_sel as u64
});
__bindgen_bitfield_unit.set(13usize, 1u8, {
let procpu_stat_vector_sel: u32 =
unsafe { ::core::mem::transmute(procpu_stat_vector_sel) };
procpu_stat_vector_sel as u64
});
__bindgen_bitfield_unit.set(14usize, 18u8, {
let reserved14: u32 = unsafe { ::core::mem::transmute(reserved14) };
reserved14 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_13 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_13__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_13__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl rtc_cntl_dev_s__bindgen_ty_13__bindgen_ty_1 {
#[inline]
pub fn wakeup_cause(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 11u8) as u32) }
}
#[inline]
pub fn set_wakeup_cause(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 11u8, val as u64)
}
}
#[inline]
pub fn rtc_wakeup_ena(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 11u8) as u32) }
}
#[inline]
pub fn set_rtc_wakeup_ena(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 11u8, val as u64)
}
}
#[inline]
pub fn gpio_wakeup_filter(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 1u8) as u32) }
}
#[inline]
pub fn set_gpio_wakeup_filter(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved23(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(23usize, 9u8) as u32) }
}
#[inline]
pub fn set_reserved23(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(23usize, 9u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
wakeup_cause: u32,
rtc_wakeup_ena: u32,
gpio_wakeup_filter: u32,
reserved23: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 11u8, {
let wakeup_cause: u32 = unsafe { ::core::mem::transmute(wakeup_cause) };
wakeup_cause as u64
});
__bindgen_bitfield_unit.set(11usize, 11u8, {
let rtc_wakeup_ena: u32 = unsafe { ::core::mem::transmute(rtc_wakeup_ena) };
rtc_wakeup_ena as u64
});
__bindgen_bitfield_unit.set(22usize, 1u8, {
let gpio_wakeup_filter: u32 = unsafe { ::core::mem::transmute(gpio_wakeup_filter) };
gpio_wakeup_filter as u64
});
__bindgen_bitfield_unit.set(23usize, 9u8, {
let reserved23: u32 = unsafe { ::core::mem::transmute(reserved23) };
reserved23 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_14 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_14__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_14__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_14__bindgen_ty_1 {
#[inline]
pub fn slp_wakeup(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_slp_wakeup(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn slp_reject(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_slp_reject(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn sdio_idle(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_sdio_idle(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_wdt(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_wdt(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_time_valid(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_time_valid(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_ulp_cp(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_ulp_cp(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_touch(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_touch(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_brown_out(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_brown_out(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_main_timer(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_main_timer(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved9(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 23u8) as u32) }
}
#[inline]
pub fn set_reserved9(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 23u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
slp_wakeup: u32,
slp_reject: u32,
sdio_idle: u32,
rtc_wdt: u32,
rtc_time_valid: u32,
rtc_ulp_cp: u32,
rtc_touch: u32,
rtc_brown_out: u32,
rtc_main_timer: u32,
reserved9: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let slp_wakeup: u32 = unsafe { ::core::mem::transmute(slp_wakeup) };
slp_wakeup as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let slp_reject: u32 = unsafe { ::core::mem::transmute(slp_reject) };
slp_reject as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let sdio_idle: u32 = unsafe { ::core::mem::transmute(sdio_idle) };
sdio_idle as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let rtc_wdt: u32 = unsafe { ::core::mem::transmute(rtc_wdt) };
rtc_wdt as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let rtc_time_valid: u32 = unsafe { ::core::mem::transmute(rtc_time_valid) };
rtc_time_valid as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let rtc_ulp_cp: u32 = unsafe { ::core::mem::transmute(rtc_ulp_cp) };
rtc_ulp_cp as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let rtc_touch: u32 = unsafe { ::core::mem::transmute(rtc_touch) };
rtc_touch as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let rtc_brown_out: u32 = unsafe { ::core::mem::transmute(rtc_brown_out) };
rtc_brown_out as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let rtc_main_timer: u32 = unsafe { ::core::mem::transmute(rtc_main_timer) };
rtc_main_timer as u64
});
__bindgen_bitfield_unit.set(9usize, 23u8, {
let reserved9: u32 = unsafe { ::core::mem::transmute(reserved9) };
reserved9 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_15 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_15__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_15__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_15__bindgen_ty_1 {
#[inline]
pub fn slp_wakeup(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_slp_wakeup(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn slp_reject(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_slp_reject(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn sdio_idle(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_sdio_idle(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_wdt(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_wdt(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_time_valid(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_time_valid(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_ulp_cp(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_ulp_cp(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_touch(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_touch(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_brown_out(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_brown_out(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_main_timer(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_main_timer(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved9(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 23u8) as u32) }
}
#[inline]
pub fn set_reserved9(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 23u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
slp_wakeup: u32,
slp_reject: u32,
sdio_idle: u32,
rtc_wdt: u32,
rtc_time_valid: u32,
rtc_ulp_cp: u32,
rtc_touch: u32,
rtc_brown_out: u32,
rtc_main_timer: u32,
reserved9: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let slp_wakeup: u32 = unsafe { ::core::mem::transmute(slp_wakeup) };
slp_wakeup as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let slp_reject: u32 = unsafe { ::core::mem::transmute(slp_reject) };
slp_reject as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let sdio_idle: u32 = unsafe { ::core::mem::transmute(sdio_idle) };
sdio_idle as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let rtc_wdt: u32 = unsafe { ::core::mem::transmute(rtc_wdt) };
rtc_wdt as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let rtc_time_valid: u32 = unsafe { ::core::mem::transmute(rtc_time_valid) };
rtc_time_valid as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let rtc_ulp_cp: u32 = unsafe { ::core::mem::transmute(rtc_ulp_cp) };
rtc_ulp_cp as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let rtc_touch: u32 = unsafe { ::core::mem::transmute(rtc_touch) };
rtc_touch as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let rtc_brown_out: u32 = unsafe { ::core::mem::transmute(rtc_brown_out) };
rtc_brown_out as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let rtc_main_timer: u32 = unsafe { ::core::mem::transmute(rtc_main_timer) };
rtc_main_timer as u64
});
__bindgen_bitfield_unit.set(9usize, 23u8, {
let reserved9: u32 = unsafe { ::core::mem::transmute(reserved9) };
reserved9 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_16 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_16__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_16__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_16__bindgen_ty_1 {
#[inline]
pub fn slp_wakeup(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_slp_wakeup(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn slp_reject(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_slp_reject(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn sdio_idle(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_sdio_idle(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_wdt(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_wdt(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_time_valid(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_time_valid(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_sar(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_sar(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_touch(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_touch(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_brown_out(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_brown_out(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_main_timer(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_main_timer(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved9(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 23u8) as u32) }
}
#[inline]
pub fn set_reserved9(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 23u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
slp_wakeup: u32,
slp_reject: u32,
sdio_idle: u32,
rtc_wdt: u32,
rtc_time_valid: u32,
rtc_sar: u32,
rtc_touch: u32,
rtc_brown_out: u32,
rtc_main_timer: u32,
reserved9: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let slp_wakeup: u32 = unsafe { ::core::mem::transmute(slp_wakeup) };
slp_wakeup as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let slp_reject: u32 = unsafe { ::core::mem::transmute(slp_reject) };
slp_reject as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let sdio_idle: u32 = unsafe { ::core::mem::transmute(sdio_idle) };
sdio_idle as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let rtc_wdt: u32 = unsafe { ::core::mem::transmute(rtc_wdt) };
rtc_wdt as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let rtc_time_valid: u32 = unsafe { ::core::mem::transmute(rtc_time_valid) };
rtc_time_valid as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let rtc_sar: u32 = unsafe { ::core::mem::transmute(rtc_sar) };
rtc_sar as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let rtc_touch: u32 = unsafe { ::core::mem::transmute(rtc_touch) };
rtc_touch as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let rtc_brown_out: u32 = unsafe { ::core::mem::transmute(rtc_brown_out) };
rtc_brown_out as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let rtc_main_timer: u32 = unsafe { ::core::mem::transmute(rtc_main_timer) };
rtc_main_timer as u64
});
__bindgen_bitfield_unit.set(9usize, 23u8, {
let reserved9: u32 = unsafe { ::core::mem::transmute(reserved9) };
reserved9 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_17 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_17__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_17__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_17__bindgen_ty_1 {
#[inline]
pub fn slp_wakeup(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_slp_wakeup(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn slp_reject(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_slp_reject(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn sdio_idle(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_sdio_idle(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_wdt(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_wdt(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_time_valid(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_time_valid(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_sar(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_sar(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_touch(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_touch(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_brown_out(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_brown_out(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_main_timer(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_main_timer(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved9(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 23u8) as u32) }
}
#[inline]
pub fn set_reserved9(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 23u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
slp_wakeup: u32,
slp_reject: u32,
sdio_idle: u32,
rtc_wdt: u32,
rtc_time_valid: u32,
rtc_sar: u32,
rtc_touch: u32,
rtc_brown_out: u32,
rtc_main_timer: u32,
reserved9: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let slp_wakeup: u32 = unsafe { ::core::mem::transmute(slp_wakeup) };
slp_wakeup as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let slp_reject: u32 = unsafe { ::core::mem::transmute(slp_reject) };
slp_reject as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let sdio_idle: u32 = unsafe { ::core::mem::transmute(sdio_idle) };
sdio_idle as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let rtc_wdt: u32 = unsafe { ::core::mem::transmute(rtc_wdt) };
rtc_wdt as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let rtc_time_valid: u32 = unsafe { ::core::mem::transmute(rtc_time_valid) };
rtc_time_valid as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let rtc_sar: u32 = unsafe { ::core::mem::transmute(rtc_sar) };
rtc_sar as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let rtc_touch: u32 = unsafe { ::core::mem::transmute(rtc_touch) };
rtc_touch as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let rtc_brown_out: u32 = unsafe { ::core::mem::transmute(rtc_brown_out) };
rtc_brown_out as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let rtc_main_timer: u32 = unsafe { ::core::mem::transmute(rtc_main_timer) };
rtc_main_timer as u64
});
__bindgen_bitfield_unit.set(9usize, 23u8, {
let reserved9: u32 = unsafe { ::core::mem::transmute(reserved9) };
reserved9 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_18 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_18__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_18__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_18__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 30u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 30u8, val as u64)
}
}
#[inline]
pub fn ctr_lv(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_ctr_lv(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn ctr_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_ctr_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
ctr_lv: u32,
ctr_en: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 30u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let ctr_lv: u32 = unsafe { ::core::mem::transmute(ctr_lv) };
ctr_lv as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let ctr_en: u32 = unsafe { ::core::mem::transmute(ctr_en) };
ctr_en as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_19 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_19__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_19__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_19__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 30u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 30u8, val as u64)
}
}
#[inline]
pub fn wakeup0_lv(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_wakeup0_lv(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn wakeup1_lv(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_wakeup1_lv(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
wakeup0_lv: u32,
wakeup1_lv: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 30u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let wakeup0_lv: u32 = unsafe { ::core::mem::transmute(wakeup0_lv) };
wakeup0_lv as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let wakeup1_lv: u32 = unsafe { ::core::mem::transmute(wakeup1_lv) };
wakeup1_lv as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_20 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_20__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_20__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_20__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 24u8, val as u64)
}
}
#[inline]
pub fn gpio_reject_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_gpio_reject_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn sdio_reject_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 1u8) as u32) }
}
#[inline]
pub fn set_sdio_reject_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 1u8, val as u64)
}
}
#[inline]
pub fn light_slp_reject_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 1u8) as u32) }
}
#[inline]
pub fn set_light_slp_reject_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 1u8, val as u64)
}
}
#[inline]
pub fn deep_slp_reject_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 1u8) as u32) }
}
#[inline]
pub fn set_deep_slp_reject_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 1u8, val as u64)
}
}
#[inline]
pub fn reject_cause(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 4u8) as u32) }
}
#[inline]
pub fn set_reject_cause(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 4u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
gpio_reject_en: u32,
sdio_reject_en: u32,
light_slp_reject_en: u32,
deep_slp_reject_en: u32,
reject_cause: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 24u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let gpio_reject_en: u32 = unsafe { ::core::mem::transmute(gpio_reject_en) };
gpio_reject_en as u64
});
__bindgen_bitfield_unit.set(25usize, 1u8, {
let sdio_reject_en: u32 = unsafe { ::core::mem::transmute(sdio_reject_en) };
sdio_reject_en as u64
});
__bindgen_bitfield_unit.set(26usize, 1u8, {
let light_slp_reject_en: u32 = unsafe { ::core::mem::transmute(light_slp_reject_en) };
light_slp_reject_en as u64
});
__bindgen_bitfield_unit.set(27usize, 1u8, {
let deep_slp_reject_en: u32 = unsafe { ::core::mem::transmute(deep_slp_reject_en) };
deep_slp_reject_en as u64
});
__bindgen_bitfield_unit.set(28usize, 4u8, {
let reject_cause: u32 = unsafe { ::core::mem::transmute(reject_cause) };
reject_cause as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_21 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_21__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_21__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_21__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 29u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 29u8, val as u64)
}
}
#[inline]
pub fn cpusel_conf(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 1u8) as u32) }
}
#[inline]
pub fn set_cpusel_conf(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 1u8, val as u64)
}
}
#[inline]
pub fn cpuperiod_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 2u8) as u32) }
}
#[inline]
pub fn set_cpuperiod_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 2u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
cpusel_conf: u32,
cpuperiod_sel: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 29u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(29usize, 1u8, {
let cpusel_conf: u32 = unsafe { ::core::mem::transmute(cpusel_conf) };
cpusel_conf as u64
});
__bindgen_bitfield_unit.set(30usize, 2u8, {
let cpuperiod_sel: u32 = unsafe { ::core::mem::transmute(cpuperiod_sel) };
cpuperiod_sel as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_22 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_22__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_22__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_22__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 22u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 22u8, val as u64)
}
}
#[inline]
pub fn sdio_act_dnum(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 10u8) as u32) }
}
#[inline]
pub fn set_sdio_act_dnum(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 10u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
sdio_act_dnum: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 22u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(22usize, 10u8, {
let sdio_act_dnum: u32 = unsafe { ::core::mem::transmute(sdio_act_dnum) };
sdio_act_dnum as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_23 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_23__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_23__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl rtc_cntl_dev_s__bindgen_ty_23__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 4u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 4u8, val as u64)
}
}
#[inline]
pub fn ck8m_div(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 2u8) as u32) }
}
#[inline]
pub fn set_ck8m_div(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 2u8, val as u64)
}
}
#[inline]
pub fn enb_ck8m(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_enb_ck8m(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn enb_ck8m_div(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_enb_ck8m_div(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn dig_xtal32k_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_dig_xtal32k_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn dig_clk8m_d256_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_dig_clk8m_d256_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn dig_clk8m_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_dig_clk8m_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn ck8m_dfreq_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_ck8m_dfreq_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn ck8m_div_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 3u8) as u32) }
}
#[inline]
pub fn set_ck8m_div_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 3u8, val as u64)
}
}
#[inline]
pub fn xtal_force_nogating(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 1u8) as u32) }
}
#[inline]
pub fn set_xtal_force_nogating(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 1u8, val as u64)
}
}
#[inline]
pub fn ck8m_force_nogating(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_ck8m_force_nogating(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn ck8m_dfreq(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 8u8) as u32) }
}
#[inline]
pub fn set_ck8m_dfreq(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 8u8, val as u64)
}
}
#[inline]
pub fn ck8m_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 1u8) as u32) }
}
#[inline]
pub fn set_ck8m_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 1u8, val as u64)
}
}
#[inline]
pub fn ck8m_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 1u8) as u32) }
}
#[inline]
pub fn set_ck8m_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 1u8, val as u64)
}
}
#[inline]
pub fn soc_clk_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 2u8) as u32) }
}
#[inline]
pub fn set_soc_clk_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 2u8, val as u64)
}
}
#[inline]
pub fn fast_clk_rtc_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 1u8) as u32) }
}
#[inline]
pub fn set_fast_clk_rtc_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 1u8, val as u64)
}
}
#[inline]
pub fn ana_clk_rtc_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 2u8) as u32) }
}
#[inline]
pub fn set_ana_clk_rtc_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 2u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
ck8m_div: u32,
enb_ck8m: u32,
enb_ck8m_div: u32,
dig_xtal32k_en: u32,
dig_clk8m_d256_en: u32,
dig_clk8m_en: u32,
ck8m_dfreq_force: u32,
ck8m_div_sel: u32,
xtal_force_nogating: u32,
ck8m_force_nogating: u32,
ck8m_dfreq: u32,
ck8m_force_pd: u32,
ck8m_force_pu: u32,
soc_clk_sel: u32,
fast_clk_rtc_sel: u32,
ana_clk_rtc_sel: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 4u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(4usize, 2u8, {
let ck8m_div: u32 = unsafe { ::core::mem::transmute(ck8m_div) };
ck8m_div as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let enb_ck8m: u32 = unsafe { ::core::mem::transmute(enb_ck8m) };
enb_ck8m as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let enb_ck8m_div: u32 = unsafe { ::core::mem::transmute(enb_ck8m_div) };
enb_ck8m_div as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let dig_xtal32k_en: u32 = unsafe { ::core::mem::transmute(dig_xtal32k_en) };
dig_xtal32k_en as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let dig_clk8m_d256_en: u32 = unsafe { ::core::mem::transmute(dig_clk8m_d256_en) };
dig_clk8m_d256_en as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let dig_clk8m_en: u32 = unsafe { ::core::mem::transmute(dig_clk8m_en) };
dig_clk8m_en as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let ck8m_dfreq_force: u32 = unsafe { ::core::mem::transmute(ck8m_dfreq_force) };
ck8m_dfreq_force as u64
});
__bindgen_bitfield_unit.set(12usize, 3u8, {
let ck8m_div_sel: u32 = unsafe { ::core::mem::transmute(ck8m_div_sel) };
ck8m_div_sel as u64
});
__bindgen_bitfield_unit.set(15usize, 1u8, {
let xtal_force_nogating: u32 = unsafe { ::core::mem::transmute(xtal_force_nogating) };
xtal_force_nogating as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let ck8m_force_nogating: u32 = unsafe { ::core::mem::transmute(ck8m_force_nogating) };
ck8m_force_nogating as u64
});
__bindgen_bitfield_unit.set(17usize, 8u8, {
let ck8m_dfreq: u32 = unsafe { ::core::mem::transmute(ck8m_dfreq) };
ck8m_dfreq as u64
});
__bindgen_bitfield_unit.set(25usize, 1u8, {
let ck8m_force_pd: u32 = unsafe { ::core::mem::transmute(ck8m_force_pd) };
ck8m_force_pd as u64
});
__bindgen_bitfield_unit.set(26usize, 1u8, {
let ck8m_force_pu: u32 = unsafe { ::core::mem::transmute(ck8m_force_pu) };
ck8m_force_pu as u64
});
__bindgen_bitfield_unit.set(27usize, 2u8, {
let soc_clk_sel: u32 = unsafe { ::core::mem::transmute(soc_clk_sel) };
soc_clk_sel as u64
});
__bindgen_bitfield_unit.set(29usize, 1u8, {
let fast_clk_rtc_sel: u32 = unsafe { ::core::mem::transmute(fast_clk_rtc_sel) };
fast_clk_rtc_sel as u64
});
__bindgen_bitfield_unit.set(30usize, 2u8, {
let ana_clk_rtc_sel: u32 = unsafe { ::core::mem::transmute(ana_clk_rtc_sel) };
ana_clk_rtc_sel as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_24 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_24__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_24__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_24__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 21u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 21u8, val as u64)
}
}
#[inline]
pub fn sdio_pd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(21usize, 1u8) as u32) }
}
#[inline]
pub fn set_sdio_pd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(21usize, 1u8, val as u64)
}
}
#[inline]
pub fn sdio_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 1u8) as u32) }
}
#[inline]
pub fn set_sdio_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 1u8, val as u64)
}
}
#[inline]
pub fn sdio_tieh(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(23usize, 1u8) as u32) }
}
#[inline]
pub fn set_sdio_tieh(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(23usize, 1u8, val as u64)
}
}
#[inline]
pub fn reg1p8_ready(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_reg1p8_ready(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn drefl_sdio(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 2u8) as u32) }
}
#[inline]
pub fn set_drefl_sdio(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 2u8, val as u64)
}
}
#[inline]
pub fn drefm_sdio(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 2u8) as u32) }
}
#[inline]
pub fn set_drefm_sdio(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 2u8, val as u64)
}
}
#[inline]
pub fn drefh_sdio(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 2u8) as u32) }
}
#[inline]
pub fn set_drefh_sdio(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 2u8, val as u64)
}
}
#[inline]
pub fn xpd_sdio(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_xpd_sdio(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
sdio_pd_en: u32,
sdio_force: u32,
sdio_tieh: u32,
reg1p8_ready: u32,
drefl_sdio: u32,
drefm_sdio: u32,
drefh_sdio: u32,
xpd_sdio: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 21u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(21usize, 1u8, {
let sdio_pd_en: u32 = unsafe { ::core::mem::transmute(sdio_pd_en) };
sdio_pd_en as u64
});
__bindgen_bitfield_unit.set(22usize, 1u8, {
let sdio_force: u32 = unsafe { ::core::mem::transmute(sdio_force) };
sdio_force as u64
});
__bindgen_bitfield_unit.set(23usize, 1u8, {
let sdio_tieh: u32 = unsafe { ::core::mem::transmute(sdio_tieh) };
sdio_tieh as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let reg1p8_ready: u32 = unsafe { ::core::mem::transmute(reg1p8_ready) };
reg1p8_ready as u64
});
__bindgen_bitfield_unit.set(25usize, 2u8, {
let drefl_sdio: u32 = unsafe { ::core::mem::transmute(drefl_sdio) };
drefl_sdio as u64
});
__bindgen_bitfield_unit.set(27usize, 2u8, {
let drefm_sdio: u32 = unsafe { ::core::mem::transmute(drefm_sdio) };
drefm_sdio as u64
});
__bindgen_bitfield_unit.set(29usize, 2u8, {
let drefh_sdio: u32 = unsafe { ::core::mem::transmute(drefh_sdio) };
drefh_sdio as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let xpd_sdio: u32 = unsafe { ::core::mem::transmute(xpd_sdio) };
xpd_sdio as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_25 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_25__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_25__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_25__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 24u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 24u8, val as u64)
}
}
#[inline]
pub fn dbg_atten(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 2u8) as u32) }
}
#[inline]
pub fn set_dbg_atten(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 2u8, val as u64)
}
}
#[inline]
pub fn enb_sck_xtal(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 1u8) as u32) }
}
#[inline]
pub fn set_enb_sck_xtal(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 1u8, val as u64)
}
}
#[inline]
pub fn inc_heartbeat_refresh(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 1u8) as u32) }
}
#[inline]
pub fn set_inc_heartbeat_refresh(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 1u8, val as u64)
}
}
#[inline]
pub fn dec_heartbeat_period(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 1u8) as u32) }
}
#[inline]
pub fn set_dec_heartbeat_period(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 1u8, val as u64)
}
}
#[inline]
pub fn inc_heartbeat_period(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 1u8) as u32) }
}
#[inline]
pub fn set_inc_heartbeat_period(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 1u8, val as u64)
}
}
#[inline]
pub fn dec_heartbeat_width(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_dec_heartbeat_width(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn rst_bias_i2c(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_rst_bias_i2c(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
dbg_atten: u32,
enb_sck_xtal: u32,
inc_heartbeat_refresh: u32,
dec_heartbeat_period: u32,
inc_heartbeat_period: u32,
dec_heartbeat_width: u32,
rst_bias_i2c: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 24u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(24usize, 2u8, {
let dbg_atten: u32 = unsafe { ::core::mem::transmute(dbg_atten) };
dbg_atten as u64
});
__bindgen_bitfield_unit.set(26usize, 1u8, {
let enb_sck_xtal: u32 = unsafe { ::core::mem::transmute(enb_sck_xtal) };
enb_sck_xtal as u64
});
__bindgen_bitfield_unit.set(27usize, 1u8, {
let inc_heartbeat_refresh: u32 =
unsafe { ::core::mem::transmute(inc_heartbeat_refresh) };
inc_heartbeat_refresh as u64
});
__bindgen_bitfield_unit.set(28usize, 1u8, {
let dec_heartbeat_period: u32 = unsafe { ::core::mem::transmute(dec_heartbeat_period) };
dec_heartbeat_period as u64
});
__bindgen_bitfield_unit.set(29usize, 1u8, {
let inc_heartbeat_period: u32 = unsafe { ::core::mem::transmute(inc_heartbeat_period) };
inc_heartbeat_period as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let dec_heartbeat_width: u32 = unsafe { ::core::mem::transmute(dec_heartbeat_width) };
dec_heartbeat_width as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let rst_bias_i2c: u32 = unsafe { ::core::mem::transmute(rst_bias_i2c) };
rst_bias_i2c as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_26 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_26__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_26__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl rtc_cntl_dev_s__bindgen_ty_26__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 7u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 7u8, val as u64)
}
}
#[inline]
pub fn sck_dcap_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_sck_dcap_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn dig_dbias_slp(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 3u8) as u32) }
}
#[inline]
pub fn set_dig_dbias_slp(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 3u8, val as u64)
}
}
#[inline]
pub fn dig_dbias_wak(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 3u8) as u32) }
}
#[inline]
pub fn set_dig_dbias_wak(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 3u8, val as u64)
}
}
#[inline]
pub fn sck_dcap(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 8u8) as u32) }
}
#[inline]
pub fn set_sck_dcap(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 8u8, val as u64)
}
}
#[inline]
pub fn rtc_dbias_slp(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 3u8) as u32) }
}
#[inline]
pub fn set_rtc_dbias_slp(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 3u8, val as u64)
}
}
#[inline]
pub fn rtc_dbias_wak(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 3u8) as u32) }
}
#[inline]
pub fn set_rtc_dbias_wak(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 3u8, val as u64)
}
}
#[inline]
pub fn rtc_dboost_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_dboost_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_dboost_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_dboost_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
sck_dcap_force: u32,
dig_dbias_slp: u32,
dig_dbias_wak: u32,
sck_dcap: u32,
rtc_dbias_slp: u32,
rtc_dbias_wak: u32,
rtc_dboost_force_pd: u32,
rtc_dboost_force_pu: u32,
rtc_force_pd: u32,
rtc_force_pu: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 7u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let sck_dcap_force: u32 = unsafe { ::core::mem::transmute(sck_dcap_force) };
sck_dcap_force as u64
});
__bindgen_bitfield_unit.set(8usize, 3u8, {
let dig_dbias_slp: u32 = unsafe { ::core::mem::transmute(dig_dbias_slp) };
dig_dbias_slp as u64
});
__bindgen_bitfield_unit.set(11usize, 3u8, {
let dig_dbias_wak: u32 = unsafe { ::core::mem::transmute(dig_dbias_wak) };
dig_dbias_wak as u64
});
__bindgen_bitfield_unit.set(14usize, 8u8, {
let sck_dcap: u32 = unsafe { ::core::mem::transmute(sck_dcap) };
sck_dcap as u64
});
__bindgen_bitfield_unit.set(22usize, 3u8, {
let rtc_dbias_slp: u32 = unsafe { ::core::mem::transmute(rtc_dbias_slp) };
rtc_dbias_slp as u64
});
__bindgen_bitfield_unit.set(25usize, 3u8, {
let rtc_dbias_wak: u32 = unsafe { ::core::mem::transmute(rtc_dbias_wak) };
rtc_dbias_wak as u64
});
__bindgen_bitfield_unit.set(28usize, 1u8, {
let rtc_dboost_force_pd: u32 = unsafe { ::core::mem::transmute(rtc_dboost_force_pd) };
rtc_dboost_force_pd as u64
});
__bindgen_bitfield_unit.set(29usize, 1u8, {
let rtc_dboost_force_pu: u32 = unsafe { ::core::mem::transmute(rtc_dboost_force_pu) };
rtc_dboost_force_pu as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let rtc_force_pd: u32 = unsafe { ::core::mem::transmute(rtc_force_pd) };
rtc_force_pd as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let rtc_force_pu: u32 = unsafe { ::core::mem::transmute(rtc_force_pu) };
rtc_force_pu as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_27 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_27__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_27__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl rtc_cntl_dev_s__bindgen_ty_27__bindgen_ty_1 {
#[inline]
pub fn fastmem_force_noiso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_fastmem_force_noiso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn fastmem_force_iso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_fastmem_force_iso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn slowmem_force_noiso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_slowmem_force_noiso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn slowmem_force_iso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_slowmem_force_iso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_force_iso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_force_iso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn force_noiso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_force_noiso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn fastmem_folw_cpu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_fastmem_folw_cpu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn fastmem_force_lpd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_fastmem_force_lpd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn fastmem_force_lpu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_fastmem_force_lpu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn slowmem_folw_cpu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_slowmem_folw_cpu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn slowmem_force_lpd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_slowmem_force_lpd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn slowmem_force_lpu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_slowmem_force_lpu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn fastmem_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_fastmem_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn fastmem_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 1u8) as u32) }
}
#[inline]
pub fn set_fastmem_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 1u8, val as u64)
}
}
#[inline]
pub fn fastmem_pd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 1u8) as u32) }
}
#[inline]
pub fn set_fastmem_pd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 1u8, val as u64)
}
}
#[inline]
pub fn slowmem_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 1u8) as u32) }
}
#[inline]
pub fn set_slowmem_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 1u8, val as u64)
}
}
#[inline]
pub fn slowmem_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_slowmem_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn slowmem_pd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 1u8) as u32) }
}
#[inline]
pub fn set_slowmem_pd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 1u8, val as u64)
}
}
#[inline]
pub fn pwc_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 1u8) as u32) }
}
#[inline]
pub fn set_pwc_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 1u8, val as u64)
}
}
#[inline]
pub fn pwc_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 1u8) as u32) }
}
#[inline]
pub fn set_pwc_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 1u8, val as u64)
}
}
#[inline]
pub fn pd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 1u8) as u32) }
}
#[inline]
pub fn set_pd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved21(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(21usize, 11u8) as u32) }
}
#[inline]
pub fn set_reserved21(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(21usize, 11u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
fastmem_force_noiso: u32,
fastmem_force_iso: u32,
slowmem_force_noiso: u32,
slowmem_force_iso: u32,
rtc_force_iso: u32,
force_noiso: u32,
fastmem_folw_cpu: u32,
fastmem_force_lpd: u32,
fastmem_force_lpu: u32,
slowmem_folw_cpu: u32,
slowmem_force_lpd: u32,
slowmem_force_lpu: u32,
fastmem_force_pd: u32,
fastmem_force_pu: u32,
fastmem_pd_en: u32,
slowmem_force_pd: u32,
slowmem_force_pu: u32,
slowmem_pd_en: u32,
pwc_force_pd: u32,
pwc_force_pu: u32,
pd_en: u32,
reserved21: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let fastmem_force_noiso: u32 = unsafe { ::core::mem::transmute(fastmem_force_noiso) };
fastmem_force_noiso as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let fastmem_force_iso: u32 = unsafe { ::core::mem::transmute(fastmem_force_iso) };
fastmem_force_iso as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let slowmem_force_noiso: u32 = unsafe { ::core::mem::transmute(slowmem_force_noiso) };
slowmem_force_noiso as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let slowmem_force_iso: u32 = unsafe { ::core::mem::transmute(slowmem_force_iso) };
slowmem_force_iso as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let rtc_force_iso: u32 = unsafe { ::core::mem::transmute(rtc_force_iso) };
rtc_force_iso as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let force_noiso: u32 = unsafe { ::core::mem::transmute(force_noiso) };
force_noiso as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let fastmem_folw_cpu: u32 = unsafe { ::core::mem::transmute(fastmem_folw_cpu) };
fastmem_folw_cpu as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let fastmem_force_lpd: u32 = unsafe { ::core::mem::transmute(fastmem_force_lpd) };
fastmem_force_lpd as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let fastmem_force_lpu: u32 = unsafe { ::core::mem::transmute(fastmem_force_lpu) };
fastmem_force_lpu as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let slowmem_folw_cpu: u32 = unsafe { ::core::mem::transmute(slowmem_folw_cpu) };
slowmem_folw_cpu as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let slowmem_force_lpd: u32 = unsafe { ::core::mem::transmute(slowmem_force_lpd) };
slowmem_force_lpd as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let slowmem_force_lpu: u32 = unsafe { ::core::mem::transmute(slowmem_force_lpu) };
slowmem_force_lpu as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let fastmem_force_pd: u32 = unsafe { ::core::mem::transmute(fastmem_force_pd) };
fastmem_force_pd as u64
});
__bindgen_bitfield_unit.set(13usize, 1u8, {
let fastmem_force_pu: u32 = unsafe { ::core::mem::transmute(fastmem_force_pu) };
fastmem_force_pu as u64
});
__bindgen_bitfield_unit.set(14usize, 1u8, {
let fastmem_pd_en: u32 = unsafe { ::core::mem::transmute(fastmem_pd_en) };
fastmem_pd_en as u64
});
__bindgen_bitfield_unit.set(15usize, 1u8, {
let slowmem_force_pd: u32 = unsafe { ::core::mem::transmute(slowmem_force_pd) };
slowmem_force_pd as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let slowmem_force_pu: u32 = unsafe { ::core::mem::transmute(slowmem_force_pu) };
slowmem_force_pu as u64
});
__bindgen_bitfield_unit.set(17usize, 1u8, {
let slowmem_pd_en: u32 = unsafe { ::core::mem::transmute(slowmem_pd_en) };
slowmem_pd_en as u64
});
__bindgen_bitfield_unit.set(18usize, 1u8, {
let pwc_force_pd: u32 = unsafe { ::core::mem::transmute(pwc_force_pd) };
pwc_force_pd as u64
});
__bindgen_bitfield_unit.set(19usize, 1u8, {
let pwc_force_pu: u32 = unsafe { ::core::mem::transmute(pwc_force_pu) };
pwc_force_pu as u64
});
__bindgen_bitfield_unit.set(20usize, 1u8, {
let pd_en: u32 = unsafe { ::core::mem::transmute(pd_en) };
pd_en as u64
});
__bindgen_bitfield_unit.set(21usize, 11u8, {
let reserved21: u32 = unsafe { ::core::mem::transmute(reserved21) };
reserved21 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_28 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_28__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_28__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl rtc_cntl_dev_s__bindgen_ty_28__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 3u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 3u8, val as u64)
}
}
#[inline]
pub fn lslp_mem_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_lslp_mem_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn lslp_mem_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_lslp_mem_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn rom0_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_rom0_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn rom0_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_rom0_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram0_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram0_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram0_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram0_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram1_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram1_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram1_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram1_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram2_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram2_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram2_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram2_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram3_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram3_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram3_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram3_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram4_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram4_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram4_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram4_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn wifi_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 1u8) as u32) }
}
#[inline]
pub fn set_wifi_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 1u8, val as u64)
}
}
#[inline]
pub fn wifi_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 1u8) as u32) }
}
#[inline]
pub fn set_wifi_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 1u8, val as u64)
}
}
#[inline]
pub fn dg_wrap_force_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 1u8) as u32) }
}
#[inline]
pub fn set_dg_wrap_force_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 1u8, val as u64)
}
}
#[inline]
pub fn dg_wrap_force_pu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 1u8) as u32) }
}
#[inline]
pub fn set_dg_wrap_force_pu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved21(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(21usize, 3u8) as u32) }
}
#[inline]
pub fn set_reserved21(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(21usize, 3u8, val as u64)
}
}
#[inline]
pub fn rom0_pd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_rom0_pd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram0_pd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram0_pd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram1_pd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram1_pd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram2_pd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram2_pd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram3_pd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram3_pd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram4_pd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram4_pd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 1u8, val as u64)
}
}
#[inline]
pub fn wifi_pd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_wifi_pd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn dg_wrap_pd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_dg_wrap_pd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
lslp_mem_force_pd: u32,
lslp_mem_force_pu: u32,
rom0_force_pd: u32,
rom0_force_pu: u32,
inter_ram0_force_pd: u32,
inter_ram0_force_pu: u32,
inter_ram1_force_pd: u32,
inter_ram1_force_pu: u32,
inter_ram2_force_pd: u32,
inter_ram2_force_pu: u32,
inter_ram3_force_pd: u32,
inter_ram3_force_pu: u32,
inter_ram4_force_pd: u32,
inter_ram4_force_pu: u32,
wifi_force_pd: u32,
wifi_force_pu: u32,
dg_wrap_force_pd: u32,
dg_wrap_force_pu: u32,
reserved21: u32,
rom0_pd_en: u32,
inter_ram0_pd_en: u32,
inter_ram1_pd_en: u32,
inter_ram2_pd_en: u32,
inter_ram3_pd_en: u32,
inter_ram4_pd_en: u32,
wifi_pd_en: u32,
dg_wrap_pd_en: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 3u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let lslp_mem_force_pd: u32 = unsafe { ::core::mem::transmute(lslp_mem_force_pd) };
lslp_mem_force_pd as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let lslp_mem_force_pu: u32 = unsafe { ::core::mem::transmute(lslp_mem_force_pu) };
lslp_mem_force_pu as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let rom0_force_pd: u32 = unsafe { ::core::mem::transmute(rom0_force_pd) };
rom0_force_pd as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let rom0_force_pu: u32 = unsafe { ::core::mem::transmute(rom0_force_pu) };
rom0_force_pu as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let inter_ram0_force_pd: u32 = unsafe { ::core::mem::transmute(inter_ram0_force_pd) };
inter_ram0_force_pd as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let inter_ram0_force_pu: u32 = unsafe { ::core::mem::transmute(inter_ram0_force_pu) };
inter_ram0_force_pu as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let inter_ram1_force_pd: u32 = unsafe { ::core::mem::transmute(inter_ram1_force_pd) };
inter_ram1_force_pd as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let inter_ram1_force_pu: u32 = unsafe { ::core::mem::transmute(inter_ram1_force_pu) };
inter_ram1_force_pu as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let inter_ram2_force_pd: u32 = unsafe { ::core::mem::transmute(inter_ram2_force_pd) };
inter_ram2_force_pd as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let inter_ram2_force_pu: u32 = unsafe { ::core::mem::transmute(inter_ram2_force_pu) };
inter_ram2_force_pu as u64
});
__bindgen_bitfield_unit.set(13usize, 1u8, {
let inter_ram3_force_pd: u32 = unsafe { ::core::mem::transmute(inter_ram3_force_pd) };
inter_ram3_force_pd as u64
});
__bindgen_bitfield_unit.set(14usize, 1u8, {
let inter_ram3_force_pu: u32 = unsafe { ::core::mem::transmute(inter_ram3_force_pu) };
inter_ram3_force_pu as u64
});
__bindgen_bitfield_unit.set(15usize, 1u8, {
let inter_ram4_force_pd: u32 = unsafe { ::core::mem::transmute(inter_ram4_force_pd) };
inter_ram4_force_pd as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let inter_ram4_force_pu: u32 = unsafe { ::core::mem::transmute(inter_ram4_force_pu) };
inter_ram4_force_pu as u64
});
__bindgen_bitfield_unit.set(17usize, 1u8, {
let wifi_force_pd: u32 = unsafe { ::core::mem::transmute(wifi_force_pd) };
wifi_force_pd as u64
});
__bindgen_bitfield_unit.set(18usize, 1u8, {
let wifi_force_pu: u32 = unsafe { ::core::mem::transmute(wifi_force_pu) };
wifi_force_pu as u64
});
__bindgen_bitfield_unit.set(19usize, 1u8, {
let dg_wrap_force_pd: u32 = unsafe { ::core::mem::transmute(dg_wrap_force_pd) };
dg_wrap_force_pd as u64
});
__bindgen_bitfield_unit.set(20usize, 1u8, {
let dg_wrap_force_pu: u32 = unsafe { ::core::mem::transmute(dg_wrap_force_pu) };
dg_wrap_force_pu as u64
});
__bindgen_bitfield_unit.set(21usize, 3u8, {
let reserved21: u32 = unsafe { ::core::mem::transmute(reserved21) };
reserved21 as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let rom0_pd_en: u32 = unsafe { ::core::mem::transmute(rom0_pd_en) };
rom0_pd_en as u64
});
__bindgen_bitfield_unit.set(25usize, 1u8, {
let inter_ram0_pd_en: u32 = unsafe { ::core::mem::transmute(inter_ram0_pd_en) };
inter_ram0_pd_en as u64
});
__bindgen_bitfield_unit.set(26usize, 1u8, {
let inter_ram1_pd_en: u32 = unsafe { ::core::mem::transmute(inter_ram1_pd_en) };
inter_ram1_pd_en as u64
});
__bindgen_bitfield_unit.set(27usize, 1u8, {
let inter_ram2_pd_en: u32 = unsafe { ::core::mem::transmute(inter_ram2_pd_en) };
inter_ram2_pd_en as u64
});
__bindgen_bitfield_unit.set(28usize, 1u8, {
let inter_ram3_pd_en: u32 = unsafe { ::core::mem::transmute(inter_ram3_pd_en) };
inter_ram3_pd_en as u64
});
__bindgen_bitfield_unit.set(29usize, 1u8, {
let inter_ram4_pd_en: u32 = unsafe { ::core::mem::transmute(inter_ram4_pd_en) };
inter_ram4_pd_en as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let wifi_pd_en: u32 = unsafe { ::core::mem::transmute(wifi_pd_en) };
wifi_pd_en as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let dg_wrap_pd_en: u32 = unsafe { ::core::mem::transmute(dg_wrap_pd_en) };
dg_wrap_pd_en as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_29 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_29__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_29__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl rtc_cntl_dev_s__bindgen_ty_29__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 7u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 7u8, val as u64)
}
}
#[inline]
pub fn dig_iso_force_off(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_dig_iso_force_off(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn dig_iso_force_on(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_dig_iso_force_on(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn dg_pad_autohold(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_dg_pad_autohold(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn clr_dg_pad_autohold(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_clr_dg_pad_autohold(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn dg_pad_autohold_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_dg_pad_autohold_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn dg_pad_force_noiso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_dg_pad_force_noiso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn dg_pad_force_iso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 1u8) as u32) }
}
#[inline]
pub fn set_dg_pad_force_iso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 1u8, val as u64)
}
}
#[inline]
pub fn dg_pad_force_unhold(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 1u8) as u32) }
}
#[inline]
pub fn set_dg_pad_force_unhold(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 1u8, val as u64)
}
}
#[inline]
pub fn dg_pad_force_hold(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 1u8) as u32) }
}
#[inline]
pub fn set_dg_pad_force_hold(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 1u8, val as u64)
}
}
#[inline]
pub fn rom0_force_iso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_rom0_force_iso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn rom0_force_noiso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 1u8) as u32) }
}
#[inline]
pub fn set_rom0_force_noiso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram0_force_iso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram0_force_iso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram0_force_noiso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram0_force_noiso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram1_force_iso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram1_force_iso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram1_force_noiso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(21usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram1_force_noiso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(21usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram2_force_iso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram2_force_iso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram2_force_noiso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(23usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram2_force_noiso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(23usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram3_force_iso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram3_force_iso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram3_force_noiso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram3_force_noiso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram4_force_iso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram4_force_iso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 1u8, val as u64)
}
}
#[inline]
pub fn inter_ram4_force_noiso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 1u8) as u32) }
}
#[inline]
pub fn set_inter_ram4_force_noiso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 1u8, val as u64)
}
}
#[inline]
pub fn wifi_force_iso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 1u8) as u32) }
}
#[inline]
pub fn set_wifi_force_iso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 1u8, val as u64)
}
}
#[inline]
pub fn wifi_force_noiso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 1u8) as u32) }
}
#[inline]
pub fn set_wifi_force_noiso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 1u8, val as u64)
}
}
#[inline]
pub fn dg_wrap_force_iso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_dg_wrap_force_iso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn dg_wrap_force_noiso(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_dg_wrap_force_noiso(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
dig_iso_force_off: u32,
dig_iso_force_on: u32,
dg_pad_autohold: u32,
clr_dg_pad_autohold: u32,
dg_pad_autohold_en: u32,
dg_pad_force_noiso: u32,
dg_pad_force_iso: u32,
dg_pad_force_unhold: u32,
dg_pad_force_hold: u32,
rom0_force_iso: u32,
rom0_force_noiso: u32,
inter_ram0_force_iso: u32,
inter_ram0_force_noiso: u32,
inter_ram1_force_iso: u32,
inter_ram1_force_noiso: u32,
inter_ram2_force_iso: u32,
inter_ram2_force_noiso: u32,
inter_ram3_force_iso: u32,
inter_ram3_force_noiso: u32,
inter_ram4_force_iso: u32,
inter_ram4_force_noiso: u32,
wifi_force_iso: u32,
wifi_force_noiso: u32,
dg_wrap_force_iso: u32,
dg_wrap_force_noiso: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 7u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let dig_iso_force_off: u32 = unsafe { ::core::mem::transmute(dig_iso_force_off) };
dig_iso_force_off as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let dig_iso_force_on: u32 = unsafe { ::core::mem::transmute(dig_iso_force_on) };
dig_iso_force_on as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let dg_pad_autohold: u32 = unsafe { ::core::mem::transmute(dg_pad_autohold) };
dg_pad_autohold as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let clr_dg_pad_autohold: u32 = unsafe { ::core::mem::transmute(clr_dg_pad_autohold) };
clr_dg_pad_autohold as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let dg_pad_autohold_en: u32 = unsafe { ::core::mem::transmute(dg_pad_autohold_en) };
dg_pad_autohold_en as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let dg_pad_force_noiso: u32 = unsafe { ::core::mem::transmute(dg_pad_force_noiso) };
dg_pad_force_noiso as u64
});
__bindgen_bitfield_unit.set(13usize, 1u8, {
let dg_pad_force_iso: u32 = unsafe { ::core::mem::transmute(dg_pad_force_iso) };
dg_pad_force_iso as u64
});
__bindgen_bitfield_unit.set(14usize, 1u8, {
let dg_pad_force_unhold: u32 = unsafe { ::core::mem::transmute(dg_pad_force_unhold) };
dg_pad_force_unhold as u64
});
__bindgen_bitfield_unit.set(15usize, 1u8, {
let dg_pad_force_hold: u32 = unsafe { ::core::mem::transmute(dg_pad_force_hold) };
dg_pad_force_hold as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let rom0_force_iso: u32 = unsafe { ::core::mem::transmute(rom0_force_iso) };
rom0_force_iso as u64
});
__bindgen_bitfield_unit.set(17usize, 1u8, {
let rom0_force_noiso: u32 = unsafe { ::core::mem::transmute(rom0_force_noiso) };
rom0_force_noiso as u64
});
__bindgen_bitfield_unit.set(18usize, 1u8, {
let inter_ram0_force_iso: u32 = unsafe { ::core::mem::transmute(inter_ram0_force_iso) };
inter_ram0_force_iso as u64
});
__bindgen_bitfield_unit.set(19usize, 1u8, {
let inter_ram0_force_noiso: u32 =
unsafe { ::core::mem::transmute(inter_ram0_force_noiso) };
inter_ram0_force_noiso as u64
});
__bindgen_bitfield_unit.set(20usize, 1u8, {
let inter_ram1_force_iso: u32 = unsafe { ::core::mem::transmute(inter_ram1_force_iso) };
inter_ram1_force_iso as u64
});
__bindgen_bitfield_unit.set(21usize, 1u8, {
let inter_ram1_force_noiso: u32 =
unsafe { ::core::mem::transmute(inter_ram1_force_noiso) };
inter_ram1_force_noiso as u64
});
__bindgen_bitfield_unit.set(22usize, 1u8, {
let inter_ram2_force_iso: u32 = unsafe { ::core::mem::transmute(inter_ram2_force_iso) };
inter_ram2_force_iso as u64
});
__bindgen_bitfield_unit.set(23usize, 1u8, {
let inter_ram2_force_noiso: u32 =
unsafe { ::core::mem::transmute(inter_ram2_force_noiso) };
inter_ram2_force_noiso as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let inter_ram3_force_iso: u32 = unsafe { ::core::mem::transmute(inter_ram3_force_iso) };
inter_ram3_force_iso as u64
});
__bindgen_bitfield_unit.set(25usize, 1u8, {
let inter_ram3_force_noiso: u32 =
unsafe { ::core::mem::transmute(inter_ram3_force_noiso) };
inter_ram3_force_noiso as u64
});
__bindgen_bitfield_unit.set(26usize, 1u8, {
let inter_ram4_force_iso: u32 = unsafe { ::core::mem::transmute(inter_ram4_force_iso) };
inter_ram4_force_iso as u64
});
__bindgen_bitfield_unit.set(27usize, 1u8, {
let inter_ram4_force_noiso: u32 =
unsafe { ::core::mem::transmute(inter_ram4_force_noiso) };
inter_ram4_force_noiso as u64
});
__bindgen_bitfield_unit.set(28usize, 1u8, {
let wifi_force_iso: u32 = unsafe { ::core::mem::transmute(wifi_force_iso) };
wifi_force_iso as u64
});
__bindgen_bitfield_unit.set(29usize, 1u8, {
let wifi_force_noiso: u32 = unsafe { ::core::mem::transmute(wifi_force_noiso) };
wifi_force_noiso as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let dg_wrap_force_iso: u32 = unsafe { ::core::mem::transmute(dg_wrap_force_iso) };
dg_wrap_force_iso as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let dg_wrap_force_noiso: u32 = unsafe { ::core::mem::transmute(dg_wrap_force_noiso) };
dg_wrap_force_noiso as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_30 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_30__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_30__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl rtc_cntl_dev_s__bindgen_ty_30__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 7u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 7u8, val as u64)
}
}
#[inline]
pub fn pause_in_slp(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_pause_in_slp(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn appcpu_reset_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_appcpu_reset_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn procpu_reset_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_procpu_reset_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn flashboot_mod_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_flashboot_mod_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn sys_reset_length(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 3u8) as u32) }
}
#[inline]
pub fn set_sys_reset_length(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 3u8, val as u64)
}
}
#[inline]
pub fn cpu_reset_length(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 3u8) as u32) }
}
#[inline]
pub fn set_cpu_reset_length(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 3u8, val as u64)
}
}
#[inline]
pub fn level_int_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 1u8) as u32) }
}
#[inline]
pub fn set_level_int_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 1u8, val as u64)
}
}
#[inline]
pub fn edge_int_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 1u8) as u32) }
}
#[inline]
pub fn set_edge_int_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 1u8, val as u64)
}
}
#[inline]
pub fn stg3(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 3u8) as u32) }
}
#[inline]
pub fn set_stg3(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 3u8, val as u64)
}
}
#[inline]
pub fn stg2(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 3u8) as u32) }
}
#[inline]
pub fn set_stg2(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 3u8, val as u64)
}
}
#[inline]
pub fn stg1(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 3u8) as u32) }
}
#[inline]
pub fn set_stg1(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 3u8, val as u64)
}
}
#[inline]
pub fn stg0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 3u8) as u32) }
}
#[inline]
pub fn set_stg0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 3u8, val as u64)
}
}
#[inline]
pub fn en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
pause_in_slp: u32,
appcpu_reset_en: u32,
procpu_reset_en: u32,
flashboot_mod_en: u32,
sys_reset_length: u32,
cpu_reset_length: u32,
level_int_en: u32,
edge_int_en: u32,
stg3: u32,
stg2: u32,
stg1: u32,
stg0: u32,
en: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 7u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let pause_in_slp: u32 = unsafe { ::core::mem::transmute(pause_in_slp) };
pause_in_slp as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let appcpu_reset_en: u32 = unsafe { ::core::mem::transmute(appcpu_reset_en) };
appcpu_reset_en as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let procpu_reset_en: u32 = unsafe { ::core::mem::transmute(procpu_reset_en) };
procpu_reset_en as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let flashboot_mod_en: u32 = unsafe { ::core::mem::transmute(flashboot_mod_en) };
flashboot_mod_en as u64
});
__bindgen_bitfield_unit.set(11usize, 3u8, {
let sys_reset_length: u32 = unsafe { ::core::mem::transmute(sys_reset_length) };
sys_reset_length as u64
});
__bindgen_bitfield_unit.set(14usize, 3u8, {
let cpu_reset_length: u32 = unsafe { ::core::mem::transmute(cpu_reset_length) };
cpu_reset_length as u64
});
__bindgen_bitfield_unit.set(17usize, 1u8, {
let level_int_en: u32 = unsafe { ::core::mem::transmute(level_int_en) };
level_int_en as u64
});
__bindgen_bitfield_unit.set(18usize, 1u8, {
let edge_int_en: u32 = unsafe { ::core::mem::transmute(edge_int_en) };
edge_int_en as u64
});
__bindgen_bitfield_unit.set(19usize, 3u8, {
let stg3: u32 = unsafe { ::core::mem::transmute(stg3) };
stg3 as u64
});
__bindgen_bitfield_unit.set(22usize, 3u8, {
let stg2: u32 = unsafe { ::core::mem::transmute(stg2) };
stg2 as u64
});
__bindgen_bitfield_unit.set(25usize, 3u8, {
let stg1: u32 = unsafe { ::core::mem::transmute(stg1) };
stg1 as u64
});
__bindgen_bitfield_unit.set(28usize, 3u8, {
let stg0: u32 = unsafe { ::core::mem::transmute(stg0) };
stg0 as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let en: u32 = unsafe { ::core::mem::transmute(en) };
en as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_31 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_31__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_31__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_31__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 31u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 31u8, val as u64)
}
}
#[inline]
pub fn feed(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_feed(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(reserved0: u32, feed: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 31u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let feed: u32 = unsafe { ::core::mem::transmute(feed) };
feed as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_32 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_32__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_32__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_32__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 29u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 29u8, val as u64)
}
}
#[inline]
pub fn ent_rtc(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 1u8) as u32) }
}
#[inline]
pub fn set_ent_rtc(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 1u8, val as u64)
}
}
#[inline]
pub fn dtest_rtc(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 2u8) as u32) }
}
#[inline]
pub fn set_dtest_rtc(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 2u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
ent_rtc: u32,
dtest_rtc: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 29u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(29usize, 1u8, {
let ent_rtc: u32 = unsafe { ::core::mem::transmute(ent_rtc) };
ent_rtc as u64
});
__bindgen_bitfield_unit.set(30usize, 2u8, {
let dtest_rtc: u32 = unsafe { ::core::mem::transmute(dtest_rtc) };
dtest_rtc as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_33 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_33__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_33__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_33__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 20u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 20u8, val as u64)
}
}
#[inline]
pub fn appcpu_c1(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 6u8) as u32) }
}
#[inline]
pub fn set_appcpu_c1(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 6u8, val as u64)
}
}
#[inline]
pub fn procpu_c1(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 6u8) as u32) }
}
#[inline]
pub fn set_procpu_c1(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 6u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
appcpu_c1: u32,
procpu_c1: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 20u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(20usize, 6u8, {
let appcpu_c1: u32 = unsafe { ::core::mem::transmute(appcpu_c1) };
appcpu_c1 as u64
});
__bindgen_bitfield_unit.set(26usize, 6u8, {
let procpu_c1: u32 = unsafe { ::core::mem::transmute(procpu_c1) };
procpu_c1 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_34 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_34__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_34__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl rtc_cntl_dev_s__bindgen_ty_34__bindgen_ty_1 {
#[inline]
pub fn adc1_hold_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_adc1_hold_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn adc2_hold_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_adc2_hold_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn pdac1_hold_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_pdac1_hold_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn pdac2_hold_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_pdac2_hold_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense1_hold_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense1_hold_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense2_hold_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense2_hold_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense3_hold_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense3_hold_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn sense4_hold_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_sense4_hold_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn touch_pad0_hold_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_touch_pad0_hold_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn touch_pad1_hold_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_touch_pad1_hold_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn touch_pad2_hold_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_touch_pad2_hold_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn touch_pad3_hold_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_touch_pad3_hold_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn touch_pad4_hold_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_touch_pad4_hold_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn touch_pad5_hold_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 1u8) as u32) }
}
#[inline]
pub fn set_touch_pad5_hold_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 1u8, val as u64)
}
}
#[inline]
pub fn touch_pad6_hold_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 1u8) as u32) }
}
#[inline]
pub fn set_touch_pad6_hold_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 1u8, val as u64)
}
}
#[inline]
pub fn touch_pad7_hold_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 1u8) as u32) }
}
#[inline]
pub fn set_touch_pad7_hold_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 1u8, val as u64)
}
}
#[inline]
pub fn x32p_hold_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_x32p_hold_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn x32n_hold_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 1u8) as u32) }
}
#[inline]
pub fn set_x32n_hold_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved18(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 14u8) as u32) }
}
#[inline]
pub fn set_reserved18(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 14u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
adc1_hold_force: u32,
adc2_hold_force: u32,
pdac1_hold_force: u32,
pdac2_hold_force: u32,
sense1_hold_force: u32,
sense2_hold_force: u32,
sense3_hold_force: u32,
sense4_hold_force: u32,
touch_pad0_hold_force: u32,
touch_pad1_hold_force: u32,
touch_pad2_hold_force: u32,
touch_pad3_hold_force: u32,
touch_pad4_hold_force: u32,
touch_pad5_hold_force: u32,
touch_pad6_hold_force: u32,
touch_pad7_hold_force: u32,
x32p_hold_force: u32,
x32n_hold_force: u32,
reserved18: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let adc1_hold_force: u32 = unsafe { ::core::mem::transmute(adc1_hold_force) };
adc1_hold_force as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let adc2_hold_force: u32 = unsafe { ::core::mem::transmute(adc2_hold_force) };
adc2_hold_force as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let pdac1_hold_force: u32 = unsafe { ::core::mem::transmute(pdac1_hold_force) };
pdac1_hold_force as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let pdac2_hold_force: u32 = unsafe { ::core::mem::transmute(pdac2_hold_force) };
pdac2_hold_force as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let sense1_hold_force: u32 = unsafe { ::core::mem::transmute(sense1_hold_force) };
sense1_hold_force as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let sense2_hold_force: u32 = unsafe { ::core::mem::transmute(sense2_hold_force) };
sense2_hold_force as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let sense3_hold_force: u32 = unsafe { ::core::mem::transmute(sense3_hold_force) };
sense3_hold_force as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let sense4_hold_force: u32 = unsafe { ::core::mem::transmute(sense4_hold_force) };
sense4_hold_force as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let touch_pad0_hold_force: u32 =
unsafe { ::core::mem::transmute(touch_pad0_hold_force) };
touch_pad0_hold_force as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let touch_pad1_hold_force: u32 =
unsafe { ::core::mem::transmute(touch_pad1_hold_force) };
touch_pad1_hold_force as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let touch_pad2_hold_force: u32 =
unsafe { ::core::mem::transmute(touch_pad2_hold_force) };
touch_pad2_hold_force as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let touch_pad3_hold_force: u32 =
unsafe { ::core::mem::transmute(touch_pad3_hold_force) };
touch_pad3_hold_force as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let touch_pad4_hold_force: u32 =
unsafe { ::core::mem::transmute(touch_pad4_hold_force) };
touch_pad4_hold_force as u64
});
__bindgen_bitfield_unit.set(13usize, 1u8, {
let touch_pad5_hold_force: u32 =
unsafe { ::core::mem::transmute(touch_pad5_hold_force) };
touch_pad5_hold_force as u64
});
__bindgen_bitfield_unit.set(14usize, 1u8, {
let touch_pad6_hold_force: u32 =
unsafe { ::core::mem::transmute(touch_pad6_hold_force) };
touch_pad6_hold_force as u64
});
__bindgen_bitfield_unit.set(15usize, 1u8, {
let touch_pad7_hold_force: u32 =
unsafe { ::core::mem::transmute(touch_pad7_hold_force) };
touch_pad7_hold_force as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let x32p_hold_force: u32 = unsafe { ::core::mem::transmute(x32p_hold_force) };
x32p_hold_force as u64
});
__bindgen_bitfield_unit.set(17usize, 1u8, {
let x32n_hold_force: u32 = unsafe { ::core::mem::transmute(x32n_hold_force) };
x32n_hold_force as u64
});
__bindgen_bitfield_unit.set(18usize, 14u8, {
let reserved18: u32 = unsafe { ::core::mem::transmute(reserved18) };
reserved18 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_35 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_35__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_35__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_35__bindgen_ty_1 {
#[inline]
pub fn ext_wakeup1_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 18u8) as u32) }
}
#[inline]
pub fn set_ext_wakeup1_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 18u8, val as u64)
}
}
#[inline]
pub fn ext_wakeup1_status_clr(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 1u8) as u32) }
}
#[inline]
pub fn set_ext_wakeup1_status_clr(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved19(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 13u8) as u32) }
}
#[inline]
pub fn set_reserved19(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 13u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
ext_wakeup1_sel: u32,
ext_wakeup1_status_clr: u32,
reserved19: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 18u8, {
let ext_wakeup1_sel: u32 = unsafe { ::core::mem::transmute(ext_wakeup1_sel) };
ext_wakeup1_sel as u64
});
__bindgen_bitfield_unit.set(18usize, 1u8, {
let ext_wakeup1_status_clr: u32 =
unsafe { ::core::mem::transmute(ext_wakeup1_status_clr) };
ext_wakeup1_status_clr as u64
});
__bindgen_bitfield_unit.set(19usize, 13u8, {
let reserved19: u32 = unsafe { ::core::mem::transmute(reserved19) };
reserved19 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_36 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_36__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_36__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_36__bindgen_ty_1 {
#[inline]
pub fn ext_wakeup1_status(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 18u8) as u32) }
}
#[inline]
pub fn set_ext_wakeup1_status(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 18u8, val as u64)
}
}
#[inline]
pub fn reserved18(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 14u8) as u32) }
}
#[inline]
pub fn set_reserved18(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 14u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
ext_wakeup1_status: u32,
reserved18: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 18u8, {
let ext_wakeup1_status: u32 = unsafe { ::core::mem::transmute(ext_wakeup1_status) };
ext_wakeup1_status as u64
});
__bindgen_bitfield_unit.set(18usize, 14u8, {
let reserved18: u32 = unsafe { ::core::mem::transmute(reserved18) };
reserved18 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_37 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_37__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_37__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl rtc_cntl_dev_s__bindgen_ty_37__bindgen_ty_1 {
#[inline]
pub fn reserved0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 14u8) as u32) }
}
#[inline]
pub fn set_reserved0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 14u8, val as u64)
}
}
#[inline]
pub fn close_flash_ena(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 1u8) as u32) }
}
#[inline]
pub fn set_close_flash_ena(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 1u8, val as u64)
}
}
#[inline]
pub fn pd_rf_ena(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 1u8) as u32) }
}
#[inline]
pub fn set_pd_rf_ena(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 1u8, val as u64)
}
}
#[inline]
pub fn rst_wait(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 10u8) as u32) }
}
#[inline]
pub fn set_rst_wait(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 10u8, val as u64)
}
}
#[inline]
pub fn rst_ena(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 1u8) as u32) }
}
#[inline]
pub fn set_rst_ena(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 1u8, val as u64)
}
}
#[inline]
pub fn thres(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 3u8) as u32) }
}
#[inline]
pub fn set_thres(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 3u8, val as u64)
}
}
#[inline]
pub fn ena(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_ena(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn det(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_det(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
reserved0: u32,
close_flash_ena: u32,
pd_rf_ena: u32,
rst_wait: u32,
rst_ena: u32,
thres: u32,
ena: u32,
det: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 14u8, {
let reserved0: u32 = unsafe { ::core::mem::transmute(reserved0) };
reserved0 as u64
});
__bindgen_bitfield_unit.set(14usize, 1u8, {
let close_flash_ena: u32 = unsafe { ::core::mem::transmute(close_flash_ena) };
close_flash_ena as u64
});
__bindgen_bitfield_unit.set(15usize, 1u8, {
let pd_rf_ena: u32 = unsafe { ::core::mem::transmute(pd_rf_ena) };
pd_rf_ena as u64
});
__bindgen_bitfield_unit.set(16usize, 10u8, {
let rst_wait: u32 = unsafe { ::core::mem::transmute(rst_wait) };
rst_wait as u64
});
__bindgen_bitfield_unit.set(26usize, 1u8, {
let rst_ena: u32 = unsafe { ::core::mem::transmute(rst_ena) };
rst_ena as u64
});
__bindgen_bitfield_unit.set(27usize, 3u8, {
let thres: u32 = unsafe { ::core::mem::transmute(thres) };
thres as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let ena: u32 = unsafe { ::core::mem::transmute(ena) };
ena as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let det: u32 = unsafe { ::core::mem::transmute(det) };
det as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union rtc_cntl_dev_s__bindgen_ty_38 {
pub __bindgen_anon_1: rtc_cntl_dev_s__bindgen_ty_38__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cntl_dev_s__bindgen_ty_38__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl rtc_cntl_dev_s__bindgen_ty_38__bindgen_ty_1 {
#[inline]
pub fn date(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 28u8) as u32) }
}
#[inline]
pub fn set_date(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 28u8, val as u64)
}
}
#[inline]
pub fn reserved28(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 4u8) as u32) }
}
#[inline]
pub fn set_reserved28(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 4u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(date: u32, reserved28: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 28u8, {
let date: u32 = unsafe { ::core::mem::transmute(date) };
date as u64
});
__bindgen_bitfield_unit.set(28usize, 4u8, {
let reserved28: u32 = unsafe { ::core::mem::transmute(reserved28) };
reserved28 as u64
});
__bindgen_bitfield_unit
}
}
pub type rtc_cntl_dev_t = rtc_cntl_dev_s;
extern "C" {
pub static mut RTCCNTL: rtc_cntl_dev_t;
}
#[repr(C)]
#[derive(Copy, Clone)]
pub struct sens_dev_s {
pub sar_read_ctrl: sens_dev_s__bindgen_ty_1,
pub sar_read_status1: u32,
pub sar_meas_wait1: sens_dev_s__bindgen_ty_2,
pub sar_meas_wait2: sens_dev_s__bindgen_ty_3,
pub sar_meas_ctrl: sens_dev_s__bindgen_ty_4,
pub sar_read_status2: u32,
pub ulp_cp_sleep_cyc0: u32,
pub ulp_cp_sleep_cyc1: u32,
pub ulp_cp_sleep_cyc2: u32,
pub ulp_cp_sleep_cyc3: u32,
pub ulp_cp_sleep_cyc4: u32,
pub sar_start_force: sens_dev_s__bindgen_ty_5,
pub sar_mem_wr_ctrl: sens_dev_s__bindgen_ty_6,
pub sar_atten1: u32,
pub sar_atten2: u32,
pub sar_slave_addr1: sens_dev_s__bindgen_ty_7,
pub sar_slave_addr2: sens_dev_s__bindgen_ty_8,
pub sar_slave_addr3: sens_dev_s__bindgen_ty_9,
pub sar_slave_addr4: sens_dev_s__bindgen_ty_10,
pub sar_tctrl: sens_dev_s__bindgen_ty_11,
pub sar_i2c_ctrl: sens_dev_s__bindgen_ty_12,
pub sar_meas_start1: sens_dev_s__bindgen_ty_13,
pub sar_touch_ctrl1: sens_dev_s__bindgen_ty_14,
pub touch_thresh: [sens_dev_s__bindgen_ty_15; 5usize],
pub touch_meas: [sens_dev_s__bindgen_ty_16; 5usize],
pub sar_touch_ctrl2: sens_dev_s__bindgen_ty_17,
pub reserved_88: u32,
pub sar_touch_enable: sens_dev_s__bindgen_ty_18,
pub sar_read_ctrl2: sens_dev_s__bindgen_ty_19,
pub sar_meas_start2: sens_dev_s__bindgen_ty_20,
pub sar_dac_ctrl1: sens_dev_s__bindgen_ty_21,
pub sar_dac_ctrl2: sens_dev_s__bindgen_ty_22,
pub sar_meas_ctrl2: sens_dev_s__bindgen_ty_23,
pub reserved_a4: u32,
pub reserved_a8: u32,
pub reserved_ac: u32,
pub reserved_b0: u32,
pub reserved_b4: u32,
pub reserved_b8: u32,
pub reserved_bc: u32,
pub reserved_c0: u32,
pub reserved_c4: u32,
pub reserved_c8: u32,
pub reserved_cc: u32,
pub reserved_d0: u32,
pub reserved_d4: u32,
pub reserved_d8: u32,
pub reserved_dc: u32,
pub reserved_e0: u32,
pub reserved_e4: u32,
pub reserved_e8: u32,
pub reserved_ec: u32,
pub reserved_f0: u32,
pub reserved_f4: u32,
pub sar_nouse: u32,
pub sardate: sens_dev_s__bindgen_ty_24,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_1 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_1__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_1__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl sens_dev_s__bindgen_ty_1__bindgen_ty_1 {
#[inline]
pub fn sar1_clk_div(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_sar1_clk_div(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn sar1_sample_cycle(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 8u8) as u32) }
}
#[inline]
pub fn set_sar1_sample_cycle(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 8u8, val as u64)
}
}
#[inline]
pub fn sar1_sample_bit(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 2u8) as u32) }
}
#[inline]
pub fn set_sar1_sample_bit(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 2u8, val as u64)
}
}
#[inline]
pub fn sar1_clk_gated(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 1u8) as u32) }
}
#[inline]
pub fn set_sar1_clk_gated(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 1u8, val as u64)
}
}
#[inline]
pub fn sar1_sample_num(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 8u8) as u32) }
}
#[inline]
pub fn set_sar1_sample_num(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 8u8, val as u64)
}
}
#[inline]
pub fn sar1_dig_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 1u8) as u32) }
}
#[inline]
pub fn set_sar1_dig_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 1u8, val as u64)
}
}
#[inline]
pub fn sar1_data_inv(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 1u8) as u32) }
}
#[inline]
pub fn set_sar1_data_inv(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved29(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 3u8) as u32) }
}
#[inline]
pub fn set_reserved29(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 3u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
sar1_clk_div: u32,
sar1_sample_cycle: u32,
sar1_sample_bit: u32,
sar1_clk_gated: u32,
sar1_sample_num: u32,
sar1_dig_force: u32,
sar1_data_inv: u32,
reserved29: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let sar1_clk_div: u32 = unsafe { ::core::mem::transmute(sar1_clk_div) };
sar1_clk_div as u64
});
__bindgen_bitfield_unit.set(8usize, 8u8, {
let sar1_sample_cycle: u32 = unsafe { ::core::mem::transmute(sar1_sample_cycle) };
sar1_sample_cycle as u64
});
__bindgen_bitfield_unit.set(16usize, 2u8, {
let sar1_sample_bit: u32 = unsafe { ::core::mem::transmute(sar1_sample_bit) };
sar1_sample_bit as u64
});
__bindgen_bitfield_unit.set(18usize, 1u8, {
let sar1_clk_gated: u32 = unsafe { ::core::mem::transmute(sar1_clk_gated) };
sar1_clk_gated as u64
});
__bindgen_bitfield_unit.set(19usize, 8u8, {
let sar1_sample_num: u32 = unsafe { ::core::mem::transmute(sar1_sample_num) };
sar1_sample_num as u64
});
__bindgen_bitfield_unit.set(27usize, 1u8, {
let sar1_dig_force: u32 = unsafe { ::core::mem::transmute(sar1_dig_force) };
sar1_dig_force as u64
});
__bindgen_bitfield_unit.set(28usize, 1u8, {
let sar1_data_inv: u32 = unsafe { ::core::mem::transmute(sar1_data_inv) };
sar1_data_inv as u64
});
__bindgen_bitfield_unit.set(29usize, 3u8, {
let reserved29: u32 = unsafe { ::core::mem::transmute(reserved29) };
reserved29 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_2 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_2__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_2__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl sens_dev_s__bindgen_ty_2__bindgen_ty_1 {
#[inline]
pub fn sar_amp_wait1(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 16u8) as u32) }
}
#[inline]
pub fn set_sar_amp_wait1(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 16u8, val as u64)
}
}
#[inline]
pub fn sar_amp_wait2(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 16u8) as u32) }
}
#[inline]
pub fn set_sar_amp_wait2(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 16u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
sar_amp_wait1: u32,
sar_amp_wait2: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 16u8, {
let sar_amp_wait1: u32 = unsafe { ::core::mem::transmute(sar_amp_wait1) };
sar_amp_wait1 as u64
});
__bindgen_bitfield_unit.set(16usize, 16u8, {
let sar_amp_wait2: u32 = unsafe { ::core::mem::transmute(sar_amp_wait2) };
sar_amp_wait2 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_3 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_3__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_3__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl sens_dev_s__bindgen_ty_3__bindgen_ty_1 {
#[inline]
pub fn sar_amp_wait3(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 16u8) as u32) }
}
#[inline]
pub fn set_sar_amp_wait3(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 16u8, val as u64)
}
}
#[inline]
pub fn force_xpd_amp(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 2u8) as u32) }
}
#[inline]
pub fn set_force_xpd_amp(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 2u8, val as u64)
}
}
#[inline]
pub fn force_xpd_sar(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 2u8) as u32) }
}
#[inline]
pub fn set_force_xpd_sar(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 2u8, val as u64)
}
}
#[inline]
pub fn sar2_rstb_wait(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 8u8) as u32) }
}
#[inline]
pub fn set_sar2_rstb_wait(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 8u8, val as u64)
}
}
#[inline]
pub fn reserved28(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 4u8) as u32) }
}
#[inline]
pub fn set_reserved28(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 4u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
sar_amp_wait3: u32,
force_xpd_amp: u32,
force_xpd_sar: u32,
sar2_rstb_wait: u32,
reserved28: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 16u8, {
let sar_amp_wait3: u32 = unsafe { ::core::mem::transmute(sar_amp_wait3) };
sar_amp_wait3 as u64
});
__bindgen_bitfield_unit.set(16usize, 2u8, {
let force_xpd_amp: u32 = unsafe { ::core::mem::transmute(force_xpd_amp) };
force_xpd_amp as u64
});
__bindgen_bitfield_unit.set(18usize, 2u8, {
let force_xpd_sar: u32 = unsafe { ::core::mem::transmute(force_xpd_sar) };
force_xpd_sar as u64
});
__bindgen_bitfield_unit.set(20usize, 8u8, {
let sar2_rstb_wait: u32 = unsafe { ::core::mem::transmute(sar2_rstb_wait) };
sar2_rstb_wait as u64
});
__bindgen_bitfield_unit.set(28usize, 4u8, {
let reserved28: u32 = unsafe { ::core::mem::transmute(reserved28) };
reserved28 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_4 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_4__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_4__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl sens_dev_s__bindgen_ty_4__bindgen_ty_1 {
#[inline]
pub fn xpd_sar_amp_fsm(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 4u8) as u32) }
}
#[inline]
pub fn set_xpd_sar_amp_fsm(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 4u8, val as u64)
}
}
#[inline]
pub fn amp_rst_fb_fsm(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 4u8) as u32) }
}
#[inline]
pub fn set_amp_rst_fb_fsm(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 4u8, val as u64)
}
}
#[inline]
pub fn amp_short_ref_fsm(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 4u8) as u32) }
}
#[inline]
pub fn set_amp_short_ref_fsm(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 4u8, val as u64)
}
}
#[inline]
pub fn amp_short_ref_gnd_fsm(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 4u8) as u32) }
}
#[inline]
pub fn set_amp_short_ref_gnd_fsm(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 4u8, val as u64)
}
}
#[inline]
pub fn xpd_sar_fsm(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 4u8) as u32) }
}
#[inline]
pub fn set_xpd_sar_fsm(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 4u8, val as u64)
}
}
#[inline]
pub fn sar_rstb_fsm(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 4u8) as u32) }
}
#[inline]
pub fn set_sar_rstb_fsm(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 4u8, val as u64)
}
}
#[inline]
pub fn sar2_xpd_wait(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 8u8) as u32) }
}
#[inline]
pub fn set_sar2_xpd_wait(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 8u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
xpd_sar_amp_fsm: u32,
amp_rst_fb_fsm: u32,
amp_short_ref_fsm: u32,
amp_short_ref_gnd_fsm: u32,
xpd_sar_fsm: u32,
sar_rstb_fsm: u32,
sar2_xpd_wait: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 4u8, {
let xpd_sar_amp_fsm: u32 = unsafe { ::core::mem::transmute(xpd_sar_amp_fsm) };
xpd_sar_amp_fsm as u64
});
__bindgen_bitfield_unit.set(4usize, 4u8, {
let amp_rst_fb_fsm: u32 = unsafe { ::core::mem::transmute(amp_rst_fb_fsm) };
amp_rst_fb_fsm as u64
});
__bindgen_bitfield_unit.set(8usize, 4u8, {
let amp_short_ref_fsm: u32 = unsafe { ::core::mem::transmute(amp_short_ref_fsm) };
amp_short_ref_fsm as u64
});
__bindgen_bitfield_unit.set(12usize, 4u8, {
let amp_short_ref_gnd_fsm: u32 =
unsafe { ::core::mem::transmute(amp_short_ref_gnd_fsm) };
amp_short_ref_gnd_fsm as u64
});
__bindgen_bitfield_unit.set(16usize, 4u8, {
let xpd_sar_fsm: u32 = unsafe { ::core::mem::transmute(xpd_sar_fsm) };
xpd_sar_fsm as u64
});
__bindgen_bitfield_unit.set(20usize, 4u8, {
let sar_rstb_fsm: u32 = unsafe { ::core::mem::transmute(sar_rstb_fsm) };
sar_rstb_fsm as u64
});
__bindgen_bitfield_unit.set(24usize, 8u8, {
let sar2_xpd_wait: u32 = unsafe { ::core::mem::transmute(sar2_xpd_wait) };
sar2_xpd_wait as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_5 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_5__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_5__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl sens_dev_s__bindgen_ty_5__bindgen_ty_1 {
#[inline]
pub fn sar1_bit_width(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 2u8) as u32) }
}
#[inline]
pub fn set_sar1_bit_width(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 2u8, val as u64)
}
}
#[inline]
pub fn sar2_bit_width(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 2u8) as u32) }
}
#[inline]
pub fn set_sar2_bit_width(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 2u8, val as u64)
}
}
#[inline]
pub fn sar2_en_test(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_sar2_en_test(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn sar2_pwdet_cct(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 3u8) as u32) }
}
#[inline]
pub fn set_sar2_pwdet_cct(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 3u8, val as u64)
}
}
#[inline]
pub fn ulp_cp_force_start_top(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_ulp_cp_force_start_top(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn ulp_cp_start_top(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_ulp_cp_start_top(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn sarclk_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_sarclk_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn pc_init(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 11u8) as u32) }
}
#[inline]
pub fn set_pc_init(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 11u8, val as u64)
}
}
#[inline]
pub fn sar2_stop(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 1u8) as u32) }
}
#[inline]
pub fn set_sar2_stop(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 1u8, val as u64)
}
}
#[inline]
pub fn sar1_stop(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(23usize, 1u8) as u32) }
}
#[inline]
pub fn set_sar1_stop(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(23usize, 1u8, val as u64)
}
}
#[inline]
pub fn sar2_pwdet_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_sar2_pwdet_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved25(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 7u8) as u32) }
}
#[inline]
pub fn set_reserved25(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 7u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
sar1_bit_width: u32,
sar2_bit_width: u32,
sar2_en_test: u32,
sar2_pwdet_cct: u32,
ulp_cp_force_start_top: u32,
ulp_cp_start_top: u32,
sarclk_en: u32,
pc_init: u32,
sar2_stop: u32,
sar1_stop: u32,
sar2_pwdet_en: u32,
reserved25: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 2u8, {
let sar1_bit_width: u32 = unsafe { ::core::mem::transmute(sar1_bit_width) };
sar1_bit_width as u64
});
__bindgen_bitfield_unit.set(2usize, 2u8, {
let sar2_bit_width: u32 = unsafe { ::core::mem::transmute(sar2_bit_width) };
sar2_bit_width as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let sar2_en_test: u32 = unsafe { ::core::mem::transmute(sar2_en_test) };
sar2_en_test as u64
});
__bindgen_bitfield_unit.set(5usize, 3u8, {
let sar2_pwdet_cct: u32 = unsafe { ::core::mem::transmute(sar2_pwdet_cct) };
sar2_pwdet_cct as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let ulp_cp_force_start_top: u32 =
unsafe { ::core::mem::transmute(ulp_cp_force_start_top) };
ulp_cp_force_start_top as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let ulp_cp_start_top: u32 = unsafe { ::core::mem::transmute(ulp_cp_start_top) };
ulp_cp_start_top as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let sarclk_en: u32 = unsafe { ::core::mem::transmute(sarclk_en) };
sarclk_en as u64
});
__bindgen_bitfield_unit.set(11usize, 11u8, {
let pc_init: u32 = unsafe { ::core::mem::transmute(pc_init) };
pc_init as u64
});
__bindgen_bitfield_unit.set(22usize, 1u8, {
let sar2_stop: u32 = unsafe { ::core::mem::transmute(sar2_stop) };
sar2_stop as u64
});
__bindgen_bitfield_unit.set(23usize, 1u8, {
let sar1_stop: u32 = unsafe { ::core::mem::transmute(sar1_stop) };
sar1_stop as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let sar2_pwdet_en: u32 = unsafe { ::core::mem::transmute(sar2_pwdet_en) };
sar2_pwdet_en as u64
});
__bindgen_bitfield_unit.set(25usize, 7u8, {
let reserved25: u32 = unsafe { ::core::mem::transmute(reserved25) };
reserved25 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_6 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_6__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_6__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl sens_dev_s__bindgen_ty_6__bindgen_ty_1 {
#[inline]
pub fn mem_wr_addr_init(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 11u8) as u32) }
}
#[inline]
pub fn set_mem_wr_addr_init(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 11u8, val as u64)
}
}
#[inline]
pub fn mem_wr_addr_size(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 11u8) as u32) }
}
#[inline]
pub fn set_mem_wr_addr_size(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 11u8, val as u64)
}
}
#[inline]
pub fn rtc_mem_wr_offst_clr(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_mem_wr_offst_clr(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved23(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(23usize, 9u8) as u32) }
}
#[inline]
pub fn set_reserved23(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(23usize, 9u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
mem_wr_addr_init: u32,
mem_wr_addr_size: u32,
rtc_mem_wr_offst_clr: u32,
reserved23: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 11u8, {
let mem_wr_addr_init: u32 = unsafe { ::core::mem::transmute(mem_wr_addr_init) };
mem_wr_addr_init as u64
});
__bindgen_bitfield_unit.set(11usize, 11u8, {
let mem_wr_addr_size: u32 = unsafe { ::core::mem::transmute(mem_wr_addr_size) };
mem_wr_addr_size as u64
});
__bindgen_bitfield_unit.set(22usize, 1u8, {
let rtc_mem_wr_offst_clr: u32 = unsafe { ::core::mem::transmute(rtc_mem_wr_offst_clr) };
rtc_mem_wr_offst_clr as u64
});
__bindgen_bitfield_unit.set(23usize, 9u8, {
let reserved23: u32 = unsafe { ::core::mem::transmute(reserved23) };
reserved23 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_7 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_7__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_7__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl sens_dev_s__bindgen_ty_7__bindgen_ty_1 {
#[inline]
pub fn i2c_slave_addr1(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 11u8) as u32) }
}
#[inline]
pub fn set_i2c_slave_addr1(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 11u8, val as u64)
}
}
#[inline]
pub fn i2c_slave_addr0(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 11u8) as u32) }
}
#[inline]
pub fn set_i2c_slave_addr0(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 11u8, val as u64)
}
}
#[inline]
pub fn meas_status(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 8u8) as u32) }
}
#[inline]
pub fn set_meas_status(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 8u8, val as u64)
}
}
#[inline]
pub fn reserved30(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 2u8) as u32) }
}
#[inline]
pub fn set_reserved30(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 2u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
i2c_slave_addr1: u32,
i2c_slave_addr0: u32,
meas_status: u32,
reserved30: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 11u8, {
let i2c_slave_addr1: u32 = unsafe { ::core::mem::transmute(i2c_slave_addr1) };
i2c_slave_addr1 as u64
});
__bindgen_bitfield_unit.set(11usize, 11u8, {
let i2c_slave_addr0: u32 = unsafe { ::core::mem::transmute(i2c_slave_addr0) };
i2c_slave_addr0 as u64
});
__bindgen_bitfield_unit.set(22usize, 8u8, {
let meas_status: u32 = unsafe { ::core::mem::transmute(meas_status) };
meas_status as u64
});
__bindgen_bitfield_unit.set(30usize, 2u8, {
let reserved30: u32 = unsafe { ::core::mem::transmute(reserved30) };
reserved30 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_8 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_8__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_8__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl sens_dev_s__bindgen_ty_8__bindgen_ty_1 {
#[inline]
pub fn i2c_slave_addr3(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 11u8) as u32) }
}
#[inline]
pub fn set_i2c_slave_addr3(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 11u8, val as u64)
}
}
#[inline]
pub fn i2c_slave_addr2(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 11u8) as u32) }
}
#[inline]
pub fn set_i2c_slave_addr2(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 11u8, val as u64)
}
}
#[inline]
pub fn reserved22(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 10u8) as u32) }
}
#[inline]
pub fn set_reserved22(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 10u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
i2c_slave_addr3: u32,
i2c_slave_addr2: u32,
reserved22: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 11u8, {
let i2c_slave_addr3: u32 = unsafe { ::core::mem::transmute(i2c_slave_addr3) };
i2c_slave_addr3 as u64
});
__bindgen_bitfield_unit.set(11usize, 11u8, {
let i2c_slave_addr2: u32 = unsafe { ::core::mem::transmute(i2c_slave_addr2) };
i2c_slave_addr2 as u64
});
__bindgen_bitfield_unit.set(22usize, 10u8, {
let reserved22: u32 = unsafe { ::core::mem::transmute(reserved22) };
reserved22 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_9 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_9__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_9__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl sens_dev_s__bindgen_ty_9__bindgen_ty_1 {
#[inline]
pub fn i2c_slave_addr5(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 11u8) as u32) }
}
#[inline]
pub fn set_i2c_slave_addr5(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 11u8, val as u64)
}
}
#[inline]
pub fn i2c_slave_addr4(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 11u8) as u32) }
}
#[inline]
pub fn set_i2c_slave_addr4(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 11u8, val as u64)
}
}
#[inline]
pub fn tsens_out(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 8u8) as u32) }
}
#[inline]
pub fn set_tsens_out(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 8u8, val as u64)
}
}
#[inline]
pub fn tsens_rdy_out(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_tsens_rdy_out(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved31(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_reserved31(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
i2c_slave_addr5: u32,
i2c_slave_addr4: u32,
tsens_out: u32,
tsens_rdy_out: u32,
reserved31: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 11u8, {
let i2c_slave_addr5: u32 = unsafe { ::core::mem::transmute(i2c_slave_addr5) };
i2c_slave_addr5 as u64
});
__bindgen_bitfield_unit.set(11usize, 11u8, {
let i2c_slave_addr4: u32 = unsafe { ::core::mem::transmute(i2c_slave_addr4) };
i2c_slave_addr4 as u64
});
__bindgen_bitfield_unit.set(22usize, 8u8, {
let tsens_out: u32 = unsafe { ::core::mem::transmute(tsens_out) };
tsens_out as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let tsens_rdy_out: u32 = unsafe { ::core::mem::transmute(tsens_rdy_out) };
tsens_rdy_out as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let reserved31: u32 = unsafe { ::core::mem::transmute(reserved31) };
reserved31 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_10 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_10__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_10__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl sens_dev_s__bindgen_ty_10__bindgen_ty_1 {
#[inline]
pub fn i2c_slave_addr7(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 11u8) as u32) }
}
#[inline]
pub fn set_i2c_slave_addr7(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 11u8, val as u64)
}
}
#[inline]
pub fn i2c_slave_addr6(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 11u8) as u32) }
}
#[inline]
pub fn set_i2c_slave_addr6(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 11u8, val as u64)
}
}
#[inline]
pub fn i2c_rdata(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 8u8) as u32) }
}
#[inline]
pub fn set_i2c_rdata(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 8u8, val as u64)
}
}
#[inline]
pub fn i2c_done(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_i2c_done(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved31(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_reserved31(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
i2c_slave_addr7: u32,
i2c_slave_addr6: u32,
i2c_rdata: u32,
i2c_done: u32,
reserved31: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 11u8, {
let i2c_slave_addr7: u32 = unsafe { ::core::mem::transmute(i2c_slave_addr7) };
i2c_slave_addr7 as u64
});
__bindgen_bitfield_unit.set(11usize, 11u8, {
let i2c_slave_addr6: u32 = unsafe { ::core::mem::transmute(i2c_slave_addr6) };
i2c_slave_addr6 as u64
});
__bindgen_bitfield_unit.set(22usize, 8u8, {
let i2c_rdata: u32 = unsafe { ::core::mem::transmute(i2c_rdata) };
i2c_rdata as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let i2c_done: u32 = unsafe { ::core::mem::transmute(i2c_done) };
i2c_done as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let reserved31: u32 = unsafe { ::core::mem::transmute(reserved31) };
reserved31 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_11 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_11__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_11__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl sens_dev_s__bindgen_ty_11__bindgen_ty_1 {
#[inline]
pub fn tsens_xpd_wait(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 12u8) as u32) }
}
#[inline]
pub fn set_tsens_xpd_wait(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 12u8, val as u64)
}
}
#[inline]
pub fn tsens_xpd_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_tsens_xpd_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn tsens_clk_inv(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 1u8) as u32) }
}
#[inline]
pub fn set_tsens_clk_inv(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 1u8, val as u64)
}
}
#[inline]
pub fn tsens_clk_gated(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 1u8) as u32) }
}
#[inline]
pub fn set_tsens_clk_gated(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 1u8, val as u64)
}
}
#[inline]
pub fn tsens_in_inv(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 1u8) as u32) }
}
#[inline]
pub fn set_tsens_in_inv(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 1u8, val as u64)
}
}
#[inline]
pub fn tsens_clk_div(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 8u8) as u32) }
}
#[inline]
pub fn set_tsens_clk_div(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 8u8, val as u64)
}
}
#[inline]
pub fn tsens_power_up(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_tsens_power_up(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn tsens_power_up_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 1u8) as u32) }
}
#[inline]
pub fn set_tsens_power_up_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 1u8, val as u64)
}
}
#[inline]
pub fn tsens_dump_out(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 1u8) as u32) }
}
#[inline]
pub fn set_tsens_dump_out(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved27(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 5u8) as u32) }
}
#[inline]
pub fn set_reserved27(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 5u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
tsens_xpd_wait: u32,
tsens_xpd_force: u32,
tsens_clk_inv: u32,
tsens_clk_gated: u32,
tsens_in_inv: u32,
tsens_clk_div: u32,
tsens_power_up: u32,
tsens_power_up_force: u32,
tsens_dump_out: u32,
reserved27: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 12u8, {
let tsens_xpd_wait: u32 = unsafe { ::core::mem::transmute(tsens_xpd_wait) };
tsens_xpd_wait as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let tsens_xpd_force: u32 = unsafe { ::core::mem::transmute(tsens_xpd_force) };
tsens_xpd_force as u64
});
__bindgen_bitfield_unit.set(13usize, 1u8, {
let tsens_clk_inv: u32 = unsafe { ::core::mem::transmute(tsens_clk_inv) };
tsens_clk_inv as u64
});
__bindgen_bitfield_unit.set(14usize, 1u8, {
let tsens_clk_gated: u32 = unsafe { ::core::mem::transmute(tsens_clk_gated) };
tsens_clk_gated as u64
});
__bindgen_bitfield_unit.set(15usize, 1u8, {
let tsens_in_inv: u32 = unsafe { ::core::mem::transmute(tsens_in_inv) };
tsens_in_inv as u64
});
__bindgen_bitfield_unit.set(16usize, 8u8, {
let tsens_clk_div: u32 = unsafe { ::core::mem::transmute(tsens_clk_div) };
tsens_clk_div as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let tsens_power_up: u32 = unsafe { ::core::mem::transmute(tsens_power_up) };
tsens_power_up as u64
});
__bindgen_bitfield_unit.set(25usize, 1u8, {
let tsens_power_up_force: u32 = unsafe { ::core::mem::transmute(tsens_power_up_force) };
tsens_power_up_force as u64
});
__bindgen_bitfield_unit.set(26usize, 1u8, {
let tsens_dump_out: u32 = unsafe { ::core::mem::transmute(tsens_dump_out) };
tsens_dump_out as u64
});
__bindgen_bitfield_unit.set(27usize, 5u8, {
let reserved27: u32 = unsafe { ::core::mem::transmute(reserved27) };
reserved27 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_12 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_12__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_12__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl sens_dev_s__bindgen_ty_12__bindgen_ty_1 {
#[inline]
pub fn sar_i2c_ctrl(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 28u8) as u32) }
}
#[inline]
pub fn set_sar_i2c_ctrl(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 28u8, val as u64)
}
}
#[inline]
pub fn sar_i2c_start(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 1u8) as u32) }
}
#[inline]
pub fn set_sar_i2c_start(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 1u8, val as u64)
}
}
#[inline]
pub fn sar_i2c_start_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 1u8) as u32) }
}
#[inline]
pub fn set_sar_i2c_start_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved30(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 2u8) as u32) }
}
#[inline]
pub fn set_reserved30(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 2u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
sar_i2c_ctrl: u32,
sar_i2c_start: u32,
sar_i2c_start_force: u32,
reserved30: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 28u8, {
let sar_i2c_ctrl: u32 = unsafe { ::core::mem::transmute(sar_i2c_ctrl) };
sar_i2c_ctrl as u64
});
__bindgen_bitfield_unit.set(28usize, 1u8, {
let sar_i2c_start: u32 = unsafe { ::core::mem::transmute(sar_i2c_start) };
sar_i2c_start as u64
});
__bindgen_bitfield_unit.set(29usize, 1u8, {
let sar_i2c_start_force: u32 = unsafe { ::core::mem::transmute(sar_i2c_start_force) };
sar_i2c_start_force as u64
});
__bindgen_bitfield_unit.set(30usize, 2u8, {
let reserved30: u32 = unsafe { ::core::mem::transmute(reserved30) };
reserved30 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_13 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_13__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_13__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl sens_dev_s__bindgen_ty_13__bindgen_ty_1 {
#[inline]
pub fn meas1_data_sar(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 16u8) as u32) }
}
#[inline]
pub fn set_meas1_data_sar(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 16u8, val as u64)
}
}
#[inline]
pub fn meas1_done_sar(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_meas1_done_sar(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn meas1_start_sar(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 1u8) as u32) }
}
#[inline]
pub fn set_meas1_start_sar(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 1u8, val as u64)
}
}
#[inline]
pub fn meas1_start_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 1u8) as u32) }
}
#[inline]
pub fn set_meas1_start_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 1u8, val as u64)
}
}
#[inline]
pub fn sar1_en_pad(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 12u8) as u32) }
}
#[inline]
pub fn set_sar1_en_pad(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 12u8, val as u64)
}
}
#[inline]
pub fn sar1_en_pad_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_sar1_en_pad_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
meas1_data_sar: u32,
meas1_done_sar: u32,
meas1_start_sar: u32,
meas1_start_force: u32,
sar1_en_pad: u32,
sar1_en_pad_force: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 16u8, {
let meas1_data_sar: u32 = unsafe { ::core::mem::transmute(meas1_data_sar) };
meas1_data_sar as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let meas1_done_sar: u32 = unsafe { ::core::mem::transmute(meas1_done_sar) };
meas1_done_sar as u64
});
__bindgen_bitfield_unit.set(17usize, 1u8, {
let meas1_start_sar: u32 = unsafe { ::core::mem::transmute(meas1_start_sar) };
meas1_start_sar as u64
});
__bindgen_bitfield_unit.set(18usize, 1u8, {
let meas1_start_force: u32 = unsafe { ::core::mem::transmute(meas1_start_force) };
meas1_start_force as u64
});
__bindgen_bitfield_unit.set(19usize, 12u8, {
let sar1_en_pad: u32 = unsafe { ::core::mem::transmute(sar1_en_pad) };
sar1_en_pad as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let sar1_en_pad_force: u32 = unsafe { ::core::mem::transmute(sar1_en_pad_force) };
sar1_en_pad_force as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_14 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_14__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_14__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl sens_dev_s__bindgen_ty_14__bindgen_ty_1 {
#[inline]
pub fn touch_meas_delay(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 16u8) as u32) }
}
#[inline]
pub fn set_touch_meas_delay(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 16u8, val as u64)
}
}
#[inline]
pub fn touch_xpd_wait(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 8u8) as u32) }
}
#[inline]
pub fn set_touch_xpd_wait(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 8u8, val as u64)
}
}
#[inline]
pub fn touch_out_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_touch_out_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn touch_out_1en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 1u8) as u32) }
}
#[inline]
pub fn set_touch_out_1en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 1u8, val as u64)
}
}
#[inline]
pub fn xpd_hall_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 1u8) as u32) }
}
#[inline]
pub fn set_xpd_hall_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 1u8, val as u64)
}
}
#[inline]
pub fn hall_phase_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 1u8) as u32) }
}
#[inline]
pub fn set_hall_phase_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved28(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 4u8) as u32) }
}
#[inline]
pub fn set_reserved28(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 4u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
touch_meas_delay: u32,
touch_xpd_wait: u32,
touch_out_sel: u32,
touch_out_1en: u32,
xpd_hall_force: u32,
hall_phase_force: u32,
reserved28: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 16u8, {
let touch_meas_delay: u32 = unsafe { ::core::mem::transmute(touch_meas_delay) };
touch_meas_delay as u64
});
__bindgen_bitfield_unit.set(16usize, 8u8, {
let touch_xpd_wait: u32 = unsafe { ::core::mem::transmute(touch_xpd_wait) };
touch_xpd_wait as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let touch_out_sel: u32 = unsafe { ::core::mem::transmute(touch_out_sel) };
touch_out_sel as u64
});
__bindgen_bitfield_unit.set(25usize, 1u8, {
let touch_out_1en: u32 = unsafe { ::core::mem::transmute(touch_out_1en) };
touch_out_1en as u64
});
__bindgen_bitfield_unit.set(26usize, 1u8, {
let xpd_hall_force: u32 = unsafe { ::core::mem::transmute(xpd_hall_force) };
xpd_hall_force as u64
});
__bindgen_bitfield_unit.set(27usize, 1u8, {
let hall_phase_force: u32 = unsafe { ::core::mem::transmute(hall_phase_force) };
hall_phase_force as u64
});
__bindgen_bitfield_unit.set(28usize, 4u8, {
let reserved28: u32 = unsafe { ::core::mem::transmute(reserved28) };
reserved28 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_15 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_15__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_15__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl sens_dev_s__bindgen_ty_15__bindgen_ty_1 {
#[inline]
pub fn l_thresh(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 16u8) as u32) }
}
#[inline]
pub fn set_l_thresh(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 16u8, val as u64)
}
}
#[inline]
pub fn h_thresh(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 16u8) as u32) }
}
#[inline]
pub fn set_h_thresh(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 16u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
l_thresh: u32,
h_thresh: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 16u8, {
let l_thresh: u32 = unsafe { ::core::mem::transmute(l_thresh) };
l_thresh as u64
});
__bindgen_bitfield_unit.set(16usize, 16u8, {
let h_thresh: u32 = unsafe { ::core::mem::transmute(h_thresh) };
h_thresh as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_16 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_16__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_16__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl sens_dev_s__bindgen_ty_16__bindgen_ty_1 {
#[inline]
pub fn l_val(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 16u8) as u32) }
}
#[inline]
pub fn set_l_val(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 16u8, val as u64)
}
}
#[inline]
pub fn h_val(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 16u8) as u32) }
}
#[inline]
pub fn set_h_val(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 16u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(l_val: u32, h_val: u32) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 16u8, {
let l_val: u32 = unsafe { ::core::mem::transmute(l_val) };
l_val as u64
});
__bindgen_bitfield_unit.set(16usize, 16u8, {
let h_val: u32 = unsafe { ::core::mem::transmute(h_val) };
h_val as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_17 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_17__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_17__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl sens_dev_s__bindgen_ty_17__bindgen_ty_1 {
#[inline]
pub fn touch_meas_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 10u8) as u32) }
}
#[inline]
pub fn set_touch_meas_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 10u8, val as u64)
}
}
#[inline]
pub fn touch_meas_done(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_touch_meas_done(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn touch_start_fsm_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 1u8) as u32) }
}
#[inline]
pub fn set_touch_start_fsm_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 1u8, val as u64)
}
}
#[inline]
pub fn touch_start_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(12usize, 1u8) as u32) }
}
#[inline]
pub fn set_touch_start_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(12usize, 1u8, val as u64)
}
}
#[inline]
pub fn touch_start_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 1u8) as u32) }
}
#[inline]
pub fn set_touch_start_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 1u8, val as u64)
}
}
#[inline]
pub fn touch_sleep_cycles(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 16u8) as u32) }
}
#[inline]
pub fn set_touch_sleep_cycles(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 16u8, val as u64)
}
}
#[inline]
pub fn touch_meas_en_clr(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 1u8) as u32) }
}
#[inline]
pub fn set_touch_meas_en_clr(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved31(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_reserved31(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
touch_meas_en: u32,
touch_meas_done: u32,
touch_start_fsm_en: u32,
touch_start_en: u32,
touch_start_force: u32,
touch_sleep_cycles: u32,
touch_meas_en_clr: u32,
reserved31: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 10u8, {
let touch_meas_en: u32 = unsafe { ::core::mem::transmute(touch_meas_en) };
touch_meas_en as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let touch_meas_done: u32 = unsafe { ::core::mem::transmute(touch_meas_done) };
touch_meas_done as u64
});
__bindgen_bitfield_unit.set(11usize, 1u8, {
let touch_start_fsm_en: u32 = unsafe { ::core::mem::transmute(touch_start_fsm_en) };
touch_start_fsm_en as u64
});
__bindgen_bitfield_unit.set(12usize, 1u8, {
let touch_start_en: u32 = unsafe { ::core::mem::transmute(touch_start_en) };
touch_start_en as u64
});
__bindgen_bitfield_unit.set(13usize, 1u8, {
let touch_start_force: u32 = unsafe { ::core::mem::transmute(touch_start_force) };
touch_start_force as u64
});
__bindgen_bitfield_unit.set(14usize, 16u8, {
let touch_sleep_cycles: u32 = unsafe { ::core::mem::transmute(touch_sleep_cycles) };
touch_sleep_cycles as u64
});
__bindgen_bitfield_unit.set(30usize, 1u8, {
let touch_meas_en_clr: u32 = unsafe { ::core::mem::transmute(touch_meas_en_clr) };
touch_meas_en_clr as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let reserved31: u32 = unsafe { ::core::mem::transmute(reserved31) };
reserved31 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_18 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_18__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_18__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl sens_dev_s__bindgen_ty_18__bindgen_ty_1 {
#[inline]
pub fn touch_pad_worken(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 10u8) as u32) }
}
#[inline]
pub fn set_touch_pad_worken(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 10u8, val as u64)
}
}
#[inline]
pub fn touch_pad_outen2(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 10u8) as u32) }
}
#[inline]
pub fn set_touch_pad_outen2(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 10u8, val as u64)
}
}
#[inline]
pub fn touch_pad_outen1(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 10u8) as u32) }
}
#[inline]
pub fn set_touch_pad_outen1(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 10u8, val as u64)
}
}
#[inline]
pub fn reserved30(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 2u8) as u32) }
}
#[inline]
pub fn set_reserved30(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 2u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
touch_pad_worken: u32,
touch_pad_outen2: u32,
touch_pad_outen1: u32,
reserved30: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 10u8, {
let touch_pad_worken: u32 = unsafe { ::core::mem::transmute(touch_pad_worken) };
touch_pad_worken as u64
});
__bindgen_bitfield_unit.set(10usize, 10u8, {
let touch_pad_outen2: u32 = unsafe { ::core::mem::transmute(touch_pad_outen2) };
touch_pad_outen2 as u64
});
__bindgen_bitfield_unit.set(20usize, 10u8, {
let touch_pad_outen1: u32 = unsafe { ::core::mem::transmute(touch_pad_outen1) };
touch_pad_outen1 as u64
});
__bindgen_bitfield_unit.set(30usize, 2u8, {
let reserved30: u32 = unsafe { ::core::mem::transmute(reserved30) };
reserved30 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_19 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_19__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_19__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl sens_dev_s__bindgen_ty_19__bindgen_ty_1 {
#[inline]
pub fn sar2_clk_div(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_sar2_clk_div(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn sar2_sample_cycle(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 8u8) as u32) }
}
#[inline]
pub fn set_sar2_sample_cycle(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 8u8, val as u64)
}
}
#[inline]
pub fn sar2_sample_bit(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 2u8) as u32) }
}
#[inline]
pub fn set_sar2_sample_bit(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 2u8, val as u64)
}
}
#[inline]
pub fn sar2_clk_gated(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 1u8) as u32) }
}
#[inline]
pub fn set_sar2_clk_gated(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 1u8, val as u64)
}
}
#[inline]
pub fn sar2_sample_num(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 8u8) as u32) }
}
#[inline]
pub fn set_sar2_sample_num(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 8u8, val as u64)
}
}
#[inline]
pub fn sar2_pwdet_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(27usize, 1u8) as u32) }
}
#[inline]
pub fn set_sar2_pwdet_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(27usize, 1u8, val as u64)
}
}
#[inline]
pub fn sar2_dig_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 1u8) as u32) }
}
#[inline]
pub fn set_sar2_dig_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 1u8, val as u64)
}
}
#[inline]
pub fn sar2_data_inv(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(29usize, 1u8) as u32) }
}
#[inline]
pub fn set_sar2_data_inv(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(29usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved30(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(30usize, 2u8) as u32) }
}
#[inline]
pub fn set_reserved30(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(30usize, 2u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
sar2_clk_div: u32,
sar2_sample_cycle: u32,
sar2_sample_bit: u32,
sar2_clk_gated: u32,
sar2_sample_num: u32,
sar2_pwdet_force: u32,
sar2_dig_force: u32,
sar2_data_inv: u32,
reserved30: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let sar2_clk_div: u32 = unsafe { ::core::mem::transmute(sar2_clk_div) };
sar2_clk_div as u64
});
__bindgen_bitfield_unit.set(8usize, 8u8, {
let sar2_sample_cycle: u32 = unsafe { ::core::mem::transmute(sar2_sample_cycle) };
sar2_sample_cycle as u64
});
__bindgen_bitfield_unit.set(16usize, 2u8, {
let sar2_sample_bit: u32 = unsafe { ::core::mem::transmute(sar2_sample_bit) };
sar2_sample_bit as u64
});
__bindgen_bitfield_unit.set(18usize, 1u8, {
let sar2_clk_gated: u32 = unsafe { ::core::mem::transmute(sar2_clk_gated) };
sar2_clk_gated as u64
});
__bindgen_bitfield_unit.set(19usize, 8u8, {
let sar2_sample_num: u32 = unsafe { ::core::mem::transmute(sar2_sample_num) };
sar2_sample_num as u64
});
__bindgen_bitfield_unit.set(27usize, 1u8, {
let sar2_pwdet_force: u32 = unsafe { ::core::mem::transmute(sar2_pwdet_force) };
sar2_pwdet_force as u64
});
__bindgen_bitfield_unit.set(28usize, 1u8, {
let sar2_dig_force: u32 = unsafe { ::core::mem::transmute(sar2_dig_force) };
sar2_dig_force as u64
});
__bindgen_bitfield_unit.set(29usize, 1u8, {
let sar2_data_inv: u32 = unsafe { ::core::mem::transmute(sar2_data_inv) };
sar2_data_inv as u64
});
__bindgen_bitfield_unit.set(30usize, 2u8, {
let reserved30: u32 = unsafe { ::core::mem::transmute(reserved30) };
reserved30 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_20 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_20__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_20__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl sens_dev_s__bindgen_ty_20__bindgen_ty_1 {
#[inline]
pub fn meas2_data_sar(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 16u8) as u32) }
}
#[inline]
pub fn set_meas2_data_sar(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 16u8, val as u64)
}
}
#[inline]
pub fn meas2_done_sar(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_meas2_done_sar(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn meas2_start_sar(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 1u8) as u32) }
}
#[inline]
pub fn set_meas2_start_sar(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 1u8, val as u64)
}
}
#[inline]
pub fn meas2_start_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 1u8) as u32) }
}
#[inline]
pub fn set_meas2_start_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 1u8, val as u64)
}
}
#[inline]
pub fn sar2_en_pad(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 12u8) as u32) }
}
#[inline]
pub fn set_sar2_en_pad(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 12u8, val as u64)
}
}
#[inline]
pub fn sar2_en_pad_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(31usize, 1u8) as u32) }
}
#[inline]
pub fn set_sar2_en_pad_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(31usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
meas2_data_sar: u32,
meas2_done_sar: u32,
meas2_start_sar: u32,
meas2_start_force: u32,
sar2_en_pad: u32,
sar2_en_pad_force: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 16u8, {
let meas2_data_sar: u32 = unsafe { ::core::mem::transmute(meas2_data_sar) };
meas2_data_sar as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let meas2_done_sar: u32 = unsafe { ::core::mem::transmute(meas2_done_sar) };
meas2_done_sar as u64
});
__bindgen_bitfield_unit.set(17usize, 1u8, {
let meas2_start_sar: u32 = unsafe { ::core::mem::transmute(meas2_start_sar) };
meas2_start_sar as u64
});
__bindgen_bitfield_unit.set(18usize, 1u8, {
let meas2_start_force: u32 = unsafe { ::core::mem::transmute(meas2_start_force) };
meas2_start_force as u64
});
__bindgen_bitfield_unit.set(19usize, 12u8, {
let sar2_en_pad: u32 = unsafe { ::core::mem::transmute(sar2_en_pad) };
sar2_en_pad as u64
});
__bindgen_bitfield_unit.set(31usize, 1u8, {
let sar2_en_pad_force: u32 = unsafe { ::core::mem::transmute(sar2_en_pad_force) };
sar2_en_pad_force as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_21 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_21__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_21__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl sens_dev_s__bindgen_ty_21__bindgen_ty_1 {
#[inline]
pub fn sw_fstep(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 16u8) as u32) }
}
#[inline]
pub fn set_sw_fstep(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 16u8, val as u64)
}
}
#[inline]
pub fn sw_tone_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 1u8) as u32) }
}
#[inline]
pub fn set_sw_tone_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 1u8, val as u64)
}
}
#[inline]
pub fn debug_bit_sel(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 5u8) as u32) }
}
#[inline]
pub fn set_debug_bit_sel(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 5u8, val as u64)
}
}
#[inline]
pub fn dac_dig_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 1u8) as u32) }
}
#[inline]
pub fn set_dac_dig_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 1u8, val as u64)
}
}
#[inline]
pub fn dac_clk_force_low(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(23usize, 1u8) as u32) }
}
#[inline]
pub fn set_dac_clk_force_low(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(23usize, 1u8, val as u64)
}
}
#[inline]
pub fn dac_clk_force_high(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_dac_clk_force_high(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn dac_clk_inv(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 1u8) as u32) }
}
#[inline]
pub fn set_dac_clk_inv(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved26(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 6u8) as u32) }
}
#[inline]
pub fn set_reserved26(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 6u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
sw_fstep: u32,
sw_tone_en: u32,
debug_bit_sel: u32,
dac_dig_force: u32,
dac_clk_force_low: u32,
dac_clk_force_high: u32,
dac_clk_inv: u32,
reserved26: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 16u8, {
let sw_fstep: u32 = unsafe { ::core::mem::transmute(sw_fstep) };
sw_fstep as u64
});
__bindgen_bitfield_unit.set(16usize, 1u8, {
let sw_tone_en: u32 = unsafe { ::core::mem::transmute(sw_tone_en) };
sw_tone_en as u64
});
__bindgen_bitfield_unit.set(17usize, 5u8, {
let debug_bit_sel: u32 = unsafe { ::core::mem::transmute(debug_bit_sel) };
debug_bit_sel as u64
});
__bindgen_bitfield_unit.set(22usize, 1u8, {
let dac_dig_force: u32 = unsafe { ::core::mem::transmute(dac_dig_force) };
dac_dig_force as u64
});
__bindgen_bitfield_unit.set(23usize, 1u8, {
let dac_clk_force_low: u32 = unsafe { ::core::mem::transmute(dac_clk_force_low) };
dac_clk_force_low as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let dac_clk_force_high: u32 = unsafe { ::core::mem::transmute(dac_clk_force_high) };
dac_clk_force_high as u64
});
__bindgen_bitfield_unit.set(25usize, 1u8, {
let dac_clk_inv: u32 = unsafe { ::core::mem::transmute(dac_clk_inv) };
dac_clk_inv as u64
});
__bindgen_bitfield_unit.set(26usize, 6u8, {
let reserved26: u32 = unsafe { ::core::mem::transmute(reserved26) };
reserved26 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_22 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_22__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_22__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl sens_dev_s__bindgen_ty_22__bindgen_ty_1 {
#[inline]
pub fn dac_dc1(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_dac_dc1(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn dac_dc2(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 8u8) as u32) }
}
#[inline]
pub fn set_dac_dc2(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 8u8, val as u64)
}
}
#[inline]
pub fn dac_scale1(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 2u8) as u32) }
}
#[inline]
pub fn set_dac_scale1(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 2u8, val as u64)
}
}
#[inline]
pub fn dac_scale2(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 2u8) as u32) }
}
#[inline]
pub fn set_dac_scale2(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 2u8, val as u64)
}
}
#[inline]
pub fn dac_inv1(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(20usize, 2u8) as u32) }
}
#[inline]
pub fn set_dac_inv1(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(20usize, 2u8, val as u64)
}
}
#[inline]
pub fn dac_inv2(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 2u8) as u32) }
}
#[inline]
pub fn set_dac_inv2(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 2u8, val as u64)
}
}
#[inline]
pub fn dac_cw_en1(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_dac_cw_en1(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn dac_cw_en2(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 1u8) as u32) }
}
#[inline]
pub fn set_dac_cw_en2(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved26(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 6u8) as u32) }
}
#[inline]
pub fn set_reserved26(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 6u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
dac_dc1: u32,
dac_dc2: u32,
dac_scale1: u32,
dac_scale2: u32,
dac_inv1: u32,
dac_inv2: u32,
dac_cw_en1: u32,
dac_cw_en2: u32,
reserved26: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let dac_dc1: u32 = unsafe { ::core::mem::transmute(dac_dc1) };
dac_dc1 as u64
});
__bindgen_bitfield_unit.set(8usize, 8u8, {
let dac_dc2: u32 = unsafe { ::core::mem::transmute(dac_dc2) };
dac_dc2 as u64
});
__bindgen_bitfield_unit.set(16usize, 2u8, {
let dac_scale1: u32 = unsafe { ::core::mem::transmute(dac_scale1) };
dac_scale1 as u64
});
__bindgen_bitfield_unit.set(18usize, 2u8, {
let dac_scale2: u32 = unsafe { ::core::mem::transmute(dac_scale2) };
dac_scale2 as u64
});
__bindgen_bitfield_unit.set(20usize, 2u8, {
let dac_inv1: u32 = unsafe { ::core::mem::transmute(dac_inv1) };
dac_inv1 as u64
});
__bindgen_bitfield_unit.set(22usize, 2u8, {
let dac_inv2: u32 = unsafe { ::core::mem::transmute(dac_inv2) };
dac_inv2 as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let dac_cw_en1: u32 = unsafe { ::core::mem::transmute(dac_cw_en1) };
dac_cw_en1 as u64
});
__bindgen_bitfield_unit.set(25usize, 1u8, {
let dac_cw_en2: u32 = unsafe { ::core::mem::transmute(dac_cw_en2) };
dac_cw_en2 as u64
});
__bindgen_bitfield_unit.set(26usize, 6u8, {
let reserved26: u32 = unsafe { ::core::mem::transmute(reserved26) };
reserved26 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_23 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_23__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_23__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u16>,
}
impl sens_dev_s__bindgen_ty_23__bindgen_ty_1 {
#[inline]
pub fn sar1_dac_xpd_fsm(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 4u8) as u32) }
}
#[inline]
pub fn set_sar1_dac_xpd_fsm(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 4u8, val as u64)
}
}
#[inline]
pub fn sar1_dac_xpd_fsm_idle(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_sar1_dac_xpd_fsm_idle(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn xpd_sar_amp_fsm_idle(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_xpd_sar_amp_fsm_idle(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn amp_rst_fb_fsm_idle(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_amp_rst_fb_fsm_idle(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn amp_short_ref_fsm_idle(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_amp_short_ref_fsm_idle(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn amp_short_ref_gnd_fsm_idle(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_amp_short_ref_gnd_fsm_idle(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn xpd_sar_fsm_idle(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_xpd_sar_fsm_idle(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn sar_rstb_fsm_idle(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 1u8) as u32) }
}
#[inline]
pub fn set_sar_rstb_fsm_idle(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 1u8, val as u64)
}
}
#[inline]
pub fn sar2_rstb_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(11usize, 2u8) as u32) }
}
#[inline]
pub fn set_sar2_rstb_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(11usize, 2u8, val as u64)
}
}
#[inline]
pub fn amp_rst_fb_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 2u8) as u32) }
}
#[inline]
pub fn set_amp_rst_fb_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 2u8, val as u64)
}
}
#[inline]
pub fn amp_short_ref_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(15usize, 2u8) as u32) }
}
#[inline]
pub fn set_amp_short_ref_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(15usize, 2u8, val as u64)
}
}
#[inline]
pub fn amp_short_ref_gnd_force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(17usize, 2u8) as u32) }
}
#[inline]
pub fn set_amp_short_ref_gnd_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(17usize, 2u8, val as u64)
}
}
#[inline]
pub fn reserved19(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 13u8) as u32) }
}
#[inline]
pub fn set_reserved19(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 13u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
sar1_dac_xpd_fsm: u32,
sar1_dac_xpd_fsm_idle: u32,
xpd_sar_amp_fsm_idle: u32,
amp_rst_fb_fsm_idle: u32,
amp_short_ref_fsm_idle: u32,
amp_short_ref_gnd_fsm_idle: u32,
xpd_sar_fsm_idle: u32,
sar_rstb_fsm_idle: u32,
sar2_rstb_force: u32,
amp_rst_fb_force: u32,
amp_short_ref_force: u32,
amp_short_ref_gnd_force: u32,
reserved19: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 4u8, {
let sar1_dac_xpd_fsm: u32 = unsafe { ::core::mem::transmute(sar1_dac_xpd_fsm) };
sar1_dac_xpd_fsm as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let sar1_dac_xpd_fsm_idle: u32 =
unsafe { ::core::mem::transmute(sar1_dac_xpd_fsm_idle) };
sar1_dac_xpd_fsm_idle as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let xpd_sar_amp_fsm_idle: u32 = unsafe { ::core::mem::transmute(xpd_sar_amp_fsm_idle) };
xpd_sar_amp_fsm_idle as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let amp_rst_fb_fsm_idle: u32 = unsafe { ::core::mem::transmute(amp_rst_fb_fsm_idle) };
amp_rst_fb_fsm_idle as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let amp_short_ref_fsm_idle: u32 =
unsafe { ::core::mem::transmute(amp_short_ref_fsm_idle) };
amp_short_ref_fsm_idle as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let amp_short_ref_gnd_fsm_idle: u32 =
unsafe { ::core::mem::transmute(amp_short_ref_gnd_fsm_idle) };
amp_short_ref_gnd_fsm_idle as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let xpd_sar_fsm_idle: u32 = unsafe { ::core::mem::transmute(xpd_sar_fsm_idle) };
xpd_sar_fsm_idle as u64
});
__bindgen_bitfield_unit.set(10usize, 1u8, {
let sar_rstb_fsm_idle: u32 = unsafe { ::core::mem::transmute(sar_rstb_fsm_idle) };
sar_rstb_fsm_idle as u64
});
__bindgen_bitfield_unit.set(11usize, 2u8, {
let sar2_rstb_force: u32 = unsafe { ::core::mem::transmute(sar2_rstb_force) };
sar2_rstb_force as u64
});
__bindgen_bitfield_unit.set(13usize, 2u8, {
let amp_rst_fb_force: u32 = unsafe { ::core::mem::transmute(amp_rst_fb_force) };
amp_rst_fb_force as u64
});
__bindgen_bitfield_unit.set(15usize, 2u8, {
let amp_short_ref_force: u32 = unsafe { ::core::mem::transmute(amp_short_ref_force) };
amp_short_ref_force as u64
});
__bindgen_bitfield_unit.set(17usize, 2u8, {
let amp_short_ref_gnd_force: u32 =
unsafe { ::core::mem::transmute(amp_short_ref_gnd_force) };
amp_short_ref_gnd_force as u64
});
__bindgen_bitfield_unit.set(19usize, 13u8, {
let reserved19: u32 = unsafe { ::core::mem::transmute(reserved19) };
reserved19 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sens_dev_s__bindgen_ty_24 {
pub __bindgen_anon_1: sens_dev_s__bindgen_ty_24__bindgen_ty_1,
pub val: u32,
_bindgen_union_align: u32,
}
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct sens_dev_s__bindgen_ty_24__bindgen_ty_1 {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl sens_dev_s__bindgen_ty_24__bindgen_ty_1 {
#[inline]
pub fn sar_date(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 28u8) as u32) }
}
#[inline]
pub fn set_sar_date(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 28u8, val as u64)
}
}
#[inline]
pub fn reserved28(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(28usize, 4u8) as u32) }
}
#[inline]
pub fn set_reserved28(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(28usize, 4u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
sar_date: u32,
reserved28: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 28u8, {
let sar_date: u32 = unsafe { ::core::mem::transmute(sar_date) };
sar_date as u64
});
__bindgen_bitfield_unit.set(28usize, 4u8, {
let reserved28: u32 = unsafe { ::core::mem::transmute(reserved28) };
reserved28 as u64
});
__bindgen_bitfield_unit
}
}
pub type sens_dev_t = sens_dev_s;
extern "C" {
pub static mut SENS: sens_dev_t;
}
#[doc = " @brief Pin function information for a single RTCIO pad's."]
#[doc = ""]
#[doc = " This is an internal function of the driver, and is not usually useful"]
#[doc = " for external use."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct rtc_io_desc_t {
#[doc = "< Register of RTC pad, or 0 if not an RTC GPIO"]
pub reg: u32,
#[doc = "< Bit mask for selecting digital pad or RTC pad"]
pub mux: u32,
#[doc = "< Shift of pad function (FUN_SEL) field"]
pub func: u32,
#[doc = "< Mask of input enable"]
pub ie: u32,
#[doc = "< Mask of pullup enable"]
pub pullup: u32,
#[doc = "< Mask of pulldown enable"]
pub pulldown: u32,
#[doc = "< If slpsel bit is set, slpie will be used as pad input enabled signal in sleep mode"]
pub slpsel: u32,
#[doc = "< Mask of input enable in sleep mode"]
pub slpie: u32,
#[doc = "< Mask of output enable in sleep mode"]
pub slpoe: u32,
#[doc = "< Mask of hold enable"]
pub hold: u32,
#[doc = "< Mask of hold_force bit for RTC IO in RTC_CNTL_HOLD_REG"]
pub hold_force: u32,
#[doc = "< Mask of drive capability"]
pub drv_v: u32,
#[doc = "< Offset of drive capability"]
pub drv_s: u32,
#[doc = "< GPIO number (corresponds to RTC pad)"]
pub rtc_num: libc::c_int,
}
extern "C" {
pub static rtc_io_desc: [rtc_io_desc_t; 18usize];
}
extern "C" {
pub static rtc_io_num_map: [libc::c_int; 40usize];
}
#[repr(u32)]
#[doc = " @brief Possible main XTAL frequency values."]
#[doc = ""]
#[doc = " Enum values should be equal to frequency in MHz."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum rtc_xtal_freq_t {
#[doc = "!< Automatic XTAL frequency detection"]
RTC_XTAL_FREQ_AUTO = 0,
#[doc = "!< 40 MHz XTAL"]
RTC_XTAL_FREQ_40M = 40,
#[doc = "!< 26 MHz XTAL"]
RTC_XTAL_FREQ_26M = 26,
#[doc = "!< 24 MHz XTAL"]
RTC_XTAL_FREQ_24M = 24,
}
#[repr(u32)]
#[doc = " @brief CPU frequency values"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum rtc_cpu_freq_t {
#[doc = "!< Main XTAL frequency"]
RTC_CPU_FREQ_XTAL = 0,
#[doc = "!< 80 MHz"]
RTC_CPU_FREQ_80M = 1,
#[doc = "!< 160 MHz"]
RTC_CPU_FREQ_160M = 2,
#[doc = "!< 240 MHz"]
RTC_CPU_FREQ_240M = 3,
#[doc = "!< 2 MHz"]
RTC_CPU_FREQ_2M = 4,
}
#[repr(u32)]
#[doc = " @brief CPU clock source"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum rtc_cpu_freq_src_t {
#[doc = "!< XTAL"]
RTC_CPU_FREQ_SRC_XTAL = 0,
#[doc = "!< PLL (480M or 320M)"]
RTC_CPU_FREQ_SRC_PLL = 1,
#[doc = "!< Internal 8M RTC oscillator"]
RTC_CPU_FREQ_SRC_8M = 2,
#[doc = "!< APLL"]
RTC_CPU_FREQ_SRC_APLL = 3,
}
#[doc = " @brief CPU clock configuration structure"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct rtc_cpu_freq_config_s {
#[doc = "!< The clock from which CPU clock is derived"]
pub source: rtc_cpu_freq_src_t,
#[doc = "!< Source clock frequency"]
pub source_freq_mhz: u32,
#[doc = "!< Divider, freq_mhz = source_freq_mhz / div"]
pub div: u32,
#[doc = "!< CPU clock frequency"]
pub freq_mhz: u32,
}
pub type rtc_cpu_freq_config_t = rtc_cpu_freq_config_s;
#[repr(u32)]
#[doc = " @brief RTC SLOW_CLK frequency values"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum rtc_slow_freq_t {
#[doc = "!< Internal 150 kHz RC oscillator"]
RTC_SLOW_FREQ_RTC = 0,
#[doc = "!< External 32 kHz XTAL"]
RTC_SLOW_FREQ_32K_XTAL = 1,
#[doc = "!< Internal 8 MHz RC oscillator, divided by 256"]
RTC_SLOW_FREQ_8MD256 = 2,
}
#[repr(u32)]
#[doc = " @brief RTC FAST_CLK frequency values"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum rtc_fast_freq_t {
#[doc = "!< Main XTAL, divided by 4"]
RTC_FAST_FREQ_XTALD4 = 0,
#[doc = "!< Internal 8 MHz RC oscillator"]
RTC_FAST_FREQ_8M = 1,
}
#[repr(u32)]
#[doc = " @brief Clock source to be calibrated using rtc_clk_cal function"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum rtc_cal_sel_t {
#[doc = "!< Currently selected RTC SLOW_CLK"]
RTC_CAL_RTC_MUX = 0,
#[doc = "!< Internal 8 MHz RC oscillator, divided by 256"]
RTC_CAL_8MD256 = 1,
#[doc = "!< External 32 kHz XTAL"]
RTC_CAL_32K_XTAL = 2,
}
#[doc = " Initialization parameters for rtc_clk_init"]
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_clk_config_s {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 6usize], u16>,
pub __bindgen_padding_0: u16,
}
impl rtc_clk_config_s {
#[inline]
pub fn xtal_freq(&self) -> rtc_xtal_freq_t {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_xtal_freq(&mut self, val: rtc_xtal_freq_t) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn cpu_freq_mhz(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 10u8) as u32) }
}
#[inline]
pub fn set_cpu_freq_mhz(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 10u8, val as u64)
}
}
#[inline]
pub fn fast_freq(&self) -> rtc_fast_freq_t {
unsafe { ::core::mem::transmute(self._bitfield_1.get(18usize, 1u8) as u32) }
}
#[inline]
pub fn set_fast_freq(&mut self, val: rtc_fast_freq_t) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(18usize, 1u8, val as u64)
}
}
#[inline]
pub fn slow_freq(&self) -> rtc_slow_freq_t {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 2u8) as u32) }
}
#[inline]
pub fn set_slow_freq(&mut self, val: rtc_slow_freq_t) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 2u8, val as u64)
}
}
#[inline]
pub fn clk_8m_div(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(21usize, 3u8) as u32) }
}
#[inline]
pub fn set_clk_8m_div(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(21usize, 3u8, val as u64)
}
}
#[inline]
pub fn slow_clk_dcap(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 8u8) as u32) }
}
#[inline]
pub fn set_slow_clk_dcap(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 8u8, val as u64)
}
}
#[inline]
pub fn clk_8m_dfreq(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(32usize, 8u8) as u32) }
}
#[inline]
pub fn set_clk_8m_dfreq(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(32usize, 8u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
xtal_freq: rtc_xtal_freq_t,
cpu_freq_mhz: u32,
fast_freq: rtc_fast_freq_t,
slow_freq: rtc_slow_freq_t,
clk_8m_div: u32,
slow_clk_dcap: u32,
clk_8m_dfreq: u32,
) -> __BindgenBitfieldUnit<[u8; 6usize], u16> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 6usize], u16> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let xtal_freq: u32 = unsafe { ::core::mem::transmute(xtal_freq) };
xtal_freq as u64
});
__bindgen_bitfield_unit.set(8usize, 10u8, {
let cpu_freq_mhz: u32 = unsafe { ::core::mem::transmute(cpu_freq_mhz) };
cpu_freq_mhz as u64
});
__bindgen_bitfield_unit.set(18usize, 1u8, {
let fast_freq: u32 = unsafe { ::core::mem::transmute(fast_freq) };
fast_freq as u64
});
__bindgen_bitfield_unit.set(19usize, 2u8, {
let slow_freq: u32 = unsafe { ::core::mem::transmute(slow_freq) };
slow_freq as u64
});
__bindgen_bitfield_unit.set(21usize, 3u8, {
let clk_8m_div: u32 = unsafe { ::core::mem::transmute(clk_8m_div) };
clk_8m_div as u64
});
__bindgen_bitfield_unit.set(24usize, 8u8, {
let slow_clk_dcap: u32 = unsafe { ::core::mem::transmute(slow_clk_dcap) };
slow_clk_dcap as u64
});
__bindgen_bitfield_unit.set(32usize, 8u8, {
let clk_8m_dfreq: u32 = unsafe { ::core::mem::transmute(clk_8m_dfreq) };
clk_8m_dfreq as u64
});
__bindgen_bitfield_unit
}
}
pub type rtc_clk_config_t = rtc_clk_config_s;
extern "C" {
#[doc = " Initialize clocks and set CPU frequency"]
#[doc = ""]
#[doc = " If cfg.xtal_freq is set to RTC_XTAL_FREQ_AUTO, this function will attempt"]
#[doc = " to auto detect XTAL frequency. Auto detection is performed by comparing"]
#[doc = " XTAL frequency with the frequency of internal 8MHz oscillator. Note that at"]
#[doc = " high temperatures the frequency of the internal 8MHz oscillator may drift"]
#[doc = " enough for auto detection to be unreliable."]
#[doc = " Auto detection code will attempt to distinguish between 26MHz and 40MHz"]
#[doc = " crystals. 24 MHz crystals are not supported by auto detection code."]
#[doc = " If XTAL frequency can not be auto detected, this 26MHz frequency will be used."]
#[doc = ""]
#[doc = " @param cfg clock configuration as rtc_clk_config_t"]
pub fn rtc_clk_init(cfg: rtc_clk_config_t);
}
extern "C" {
#[doc = " @brief Get main XTAL frequency"]
#[doc = ""]
#[doc = " This is the value stored in RTC register RTC_XTAL_FREQ_REG by the bootloader. As passed to"]
#[doc = " rtc_clk_init function, or if the value was RTC_XTAL_FREQ_AUTO, the detected"]
#[doc = " XTAL frequency."]
#[doc = ""]
#[doc = " @return XTAL frequency, one of rtc_xtal_freq_t"]
pub fn rtc_clk_xtal_freq_get() -> rtc_xtal_freq_t;
}
extern "C" {
#[doc = " @brief Update XTAL frequency"]
#[doc = ""]
#[doc = " Updates the XTAL value stored in RTC_XTAL_FREQ_REG. Usually this value is ignored"]
#[doc = " after startup."]
#[doc = ""]
#[doc = " @param xtal_freq New frequency value"]
pub fn rtc_clk_xtal_freq_update(xtal_freq: rtc_xtal_freq_t);
}
extern "C" {
#[doc = " @brief Enable or disable 32 kHz XTAL oscillator"]
#[doc = " @param en true to enable, false to disable"]
pub fn rtc_clk_32k_enable(en: bool);
}
extern "C" {
#[doc = " @brief Configure 32 kHz XTAL oscillator to accept external clock signal"]
pub fn rtc_clk_32k_enable_external();
}
extern "C" {
#[doc = " @brief Get the state of 32k XTAL oscillator"]
#[doc = " @return true if 32k XTAL oscillator has been enabled"]
pub fn rtc_clk_32k_enabled() -> bool;
}
extern "C" {
#[doc = " @brief Enable 32k oscillator, configuring it for fast startup time."]
#[doc = " Note: to achieve higher frequency stability, rtc_clk_32k_enable function"]
#[doc = " must be called one the 32k XTAL oscillator has started up. This function"]
#[doc = " will initially disable the 32k XTAL oscillator, so it should not be called"]
#[doc = " when the system is using 32k XTAL as RTC_SLOW_CLK."]
#[doc = ""]
#[doc = " @param cycle Number of 32kHz cycles to bootstrap external crystal."]
#[doc = " If 0, no square wave will be used to bootstrap crystal oscillation."]
pub fn rtc_clk_32k_bootstrap(cycle: u32);
}
extern "C" {
#[doc = " @brief Enable or disable 8 MHz internal oscillator"]
#[doc = ""]
#[doc = " Output from 8 MHz internal oscillator is passed into a configurable"]
#[doc = " divider, which by default divides the input clock frequency by 256."]
#[doc = " Output of the divider may be used as RTC_SLOW_CLK source."]
#[doc = " Output of the divider is referred to in register descriptions and code as"]
#[doc = " 8md256 or simply d256. Divider values other than 256 may be configured, but"]
#[doc = " this facility is not currently needed, so is not exposed in the code."]
#[doc = ""]
#[doc = " When 8MHz/256 divided output is not needed, the divider should be disabled"]
#[doc = " to reduce power consumption."]
#[doc = ""]
#[doc = " @param clk_8m_en true to enable 8MHz generator"]
#[doc = " @param d256_en true to enable /256 divider"]
pub fn rtc_clk_8m_enable(clk_8m_en: bool, d256_en: bool);
}
extern "C" {
#[doc = " @brief Get the state of 8 MHz internal oscillator"]
#[doc = " @return true if the oscillator is enabled"]
pub fn rtc_clk_8m_enabled() -> bool;
}
extern "C" {
#[doc = " @brief Get the state of /256 divider which is applied to 8MHz clock"]
#[doc = " @return true if the divided output is enabled"]
pub fn rtc_clk_8md256_enabled() -> bool;
}
extern "C" {
#[doc = " @brief Enable or disable APLL"]
#[doc = ""]
#[doc = " Output frequency is given by the formula:"]
#[doc = " apll_freq = xtal_freq * (4 + sdm2 + sdm1/256 + sdm0/65536)/((o_div + 2) * 2)"]
#[doc = ""]
#[doc = " The dividend in this expression should be in the range of 240 - 600 MHz."]
#[doc = ""]
#[doc = " In rev. 0 of ESP32, sdm0 and sdm1 are unused and always set to 0."]
#[doc = ""]
#[doc = " @param enable true to enable, false to disable"]
#[doc = " @param sdm0 frequency adjustment parameter, 0..255"]
#[doc = " @param sdm1 frequency adjustment parameter, 0..255"]
#[doc = " @param sdm2 frequency adjustment parameter, 0..63"]
#[doc = " @param o_div frequency divider, 0..31"]
pub fn rtc_clk_apll_enable(enable: bool, sdm0: u32, sdm1: u32, sdm2: u32, o_div: u32);
}
extern "C" {
#[doc = " @brief Select source for RTC_SLOW_CLK"]
#[doc = " @param slow_freq clock source (one of rtc_slow_freq_t values)"]
pub fn rtc_clk_slow_freq_set(slow_freq: rtc_slow_freq_t);
}
extern "C" {
#[doc = " @brief Get the RTC_SLOW_CLK source"]
#[doc = " @return currently selected clock source (one of rtc_slow_freq_t values)"]
pub fn rtc_clk_slow_freq_get() -> rtc_slow_freq_t;
}
extern "C" {
#[doc = " @brief Get the approximate frequency of RTC_SLOW_CLK, in Hz"]
#[doc = ""]
#[doc = " - if RTC_SLOW_FREQ_RTC is selected, returns ~150000"]
#[doc = " - if RTC_SLOW_FREQ_32K_XTAL is selected, returns 32768"]
#[doc = " - if RTC_SLOW_FREQ_8MD256 is selected, returns ~33000"]
#[doc = ""]
#[doc = " rtc_clk_cal function can be used to get more precise value by comparing"]
#[doc = " RTC_SLOW_CLK frequency to the frequency of main XTAL."]
#[doc = ""]
#[doc = " @return RTC_SLOW_CLK frequency, in Hz"]
pub fn rtc_clk_slow_freq_get_hz() -> u32;
}
extern "C" {
#[doc = " @brief Select source for RTC_FAST_CLK"]
#[doc = " @param fast_freq clock source (one of rtc_fast_freq_t values)"]
pub fn rtc_clk_fast_freq_set(fast_freq: rtc_fast_freq_t);
}
extern "C" {
#[doc = " @brief Get the RTC_FAST_CLK source"]
#[doc = " @return currently selected clock source (one of rtc_fast_freq_t values)"]
pub fn rtc_clk_fast_freq_get() -> rtc_fast_freq_t;
}
extern "C" {
#[doc = " @brief Get CPU frequency config corresponding to a rtc_cpu_freq_t value"]
#[doc = " @param cpu_freq CPU frequency enumeration value"]
#[doc = " @param[out] out_config Output, CPU frequency configuration structure"]
pub fn rtc_clk_cpu_freq_to_config(
cpu_freq: rtc_cpu_freq_t,
out_config: *mut rtc_cpu_freq_config_t,
);
}
extern "C" {
#[doc = " @brief Get CPU frequency config for a given frequency"]
#[doc = " @param freq_mhz Frequency in MHz"]
#[doc = " @param[out] out_config Output, CPU frequency configuration structure"]
#[doc = " @return true if frequency can be obtained, false otherwise"]
pub fn rtc_clk_cpu_freq_mhz_to_config(
freq_mhz: u32,
out_config: *mut rtc_cpu_freq_config_t,
) -> bool;
}
extern "C" {
#[doc = " @brief Switch CPU frequency"]
#[doc = ""]
#[doc = " This function sets CPU frequency according to the given configuration"]
#[doc = " structure. It enables PLLs, if necessary."]
#[doc = ""]
#[doc = " @note This function in not intended to be called by applications in FreeRTOS"]
#[doc = " environment. This is because it does not adjust various timers based on the"]
#[doc = " new CPU frequency."]
#[doc = ""]
#[doc = " @param config CPU frequency configuration structure"]
pub fn rtc_clk_cpu_freq_set_config(config: *const rtc_cpu_freq_config_t);
}
extern "C" {
#[doc = " @brief Switch CPU frequency (optimized for speed)"]
#[doc = ""]
#[doc = " This function is a faster equivalent of rtc_clk_cpu_freq_set_config."]
#[doc = " It works faster because it does not disable PLLs when switching from PLL to"]
#[doc = " XTAL and does not enabled them when switching back. If PLL is not already"]
#[doc = " enabled when this function is called to switch from XTAL to PLL frequency,"]
#[doc = " or the PLL which is enabled is the wrong one, this function will fall back"]
#[doc = " to calling rtc_clk_cpu_freq_set_config."]
#[doc = ""]
#[doc = " Unlike rtc_clk_cpu_freq_set_config, this function relies on static data,"]
#[doc = " so it is less safe to use it e.g. from a panic handler (when memory might"]
#[doc = " be corrupted)."]
#[doc = ""]
#[doc = " @note This function in not intended to be called by applications in FreeRTOS"]
#[doc = " environment. This is because it does not adjust various timers based on the"]
#[doc = " new CPU frequency."]
#[doc = ""]
#[doc = " @param config CPU frequency configuration structure"]
pub fn rtc_clk_cpu_freq_set_config_fast(config: *const rtc_cpu_freq_config_t);
}
extern "C" {
#[doc = " @brief Get the currently used CPU frequency configuration"]
#[doc = " @param[out] out_config Output, CPU frequency configuration structure"]
pub fn rtc_clk_cpu_freq_get_config(out_config: *mut rtc_cpu_freq_config_t);
}
extern "C" {
#[doc = " @brief Switch CPU clock source to XTAL"]
#[doc = ""]
#[doc = " Short form for filling in rtc_cpu_freq_config_t structure and calling"]
#[doc = " rtc_clk_cpu_freq_set_config when a switch to XTAL is needed."]
#[doc = " Assumes that XTAL frequency has been determined —\u{a0}don't call in startup code."]
pub fn rtc_clk_cpu_freq_set_xtal();
}
extern "C" {
#[doc = " @brief Store new APB frequency value into RTC_APB_FREQ_REG"]
#[doc = ""]
#[doc = " This function doesn't change any hardware clocks."]
#[doc = ""]
#[doc = " Functions which perform frequency switching and change APB frequency call"]
#[doc = " this function to update the value of APB frequency stored in RTC_APB_FREQ_REG"]
#[doc = " (one of RTC general purpose retention registers). This should not normally"]
#[doc = " be called from application code."]
#[doc = ""]
#[doc = " @param apb_freq new APB frequency, in Hz"]
pub fn rtc_clk_apb_freq_update(apb_freq: u32);
}
extern "C" {
#[doc = " @brief Get the current stored APB frequency."]
#[doc = " @return The APB frequency value as last set via rtc_clk_apb_freq_update(), in Hz."]
pub fn rtc_clk_apb_freq_get() -> u32;
}
extern "C" {
#[doc = " @brief Measure RTC slow clock's period, based on main XTAL frequency"]
#[doc = ""]
#[doc = " This function will time out and return 0 if the time for the given number"]
#[doc = " of cycles to be counted exceeds the expected time twice. This may happen if"]
#[doc = " 32k XTAL is being calibrated, but the oscillator has not started up (due to"]
#[doc = " incorrect loading capacitance, board design issue, or lack of 32 XTAL on board)."]
#[doc = ""]
#[doc = " @param cal_clk clock to be measured"]
#[doc = " @param slow_clk_cycles number of slow clock cycles to average"]
#[doc = " @return average slow clock period in microseconds, Q13.19 fixed point format,"]
#[doc = " or 0 if calibration has timed out"]
pub fn rtc_clk_cal(cal_clk: rtc_cal_sel_t, slow_clk_cycles: u32) -> u32;
}
extern "C" {
#[doc = " @brief Measure ratio between XTAL frequency and RTC slow clock frequency"]
#[doc = " @param cal_clk slow clock to be measured"]
#[doc = " @param slow_clk_cycles number of slow clock cycles to average"]
#[doc = " @return average ratio between XTAL frequency and slow clock frequency,"]
#[doc = " Q13.19 fixed point format, or 0 if calibration has timed out."]
pub fn rtc_clk_cal_ratio(cal_clk: rtc_cal_sel_t, slow_clk_cycles: u32) -> u32;
}
extern "C" {
#[doc = " @brief Convert time interval from microseconds to RTC_SLOW_CLK cycles"]
#[doc = " @param time_in_us Time interval in microseconds"]
#[doc = " @param slow_clk_period Period of slow clock in microseconds, Q13.19"]
#[doc = " fixed point format (as returned by rtc_slowck_cali)."]
#[doc = " @return number of slow clock cycles"]
pub fn rtc_time_us_to_slowclk(time_in_us: u64, period: u32) -> u64;
}
extern "C" {
#[doc = " @brief Convert time interval from RTC_SLOW_CLK to microseconds"]
#[doc = " @param time_in_us Time interval in RTC_SLOW_CLK cycles"]
#[doc = " @param slow_clk_period Period of slow clock in microseconds, Q13.19"]
#[doc = " fixed point format (as returned by rtc_slowck_cali)."]
#[doc = " @return time interval in microseconds"]
pub fn rtc_time_slowclk_to_us(rtc_cycles: u64, period: u32) -> u64;
}
extern "C" {
#[doc = " @brief Get current value of RTC counter"]
#[doc = ""]
#[doc = " RTC has a 48-bit counter which is incremented by 2 every 2 RTC_SLOW_CLK"]
#[doc = " cycles. Counter value is not writable by software. The value is not adjusted"]
#[doc = " when switching to a different RTC_SLOW_CLK source."]
#[doc = ""]
#[doc = " Note: this function may take up to 1 RTC_SLOW_CLK cycle to execute"]
#[doc = ""]
#[doc = " @return current value of RTC counter"]
pub fn rtc_time_get() -> u64;
}
extern "C" {
#[doc = " @brief Busy loop until next RTC_SLOW_CLK cycle"]
#[doc = ""]
#[doc = " This function returns not earlier than the next RTC_SLOW_CLK clock cycle."]
#[doc = " In some cases (e.g. when RTC_SLOW_CLK cycle is very close), it may return"]
#[doc = " one RTC_SLOW_CLK cycle later."]
pub fn rtc_clk_wait_for_slow_cycle();
}
#[doc = " @brief sleep configuration for rtc_sleep_init function"]
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_sleep_config_s {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl rtc_sleep_config_s {
#[inline]
pub fn lslp_mem_inf_fpu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_lslp_mem_inf_fpu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_mem_inf_fpu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_mem_inf_fpu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_mem_inf_follow_cpu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_mem_inf_follow_cpu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_fastmem_pd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_fastmem_pd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_slowmem_pd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_slowmem_pd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_peri_pd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_peri_pd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 1u8, val as u64)
}
}
#[inline]
pub fn wifi_pd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(6usize, 1u8) as u32) }
}
#[inline]
pub fn set_wifi_pd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(6usize, 1u8, val as u64)
}
}
#[inline]
pub fn rom_mem_pd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 1u8) as u32) }
}
#[inline]
pub fn set_rom_mem_pd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 1u8, val as u64)
}
}
#[inline]
pub fn deep_slp(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 1u8) as u32) }
}
#[inline]
pub fn set_deep_slp(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 1u8, val as u64)
}
}
#[inline]
pub fn wdt_flashboot_mod_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(9usize, 1u8) as u32) }
}
#[inline]
pub fn set_wdt_flashboot_mod_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(9usize, 1u8, val as u64)
}
}
#[inline]
pub fn dig_dbias_wak(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(10usize, 3u8) as u32) }
}
#[inline]
pub fn set_dig_dbias_wak(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(10usize, 3u8, val as u64)
}
}
#[inline]
pub fn dig_dbias_slp(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(13usize, 3u8) as u32) }
}
#[inline]
pub fn set_dig_dbias_slp(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(13usize, 3u8, val as u64)
}
}
#[inline]
pub fn rtc_dbias_wak(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 3u8) as u32) }
}
#[inline]
pub fn set_rtc_dbias_wak(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 3u8, val as u64)
}
}
#[inline]
pub fn rtc_dbias_slp(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(19usize, 3u8) as u32) }
}
#[inline]
pub fn set_rtc_dbias_slp(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(19usize, 3u8, val as u64)
}
}
#[inline]
pub fn lslp_meminf_pd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(22usize, 1u8) as u32) }
}
#[inline]
pub fn set_lslp_meminf_pd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(22usize, 1u8, val as u64)
}
}
#[inline]
pub fn vddsdio_pd_en(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(23usize, 1u8) as u32) }
}
#[inline]
pub fn set_vddsdio_pd_en(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(23usize, 1u8, val as u64)
}
}
#[inline]
pub fn xtal_fpu(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_xtal_fpu(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
lslp_mem_inf_fpu: u32,
rtc_mem_inf_fpu: u32,
rtc_mem_inf_follow_cpu: u32,
rtc_fastmem_pd_en: u32,
rtc_slowmem_pd_en: u32,
rtc_peri_pd_en: u32,
wifi_pd_en: u32,
rom_mem_pd_en: u32,
deep_slp: u32,
wdt_flashboot_mod_en: u32,
dig_dbias_wak: u32,
dig_dbias_slp: u32,
rtc_dbias_wak: u32,
rtc_dbias_slp: u32,
lslp_meminf_pd: u32,
vddsdio_pd_en: u32,
xtal_fpu: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let lslp_mem_inf_fpu: u32 = unsafe { ::core::mem::transmute(lslp_mem_inf_fpu) };
lslp_mem_inf_fpu as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let rtc_mem_inf_fpu: u32 = unsafe { ::core::mem::transmute(rtc_mem_inf_fpu) };
rtc_mem_inf_fpu as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let rtc_mem_inf_follow_cpu: u32 =
unsafe { ::core::mem::transmute(rtc_mem_inf_follow_cpu) };
rtc_mem_inf_follow_cpu as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let rtc_fastmem_pd_en: u32 = unsafe { ::core::mem::transmute(rtc_fastmem_pd_en) };
rtc_fastmem_pd_en as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let rtc_slowmem_pd_en: u32 = unsafe { ::core::mem::transmute(rtc_slowmem_pd_en) };
rtc_slowmem_pd_en as u64
});
__bindgen_bitfield_unit.set(5usize, 1u8, {
let rtc_peri_pd_en: u32 = unsafe { ::core::mem::transmute(rtc_peri_pd_en) };
rtc_peri_pd_en as u64
});
__bindgen_bitfield_unit.set(6usize, 1u8, {
let wifi_pd_en: u32 = unsafe { ::core::mem::transmute(wifi_pd_en) };
wifi_pd_en as u64
});
__bindgen_bitfield_unit.set(7usize, 1u8, {
let rom_mem_pd_en: u32 = unsafe { ::core::mem::transmute(rom_mem_pd_en) };
rom_mem_pd_en as u64
});
__bindgen_bitfield_unit.set(8usize, 1u8, {
let deep_slp: u32 = unsafe { ::core::mem::transmute(deep_slp) };
deep_slp as u64
});
__bindgen_bitfield_unit.set(9usize, 1u8, {
let wdt_flashboot_mod_en: u32 = unsafe { ::core::mem::transmute(wdt_flashboot_mod_en) };
wdt_flashboot_mod_en as u64
});
__bindgen_bitfield_unit.set(10usize, 3u8, {
let dig_dbias_wak: u32 = unsafe { ::core::mem::transmute(dig_dbias_wak) };
dig_dbias_wak as u64
});
__bindgen_bitfield_unit.set(13usize, 3u8, {
let dig_dbias_slp: u32 = unsafe { ::core::mem::transmute(dig_dbias_slp) };
dig_dbias_slp as u64
});
__bindgen_bitfield_unit.set(16usize, 3u8, {
let rtc_dbias_wak: u32 = unsafe { ::core::mem::transmute(rtc_dbias_wak) };
rtc_dbias_wak as u64
});
__bindgen_bitfield_unit.set(19usize, 3u8, {
let rtc_dbias_slp: u32 = unsafe { ::core::mem::transmute(rtc_dbias_slp) };
rtc_dbias_slp as u64
});
__bindgen_bitfield_unit.set(22usize, 1u8, {
let lslp_meminf_pd: u32 = unsafe { ::core::mem::transmute(lslp_meminf_pd) };
lslp_meminf_pd as u64
});
__bindgen_bitfield_unit.set(23usize, 1u8, {
let vddsdio_pd_en: u32 = unsafe { ::core::mem::transmute(vddsdio_pd_en) };
vddsdio_pd_en as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let xtal_fpu: u32 = unsafe { ::core::mem::transmute(xtal_fpu) };
xtal_fpu as u64
});
__bindgen_bitfield_unit
}
}
pub type rtc_sleep_config_t = rtc_sleep_config_s;
extern "C" {
#[doc = " @brief Prepare the chip to enter sleep mode"]
#[doc = ""]
#[doc = " This function configures various power control state machines to handle"]
#[doc = " entry into light sleep or deep sleep mode, switches APB and CPU clock source"]
#[doc = " (usually to XTAL), and sets bias voltages for digital and RTC power domains."]
#[doc = ""]
#[doc = " This function does not actually enter sleep mode; this is done using"]
#[doc = " rtc_sleep_start function. Software may do some other actions between"]
#[doc = " rtc_sleep_init and rtc_sleep_start, such as set wakeup timer and configure"]
#[doc = " wakeup sources."]
#[doc = " @param cfg sleep mode configuration"]
pub fn rtc_sleep_init(cfg: rtc_sleep_config_t);
}
extern "C" {
#[doc = " @brief Set target value of RTC counter for RTC_TIMER_TRIG_EN wakeup source"]
#[doc = " @param t value of RTC counter at which wakeup from sleep will happen;"]
#[doc = " only the lower 48 bits are used"]
pub fn rtc_sleep_set_wakeup_time(t: u64);
}
extern "C" {
#[doc = " @brief Enter deep or light sleep mode"]
#[doc = ""]
#[doc = " This function enters the sleep mode previously configured using rtc_sleep_init"]
#[doc = " function. Before entering sleep, software should configure wake up sources"]
#[doc = " appropriately (set up GPIO wakeup registers, timer wakeup registers,"]
#[doc = " and so on)."]
#[doc = ""]
#[doc = " If deep sleep mode was configured using rtc_sleep_init, and sleep is not"]
#[doc = " rejected by hardware (based on reject_opt flags), this function never returns."]
#[doc = " When the chip wakes up from deep sleep, CPU is reset and execution starts"]
#[doc = " from ROM bootloader."]
#[doc = ""]
#[doc = " If light sleep mode was configured using rtc_sleep_init, this function"]
#[doc = " returns on wakeup, or if sleep is rejected by hardware."]
#[doc = ""]
#[doc = " @param wakeup_opt bit mask wake up reasons to enable (RTC_xxx_TRIG_EN flags"]
#[doc = " combined with OR)"]
#[doc = " @param reject_opt bit mask of sleep reject reasons:"]
#[doc = " - RTC_CNTL_GPIO_REJECT_EN"]
#[doc = " - RTC_CNTL_SDIO_REJECT_EN"]
#[doc = " These flags are used to prevent entering sleep when e.g."]
#[doc = " an external host is communicating via SDIO slave"]
#[doc = " @return non-zero if sleep was rejected by hardware"]
pub fn rtc_sleep_start(wakeup_opt: u32, reject_opt: u32) -> u32;
}
#[doc = " RTC power and clock control initialization settings"]
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_config_s {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u8>,
}
impl rtc_config_s {
#[inline]
pub fn ck8m_wait(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_ck8m_wait(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn xtal_wait(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 8u8) as u32) }
}
#[inline]
pub fn set_xtal_wait(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 8u8, val as u64)
}
}
#[inline]
pub fn pll_wait(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(16usize, 8u8) as u32) }
}
#[inline]
pub fn set_pll_wait(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(16usize, 8u8, val as u64)
}
}
#[inline]
pub fn clkctl_init(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(24usize, 1u8) as u32) }
}
#[inline]
pub fn set_clkctl_init(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(24usize, 1u8, val as u64)
}
}
#[inline]
pub fn pwrctl_init(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(25usize, 1u8) as u32) }
}
#[inline]
pub fn set_pwrctl_init(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(25usize, 1u8, val as u64)
}
}
#[inline]
pub fn rtc_dboost_fpd(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(26usize, 1u8) as u32) }
}
#[inline]
pub fn set_rtc_dboost_fpd(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(26usize, 1u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
ck8m_wait: u32,
xtal_wait: u32,
pll_wait: u32,
clkctl_init: u32,
pwrctl_init: u32,
rtc_dboost_fpd: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let ck8m_wait: u32 = unsafe { ::core::mem::transmute(ck8m_wait) };
ck8m_wait as u64
});
__bindgen_bitfield_unit.set(8usize, 8u8, {
let xtal_wait: u32 = unsafe { ::core::mem::transmute(xtal_wait) };
xtal_wait as u64
});
__bindgen_bitfield_unit.set(16usize, 8u8, {
let pll_wait: u32 = unsafe { ::core::mem::transmute(pll_wait) };
pll_wait as u64
});
__bindgen_bitfield_unit.set(24usize, 1u8, {
let clkctl_init: u32 = unsafe { ::core::mem::transmute(clkctl_init) };
clkctl_init as u64
});
__bindgen_bitfield_unit.set(25usize, 1u8, {
let pwrctl_init: u32 = unsafe { ::core::mem::transmute(pwrctl_init) };
pwrctl_init as u64
});
__bindgen_bitfield_unit.set(26usize, 1u8, {
let rtc_dboost_fpd: u32 = unsafe { ::core::mem::transmute(rtc_dboost_fpd) };
rtc_dboost_fpd as u64
});
__bindgen_bitfield_unit
}
}
pub type rtc_config_t = rtc_config_s;
extern "C" {
#[doc = " Initialize RTC clock and power control related functions"]
#[doc = " @param cfg configuration options as rtc_config_t"]
pub fn rtc_init(cfg: rtc_config_t);
}
#[doc = " Structure describing vddsdio configuration"]
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct rtc_vddsdio_config_s {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 2usize], u8>,
pub __bindgen_padding_0: u16,
}
impl rtc_vddsdio_config_s {
#[inline]
pub fn force(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_force(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn enable(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_enable(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn tieh(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_tieh(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn drefh(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 2u8) as u32) }
}
#[inline]
pub fn set_drefh(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 2u8, val as u64)
}
}
#[inline]
pub fn drefm(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 2u8) as u32) }
}
#[inline]
pub fn set_drefm(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 2u8, val as u64)
}
}
#[inline]
pub fn drefl(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(7usize, 2u8) as u32) }
}
#[inline]
pub fn set_drefl(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(7usize, 2u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
force: u32,
enable: u32,
tieh: u32,
drefh: u32,
drefm: u32,
drefl: u32,
) -> __BindgenBitfieldUnit<[u8; 2usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 2usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let force: u32 = unsafe { ::core::mem::transmute(force) };
force as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let enable: u32 = unsafe { ::core::mem::transmute(enable) };
enable as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let tieh: u32 = unsafe { ::core::mem::transmute(tieh) };
tieh as u64
});
__bindgen_bitfield_unit.set(3usize, 2u8, {
let drefh: u32 = unsafe { ::core::mem::transmute(drefh) };
drefh as u64
});
__bindgen_bitfield_unit.set(5usize, 2u8, {
let drefm: u32 = unsafe { ::core::mem::transmute(drefm) };
drefm as u64
});
__bindgen_bitfield_unit.set(7usize, 2u8, {
let drefl: u32 = unsafe { ::core::mem::transmute(drefl) };
drefl as u64
});
__bindgen_bitfield_unit
}
}
pub type rtc_vddsdio_config_t = rtc_vddsdio_config_s;
extern "C" {
#[doc = " Get current VDDSDIO configuration"]
#[doc = " If VDDSDIO configuration is overridden by RTC, get values from RTC"]
#[doc = " Otherwise, if VDDSDIO is configured by EFUSE, get values from EFUSE"]
#[doc = " Otherwise, use default values and the level of MTDI bootstrapping pin."]
#[doc = " @return currently used VDDSDIO configuration"]
pub fn rtc_vddsdio_get_config() -> rtc_vddsdio_config_t;
}
extern "C" {
#[doc = " Set new VDDSDIO configuration using RTC registers."]
#[doc = " If config.force == 1, this overrides configuration done using bootstrapping"]
#[doc = " pins and EFUSE."]
#[doc = ""]
#[doc = " @param config new VDDSDIO configuration"]
pub fn rtc_vddsdio_set_config(config: rtc_vddsdio_config_t);
}
#[repr(u32)]
#[doc = " @brief I2S port number, the max port number is (I2S_NUM_MAX -1)."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum i2s_port_t {
#[doc = "< I2S port 0"]
I2S_NUM_0 = 0,
#[doc = "< I2S port 1"]
I2S_NUM_1 = 1,
#[doc = "< I2S port max"]
I2S_NUM_MAX = 2,
}
#[repr(u32)]
#[doc = " @brief I2S bit width per sample."]
#[doc = ""]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum i2s_bits_per_sample_t {
#[doc = "< I2S bits per sample: 8-bits"]
I2S_BITS_PER_SAMPLE_8BIT = 8,
#[doc = "< I2S bits per sample: 16-bits"]
I2S_BITS_PER_SAMPLE_16BIT = 16,
#[doc = "< I2S bits per sample: 24-bits"]
I2S_BITS_PER_SAMPLE_24BIT = 24,
#[doc = "< I2S bits per sample: 32-bits"]
I2S_BITS_PER_SAMPLE_32BIT = 32,
}
#[repr(u32)]
#[doc = " @brief I2S channel."]
#[doc = ""]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum i2s_channel_t {
#[doc = "< I2S 1 channel (mono)"]
I2S_CHANNEL_MONO = 1,
#[doc = "< I2S 2 channel (stereo)"]
I2S_CHANNEL_STEREO = 2,
}
impl i2s_comm_format_t {
pub const I2S_COMM_FORMAT_I2S: i2s_comm_format_t = i2s_comm_format_t::I2S_COMM_FORMAT_STAND_I2S;
}
impl i2s_comm_format_t {
pub const I2S_COMM_FORMAT_I2S_MSB: i2s_comm_format_t =
i2s_comm_format_t::I2S_COMM_FORMAT_STAND_I2S;
}
impl i2s_comm_format_t {
pub const I2S_COMM_FORMAT_PCM: i2s_comm_format_t =
i2s_comm_format_t::I2S_COMM_FORMAT_STAND_PCM_SHORT;
}
impl i2s_comm_format_t {
pub const I2S_COMM_FORMAT_PCM_SHORT: i2s_comm_format_t =
i2s_comm_format_t::I2S_COMM_FORMAT_STAND_PCM_SHORT;
}
#[repr(u32)]
#[doc = " @brief I2S communication standard format"]
#[doc = ""]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum i2s_comm_format_t {
#[doc = "< I2S communication I2S Philips standard, data launch at second BCK"]
I2S_COMM_FORMAT_STAND_I2S = 1,
#[doc = "< I2S communication MSB alignment standard, data launch at first BCK"]
I2S_COMM_FORMAT_STAND_MSB = 3,
#[doc = "< PCM Short standard"]
I2S_COMM_FORMAT_STAND_PCM_SHORT = 4,
#[doc = "< PCM Long standard"]
I2S_COMM_FORMAT_STAND_PCM_LONG = 12,
#[doc = "< standard max"]
I2S_COMM_FORMAT_STAND_MAX = 13,
#[doc = "< I2S format LSB, (I2S_COMM_FORMAT_I2S |I2S_COMM_FORMAT_I2S_LSB) correspond to `I2S_COMM_FORMAT_STAND_MSB`"]
I2S_COMM_FORMAT_I2S_LSB = 2,
#[doc = "< PCM Long, (I2S_COMM_FORMAT_PCM | I2S_COMM_FORMAT_PCM_LONG) correspond to `I2S_COMM_FORMAT_STAND_PCM_LONG`"]
I2S_COMM_FORMAT_PCM_LONG = 8,
}
#[repr(u32)]
#[doc = " @brief I2S channel format type"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum i2s_channel_fmt_t {
I2S_CHANNEL_FMT_RIGHT_LEFT = 0,
I2S_CHANNEL_FMT_ALL_RIGHT = 1,
I2S_CHANNEL_FMT_ALL_LEFT = 2,
I2S_CHANNEL_FMT_ONLY_RIGHT = 3,
I2S_CHANNEL_FMT_ONLY_LEFT = 4,
}
#[repr(u32)]
#[doc = " @brief I2S Mode, defaut is I2S_MODE_MASTER | I2S_MODE_TX"]
#[doc = ""]
#[doc = " @note PDM and built-in DAC functions are only supported on I2S0 for current ESP32 chip."]
#[doc = ""]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum i2s_mode_t {
#[doc = "< Master mode"]
I2S_MODE_MASTER = 1,
#[doc = "< Slave mode"]
I2S_MODE_SLAVE = 2,
#[doc = "< TX mode"]
I2S_MODE_TX = 4,
#[doc = "< RX mode"]
I2S_MODE_RX = 8,
#[doc = "< Output I2S data to built-in DAC, no matter the data format is 16bit or 32 bit, the DAC module will only take the 8bits from MSB"]
I2S_MODE_DAC_BUILT_IN = 16,
#[doc = "< Input I2S data from built-in ADC, each data can be 12-bit width at most"]
I2S_MODE_ADC_BUILT_IN = 32,
#[doc = "< PDM mode"]
I2S_MODE_PDM = 64,
}
#[repr(u32)]
#[doc = " @brief I2S source clock"]
#[doc = ""]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum i2s_clock_src_t {
#[doc = "< Clock from PLL_D2_CLK(160M)"]
I2S_CLK_D2CLK = 0,
#[doc = "< Clock from APLL"]
I2S_CLK_APLL = 1,
}
#[doc = " @brief I2S configuration parameters for i2s_param_config function"]
#[doc = ""]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct i2s_config_t {
#[doc = "< I2S work mode"]
pub mode: i2s_mode_t,
#[doc = "< I2S sample rate"]
pub sample_rate: libc::c_int,
#[doc = "< I2S bits per sample"]
pub bits_per_sample: i2s_bits_per_sample_t,
#[doc = "< I2S channel format"]
pub channel_format: i2s_channel_fmt_t,
#[doc = "< I2S communication format"]
pub communication_format: i2s_comm_format_t,
#[doc = "< Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info"]
pub intr_alloc_flags: libc::c_int,
#[doc = "< I2S DMA Buffer Count"]
pub dma_buf_count: libc::c_int,
#[doc = "< I2S DMA Buffer Length"]
pub dma_buf_len: libc::c_int,
#[doc = "< I2S using APLL as main I2S clock, enable it to get accurate clock"]
pub use_apll: bool,
#[doc = "< I2S auto clear tx descriptor if there is underflow condition (helps in avoiding noise in case of data unavailability)"]
pub tx_desc_auto_clear: bool,
#[doc = "< I2S using fixed MCLK output. If use_apll = true and fixed_mclk > 0, then the clock output for i2s is fixed and equal to the fixed_mclk value."]
pub fixed_mclk: libc::c_int,
}
#[repr(u32)]
#[doc = " @brief I2S event types"]
#[doc = ""]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum i2s_event_type_t {
I2S_EVENT_DMA_ERROR = 0,
#[doc = "< I2S DMA finish sent 1 buffer"]
I2S_EVENT_TX_DONE = 1,
#[doc = "< I2S DMA finish received 1 buffer"]
I2S_EVENT_RX_DONE = 2,
#[doc = "< I2S event max index"]
I2S_EVENT_MAX = 3,
}
#[repr(u32)]
#[doc = " @brief I2S DAC mode for i2s_set_dac_mode."]
#[doc = ""]
#[doc = " @note PDM and built-in DAC functions are only supported on I2S0 for current ESP32 chip."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum i2s_dac_mode_t {
#[doc = "< Disable I2S built-in DAC signals"]
I2S_DAC_CHANNEL_DISABLE = 0,
#[doc = "< Enable I2S built-in DAC right channel, maps to DAC channel 1 on GPIO25"]
I2S_DAC_CHANNEL_RIGHT_EN = 1,
#[doc = "< Enable I2S built-in DAC left channel, maps to DAC channel 2 on GPIO26"]
I2S_DAC_CHANNEL_LEFT_EN = 2,
#[doc = "< Enable both of the I2S built-in DAC channels."]
I2S_DAC_CHANNEL_BOTH_EN = 3,
#[doc = "< I2S built-in DAC mode max index"]
I2S_DAC_CHANNEL_MAX = 4,
}
#[doc = " @brief Event structure used in I2S event queue"]
#[doc = ""]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct i2s_event_t {
#[doc = "< I2S event type"]
pub type_: i2s_event_type_t,
#[doc = "< I2S data size for I2S_DATA event"]
pub size: size_t,
}
#[doc = " @brief I2S pin number for i2s_set_pin"]
#[doc = ""]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct i2s_pin_config_t {
#[doc = "< BCK in out pin"]
pub bck_io_num: libc::c_int,
#[doc = "< WS in out pin"]
pub ws_io_num: libc::c_int,
#[doc = "< DATA out pin"]
pub data_out_num: libc::c_int,
#[doc = "< DATA in pin"]
pub data_in_num: libc::c_int,
}
#[repr(u32)]
#[doc = " @brief I2S PDM RX downsample mode"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum i2s_pdm_dsr_t {
#[doc = "< downsampling number is 8 for PDM RX mode"]
I2S_PDM_DSR_8S = 0,
#[doc = "< downsampling number is 16 for PDM RX mode"]
I2S_PDM_DSR_16S = 1,
I2S_PDM_DSR_MAX = 2,
}
#[repr(u32)]
#[doc = " @brief PDM PCM convter enable/disable."]
#[doc = ""]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum pdm_pcm_conv_t {
#[doc = "< Enable PDM PCM convert"]
PDM_PCM_CONV_ENABLE = 0,
#[doc = "< Disable PDM PCM convert"]
PDM_PCM_CONV_DISABLE = 1,
}
#[doc = " Context that should be maintained by both the driver and the HAL"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct i2s_hal_context_t {
pub dev: *mut i2s_dev_t,
pub version: u32,
}
extern "C" {
#[doc = " @brief Reset I2S fifo"]
#[doc = ""]
#[doc = " @param hal Context of the HAL layer"]
pub fn i2s_hal_reset_fifo(hal: *mut i2s_hal_context_t);
}
extern "C" {
#[doc = " @brief Set I2S tx mode"]
#[doc = ""]
#[doc = " @param hal Context of the HAL layer"]
#[doc = " @param ch i2s channel"]
#[doc = " @param bits bits per sample"]
pub fn i2s_hal_set_tx_mode(
hal: *mut i2s_hal_context_t,
ch: i2s_channel_t,
bits: i2s_bits_per_sample_t,
);
}
extern "C" {
#[doc = " @brief Set I2S rx mode"]
#[doc = ""]
#[doc = " @param hal Context of the HAL layer"]
#[doc = " @param ch i2s channel"]
#[doc = " @param bits bits per sample"]
pub fn i2s_hal_set_rx_mode(
hal: *mut i2s_hal_context_t,
ch: i2s_channel_t,
bits: i2s_bits_per_sample_t,
);
}
extern "C" {
#[doc = " @brief Set I2S in link"]
#[doc = ""]
#[doc = " @param hal Context of the HAL layer"]
#[doc = " @param rx_eof_num in link eof num"]
#[doc = " @param addr in link address"]
pub fn i2s_hal_set_in_link(hal: *mut i2s_hal_context_t, rx_eof_num: u32, addr: u32);
}
extern "C" {
#[doc = " @brief Get I2S tx pdm"]
#[doc = ""]
#[doc = " @param hal Context of the HAL layer"]
#[doc = " @param fp tx pdm fp"]
#[doc = " @param fs tx pdm fs"]
pub fn i2s_hal_get_tx_pdm(
hal: *mut i2s_hal_context_t,
fp: *mut libc::c_int,
fs: *mut libc::c_int,
);
}
extern "C" {
#[doc = " @brief Set I2S clk div"]
#[doc = ""]
#[doc = " @param hal Context of the HAL layer"]
#[doc = " @param div_num i2s clkm div num"]
#[doc = " @param div_a i2s clkm div a"]
#[doc = " @param div_b i2s clkm div b"]
#[doc = " @param tx_bck_div tx bck div num"]
#[doc = " @param rx_bck_div rx bck div num"]
pub fn i2s_hal_set_clk_div(
hal: *mut i2s_hal_context_t,
div_num: libc::c_int,
div_a: libc::c_int,
div_b: libc::c_int,
tx_bck_div: libc::c_int,
rx_bck_div: libc::c_int,
);
}
extern "C" {
#[doc = " @brief Set I2S tx bits mod"]
#[doc = ""]
#[doc = " @param hal Context of the HAL layer"]
#[doc = " @param bits bit width per sample."]
pub fn i2s_hal_set_tx_bits_mod(hal: *mut i2s_hal_context_t, bits: i2s_bits_per_sample_t);
}
extern "C" {
#[doc = " @brief Set I2S rx bits mod"]
#[doc = ""]
#[doc = " @param hal Context of the HAL layer"]
#[doc = " @param bits bit width per sample."]
pub fn i2s_hal_set_rx_bits_mod(hal: *mut i2s_hal_context_t, bits: i2s_bits_per_sample_t);
}
extern "C" {
#[doc = " @brief Reset I2S tx"]
#[doc = ""]
#[doc = " @param hal Context of the HAL layer"]
pub fn i2s_hal_reset(hal: *mut i2s_hal_context_t);
}
extern "C" {
#[doc = " @brief Start I2S tx"]
#[doc = ""]
#[doc = " @param hal Context of the HAL layer"]
pub fn i2s_hal_start_tx(hal: *mut i2s_hal_context_t);
}
extern "C" {
#[doc = " @brief Start I2S rx"]
#[doc = ""]
#[doc = " @param hal Context of the HAL layer"]
pub fn i2s_hal_start_rx(hal: *mut i2s_hal_context_t);
}
extern "C" {
#[doc = " @brief Stop I2S tx"]
#[doc = ""]
#[doc = " @param hal Context of the HAL layer"]
pub fn i2s_hal_stop_tx(hal: *mut i2s_hal_context_t);
}
extern "C" {
#[doc = " @brief Stop I2S rx"]
#[doc = ""]
#[doc = " @param hal Context of the HAL layer"]
pub fn i2s_hal_stop_rx(hal: *mut i2s_hal_context_t);
}
extern "C" {
#[doc = " @brief Config I2S param"]
#[doc = ""]
#[doc = " @param hal Context of the HAL layer"]
#[doc = " @param i2s_config I2S configurations - see i2s_config_t struct"]
pub fn i2s_hal_config_param(hal: *mut i2s_hal_context_t, i2s_config: *const i2s_config_t);
}
extern "C" {
#[doc = " @brief Enable I2S master mode"]
#[doc = ""]
#[doc = " @param hal Context of the HAL layer"]
pub fn i2s_hal_enable_master_mode(hal: *mut i2s_hal_context_t);
}
extern "C" {
#[doc = " @brief Enable I2S slave mode"]
#[doc = ""]
#[doc = " @param hal Context of the HAL layer"]
pub fn i2s_hal_enable_slave_mode(hal: *mut i2s_hal_context_t);
}
extern "C" {
#[doc = " @brief Init the I2S hal and set the I2S to the default configuration. This function should be called first before other hal layer function is called"]
#[doc = ""]
#[doc = " @param hal Context of the HAL layer"]
#[doc = " @param i2s_num The uart port number, the max port number is (I2S_NUM_MAX -1)"]
pub fn i2s_hal_init(hal: *mut i2s_hal_context_t, i2s_num: libc::c_int);
}
extern "C" {
#[doc = " @brief enable peripheral module"]
#[doc = ""]
#[doc = " @param[in] periph : Peripheral module name"]
#[doc = ""]
#[doc = " Clock for the module will be ungated, and reset de-asserted."]
#[doc = ""]
#[doc = " @note If periph_module_enable is called a number of times,"]
#[doc = " periph_module_disable has to be called the same number of times"]
#[doc = " in order to put the peripheral into disabled state."]
#[doc = ""]
#[doc = " @return NULL"]
#[doc = ""]
pub fn periph_module_enable(periph: periph_module_t);
}
extern "C" {
#[doc = " @brief disable peripheral module"]
#[doc = ""]
#[doc = " @param[in] periph : Peripheral module name"]
#[doc = ""]
#[doc = " Clock for the module will be gated, reset asserted."]
#[doc = ""]
#[doc = " @note If periph_module_enable is called a number of times,"]
#[doc = " periph_module_disable has to be called the same number of times"]
#[doc = " in order to put the peripheral into disabled state."]
#[doc = ""]
#[doc = " @return NULL"]
#[doc = ""]
pub fn periph_module_disable(periph: periph_module_t);
}
extern "C" {
#[doc = " @brief reset peripheral module"]
#[doc = ""]
#[doc = " @param[in] periph : Peripheral module name"]
#[doc = ""]
#[doc = " Reset will asserted then de-assrted for the peripheral."]
#[doc = ""]
#[doc = " Calling this function does not enable or disable the clock for the module."]
#[doc = ""]
#[doc = " @return NULL"]
#[doc = ""]
pub fn periph_module_reset(periph: periph_module_t);
}
pub type i2s_isr_handle_t = intr_handle_t;
extern "C" {
#[doc = " @brief Set I2S pin number"]
#[doc = ""]
#[doc = " @note"]
#[doc = " The I2S peripheral output signals can be connected to multiple GPIO pads."]
#[doc = " However, the I2S peripheral input signal can only be connected to one GPIO pad."]
#[doc = ""]
#[doc = " @param i2s_num I2S_NUM_0 or I2S_NUM_1"]
#[doc = ""]
#[doc = " @param pin I2S Pin structure, or NULL to set 2-channel 8-bit internal DAC pin configuration (GPIO25 & GPIO26)"]
#[doc = ""]
#[doc = " Inside the pin configuration structure, set I2S_PIN_NO_CHANGE for any pin where"]
#[doc = " the current configuration should not be changed."]
#[doc = ""]
#[doc = " @note if *pin is set as NULL, this function will initialize both of the built-in DAC channels by default."]
#[doc = " if you don't want this to happen and you want to initialize only one of the DAC channels, you can call i2s_set_dac_mode instead."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
#[doc = " - ESP_FAIL IO error"]
pub fn i2s_set_pin(i2s_num: i2s_port_t, pin: *const i2s_pin_config_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set PDM mode down-sample rate"]
#[doc = " In PDM RX mode, there would be 2 rounds of downsample process in hardware."]
#[doc = " In the first downsample process, the sampling number can be 16 or 8."]
#[doc = " In the second downsample process, the sampling number is fixed as 8."]
#[doc = " So the clock frequency in PDM RX mode would be (fpcm * 64) or (fpcm * 128) accordingly."]
#[doc = " @param i2s_num I2S_NUM_0, I2S_NUM_1"]
#[doc = " @param dsr i2s RX down sample rate for PDM mode."]
#[doc = ""]
#[doc = " @note After calling this function, it would call i2s_set_clk inside to update the clock frequency."]
#[doc = " Please call this function after I2S driver has been initialized."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
#[doc = " - ESP_ERR_NO_MEM Out of memory"]
pub fn i2s_set_pdm_rx_down_sample(i2s_num: i2s_port_t, dsr: i2s_pdm_dsr_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set I2S dac mode, I2S built-in DAC is disabled by default"]
#[doc = ""]
#[doc = " @param dac_mode DAC mode configurations - see i2s_dac_mode_t"]
#[doc = ""]
#[doc = " @note Built-in DAC functions are only supported on I2S0 for current ESP32 chip."]
#[doc = " If either of the built-in DAC channel are enabled, the other one can not"]
#[doc = " be used as RTC DAC function at the same time."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2s_set_dac_mode(dac_mode: i2s_dac_mode_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Install and start I2S driver."]
#[doc = ""]
#[doc = " @param i2s_num I2S_NUM_0, I2S_NUM_1"]
#[doc = ""]
#[doc = " @param i2s_config I2S configurations - see i2s_config_t struct"]
#[doc = ""]
#[doc = " @param queue_size I2S event queue size/depth."]
#[doc = ""]
#[doc = " @param i2s_queue I2S event queue handle, if set NULL, driver will not use an event queue."]
#[doc = ""]
#[doc = " This function must be called before any I2S driver read/write operations."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
#[doc = " - ESP_ERR_NO_MEM Out of memory"]
pub fn i2s_driver_install(
i2s_num: i2s_port_t,
i2s_config: *const i2s_config_t,
queue_size: libc::c_int,
i2s_queue: *mut libc::c_void,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Uninstall I2S driver."]
#[doc = ""]
#[doc = " @param i2s_num I2S_NUM_0, I2S_NUM_1"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2s_driver_uninstall(i2s_num: i2s_port_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Write data to I2S DMA transmit buffer."]
#[doc = ""]
#[doc = " @param i2s_num I2S_NUM_0, I2S_NUM_1"]
#[doc = ""]
#[doc = " @param src Source address to write from"]
#[doc = ""]
#[doc = " @param size Size of data in bytes"]
#[doc = ""]
#[doc = " @param[out] bytes_written Number of bytes written, if timeout, the result will be less than the size passed in."]
#[doc = ""]
#[doc = " @param ticks_to_wait TX buffer wait timeout in RTOS ticks. If this"]
#[doc = " many ticks pass without space becoming available in the DMA"]
#[doc = " transmit buffer, then the function will return (note that if the"]
#[doc = " data is written to the DMA buffer in pieces, the overall operation"]
#[doc = " may still take longer than this timeout.) Pass portMAX_DELAY for no"]
#[doc = " timeout."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2s_write(
i2s_num: i2s_port_t,
src: *const libc::c_void,
size: size_t,
bytes_written: *mut size_t,
ticks_to_wait: TickType_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Write data to I2S DMA transmit buffer while expanding the number of bits per sample. For example, expanding 16-bit PCM to 32-bit PCM."]
#[doc = ""]
#[doc = " @param i2s_num I2S_NUM_0, I2S_NUM_1"]
#[doc = ""]
#[doc = " @param src Source address to write from"]
#[doc = ""]
#[doc = " @param size Size of data in bytes"]
#[doc = ""]
#[doc = " @param src_bits Source audio bit"]
#[doc = ""]
#[doc = " @param aim_bits Bit wanted, no more than 32, and must be greater than src_bits"]
#[doc = ""]
#[doc = " @param[out] bytes_written Number of bytes written, if timeout, the result will be less than the size passed in."]
#[doc = ""]
#[doc = " @param ticks_to_wait TX buffer wait timeout in RTOS ticks. If this"]
#[doc = " many ticks pass without space becoming available in the DMA"]
#[doc = " transmit buffer, then the function will return (note that if the"]
#[doc = " data is written to the DMA buffer in pieces, the overall operation"]
#[doc = " may still take longer than this timeout.) Pass portMAX_DELAY for no"]
#[doc = " timeout."]
#[doc = ""]
#[doc = " Format of the data in source buffer is determined by the I2S"]
#[doc = " configuration (see i2s_config_t)."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2s_write_expand(
i2s_num: i2s_port_t,
src: *const libc::c_void,
size: size_t,
src_bits: size_t,
aim_bits: size_t,
bytes_written: *mut size_t,
ticks_to_wait: TickType_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Read data from I2S DMA receive buffer"]
#[doc = ""]
#[doc = " @param i2s_num I2S_NUM_0, I2S_NUM_1"]
#[doc = ""]
#[doc = " @param dest Destination address to read into"]
#[doc = ""]
#[doc = " @param size Size of data in bytes"]
#[doc = ""]
#[doc = " @param[out] bytes_read Number of bytes read, if timeout, bytes read will be less than the size passed in."]
#[doc = ""]
#[doc = " @param ticks_to_wait RX buffer wait timeout in RTOS ticks. If this many ticks pass without bytes becoming available in the DMA receive buffer, then the function will return (note that if data is read from the DMA buffer in pieces, the overall operation may still take longer than this timeout.) Pass portMAX_DELAY for no timeout."]
#[doc = ""]
#[doc = " @note If the built-in ADC mode is enabled, we should call i2s_adc_enable and i2s_adc_disable around the whole reading process,"]
#[doc = " to prevent the data getting corrupted."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2s_read(
i2s_num: i2s_port_t,
dest: *mut libc::c_void,
size: size_t,
bytes_read: *mut size_t,
ticks_to_wait: TickType_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set sample rate used for I2S RX and TX."]
#[doc = ""]
#[doc = " The bit clock rate is determined by the sample rate and i2s_config_t configuration parameters (number of channels, bits_per_sample)."]
#[doc = ""]
#[doc = " `bit_clock = rate * (number of channels) * bits_per_sample`"]
#[doc = ""]
#[doc = " @param i2s_num I2S_NUM_0, I2S_NUM_1"]
#[doc = ""]
#[doc = " @param rate I2S sample rate (ex: 8000, 44100...)"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
#[doc = " - ESP_ERR_NO_MEM Out of memory"]
pub fn i2s_set_sample_rates(i2s_num: i2s_port_t, rate: u32) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Stop I2S driver"]
#[doc = ""]
#[doc = " There is no need to call i2s_stop() before calling i2s_driver_uninstall()."]
#[doc = ""]
#[doc = " Disables I2S TX/RX, until i2s_start() is called."]
#[doc = ""]
#[doc = " @param i2s_num I2S_NUM_0, I2S_NUM_1"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2s_stop(i2s_num: i2s_port_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Start I2S driver"]
#[doc = ""]
#[doc = " It is not necessary to call this function after i2s_driver_install() (it is started automatically), however it is necessary to call it after i2s_stop()."]
#[doc = ""]
#[doc = ""]
#[doc = " @param i2s_num I2S_NUM_0, I2S_NUM_1"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2s_start(i2s_num: i2s_port_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Zero the contents of the TX DMA buffer."]
#[doc = ""]
#[doc = " Pushes zero-byte samples into the TX DMA buffer, until it is full."]
#[doc = ""]
#[doc = " @param i2s_num I2S_NUM_0, I2S_NUM_1"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2s_zero_dma_buffer(i2s_num: i2s_port_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set clock & bit width used for I2S RX and TX."]
#[doc = ""]
#[doc = " Similar to i2s_set_sample_rates(), but also sets bit width."]
#[doc = ""]
#[doc = " @param i2s_num I2S_NUM_0, I2S_NUM_1"]
#[doc = ""]
#[doc = " @param rate I2S sample rate (ex: 8000, 44100...)"]
#[doc = ""]
#[doc = " @param bits I2S bit width (I2S_BITS_PER_SAMPLE_16BIT, I2S_BITS_PER_SAMPLE_24BIT, I2S_BITS_PER_SAMPLE_32BIT)"]
#[doc = ""]
#[doc = " @param ch I2S channel, (I2S_CHANNEL_MONO, I2S_CHANNEL_STEREO)"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
#[doc = " - ESP_ERR_NO_MEM Out of memory"]
pub fn i2s_set_clk(
i2s_num: i2s_port_t,
rate: u32,
bits: i2s_bits_per_sample_t,
ch: i2s_channel_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief get clock set on particular port number."]
#[doc = ""]
#[doc = " @param i2s_num I2S_NUM_0, I2S_NUM_1"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - actual clock set by i2s driver"]
pub fn i2s_get_clk(i2s_num: i2s_port_t) -> f32;
}
extern "C" {
#[doc = " @brief Set built-in ADC mode for I2S DMA, this function will initialize ADC pad,"]
#[doc = " and set ADC parameters."]
#[doc = " @param adc_unit SAR ADC unit index"]
#[doc = " @param adc_channel ADC channel index"]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn i2s_set_adc_mode(adc_unit: adc_unit_t, adc_channel: adc1_channel_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Start to use I2S built-in ADC mode"]
#[doc = " @note This function would acquire the lock of ADC to prevent the data getting corrupted"]
#[doc = " during the I2S peripheral is being used to do fully continuous ADC sampling."]
#[doc = ""]
#[doc = " @param i2s_num i2s port index"]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
#[doc = " - ESP_ERR_INVALID_STATE Driver state error"]
pub fn i2s_adc_enable(i2s_num: i2s_port_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Stop to use I2S built-in ADC mode"]
#[doc = " @param i2s_num i2s port index"]
#[doc = " @note This function would release the lock of ADC so that other tasks can use ADC."]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
#[doc = " - ESP_ERR_INVALID_STATE Driver state error"]
pub fn i2s_adc_disable(i2s_num: i2s_port_t) -> esp_err_t;
}
#[doc = " @brief UART port number, can be UART_NUM_0 ~ (UART_NUM_MAX -1)."]
pub type uart_port_t = libc::c_int;
#[repr(u32)]
#[doc = " @brief UART mode selection"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum uart_mode_t {
#[doc = "< mode: regular UART mode"]
UART_MODE_UART = 0,
#[doc = "< mode: half duplex RS485 UART mode control by RTS pin"]
UART_MODE_RS485_HALF_DUPLEX = 1,
#[doc = "< mode: IRDA UART mode"]
UART_MODE_IRDA = 2,
#[doc = "< mode: RS485 collision detection UART mode (used for test purposes)"]
UART_MODE_RS485_COLLISION_DETECT = 3,
#[doc = "< mode: application control RS485 UART mode (used for test purposes)"]
UART_MODE_RS485_APP_CTRL = 4,
}
#[repr(u32)]
#[doc = " @brief UART word length constants"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum uart_word_length_t {
#[doc = "< word length: 5bits"]
UART_DATA_5_BITS = 0,
#[doc = "< word length: 6bits"]
UART_DATA_6_BITS = 1,
#[doc = "< word length: 7bits"]
UART_DATA_7_BITS = 2,
#[doc = "< word length: 8bits"]
UART_DATA_8_BITS = 3,
UART_DATA_BITS_MAX = 4,
}
#[repr(u32)]
#[doc = " @brief UART stop bits number"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum uart_stop_bits_t {
#[doc = "< stop bit: 1bit"]
UART_STOP_BITS_1 = 1,
#[doc = "< stop bit: 1.5bits"]
UART_STOP_BITS_1_5 = 2,
#[doc = "< stop bit: 2bits"]
UART_STOP_BITS_2 = 3,
UART_STOP_BITS_MAX = 4,
}
#[repr(u32)]
#[doc = " @brief UART parity constants"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum uart_parity_t {
#[doc = "< Disable UART parity"]
UART_PARITY_DISABLE = 0,
#[doc = "< Enable UART even parity"]
UART_PARITY_EVEN = 2,
#[doc = "< Enable UART odd parity"]
UART_PARITY_ODD = 3,
}
#[repr(u32)]
#[doc = " @brief UART hardware flow control modes"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum uart_hw_flowcontrol_t {
#[doc = "< disable hardware flow control"]
UART_HW_FLOWCTRL_DISABLE = 0,
#[doc = "< enable RX hardware flow control (rts)"]
UART_HW_FLOWCTRL_RTS = 1,
#[doc = "< enable TX hardware flow control (cts)"]
UART_HW_FLOWCTRL_CTS = 2,
#[doc = "< enable hardware flow control"]
UART_HW_FLOWCTRL_CTS_RTS = 3,
UART_HW_FLOWCTRL_MAX = 4,
}
#[repr(u32)]
#[doc = " @brief UART signal bit map"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum uart_signal_inv_t {
#[doc = "< Disable UART signal inverse"]
UART_SIGNAL_INV_DISABLE = 0,
#[doc = "< inverse the UART irda_tx signal"]
UART_SIGNAL_IRDA_TX_INV = 1,
#[doc = "< inverse the UART irda_rx signal"]
UART_SIGNAL_IRDA_RX_INV = 2,
#[doc = "< inverse the UART rxd signal"]
UART_SIGNAL_RXD_INV = 4,
#[doc = "< inverse the UART cts signal"]
UART_SIGNAL_CTS_INV = 8,
#[doc = "< inverse the UART dsr signal"]
UART_SIGNAL_DSR_INV = 16,
#[doc = "< inverse the UART txd signal"]
UART_SIGNAL_TXD_INV = 32,
#[doc = "< inverse the UART rts signal"]
UART_SIGNAL_RTS_INV = 64,
#[doc = "< inverse the UART dtr signal"]
UART_SIGNAL_DTR_INV = 128,
}
#[repr(u32)]
#[doc = " @brief UART source clock"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum uart_sclk_t {
#[doc = "< UART source clock from APB"]
UART_SCLK_APB = 0,
#[doc = "< UART source clock from REF_TICK"]
UART_SCLK_REF_TICK = 1,
}
#[doc = " @brief UART AT cmd char configuration parameters"]
#[doc = " Note that this function may different on different chip. Please refer to the TRM at confirguration."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct uart_at_cmd_t {
#[doc = "< UART AT cmd char"]
pub cmd_char: u8,
#[doc = "< AT cmd char repeat number"]
pub char_num: u8,
#[doc = "< gap time(in baud-rate) between AT cmd char"]
pub gap_tout: u32,
#[doc = "< the idle time(in baud-rate) between the non AT char and first AT char"]
pub pre_idle: u32,
#[doc = "< the idle time(in baud-rate) between the last AT char and the none AT char"]
pub post_idle: u32,
}
#[doc = " @brief UART software flow control configuration parameters"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct uart_sw_flowctrl_t {
#[doc = "< Xon flow control char"]
pub xon_char: u8,
#[doc = "< Xoff flow control char"]
pub xoff_char: u8,
#[doc = "< If the software flow control is enabled and the data amount in rxfifo is less than xon_thrd, an xon_char will be sent"]
pub xon_thrd: u8,
#[doc = "< If the software flow control is enabled and the data amount in rxfifo is more than xoff_thrd, an xoff_char will be sent"]
pub xoff_thrd: u8,
}
#[doc = " @brief UART configuration parameters for uart_param_config function"]
#[repr(C)]
#[derive(Copy, Clone)]
pub struct uart_config_t {
#[doc = "< UART baud rate"]
pub baud_rate: libc::c_int,
#[doc = "< UART byte size"]
pub data_bits: uart_word_length_t,
#[doc = "< UART parity mode"]
pub parity: uart_parity_t,
#[doc = "< UART stop bits"]
pub stop_bits: uart_stop_bits_t,
#[doc = "< UART HW flow control mode (cts/rts)"]
pub flow_ctrl: uart_hw_flowcontrol_t,
#[doc = "< UART HW RTS threshold"]
pub rx_flow_ctrl_thresh: u8,
pub __bindgen_anon_1: uart_config_t__bindgen_ty_1,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union uart_config_t__bindgen_ty_1 {
#[doc = "< UART source clock selection"]
pub source_clk: uart_sclk_t,
#[doc = "< Deprecated method to select ref tick clock source, set source_clk field instead"]
pub use_ref_tick: bool,
_bindgen_union_align: u32,
}
#[doc = " @brief UART interrupt configuration parameters for uart_intr_config function"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct uart_intr_config_t {
#[doc = "< UART interrupt enable mask, choose from UART_XXXX_INT_ENA_M under UART_INT_ENA_REG(i), connect with bit-or operator"]
pub intr_enable_mask: u32,
#[doc = "< UART timeout interrupt threshold (unit: time of sending one byte)"]
pub rx_timeout_thresh: u8,
#[doc = "< UART TX empty interrupt threshold."]
pub txfifo_empty_intr_thresh: u8,
#[doc = "< UART RX full interrupt threshold."]
pub rxfifo_full_thresh: u8,
}
#[repr(u32)]
#[doc = " @brief UART event types used in the ring buffer"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum uart_event_type_t {
#[doc = "< UART data event"]
UART_DATA = 0,
#[doc = "< UART break event"]
UART_BREAK = 1,
#[doc = "< UART RX buffer full event"]
UART_BUFFER_FULL = 2,
#[doc = "< UART FIFO overflow event"]
UART_FIFO_OVF = 3,
#[doc = "< UART RX frame error event"]
UART_FRAME_ERR = 4,
#[doc = "< UART RX parity event"]
UART_PARITY_ERR = 5,
#[doc = "< UART TX data and break event"]
UART_DATA_BREAK = 6,
#[doc = "< UART pattern detected"]
UART_PATTERN_DET = 7,
#[doc = "< UART event max index"]
UART_EVENT_MAX = 8,
}
#[doc = " @brief Event structure used in UART event queue"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct uart_event_t {
#[doc = "< UART event type"]
pub type_: uart_event_type_t,
#[doc = "< UART data size for UART_DATA event"]
pub size: size_t,
#[doc = "< UART data read timeout flag for UART_DATA event (no new data received during configured RX TOUT)*/"]
pub timeout_flag: bool,
}
pub type uart_isr_handle_t = intr_handle_t;
extern "C" {
#[doc = " @brief Install UART driver and set the UART to the default configuration."]
#[doc = ""]
#[doc = " UART ISR handler will be attached to the same CPU core that this function is running on."]
#[doc = ""]
#[doc = " @note Rx_buffer_size should be greater than UART_FIFO_LEN. Tx_buffer_size should be either zero or greater than UART_FIFO_LEN."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param rx_buffer_size UART RX ring buffer size."]
#[doc = " @param tx_buffer_size UART TX ring buffer size."]
#[doc = " If set to zero, driver will not use TX buffer, TX function will block task until all data have been sent out."]
#[doc = " @param queue_size UART event queue size/depth."]
#[doc = " @param uart_queue UART event queue handle (out param). On success, a new queue handle is written here to provide"]
#[doc = " access to UART events. If set to NULL, driver will not use an event queue."]
#[doc = " @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)"]
#[doc = " ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info. Do not set ESP_INTR_FLAG_IRAM here"]
#[doc = " (the driver's ISR handler is not located in IRAM)"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_driver_install(
uart_num: uart_port_t,
rx_buffer_size: libc::c_int,
tx_buffer_size: libc::c_int,
queue_size: libc::c_int,
uart_queue: *mut QueueHandle_t,
intr_alloc_flags: libc::c_int,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Uninstall UART driver."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_driver_delete(uart_num: uart_port_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Checks whether the driver is installed or not"]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - true driver is installed"]
#[doc = " - false driver is not installed"]
pub fn uart_is_driver_installed(uart_num: uart_port_t) -> bool;
}
extern "C" {
#[doc = " @brief Set UART data bits."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param data_bit UART data bits"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_set_word_length(uart_num: uart_port_t, data_bit: uart_word_length_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get the UART data bit configuration."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param data_bit Pointer to accept value of UART data bits."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_FAIL Parameter error"]
#[doc = " - ESP_OK Success, result will be put in (*data_bit)"]
pub fn uart_get_word_length(
uart_num: uart_port_t,
data_bit: *mut uart_word_length_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set UART stop bits."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param stop_bits UART stop bits"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Fail"]
pub fn uart_set_stop_bits(uart_num: uart_port_t, stop_bits: uart_stop_bits_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get the UART stop bit configuration."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param stop_bits Pointer to accept value of UART stop bits."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_FAIL Parameter error"]
#[doc = " - ESP_OK Success, result will be put in (*stop_bit)"]
pub fn uart_get_stop_bits(uart_num: uart_port_t, stop_bits: *mut uart_stop_bits_t)
-> esp_err_t;
}
extern "C" {
#[doc = " @brief Set UART parity mode."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param parity_mode the enum of uart parity configuration"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_FAIL Parameter error"]
#[doc = " - ESP_OK Success"]
pub fn uart_set_parity(uart_num: uart_port_t, parity_mode: uart_parity_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get the UART parity mode configuration."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param parity_mode Pointer to accept value of UART parity mode."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_FAIL Parameter error"]
#[doc = " - ESP_OK Success, result will be put in (*parity_mode)"]
#[doc = ""]
pub fn uart_get_parity(uart_num: uart_port_t, parity_mode: *mut uart_parity_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set UART baud rate."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param baudrate UART baud rate."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_FAIL Parameter error"]
#[doc = " - ESP_OK Success"]
pub fn uart_set_baudrate(uart_num: uart_port_t, baudrate: u32) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get the UART baud rate configuration."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param baudrate Pointer to accept value of UART baud rate"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_FAIL Parameter error"]
#[doc = " - ESP_OK Success, result will be put in (*baudrate)"]
#[doc = ""]
pub fn uart_get_baudrate(uart_num: uart_port_t, baudrate: *mut u32) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set UART line inverse mode"]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param inverse_mask Choose the wires that need to be inverted. Using the ORred mask of `uart_signal_inv_t`"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_set_line_inverse(uart_num: uart_port_t, inverse_mask: u32) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set hardware flow control."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param flow_ctrl Hardware flow control mode"]
#[doc = " @param rx_thresh Threshold of Hardware RX flow control (0 ~ UART_FIFO_LEN)."]
#[doc = " Only when UART_HW_FLOWCTRL_RTS is set, will the rx_thresh value be set."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_set_hw_flow_ctrl(
uart_num: uart_port_t,
flow_ctrl: uart_hw_flowcontrol_t,
rx_thresh: u8,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set software flow control."]
#[doc = ""]
#[doc = " @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2"]
#[doc = " @param enable switch on or off"]
#[doc = " @param rx_thresh_xon low water mark"]
#[doc = " @param rx_thresh_xoff high water mark"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_set_sw_flow_ctrl(
uart_num: uart_port_t,
enable: bool,
rx_thresh_xon: u8,
rx_thresh_xoff: u8,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get the UART hardware flow control configuration."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param flow_ctrl Option for different flow control mode."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_FAIL Parameter error"]
#[doc = " - ESP_OK Success, result will be put in (*flow_ctrl)"]
pub fn uart_get_hw_flow_ctrl(
uart_num: uart_port_t,
flow_ctrl: *mut uart_hw_flowcontrol_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Clear UART interrupt status"]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param clr_mask Bit mask of the interrupt status to be cleared."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_clear_intr_status(uart_num: uart_port_t, clr_mask: u32) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set UART interrupt enable"]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param enable_mask Bit mask of the enable bits."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_enable_intr_mask(uart_num: uart_port_t, enable_mask: u32) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Clear UART interrupt enable bits"]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param disable_mask Bit mask of the disable bits."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_disable_intr_mask(uart_num: uart_port_t, disable_mask: u32) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable UART RX interrupt (RX_FULL & RX_TIMEOUT INTERRUPT)"]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_enable_rx_intr(uart_num: uart_port_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Disable UART RX interrupt (RX_FULL & RX_TIMEOUT INTERRUPT)"]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_disable_rx_intr(uart_num: uart_port_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Disable UART TX interrupt (TX_FULL & TX_TIMEOUT INTERRUPT)"]
#[doc = ""]
#[doc = " @param uart_num UART port number"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_disable_tx_intr(uart_num: uart_port_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable UART TX interrupt (TX_FULL & TX_TIMEOUT INTERRUPT)"]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param enable 1: enable; 0: disable"]
#[doc = " @param thresh Threshold of TX interrupt, 0 ~ UART_FIFO_LEN"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_enable_tx_intr(
uart_num: uart_port_t,
enable: libc::c_int,
thresh: libc::c_int,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Register UART interrupt handler (ISR)."]
#[doc = ""]
#[doc = " @note UART ISR handler will be attached to the same CPU core that this function is running on."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param fn Interrupt handler function."]
#[doc = " @param arg parameter for handler function"]
#[doc = " @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)"]
#[doc = " ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info."]
#[doc = " @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will"]
#[doc = " be returned here."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_isr_register(
uart_num: uart_port_t,
fn_: ::core::option::Option<unsafe extern "C" fn(arg1: *mut libc::c_void)>,
arg: *mut libc::c_void,
intr_alloc_flags: libc::c_int,
handle: *mut uart_isr_handle_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Free UART interrupt handler registered by uart_isr_register. Must be called on the same core as"]
#[doc = " uart_isr_register was called."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_isr_free(uart_num: uart_port_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set UART pin number"]
#[doc = ""]
#[doc = " @note Internal signal can be output to multiple GPIO pads."]
#[doc = " Only one GPIO pad can connect with input signal."]
#[doc = ""]
#[doc = " @note Instead of GPIO number a macro 'UART_PIN_NO_CHANGE' may be provided"]
#[doc = "to keep the currently allocated pin."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param tx_io_num UART TX pin GPIO number."]
#[doc = " @param rx_io_num UART RX pin GPIO number."]
#[doc = " @param rts_io_num UART RTS pin GPIO number."]
#[doc = " @param cts_io_num UART CTS pin GPIO number."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_set_pin(
uart_num: uart_port_t,
tx_io_num: libc::c_int,
rx_io_num: libc::c_int,
rts_io_num: libc::c_int,
cts_io_num: libc::c_int,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Manually set the UART RTS pin level."]
#[doc = " @note UART must be configured with hardware flow control disabled."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param level 1: RTS output low (active); 0: RTS output high (block)"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_set_rts(uart_num: uart_port_t, level: libc::c_int) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Manually set the UART DTR pin level."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param level 1: DTR output low; 0: DTR output high"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_set_dtr(uart_num: uart_port_t, level: libc::c_int) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set UART idle interval after tx FIFO is empty"]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param idle_num idle interval after tx FIFO is empty(unit: the time it takes to send one bit"]
#[doc = " under current baudrate)"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_set_tx_idle_num(uart_num: uart_port_t, idle_num: u16) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set UART configuration parameters."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param uart_config UART parameter settings"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_param_config(uart_num: uart_port_t, uart_config: *const uart_config_t)
-> esp_err_t;
}
extern "C" {
#[doc = " @brief Configure UART interrupts."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param intr_conf UART interrupt settings"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_intr_config(
uart_num: uart_port_t,
intr_conf: *const uart_intr_config_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Wait until UART TX FIFO is empty."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param ticks_to_wait Timeout, count in RTOS ticks"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
#[doc = " - ESP_ERR_TIMEOUT Timeout"]
pub fn uart_wait_tx_done(uart_num: uart_port_t, ticks_to_wait: TickType_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Send data to the UART port from a given buffer and length."]
#[doc = ""]
#[doc = " This function will not wait for enough space in TX FIFO. It will just fill the available TX FIFO and return when the FIFO is full."]
#[doc = " @note This function should only be used when UART TX buffer is not enabled."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param buffer data buffer address"]
#[doc = " @param len data length to send"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - (-1) Parameter error"]
#[doc = " - OTHERS (>=0) The number of bytes pushed to the TX FIFO"]
pub fn uart_tx_chars(
uart_num: uart_port_t,
buffer: *const libc::c_char,
len: u32,
) -> libc::c_int;
}
extern "C" {
#[doc = " @brief Send data to the UART port from a given buffer and length,"]
#[doc = ""]
#[doc = " If the UART driver's parameter 'tx_buffer_size' is set to zero:"]
#[doc = " This function will not return until all the data have been sent out, or at least pushed into TX FIFO."]
#[doc = ""]
#[doc = " Otherwise, if the 'tx_buffer_size' > 0, this function will return after copying all the data to tx ring buffer,"]
#[doc = " UART ISR will then move data from the ring buffer to TX FIFO gradually."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param src data buffer address"]
#[doc = " @param size data length to send"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - (-1) Parameter error"]
#[doc = " - OTHERS (>=0) The number of bytes pushed to the TX FIFO"]
pub fn uart_write_bytes(
uart_num: uart_port_t,
src: *const libc::c_char,
size: size_t,
) -> libc::c_int;
}
extern "C" {
#[doc = " @brief Send data to the UART port from a given buffer and length,"]
#[doc = ""]
#[doc = " If the UART driver's parameter 'tx_buffer_size' is set to zero:"]
#[doc = " This function will not return until all the data and the break signal have been sent out."]
#[doc = " After all data is sent out, send a break signal."]
#[doc = ""]
#[doc = " Otherwise, if the 'tx_buffer_size' > 0, this function will return after copying all the data to tx ring buffer,"]
#[doc = " UART ISR will then move data from the ring buffer to TX FIFO gradually."]
#[doc = " After all data sent out, send a break signal."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param src data buffer address"]
#[doc = " @param size data length to send"]
#[doc = " @param brk_len break signal duration(unit: the time it takes to send one bit at current baudrate)"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - (-1) Parameter error"]
#[doc = " - OTHERS (>=0) The number of bytes pushed to the TX FIFO"]
pub fn uart_write_bytes_with_break(
uart_num: uart_port_t,
src: *const libc::c_char,
size: size_t,
brk_len: libc::c_int,
) -> libc::c_int;
}
extern "C" {
#[doc = " @brief UART read bytes from UART buffer"]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param buf pointer to the buffer."]
#[doc = " @param length data length"]
#[doc = " @param ticks_to_wait sTimeout, count in RTOS ticks"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - (-1) Error"]
#[doc = " - OTHERS (>=0) The number of bytes read from UART FIFO"]
pub fn uart_read_bytes(
uart_num: uart_port_t,
buf: *mut u8,
length: u32,
ticks_to_wait: TickType_t,
) -> libc::c_int;
}
extern "C" {
#[doc = " @brief Alias of uart_flush_input."]
#[doc = " UART ring buffer flush. This will discard all data in the UART RX buffer."]
#[doc = " @note Instead of waiting the data sent out, this function will clear UART rx buffer."]
#[doc = " In order to send all the data in tx FIFO, we can use uart_wait_tx_done function."]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_flush(uart_num: uart_port_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Clear input buffer, discard all the data is in the ring-buffer."]
#[doc = " @note In order to send all the data in tx FIFO, we can use uart_wait_tx_done function."]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_flush_input(uart_num: uart_port_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief UART get RX ring buffer cached data length"]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param size Pointer of size_t to accept cached data length"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_get_buffered_data_len(uart_num: uart_port_t, size: *mut size_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief UART disable pattern detect function."]
#[doc = " Designed for applications like 'AT commands'."]
#[doc = " When the hardware detects a series of one same character, the interrupt will be triggered."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_disable_pattern_det_intr(uart_num: uart_port_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief UART enable pattern detect function."]
#[doc = " Designed for applications like 'AT commands'."]
#[doc = " When the hardware detect a series of one same character, the interrupt will be triggered."]
#[doc = " @note This function only works for esp32. And this function is deprecated, please use"]
#[doc = " uart_enable_pattern_det_baud_intr instead."]
#[doc = ""]
#[doc = " @param uart_num UART port number."]
#[doc = " @param pattern_chr character of the pattern."]
#[doc = " @param chr_num number of the character, 8bit value."]
#[doc = " @param chr_tout timeout of the interval between each pattern characters, 24bit value, unit is APB (80Mhz) clock cycle."]
#[doc = " When the duration is less than this value, it will not take this data as at_cmd char."]
#[doc = " @param post_idle idle time after the last pattern character, 24bit value, unit is APB (80Mhz) clock cycle."]
#[doc = " When the duration is less than this value, it will not take the previous data as the last at_cmd char"]
#[doc = " @param pre_idle idle time before the first pattern character, 24bit value, unit is APB (80Mhz) clock cycle."]
#[doc = " When the duration is less than this value, it will not take this data as the first at_cmd char."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_enable_pattern_det_intr(
uart_num: uart_port_t,
pattern_chr: libc::c_char,
chr_num: u8,
chr_tout: libc::c_int,
post_idle: libc::c_int,
pre_idle: libc::c_int,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief UART enable pattern detect function."]
#[doc = " Designed for applications like 'AT commands'."]
#[doc = " When the hardware detect a series of one same character, the interrupt will be triggered."]
#[doc = ""]
#[doc = " @param uart_num UART port number."]
#[doc = " @param pattern_chr character of the pattern."]
#[doc = " @param chr_num number of the character, 8bit value."]
#[doc = " @param chr_tout timeout of the interval between each pattern characters, 16bit value, unit is the baud-rate cycle you configured."]
#[doc = " When the duration is more than this value, it will not take this data as at_cmd char."]
#[doc = " @param post_idle idle time after the last pattern character, 16bit value, unit is the baud-rate cycle you configured."]
#[doc = " When the duration is less than this value, it will not take the previous data as the last at_cmd char"]
#[doc = " @param pre_idle idle time before the first pattern character, 16bit value, unit is the baud-rate cycle you configured."]
#[doc = " When the duration is less than this value, it will not take this data as the first at_cmd char."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Parameter error"]
pub fn uart_enable_pattern_det_baud_intr(
uart_num: uart_port_t,
pattern_chr: libc::c_char,
chr_num: u8,
chr_tout: libc::c_int,
post_idle: libc::c_int,
pre_idle: libc::c_int,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Return the nearest detected pattern position in buffer."]
#[doc = " The positions of the detected pattern are saved in a queue,"]
#[doc = " this function will dequeue the first pattern position and move the pointer to next pattern position."]
#[doc = " @note If the RX buffer is full and flow control is not enabled,"]
#[doc = " the detected pattern may not be found in the rx buffer due to overflow."]
#[doc = ""]
#[doc = " The following APIs will modify the pattern position info:"]
#[doc = " uart_flush_input, uart_read_bytes, uart_driver_delete, uart_pop_pattern_pos"]
#[doc = " It is the application's responsibility to ensure atomic access to the pattern queue and the rx data buffer"]
#[doc = " when using pattern detect feature."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @return"]
#[doc = " - (-1) No pattern found for current index or parameter error"]
#[doc = " - others the pattern position in rx buffer."]
pub fn uart_pattern_pop_pos(uart_num: uart_port_t) -> libc::c_int;
}
extern "C" {
#[doc = " @brief Return the nearest detected pattern position in buffer."]
#[doc = " The positions of the detected pattern are saved in a queue,"]
#[doc = " This function do nothing to the queue."]
#[doc = " @note If the RX buffer is full and flow control is not enabled,"]
#[doc = " the detected pattern may not be found in the rx buffer due to overflow."]
#[doc = ""]
#[doc = " The following APIs will modify the pattern position info:"]
#[doc = " uart_flush_input, uart_read_bytes, uart_driver_delete, uart_pop_pattern_pos"]
#[doc = " It is the application's responsibility to ensure atomic access to the pattern queue and the rx data buffer"]
#[doc = " when using pattern detect feature."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @return"]
#[doc = " - (-1) No pattern found for current index or parameter error"]
#[doc = " - others the pattern position in rx buffer."]
pub fn uart_pattern_get_pos(uart_num: uart_port_t) -> libc::c_int;
}
extern "C" {
#[doc = " @brief Allocate a new memory with the given length to save record the detected pattern position in rx buffer."]
#[doc = ""]
#[doc = " @param uart_num UART port number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param queue_length Max queue length for the detected pattern."]
#[doc = " If the queue length is not large enough, some pattern positions might be lost."]
#[doc = " Set this value to the maximum number of patterns that could be saved in data buffer at the same time."]
#[doc = " @return"]
#[doc = " - ESP_ERR_NO_MEM No enough memory"]
#[doc = " - ESP_ERR_INVALID_STATE Driver not installed"]
#[doc = " - ESP_FAIL Parameter error"]
#[doc = " - ESP_OK Success"]
pub fn uart_pattern_queue_reset(uart_num: uart_port_t, queue_length: libc::c_int) -> esp_err_t;
}
extern "C" {
#[doc = " @brief UART set communication mode"]
#[doc = ""]
#[doc = " @note This function must be executed after uart_driver_install(), when the driver object is initialized."]
#[doc = " @param uart_num Uart number to configure, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param mode UART UART mode to set"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn uart_set_mode(uart_num: uart_port_t, mode: uart_mode_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set uart threshold value for RX fifo full"]
#[doc = " @note If application is using higher baudrate and it is observed that bytes"]
#[doc = " in hardware RX fifo are overwritten then this threshold can be reduced"]
#[doc = ""]
#[doc = " @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2"]
#[doc = " @param threshold Threshold value above which RX fifo full interrupt is generated"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
#[doc = " - ESP_ERR_INVALID_STATE Driver is not installed"]
pub fn uart_set_rx_full_threshold(uart_num: uart_port_t, threshold: libc::c_int) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set uart threshold values for TX fifo empty"]
#[doc = ""]
#[doc = " @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2"]
#[doc = " @param threshold Threshold value below which TX fifo empty interrupt is generated"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
#[doc = " - ESP_ERR_INVALID_STATE Driver is not installed"]
pub fn uart_set_tx_empty_threshold(uart_num: uart_port_t, threshold: libc::c_int) -> esp_err_t;
}
extern "C" {
#[doc = " @brief UART set threshold timeout for TOUT feature"]
#[doc = ""]
#[doc = " @param uart_num Uart number to configure, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param tout_thresh This parameter defines timeout threshold in uart symbol periods. The maximum value of threshold is 126."]
#[doc = " tout_thresh = 1, defines TOUT interrupt timeout equal to transmission time of one symbol (~11 bit) on current baudrate."]
#[doc = " If the time is expired the UART_RXFIFO_TOUT_INT interrupt is triggered. If tout_thresh == 0,"]
#[doc = " the TOUT feature is disabled."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
#[doc = " - ESP_ERR_INVALID_STATE Driver is not installed"]
pub fn uart_set_rx_timeout(uart_num: uart_port_t, tout_thresh: u8) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Returns collision detection flag for RS485 mode"]
#[doc = " Function returns the collision detection flag into variable pointed by collision_flag."]
#[doc = " *collision_flag = true, if collision detected else it is equal to false."]
#[doc = " This function should be executed when actual transmission is completed (after uart_write_bytes())."]
#[doc = ""]
#[doc = " @param uart_num Uart number to configure the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param collision_flag Pointer to variable of type bool to return collision flag."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
pub fn uart_get_collision_flag(uart_num: uart_port_t, collision_flag: *mut bool) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set the number of RX pin signal edges for light sleep wakeup"]
#[doc = ""]
#[doc = " UART can be used to wake up the system from light sleep. This feature works"]
#[doc = " by counting the number of positive edges on RX pin and comparing the count to"]
#[doc = " the threshold. When the count exceeds the threshold, system is woken up from"]
#[doc = " light sleep. This function allows setting the threshold value."]
#[doc = ""]
#[doc = " Stop bit and parity bits (if enabled) also contribute to the number of edges."]
#[doc = " For example, letter 'a' with ASCII code 97 is encoded as 0100001101 on the wire"]
#[doc = " (with 8n1 configuration), start and stop bits included. This sequence has 3"]
#[doc = " positive edges (transitions from 0 to 1). Therefore, to wake up the system"]
#[doc = " when 'a' is sent, set wakeup_threshold=3."]
#[doc = ""]
#[doc = " The character that triggers wakeup is not received by UART (i.e. it can not"]
#[doc = " be obtained from UART FIFO). Depending on the baud rate, a few characters"]
#[doc = " after that will also not be received. Note that when the chip enters and exits"]
#[doc = " light sleep mode, APB frequency will be changing. To make sure that UART has"]
#[doc = " correct baud rate all the time, select REF_TICK as UART clock source,"]
#[doc = " by setting use_ref_tick field in uart_config_t to true."]
#[doc = ""]
#[doc = " @note in ESP32, the wakeup signal can only be input via IO_MUX (i.e."]
#[doc = " GPIO3 should be configured as function_1 to wake up UART0,"]
#[doc = " GPIO9 should be configured as function_5 to wake up UART1), UART2"]
#[doc = " does not support light sleep wakeup feature."]
#[doc = ""]
#[doc = " @param uart_num UART number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param wakeup_threshold number of RX edges for light sleep wakeup, value is 3 .. 0x3ff."]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if uart_num is incorrect or wakeup_threshold is"]
#[doc = " outside of [3, 0x3ff] range."]
pub fn uart_set_wakeup_threshold(
uart_num: uart_port_t,
wakeup_threshold: libc::c_int,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get the number of RX pin signal edges for light sleep wakeup."]
#[doc = ""]
#[doc = " See description of uart_set_wakeup_threshold for the explanation of UART"]
#[doc = " wakeup feature."]
#[doc = ""]
#[doc = " @param uart_num UART number, the max port number is (UART_NUM_MAX -1)."]
#[doc = " @param[out] out_wakeup_threshold output, set to the current value of wakeup"]
#[doc = " threshold for the given UART."]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if out_wakeup_threshold is NULL"]
pub fn uart_get_wakeup_threshold(
uart_num: uart_port_t,
out_wakeup_threshold: *mut libc::c_int,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Wait until UART tx memory empty and the last char send ok (polling mode)."]
#[doc = ""]
#[doc = " @param uart_num UART number"]
#[doc = ""]
#[doc = " * @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
#[doc = " - ESP_FAIL Driver not installed"]
pub fn uart_wait_tx_idle_polling(uart_num: uart_port_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Configure TX signal loop back to RX module, just for the test usage."]
#[doc = ""]
#[doc = " @param uart_num UART number"]
#[doc = " @param loop_back_en Set ture to enable the loop back function, else set it false."]
#[doc = ""]
#[doc = " * @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG Parameter error"]
#[doc = " - ESP_FAIL Driver not installed"]
pub fn uart_set_loop_back(uart_num: uart_port_t, loop_back_en: bool) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Configure behavior of UART RX timeout interrupt."]
#[doc = ""]
#[doc = " When always_rx_timeout is true, timeout interrupt is triggered even if FIFO is full."]
#[doc = " This function can cause extra timeout interrupts triggered only to send the timeout event."]
#[doc = " Call this function only if you want to ensure timeout interrupt will always happen after a byte stream."]
#[doc = ""]
#[doc = " @param uart_num UART number"]
#[doc = " @param always_rx_timeout_en Set to false enable the default behavior of timeout interrupt,"]
#[doc = " set it to true to always trigger timeout interrupt."]
#[doc = ""]
#[doc = " * @return None"]
pub fn uart_set_always_rx_timeout(uart_num: uart_port_t, always_rx_timeout_en: bool);
}
#[doc = " Opaque pointer type representing non-volatile storage handle"]
pub type nvs_handle_t = u32;
pub type nvs_handle = nvs_handle_t;
#[repr(u32)]
#[doc = " @brief Mode of opening the non-volatile storage"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum nvs_open_mode_t {
#[doc = "< Read only"]
NVS_READONLY = 0,
#[doc = "< Read and write"]
NVS_READWRITE = 1,
}
pub use self::nvs_open_mode_t as nvs_open_mode;
#[repr(u32)]
#[doc = " @brief Types of variables"]
#[doc = ""]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum nvs_type_t {
#[doc = "< Type uint8_t"]
NVS_TYPE_U8 = 1,
#[doc = "< Type int8_t"]
NVS_TYPE_I8 = 17,
#[doc = "< Type uint16_t"]
NVS_TYPE_U16 = 2,
#[doc = "< Type int16_t"]
NVS_TYPE_I16 = 18,
#[doc = "< Type uint32_t"]
NVS_TYPE_U32 = 4,
#[doc = "< Type int32_t"]
NVS_TYPE_I32 = 20,
#[doc = "< Type uint64_t"]
NVS_TYPE_U64 = 8,
#[doc = "< Type int64_t"]
NVS_TYPE_I64 = 24,
#[doc = "< Type string"]
NVS_TYPE_STR = 33,
#[doc = "< Type blob"]
NVS_TYPE_BLOB = 66,
#[doc = "< Must be last"]
NVS_TYPE_ANY = 255,
}
#[doc = " @brief information about entry obtained from nvs_entry_info function"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct nvs_entry_info_t {
#[doc = "< Namespace to which key-value belong"]
pub namespace_name: [libc::c_char; 16usize],
#[doc = "< Key of stored key-value pair"]
pub key: [libc::c_char; 16usize],
#[doc = "< Type of stored key-value pair"]
pub type_: nvs_type_t,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct nvs_opaque_iterator_t {
_unused: [u8; 0],
}
#[doc = " Opaque pointer type representing iterator to nvs entries"]
pub type nvs_iterator_t = *mut nvs_opaque_iterator_t;
extern "C" {
#[doc = " @brief Open non-volatile storage with a given namespace from the default NVS partition"]
#[doc = ""]
#[doc = " Multiple internal ESP-IDF and third party application modules can store"]
#[doc = " their key-value pairs in the NVS module. In order to reduce possible"]
#[doc = " conflicts on key names, each module can use its own namespace."]
#[doc = " The default NVS partition is the one that is labelled \"nvs\" in the partition"]
#[doc = " table."]
#[doc = ""]
#[doc = " @param[in] name Namespace name. Maximal length is determined by the"]
#[doc = " underlying implementation, but is guaranteed to be"]
#[doc = " at least 15 characters. Shouldn't be empty."]
#[doc = " @param[in] open_mode NVS_READWRITE or NVS_READONLY. If NVS_READONLY, will"]
#[doc = " open a handle for reading only. All write requests will"]
#[doc = " be rejected for this handle."]
#[doc = " @param[out] out_handle If successful (return code is zero), handle will be"]
#[doc = " returned in this argument."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if storage handle was opened successfully"]
#[doc = " - ESP_ERR_NVS_NOT_INITIALIZED if the storage driver is not initialized"]
#[doc = " - ESP_ERR_NVS_PART_NOT_FOUND if the partition with label \"nvs\" is not found"]
#[doc = " - ESP_ERR_NVS_NOT_FOUND id namespace doesn't exist yet and"]
#[doc = " mode is NVS_READONLY"]
#[doc = " - ESP_ERR_NVS_INVALID_NAME if namespace name doesn't satisfy constraints"]
#[doc = " - other error codes from the underlying storage driver"]
pub fn nvs_open(
name: *const libc::c_char,
open_mode: nvs_open_mode_t,
out_handle: *mut nvs_handle_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Open non-volatile storage with a given namespace from specified partition"]
#[doc = ""]
#[doc = " The behaviour is same as nvs_open() API. However this API can operate on a specified NVS"]
#[doc = " partition instead of default NVS partition. Note that the specified partition must be registered"]
#[doc = " with NVS using nvs_flash_init_partition() API."]
#[doc = ""]
#[doc = " @param[in] part_name Label (name) of the partition of interest for object read/write/erase"]
#[doc = " @param[in] name Namespace name. Maximal length is determined by the"]
#[doc = " underlying implementation, but is guaranteed to be"]
#[doc = " at least 15 characters. Shouldn't be empty."]
#[doc = " @param[in] open_mode NVS_READWRITE or NVS_READONLY. If NVS_READONLY, will"]
#[doc = " open a handle for reading only. All write requests will"]
#[doc = " be rejected for this handle."]
#[doc = " @param[out] out_handle If successful (return code is zero), handle will be"]
#[doc = " returned in this argument."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if storage handle was opened successfully"]
#[doc = " - ESP_ERR_NVS_NOT_INITIALIZED if the storage driver is not initialized"]
#[doc = " - ESP_ERR_NVS_PART_NOT_FOUND if the partition with specified name is not found"]
#[doc = " - ESP_ERR_NVS_NOT_FOUND id namespace doesn't exist yet and"]
#[doc = " mode is NVS_READONLY"]
#[doc = " - ESP_ERR_NVS_INVALID_NAME if namespace name doesn't satisfy constraints"]
#[doc = " - other error codes from the underlying storage driver"]
pub fn nvs_open_from_partition(
part_name: *const libc::c_char,
name: *const libc::c_char,
open_mode: nvs_open_mode_t,
out_handle: *mut nvs_handle_t,
) -> esp_err_t;
}
extern "C" {
#[doc = "@{*/"]
#[doc = " @brief set value for given key"]
#[doc = ""]
#[doc = " This family of functions set value for the key, given its name. Note that"]
#[doc = " actual storage will not be updated until nvs_commit function is called."]
#[doc = ""]
#[doc = " @param[in] handle Handle obtained from nvs_open function."]
#[doc = " Handles that were opened read only cannot be used."]
#[doc = " @param[in] key Key name. Maximal length is determined by the underlying"]
#[doc = " implementation, but is guaranteed to be at least"]
#[doc = " 15 characters. Shouldn't be empty."]
#[doc = " @param[in] value The value to set."]
#[doc = " For strings, the maximum length (including null character) is"]
#[doc = " 4000 bytes."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if value was set successfully"]
#[doc = " - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL"]
#[doc = " - ESP_ERR_NVS_READ_ONLY if storage handle was opened as read only"]
#[doc = " - ESP_ERR_NVS_INVALID_NAME if key name doesn't satisfy constraints"]
#[doc = " - ESP_ERR_NVS_NOT_ENOUGH_SPACE if there is not enough space in the"]
#[doc = " underlying storage to save the value"]
#[doc = " - ESP_ERR_NVS_REMOVE_FAILED if the value wasn't updated because flash"]
#[doc = " write operation has failed. The value was written however, and"]
#[doc = " update will be finished after re-initialization of nvs, provided that"]
#[doc = " flash operation doesn't fail again."]
#[doc = " - ESP_ERR_NVS_VALUE_TOO_LONG if the string value is too long"]
pub fn nvs_set_i8(handle: nvs_handle_t, key: *const libc::c_char, value: i8) -> esp_err_t;
}
extern "C" {
pub fn nvs_set_u8(handle: nvs_handle_t, key: *const libc::c_char, value: u8) -> esp_err_t;
}
extern "C" {
pub fn nvs_set_i16(handle: nvs_handle_t, key: *const libc::c_char, value: i16) -> esp_err_t;
}
extern "C" {
pub fn nvs_set_u16(handle: nvs_handle_t, key: *const libc::c_char, value: u16) -> esp_err_t;
}
extern "C" {
pub fn nvs_set_i32(handle: nvs_handle_t, key: *const libc::c_char, value: i32) -> esp_err_t;
}
extern "C" {
pub fn nvs_set_u32(handle: nvs_handle_t, key: *const libc::c_char, value: u32) -> esp_err_t;
}
extern "C" {
pub fn nvs_set_i64(handle: nvs_handle_t, key: *const libc::c_char, value: i64) -> esp_err_t;
}
extern "C" {
pub fn nvs_set_u64(handle: nvs_handle_t, key: *const libc::c_char, value: u64) -> esp_err_t;
}
extern "C" {
pub fn nvs_set_str(
handle: nvs_handle_t,
key: *const libc::c_char,
value: *const libc::c_char,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief set variable length binary value for given key"]
#[doc = ""]
#[doc = " This family of functions set value for the key, given its name. Note that"]
#[doc = " actual storage will not be updated until nvs_commit function is called."]
#[doc = ""]
#[doc = " @param[in] handle Handle obtained from nvs_open function."]
#[doc = " Handles that were opened read only cannot be used."]
#[doc = " @param[in] key Key name. Maximal length is 15 characters. Shouldn't be empty."]
#[doc = " @param[in] value The value to set."]
#[doc = " @param[in] length length of binary value to set, in bytes; Maximum length is"]
#[doc = " 508000 bytes or (97.6% of the partition size - 4000) bytes"]
#[doc = " whichever is lower."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if value was set successfully"]
#[doc = " - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL"]
#[doc = " - ESP_ERR_NVS_READ_ONLY if storage handle was opened as read only"]
#[doc = " - ESP_ERR_NVS_INVALID_NAME if key name doesn't satisfy constraints"]
#[doc = " - ESP_ERR_NVS_NOT_ENOUGH_SPACE if there is not enough space in the"]
#[doc = " underlying storage to save the value"]
#[doc = " - ESP_ERR_NVS_REMOVE_FAILED if the value wasn't updated because flash"]
#[doc = " write operation has failed. The value was written however, and"]
#[doc = " update will be finished after re-initialization of nvs, provided that"]
#[doc = " flash operation doesn't fail again."]
#[doc = " - ESP_ERR_NVS_VALUE_TOO_LONG if the value is too long"]
pub fn nvs_set_blob(
handle: nvs_handle_t,
key: *const libc::c_char,
value: *const libc::c_void,
length: size_t,
) -> esp_err_t;
}
extern "C" {
#[doc = "@{*/"]
#[doc = " @brief get value for given key"]
#[doc = ""]
#[doc = " These functions retrieve value for the key, given its name. If key does not"]
#[doc = " exist, or the requested variable type doesn't match the type which was used"]
#[doc = " when setting a value, an error is returned."]
#[doc = ""]
#[doc = " In case of any error, out_value is not modified."]
#[doc = ""]
#[doc = " All functions expect out_value to be a pointer to an already allocated variable"]
#[doc = " of the given type."]
#[doc = ""]
#[doc = " \\code{c}"]
#[doc = " // Example of using nvs_get_i32:"]
#[doc = " int32_t max_buffer_size = 4096; // default value"]
#[doc = " esp_err_t err = nvs_get_i32(my_handle, \"max_buffer_size\", &max_buffer_size);"]
#[doc = " assert(err == ESP_OK || err == ESP_ERR_NVS_NOT_FOUND);"]
#[doc = " // if ESP_ERR_NVS_NOT_FOUND was returned, max_buffer_size will still"]
#[doc = " // have its default value."]
#[doc = ""]
#[doc = " \\endcode"]
#[doc = ""]
#[doc = " @param[in] handle Handle obtained from nvs_open function."]
#[doc = " @param[in] key Key name. Maximal length is determined by the underlying"]
#[doc = " implementation, but is guaranteed to be at least"]
#[doc = " 15 characters. Shouldn't be empty."]
#[doc = " @param out_value Pointer to the output value."]
#[doc = " May be NULL for nvs_get_str and nvs_get_blob, in this"]
#[doc = " case required length will be returned in length argument."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if the value was retrieved successfully"]
#[doc = " - ESP_ERR_NVS_NOT_FOUND if the requested key doesn't exist"]
#[doc = " - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL"]
#[doc = " - ESP_ERR_NVS_INVALID_NAME if key name doesn't satisfy constraints"]
#[doc = " - ESP_ERR_NVS_INVALID_LENGTH if length is not sufficient to store data"]
pub fn nvs_get_i8(
handle: nvs_handle_t,
key: *const libc::c_char,
out_value: *mut i8,
) -> esp_err_t;
}
extern "C" {
pub fn nvs_get_u8(
handle: nvs_handle_t,
key: *const libc::c_char,
out_value: *mut u8,
) -> esp_err_t;
}
extern "C" {
pub fn nvs_get_i16(
handle: nvs_handle_t,
key: *const libc::c_char,
out_value: *mut i16,
) -> esp_err_t;
}
extern "C" {
pub fn nvs_get_u16(
handle: nvs_handle_t,
key: *const libc::c_char,
out_value: *mut u16,
) -> esp_err_t;
}
extern "C" {
pub fn nvs_get_i32(
handle: nvs_handle_t,
key: *const libc::c_char,
out_value: *mut i32,
) -> esp_err_t;
}
extern "C" {
pub fn nvs_get_u32(
handle: nvs_handle_t,
key: *const libc::c_char,
out_value: *mut u32,
) -> esp_err_t;
}
extern "C" {
pub fn nvs_get_i64(
handle: nvs_handle_t,
key: *const libc::c_char,
out_value: *mut i64,
) -> esp_err_t;
}
extern "C" {
pub fn nvs_get_u64(
handle: nvs_handle_t,
key: *const libc::c_char,
out_value: *mut u64,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief get value for given key"]
#[doc = ""]
#[doc = " These functions retrieve the data of an entry, given its key. If key does not"]
#[doc = " exist, or the requested variable type doesn't match the type which was used"]
#[doc = " when setting a value, an error is returned."]
#[doc = ""]
#[doc = " In case of any error, out_value is not modified."]
#[doc = ""]
#[doc = " All functions expect out_value to be a pointer to an already allocated variable"]
#[doc = " of the given type."]
#[doc = ""]
#[doc = " nvs_get_str and nvs_get_blob functions support WinAPI-style length queries."]
#[doc = " To get the size necessary to store the value, call nvs_get_str or nvs_get_blob"]
#[doc = " with zero out_value and non-zero pointer to length. Variable pointed to"]
#[doc = " by length argument will be set to the required length. For nvs_get_str,"]
#[doc = " this length includes the zero terminator. When calling nvs_get_str and"]
#[doc = " nvs_get_blob with non-zero out_value, length has to be non-zero and has to"]
#[doc = " point to the length available in out_value."]
#[doc = " It is suggested that nvs_get/set_str is used for zero-terminated C strings, and"]
#[doc = " nvs_get/set_blob used for arbitrary data structures."]
#[doc = ""]
#[doc = " \\code{c}"]
#[doc = " // Example (without error checking) of using nvs_get_str to get a string into dynamic array:"]
#[doc = " size_t required_size;"]
#[doc = " nvs_get_str(my_handle, \"server_name\", NULL, &required_size);"]
#[doc = " char* server_name = malloc(required_size);"]
#[doc = " nvs_get_str(my_handle, \"server_name\", server_name, &required_size);"]
#[doc = ""]
#[doc = " // Example (without error checking) of using nvs_get_blob to get a binary data"]
#[doc = " into a static array:"]
#[doc = " uint8_t mac_addr[6];"]
#[doc = " size_t size = sizeof(mac_addr);"]
#[doc = " nvs_get_blob(my_handle, \"dst_mac_addr\", mac_addr, &size);"]
#[doc = " \\endcode"]
#[doc = ""]
#[doc = " @param[in] handle Handle obtained from nvs_open function."]
#[doc = " @param[in] key Key name. Maximal length is determined by the underlying"]
#[doc = " implementation, but is guaranteed to be at least"]
#[doc = " 15 characters. Shouldn't be empty."]
#[doc = " @param out_value Pointer to the output value."]
#[doc = " May be NULL for nvs_get_str and nvs_get_blob, in this"]
#[doc = " case required length will be returned in length argument."]
#[doc = " @param[inout] length A non-zero pointer to the variable holding the length of out_value."]
#[doc = " In case out_value a zero, will be set to the length"]
#[doc = " required to hold the value. In case out_value is not"]
#[doc = " zero, will be set to the actual length of the value"]
#[doc = " written. For nvs_get_str this includes zero terminator."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if the value was retrieved successfully"]
#[doc = " - ESP_ERR_NVS_NOT_FOUND if the requested key doesn't exist"]
#[doc = " - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL"]
#[doc = " - ESP_ERR_NVS_INVALID_NAME if key name doesn't satisfy constraints"]
#[doc = " - ESP_ERR_NVS_INVALID_LENGTH if length is not sufficient to store data"]
pub fn nvs_get_str(
handle: nvs_handle_t,
key: *const libc::c_char,
out_value: *mut libc::c_char,
length: *mut size_t,
) -> esp_err_t;
}
extern "C" {
pub fn nvs_get_blob(
handle: nvs_handle_t,
key: *const libc::c_char,
out_value: *mut libc::c_void,
length: *mut size_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Erase key-value pair with given key name."]
#[doc = ""]
#[doc = " Note that actual storage may not be updated until nvs_commit function is called."]
#[doc = ""]
#[doc = " @param[in] handle Storage handle obtained with nvs_open."]
#[doc = " Handles that were opened read only cannot be used."]
#[doc = ""]
#[doc = " @param[in] key Key name. Maximal length is determined by the underlying"]
#[doc = " implementation, but is guaranteed to be at least"]
#[doc = " 15 characters. Shouldn't be empty."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if erase operation was successful"]
#[doc = " - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL"]
#[doc = " - ESP_ERR_NVS_READ_ONLY if handle was opened as read only"]
#[doc = " - ESP_ERR_NVS_NOT_FOUND if the requested key doesn't exist"]
#[doc = " - other error codes from the underlying storage driver"]
pub fn nvs_erase_key(handle: nvs_handle_t, key: *const libc::c_char) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Erase all key-value pairs in a namespace"]
#[doc = ""]
#[doc = " Note that actual storage may not be updated until nvs_commit function is called."]
#[doc = ""]
#[doc = " @param[in] handle Storage handle obtained with nvs_open."]
#[doc = " Handles that were opened read only cannot be used."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if erase operation was successful"]
#[doc = " - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL"]
#[doc = " - ESP_ERR_NVS_READ_ONLY if handle was opened as read only"]
#[doc = " - other error codes from the underlying storage driver"]
pub fn nvs_erase_all(handle: nvs_handle_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Write any pending changes to non-volatile storage"]
#[doc = ""]
#[doc = " After setting any values, nvs_commit() must be called to ensure changes are written"]
#[doc = " to non-volatile storage. Individual implementations may write to storage at other times,"]
#[doc = " but this is not guaranteed."]
#[doc = ""]
#[doc = " @param[in] handle Storage handle obtained with nvs_open."]
#[doc = " Handles that were opened read only cannot be used."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if the changes have been written successfully"]
#[doc = " - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL"]
#[doc = " - other error codes from the underlying storage driver"]
pub fn nvs_commit(handle: nvs_handle_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Close the storage handle and free any allocated resources"]
#[doc = ""]
#[doc = " This function should be called for each handle opened with nvs_open once"]
#[doc = " the handle is not in use any more. Closing the handle may not automatically"]
#[doc = " write the changes to nonvolatile storage. This has to be done explicitly using"]
#[doc = " nvs_commit function."]
#[doc = " Once this function is called on a handle, the handle should no longer be used."]
#[doc = ""]
#[doc = " @param[in] handle Storage handle to close"]
pub fn nvs_close(handle: nvs_handle_t);
}
#[doc = " @note Info about storage space NVS."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct nvs_stats_t {
#[doc = "< Amount of used entries."]
pub used_entries: size_t,
#[doc = "< Amount of free entries."]
pub free_entries: size_t,
#[doc = "< Amount all available entries."]
pub total_entries: size_t,
#[doc = "< Amount name space."]
pub namespace_count: size_t,
}
extern "C" {
#[doc = " @brief Fill structure nvs_stats_t. It provides info about used memory the partition."]
#[doc = ""]
#[doc = " This function calculates to runtime the number of used entries, free entries, total entries,"]
#[doc = " and amount namespace in partition."]
#[doc = ""]
#[doc = " \\code{c}"]
#[doc = " // Example of nvs_get_stats() to get the number of used entries and free entries:"]
#[doc = " nvs_stats_t nvs_stats;"]
#[doc = " nvs_get_stats(NULL, &nvs_stats);"]
#[doc = " printf(\"Count: UsedEntries = (%d), FreeEntries = (%d), AllEntries = (%d)\\n\","]
#[doc = "nvs_stats.used_entries, nvs_stats.free_entries, nvs_stats.total_entries);"]
#[doc = " \\endcode"]
#[doc = ""]
#[doc = " @param[in] part_name Partition name NVS in the partition table."]
#[doc = " If pass a NULL than will use NVS_DEFAULT_PART_NAME (\"nvs\")."]
#[doc = ""]
#[doc = " @param[out] nvs_stats Returns filled structure nvs_states_t."]
#[doc = " It provides info about used memory the partition."]
#[doc = ""]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if the changes have been written successfully."]
#[doc = " Return param nvs_stats will be filled."]
#[doc = " - ESP_ERR_NVS_PART_NOT_FOUND if the partition with label \"name\" is not found."]
#[doc = " Return param nvs_stats will be filled 0."]
#[doc = " - ESP_ERR_NVS_NOT_INITIALIZED if the storage driver is not initialized."]
#[doc = " Return param nvs_stats will be filled 0."]
#[doc = " - ESP_ERR_INVALID_ARG if nvs_stats equal to NULL."]
#[doc = " - ESP_ERR_INVALID_STATE if there is page with the status of INVALID."]
#[doc = " Return param nvs_stats will be filled not with correct values because"]
#[doc = " not all pages will be counted. Counting will be interrupted at the first INVALID page."]
pub fn nvs_get_stats(part_name: *const libc::c_char, nvs_stats: *mut nvs_stats_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Calculate all entries in a namespace."]
#[doc = ""]
#[doc = " Note that to find out the total number of records occupied by the namespace,"]
#[doc = " add one to the returned value used_entries (if err is equal to ESP_OK)."]
#[doc = " Because the name space entry takes one entry."]
#[doc = ""]
#[doc = " \\code{c}"]
#[doc = " // Example of nvs_get_used_entry_count() to get amount of all key-value pairs in one namespace:"]
#[doc = " nvs_handle_t handle;"]
#[doc = " nvs_open(\"namespace1\", NVS_READWRITE, &handle);"]
#[doc = " ..."]
#[doc = " size_t used_entries;"]
#[doc = " size_t total_entries_namespace;"]
#[doc = " if(nvs_get_used_entry_count(handle, &used_entries) == ESP_OK){"]
#[doc = " // the total number of records occupied by the namespace"]
#[doc = " total_entries_namespace = used_entries + 1;"]
#[doc = " }"]
#[doc = " \\endcode"]
#[doc = ""]
#[doc = " @param[in] handle Handle obtained from nvs_open function."]
#[doc = ""]
#[doc = " @param[out] used_entries Returns amount of used entries from a namespace."]
#[doc = ""]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if the changes have been written successfully."]
#[doc = " Return param used_entries will be filled valid value."]
#[doc = " - ESP_ERR_NVS_NOT_INITIALIZED if the storage driver is not initialized."]
#[doc = " Return param used_entries will be filled 0."]
#[doc = " - ESP_ERR_NVS_INVALID_HANDLE if handle has been closed or is NULL."]
#[doc = " Return param used_entries will be filled 0."]
#[doc = " - ESP_ERR_INVALID_ARG if used_entries equal to NULL."]
#[doc = " - Other error codes from the underlying storage driver."]
#[doc = " Return param used_entries will be filled 0."]
pub fn nvs_get_used_entry_count(handle: nvs_handle_t, used_entries: *mut size_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Create an iterator to enumerate NVS entries based on one or more parameters"]
#[doc = ""]
#[doc = " \\code{c}"]
#[doc = " // Example of listing all the key-value pairs of any type under specified partition and namespace"]
#[doc = " nvs_iterator_t it = nvs_entry_find(partition, namespace, NVS_TYPE_ANY);"]
#[doc = " while (it != NULL) {"]
#[doc = " nvs_entry_info_t info;"]
#[doc = " nvs_entry_info(it, &info);"]
#[doc = " it = nvs_entry_next(it);"]
#[doc = " printf(\"key '%s', type '%d' \\n\", info.key, info.type);"]
#[doc = " };"]
#[doc = " // Note: no need to release iterator obtained from nvs_entry_find function when"]
#[doc = " // nvs_entry_find or nvs_entry_next function return NULL, indicating no other"]
#[doc = " // element for specified criteria was found."]
#[doc = " }"]
#[doc = " \\endcode"]
#[doc = ""]
#[doc = " @param[in] part_name Partition name"]
#[doc = ""]
#[doc = " @param[in] namespace_name Set this value if looking for entries with"]
#[doc = " a specific namespace. Pass NULL otherwise."]
#[doc = ""]
#[doc = " @param[in] type One of nvs_type_t values."]
#[doc = ""]
#[doc = " @return"]
#[doc = " Iterator used to enumerate all the entries found,"]
#[doc = " or NULL if no entry satisfying criteria was found."]
#[doc = " Iterator obtained through this function has to be released"]
#[doc = " using nvs_release_iterator when not used any more."]
pub fn nvs_entry_find(
part_name: *const libc::c_char,
namespace_name: *const libc::c_char,
type_: nvs_type_t,
) -> nvs_iterator_t;
}
extern "C" {
#[doc = " @brief Returns next item matching the iterator criteria, NULL if no such item exists."]
#[doc = ""]
#[doc = " Note that any copies of the iterator will be invalid after this call."]
#[doc = ""]
#[doc = " @param[in] iterator Iterator obtained from nvs_entry_find function. Must be non-NULL."]
#[doc = ""]
#[doc = " @return"]
#[doc = " NULL if no entry was found, valid nvs_iterator_t otherwise."]
pub fn nvs_entry_next(iterator: nvs_iterator_t) -> nvs_iterator_t;
}
extern "C" {
#[doc = " @brief Fills nvs_entry_info_t structure with information about entry pointed to by the iterator."]
#[doc = ""]
#[doc = " @param[in] iterator Iterator obtained from nvs_entry_find or nvs_entry_next function. Must be non-NULL."]
#[doc = ""]
#[doc = " @param[out] out_info Structure to which entry information is copied."]
pub fn nvs_entry_info(iterator: nvs_iterator_t, out_info: *mut nvs_entry_info_t);
}
extern "C" {
#[doc = " @brief Release iterator"]
#[doc = ""]
#[doc = " @param[in] iterator Release iterator obtained from nvs_entry_find function. NULL argument is allowed."]
#[doc = ""]
pub fn nvs_release_iterator(iterator: nvs_iterator_t);
}
#[doc = " @brief Key for encryption and decryption"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct nvs_sec_cfg_t {
#[doc = "< XTS encryption and decryption key"]
pub eky: [u8; 32usize],
#[doc = "< XTS tweak key"]
pub tky: [u8; 32usize],
}
extern "C" {
#[doc = " @brief Initialize the default NVS partition."]
#[doc = ""]
#[doc = " This API initialises the default NVS partition. The default NVS partition"]
#[doc = " is the one that is labeled \"nvs\" in the partition table."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if storage was successfully initialized."]
#[doc = " - ESP_ERR_NVS_NO_FREE_PAGES if the NVS storage contains no empty pages"]
#[doc = " (which may happen if NVS partition was truncated)"]
#[doc = " - ESP_ERR_NOT_FOUND if no partition with label \"nvs\" is found in the partition table"]
#[doc = " - one of the error codes from the underlying flash storage driver"]
pub fn nvs_flash_init() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Initialize NVS flash storage for the specified partition."]
#[doc = ""]
#[doc = " @param[in] partition_label Label of the partition. Must be no longer than 16 characters."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if storage was successfully initialized."]
#[doc = " - ESP_ERR_NVS_NO_FREE_PAGES if the NVS storage contains no empty pages"]
#[doc = " (which may happen if NVS partition was truncated)"]
#[doc = " - ESP_ERR_NOT_FOUND if specified partition is not found in the partition table"]
#[doc = " - one of the error codes from the underlying flash storage driver"]
pub fn nvs_flash_init_partition(partition_label: *const libc::c_char) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Deinitialize NVS storage for the default NVS partition"]
#[doc = ""]
#[doc = " Default NVS partition is the partition with \"nvs\" label in the partition table."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success (storage was deinitialized)"]
#[doc = " - ESP_ERR_NVS_NOT_INITIALIZED if the storage was not initialized prior to this call"]
pub fn nvs_flash_deinit() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Deinitialize NVS storage for the given NVS partition"]
#[doc = ""]
#[doc = " @param[in] partition_label Label of the partition"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_NVS_NOT_INITIALIZED if the storage for given partition was not"]
#[doc = " initialized prior to this call"]
pub fn nvs_flash_deinit_partition(partition_label: *const libc::c_char) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Erase the default NVS partition"]
#[doc = ""]
#[doc = " Erases all contents of the default NVS partition (one with label \"nvs\")."]
#[doc = ""]
#[doc = " @note If the partition is initialized, this function first de-initializes it. Afterwards, the partition has to"]
#[doc = " be initialized again to be used."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_NOT_FOUND if there is no NVS partition labeled \"nvs\" in the"]
#[doc = " partition table"]
#[doc = " - different error in case de-initialization fails (shouldn't happen)"]
pub fn nvs_flash_erase() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Erase specified NVS partition"]
#[doc = ""]
#[doc = " Erase all content of a specified NVS partition"]
#[doc = ""]
#[doc = " @note If the partition is initialized, this function first de-initializes it. Afterwards, the partition has to"]
#[doc = " be initialized again to be used."]
#[doc = ""]
#[doc = " @param[in] part_name Name (label) of the partition which should be erased"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_NOT_FOUND if there is no NVS partition with the specified name"]
#[doc = " in the partition table"]
#[doc = " - different error in case de-initialization fails (shouldn't happen)"]
pub fn nvs_flash_erase_partition(part_name: *const libc::c_char) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Initialize the default NVS partition."]
#[doc = ""]
#[doc = " This API initialises the default NVS partition. The default NVS partition"]
#[doc = " is the one that is labeled \"nvs\" in the partition table."]
#[doc = ""]
#[doc = " @param[in] cfg Security configuration (keys) to be used for NVS encryption/decryption."]
#[doc = " If cfg is NULL, no encryption is used."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK if storage was successfully initialized."]
#[doc = " - ESP_ERR_NVS_NO_FREE_PAGES if the NVS storage contains no empty pages"]
#[doc = " (which may happen if NVS partition was truncated)"]
#[doc = " - ESP_ERR_NOT_FOUND if no partition with label \"nvs\" is found in the partition table"]
#[doc = " - one of the error codes from the underlying flash storage driver"]
pub fn nvs_flash_secure_init(cfg: *mut nvs_sec_cfg_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Initialize NVS flash storage for the specified partition."]
#[doc = ""]
#[doc = " @param[in] partition_label Label of the partition. Note that internally a reference to"]
#[doc = " passed value is kept and it should be accessible for future operations"]
#[doc = ""]
#[doc = " @param[in] cfg Security configuration (keys) to be used for NVS encryption/decryption."]
#[doc = " If cfg is null, no encryption/decryption is used."]
#[doc = " @return"]
#[doc = " - ESP_OK if storage was successfully initialized."]
#[doc = " - ESP_ERR_NVS_NO_FREE_PAGES if the NVS storage contains no empty pages"]
#[doc = " (which may happen if NVS partition was truncated)"]
#[doc = " - ESP_ERR_NOT_FOUND if specified partition is not found in the partition table"]
#[doc = " - one of the error codes from the underlying flash storage driver"]
pub fn nvs_flash_secure_init_partition(
partition_label: *const libc::c_char,
cfg: *mut nvs_sec_cfg_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Generate and store NVS keys in the provided esp partition"]
#[doc = ""]
#[doc = " @param[in] partition Pointer to partition structure obtained using"]
#[doc = " esp_partition_find_first or esp_partition_get."]
#[doc = " Must be non-NULL."]
#[doc = " @param[out] cfg Pointer to nvs security configuration structure."]
#[doc = " Pointer must be non-NULL."]
#[doc = " Generated keys will be populated in this structure."]
#[doc = ""]
#[doc = ""]
#[doc = " @return"]
#[doc = " -ESP_OK, if cfg was read successfully;"]
#[doc = " -or error codes from esp_partition_write/erase APIs."]
pub fn nvs_flash_generate_keys(
partition: *const esp_partition_t,
cfg: *mut nvs_sec_cfg_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Read NVS security configuration from a partition."]
#[doc = ""]
#[doc = " @param[in] partition Pointer to partition structure obtained using"]
#[doc = " esp_partition_find_first or esp_partition_get."]
#[doc = " Must be non-NULL."]
#[doc = " @param[out] cfg Pointer to nvs security configuration structure."]
#[doc = " Pointer must be non-NULL."]
#[doc = ""]
#[doc = " @note Provided parition is assumed to be marked 'encrypted'."]
#[doc = ""]
#[doc = " @return"]
#[doc = " -ESP_OK, if cfg was read successfully;"]
#[doc = " -ESP_ERR_NVS_KEYS_NOT_INITIALIZED, if the partition is not yet written with keys."]
#[doc = " -ESP_ERR_NVS_CORRUPT_KEY_PART, if the partition containing keys is found to be corrupt"]
#[doc = " -or error codes from esp_partition_read API."]
pub fn nvs_flash_read_security_cfg(
partition: *const esp_partition_t,
cfg: *mut nvs_sec_cfg_t,
) -> esp_err_t;
}
pub type esp_event_base_t = *const libc::c_char;
pub type esp_event_loop_handle_t = *mut libc::c_void;
pub type esp_event_handler_t = ::core::option::Option<
unsafe extern "C" fn(
event_handler_arg: *mut libc::c_void,
event_base: esp_event_base_t,
event_id: i32,
event_data: *mut libc::c_void,
),
>;
pub type esp_event_handler_instance_t = *mut libc::c_void;
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_interface_t {
#[doc = "< ESP32 station interface"]
ESP_IF_WIFI_STA = 0,
#[doc = "< ESP32 soft-AP interface"]
ESP_IF_WIFI_AP = 1,
#[doc = "< ESP32 ethernet interface"]
ESP_IF_ETH = 2,
ESP_IF_MAX = 3,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_mode_t {
#[doc = "< null mode"]
WIFI_MODE_NULL = 0,
#[doc = "< WiFi station mode"]
WIFI_MODE_STA = 1,
#[doc = "< WiFi soft-AP mode"]
WIFI_MODE_AP = 2,
#[doc = "< WiFi station + soft-AP mode"]
WIFI_MODE_APSTA = 3,
WIFI_MODE_MAX = 4,
}
pub use self::esp_interface_t as wifi_interface_t;
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_country_policy_t {
#[doc = "< Country policy is auto, use the country info of AP to which the station is connected"]
WIFI_COUNTRY_POLICY_AUTO = 0,
#[doc = "< Country policy is manual, always use the configured country info"]
WIFI_COUNTRY_POLICY_MANUAL = 1,
}
#[doc = " @brief Structure describing WiFi country-based regional restrictions."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_country_t {
#[doc = "< country code string"]
pub cc: [libc::c_char; 3usize],
#[doc = "< start channel"]
pub schan: u8,
#[doc = "< total channel number"]
pub nchan: u8,
#[doc = "< This field is used for getting WiFi maximum transmitting power, call esp_wifi_set_max_tx_power to set the maximum transmitting power."]
pub max_tx_power: i8,
#[doc = "< country policy"]
pub policy: wifi_country_policy_t,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_auth_mode_t {
#[doc = "< authenticate mode : open"]
WIFI_AUTH_OPEN = 0,
#[doc = "< authenticate mode : WEP"]
WIFI_AUTH_WEP = 1,
#[doc = "< authenticate mode : WPA_PSK"]
WIFI_AUTH_WPA_PSK = 2,
#[doc = "< authenticate mode : WPA2_PSK"]
WIFI_AUTH_WPA2_PSK = 3,
#[doc = "< authenticate mode : WPA_WPA2_PSK"]
WIFI_AUTH_WPA_WPA2_PSK = 4,
#[doc = "< authenticate mode : WPA2_ENTERPRISE"]
WIFI_AUTH_WPA2_ENTERPRISE = 5,
#[doc = "< authenticate mode : WPA3_PSK"]
WIFI_AUTH_WPA3_PSK = 6,
#[doc = "< authenticate mode : WPA2_WPA3_PSK"]
WIFI_AUTH_WPA2_WPA3_PSK = 7,
WIFI_AUTH_MAX = 8,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_err_reason_t {
WIFI_REASON_UNSPECIFIED = 1,
WIFI_REASON_AUTH_EXPIRE = 2,
WIFI_REASON_AUTH_LEAVE = 3,
WIFI_REASON_ASSOC_EXPIRE = 4,
WIFI_REASON_ASSOC_TOOMANY = 5,
WIFI_REASON_NOT_AUTHED = 6,
WIFI_REASON_NOT_ASSOCED = 7,
WIFI_REASON_ASSOC_LEAVE = 8,
WIFI_REASON_ASSOC_NOT_AUTHED = 9,
WIFI_REASON_DISASSOC_PWRCAP_BAD = 10,
WIFI_REASON_DISASSOC_SUPCHAN_BAD = 11,
WIFI_REASON_IE_INVALID = 13,
WIFI_REASON_MIC_FAILURE = 14,
WIFI_REASON_4WAY_HANDSHAKE_TIMEOUT = 15,
WIFI_REASON_GROUP_KEY_UPDATE_TIMEOUT = 16,
WIFI_REASON_IE_IN_4WAY_DIFFERS = 17,
WIFI_REASON_GROUP_CIPHER_INVALID = 18,
WIFI_REASON_PAIRWISE_CIPHER_INVALID = 19,
WIFI_REASON_AKMP_INVALID = 20,
WIFI_REASON_UNSUPP_RSN_IE_VERSION = 21,
WIFI_REASON_INVALID_RSN_IE_CAP = 22,
WIFI_REASON_802_1X_AUTH_FAILED = 23,
WIFI_REASON_CIPHER_SUITE_REJECTED = 24,
WIFI_REASON_INVALID_PMKID = 53,
WIFI_REASON_BEACON_TIMEOUT = 200,
WIFI_REASON_NO_AP_FOUND = 201,
WIFI_REASON_AUTH_FAIL = 202,
WIFI_REASON_ASSOC_FAIL = 203,
WIFI_REASON_HANDSHAKE_TIMEOUT = 204,
WIFI_REASON_CONNECTION_FAIL = 205,
WIFI_REASON_AUTH_CHANGED = 206,
WIFI_REASON_AP_TSF_RESET = 207,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_second_chan_t {
#[doc = "< the channel width is HT20"]
WIFI_SECOND_CHAN_NONE = 0,
#[doc = "< the channel width is HT40 and the secondary channel is above the primary channel"]
WIFI_SECOND_CHAN_ABOVE = 1,
#[doc = "< the channel width is HT40 and the secondary channel is below the primary channel"]
WIFI_SECOND_CHAN_BELOW = 2,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_scan_type_t {
#[doc = "< active scan"]
WIFI_SCAN_TYPE_ACTIVE = 0,
#[doc = "< passive scan"]
WIFI_SCAN_TYPE_PASSIVE = 1,
}
#[doc = " @brief Range of active scan times per channel"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_active_scan_time_t {
#[doc = "< minimum active scan time per channel, units: millisecond"]
pub min: u32,
#[doc = "< maximum active scan time per channel, units: millisecond, values above 1500ms may"]
#[doc = "cause station to disconnect from AP and are not recommended."]
pub max: u32,
}
#[doc = " @brief Aggregate of active & passive scan time per channel"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_scan_time_t {
#[doc = "< active scan time per channel, units: millisecond."]
pub active: wifi_active_scan_time_t,
#[doc = "< passive scan time per channel, units: millisecond, values above 1500ms may"]
#[doc = "cause station to disconnect from AP and are not recommended."]
pub passive: u32,
}
#[doc = " @brief Parameters for an SSID scan."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_scan_config_t {
#[doc = "< SSID of AP"]
pub ssid: *mut u8,
#[doc = "< MAC address of AP"]
pub bssid: *mut u8,
#[doc = "< channel, scan the specific channel"]
pub channel: u8,
#[doc = "< enable to scan AP whose SSID is hidden"]
pub show_hidden: bool,
#[doc = "< scan type, active or passive"]
pub scan_type: wifi_scan_type_t,
#[doc = "< scan time per channel"]
pub scan_time: wifi_scan_time_t,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_cipher_type_t {
#[doc = "< the cipher type is none"]
WIFI_CIPHER_TYPE_NONE = 0,
#[doc = "< the cipher type is WEP40"]
WIFI_CIPHER_TYPE_WEP40 = 1,
#[doc = "< the cipher type is WEP104"]
WIFI_CIPHER_TYPE_WEP104 = 2,
#[doc = "< the cipher type is TKIP"]
WIFI_CIPHER_TYPE_TKIP = 3,
#[doc = "< the cipher type is CCMP"]
WIFI_CIPHER_TYPE_CCMP = 4,
#[doc = "< the cipher type is TKIP and CCMP"]
WIFI_CIPHER_TYPE_TKIP_CCMP = 5,
#[doc = "< the cipher type is AES-CMAC-128"]
WIFI_CIPHER_TYPE_AES_CMAC128 = 6,
#[doc = "< the cipher type is unknown"]
WIFI_CIPHER_TYPE_UNKNOWN = 7,
}
#[repr(u32)]
#[doc = " @brief WiFi antenna"]
#[doc = ""]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_ant_t {
#[doc = "< WiFi antenna 0"]
WIFI_ANT_ANT0 = 0,
#[doc = "< WiFi antenna 1"]
WIFI_ANT_ANT1 = 1,
#[doc = "< Invalid WiFi antenna"]
WIFI_ANT_MAX = 2,
}
#[doc = " @brief Description of a WiFi AP"]
#[repr(C)]
#[derive(Copy, Clone)]
pub struct wifi_ap_record_t {
#[doc = "< MAC address of AP"]
pub bssid: [u8; 6usize],
#[doc = "< SSID of AP"]
pub ssid: [u8; 33usize],
#[doc = "< channel of AP"]
pub primary: u8,
#[doc = "< secondary channel of AP"]
pub second: wifi_second_chan_t,
#[doc = "< signal strength of AP"]
pub rssi: i8,
#[doc = "< authmode of AP"]
pub authmode: wifi_auth_mode_t,
#[doc = "< pairwise cipher of AP"]
pub pairwise_cipher: wifi_cipher_type_t,
#[doc = "< group cipher of AP"]
pub group_cipher: wifi_cipher_type_t,
#[doc = "< antenna used to receive beacon from AP"]
pub ant: wifi_ant_t,
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
#[doc = "< country information of AP"]
pub country: wifi_country_t,
}
impl wifi_ap_record_t {
#[inline]
pub fn phy_11b(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_phy_11b(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn phy_11g(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_phy_11g(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn phy_11n(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_phy_11n(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn phy_lr(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_phy_lr(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn wps(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 1u8) as u32) }
}
#[inline]
pub fn set_wps(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(5usize, 27u8) as u32) }
}
#[inline]
pub fn set_reserved(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(5usize, 27u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
phy_11b: u32,
phy_11g: u32,
phy_11n: u32,
phy_lr: u32,
wps: u32,
reserved: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let phy_11b: u32 = unsafe { ::core::mem::transmute(phy_11b) };
phy_11b as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let phy_11g: u32 = unsafe { ::core::mem::transmute(phy_11g) };
phy_11g as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let phy_11n: u32 = unsafe { ::core::mem::transmute(phy_11n) };
phy_11n as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let phy_lr: u32 = unsafe { ::core::mem::transmute(phy_lr) };
phy_lr as u64
});
__bindgen_bitfield_unit.set(4usize, 1u8, {
let wps: u32 = unsafe { ::core::mem::transmute(wps) };
wps as u64
});
__bindgen_bitfield_unit.set(5usize, 27u8, {
let reserved: u32 = unsafe { ::core::mem::transmute(reserved) };
reserved as u64
});
__bindgen_bitfield_unit
}
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_scan_method_t {
#[doc = "< Do fast scan, scan will end after find SSID match AP"]
WIFI_FAST_SCAN = 0,
#[doc = "< All channel scan, scan will end after scan all the channel"]
WIFI_ALL_CHANNEL_SCAN = 1,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_sort_method_t {
#[doc = "< Sort match AP in scan list by RSSI"]
WIFI_CONNECT_AP_BY_SIGNAL = 0,
#[doc = "< Sort match AP in scan list by security mode"]
WIFI_CONNECT_AP_BY_SECURITY = 1,
}
#[doc = " @brief Structure describing parameters for a WiFi fast scan"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_scan_threshold_t {
#[doc = "< The minimum rssi to accept in the fast scan mode"]
pub rssi: i8,
#[doc = "< The weakest authmode to accept in the fast scan mode"]
pub authmode: wifi_auth_mode_t,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_ps_type_t {
#[doc = "< No power save"]
WIFI_PS_NONE = 0,
#[doc = "< Minimum modem power saving. In this mode, station wakes up to receive beacon every DTIM period"]
WIFI_PS_MIN_MODEM = 1,
#[doc = "< Maximum modem power saving. In this mode, interval to receive beacons is determined by the listen_interval parameter in wifi_sta_config_t"]
WIFI_PS_MAX_MODEM = 2,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_bandwidth_t {
WIFI_BW_HT20 = 1,
WIFI_BW_HT40 = 2,
}
#[doc = " Configuration structure for Protected Management Frame"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_pmf_config_t {
#[doc = "< Advertizes support for Protected Management Frame. Device will prefer to connect in PMF mode if other device also advertizes PMF capability."]
pub capable: bool,
#[doc = "< Advertizes that Protected Management Frame is required. Device will not associate to non-PMF capable devices."]
pub required: bool,
}
#[doc = " @brief Soft-AP configuration settings for the ESP32"]
#[repr(C)]
#[derive(Copy, Clone)]
pub struct wifi_ap_config_t {
#[doc = "< SSID of ESP32 soft-AP. If ssid_len field is 0, this must be a Null terminated string. Otherwise, length is set according to ssid_len."]
pub ssid: [u8; 32usize],
#[doc = "< Password of ESP32 soft-AP. Null terminated string."]
pub password: [u8; 64usize],
#[doc = "< Optional length of SSID field."]
pub ssid_len: u8,
#[doc = "< Channel of ESP32 soft-AP"]
pub channel: u8,
#[doc = "< Auth mode of ESP32 soft-AP. Do not support AUTH_WEP in soft-AP mode"]
pub authmode: wifi_auth_mode_t,
#[doc = "< Broadcast SSID or not, default 0, broadcast the SSID"]
pub ssid_hidden: u8,
#[doc = "< Max number of stations allowed to connect in, default 4, max 10"]
pub max_connection: u8,
#[doc = "< Beacon interval, 100 ~ 60000 ms, default 100 ms"]
pub beacon_interval: u16,
}
#[doc = " @brief STA configuration settings for the ESP32"]
#[repr(C)]
#[derive(Copy, Clone)]
pub struct wifi_sta_config_t {
#[doc = "< SSID of target AP. Null terminated string."]
pub ssid: [u8; 32usize],
#[doc = "< Password of target AP. Null terminated string."]
pub password: [u8; 64usize],
#[doc = "< do all channel scan or fast scan"]
pub scan_method: wifi_scan_method_t,
#[doc = "< whether set MAC address of target AP or not. Generally, station_config.bssid_set needs to be 0; and it needs to be 1 only when users need to check the MAC address of the AP."]
pub bssid_set: bool,
#[doc = "< MAC address of target AP"]
pub bssid: [u8; 6usize],
#[doc = "< channel of target AP. Set to 1~13 to scan starting from the specified channel before connecting to AP. If the channel of AP is unknown, set it to 0."]
pub channel: u8,
#[doc = "< Listen interval for ESP32 station to receive beacon when WIFI_PS_MAX_MODEM is set. Units: AP beacon intervals. Defaults to 3 if set to 0."]
pub listen_interval: u16,
#[doc = "< sort the connect AP in the list by rssi or security mode"]
pub sort_method: wifi_sort_method_t,
#[doc = "< When sort_method is set, only APs which have an auth mode that is more secure than the selected auth mode and a signal stronger than the minimum RSSI will be used."]
pub threshold: wifi_scan_threshold_t,
#[doc = "< Configuration for Protected Management Frame. Will be advertized in RSN Capabilities in RSN IE."]
pub pmf_cfg: wifi_pmf_config_t,
}
#[doc = " @brief Configuration data for ESP32 AP or STA."]
#[doc = ""]
#[doc = " The usage of this union (for ap or sta configuration) is determined by the accompanying"]
#[doc = " interface argument passed to esp_wifi_set_config() or esp_wifi_get_config()"]
#[doc = ""]
#[repr(C)]
#[derive(Copy, Clone)]
pub union wifi_config_t {
#[doc = "< configuration of AP"]
pub ap: wifi_ap_config_t,
#[doc = "< configuration of STA"]
pub sta: wifi_sta_config_t,
_bindgen_union_align: [u32; 32usize],
}
#[doc = " @brief Description of STA associated with AP"]
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct wifi_sta_info_t {
#[doc = "< mac address"]
pub mac: [u8; 6usize],
#[doc = "< current average rssi of sta connected"]
pub rssi: i8,
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize], u32>,
}
impl wifi_sta_info_t {
#[inline]
pub fn phy_11b(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u32) }
}
#[inline]
pub fn set_phy_11b(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn phy_11g(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 1u8) as u32) }
}
#[inline]
pub fn set_phy_11g(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 1u8, val as u64)
}
}
#[inline]
pub fn phy_11n(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(2usize, 1u8) as u32) }
}
#[inline]
pub fn set_phy_11n(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(2usize, 1u8, val as u64)
}
}
#[inline]
pub fn phy_lr(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(3usize, 1u8) as u32) }
}
#[inline]
pub fn set_phy_lr(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(3usize, 1u8, val as u64)
}
}
#[inline]
pub fn reserved(&self) -> u32 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 28u8) as u32) }
}
#[inline]
pub fn set_reserved(&mut self, val: u32) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 28u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
phy_11b: u32,
phy_11g: u32,
phy_11n: u32,
phy_lr: u32,
reserved: u32,
) -> __BindgenBitfieldUnit<[u8; 4usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let phy_11b: u32 = unsafe { ::core::mem::transmute(phy_11b) };
phy_11b as u64
});
__bindgen_bitfield_unit.set(1usize, 1u8, {
let phy_11g: u32 = unsafe { ::core::mem::transmute(phy_11g) };
phy_11g as u64
});
__bindgen_bitfield_unit.set(2usize, 1u8, {
let phy_11n: u32 = unsafe { ::core::mem::transmute(phy_11n) };
phy_11n as u64
});
__bindgen_bitfield_unit.set(3usize, 1u8, {
let phy_lr: u32 = unsafe { ::core::mem::transmute(phy_lr) };
phy_lr as u64
});
__bindgen_bitfield_unit.set(4usize, 28u8, {
let reserved: u32 = unsafe { ::core::mem::transmute(reserved) };
reserved as u64
});
__bindgen_bitfield_unit
}
}
#[doc = " @brief List of stations associated with the ESP32 Soft-AP"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_sta_list_t {
#[doc = "< station list"]
pub sta: [wifi_sta_info_t; 10usize],
#[doc = "< number of stations in the list (other entries are invalid)"]
pub num: libc::c_int,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_storage_t {
#[doc = "< all configuration will store in both memory and flash"]
WIFI_STORAGE_FLASH = 0,
#[doc = "< all configuration will only store in the memory"]
WIFI_STORAGE_RAM = 1,
}
#[repr(u32)]
#[doc = " @brief Vendor Information Element type"]
#[doc = ""]
#[doc = " Determines the frame type that the IE will be associated with."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_vendor_ie_type_t {
WIFI_VND_IE_TYPE_BEACON = 0,
WIFI_VND_IE_TYPE_PROBE_REQ = 1,
WIFI_VND_IE_TYPE_PROBE_RESP = 2,
WIFI_VND_IE_TYPE_ASSOC_REQ = 3,
WIFI_VND_IE_TYPE_ASSOC_RESP = 4,
}
#[repr(u32)]
#[doc = " @brief Vendor Information Element index"]
#[doc = ""]
#[doc = " Each IE type can have up to two associated vendor ID elements."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_vendor_ie_id_t {
WIFI_VND_IE_ID_0 = 0,
WIFI_VND_IE_ID_1 = 1,
}
#[doc = " @brief Vendor Information Element header"]
#[doc = ""]
#[doc = " The first bytes of the Information Element will match this header. Payload follows."]
#[repr(C)]
#[derive(Debug)]
pub struct vendor_ie_data_t {
#[doc = "< Should be set to WIFI_VENDOR_IE_ELEMENT_ID (0xDD)"]
pub element_id: u8,
#[doc = "< Length of all bytes in the element data following this field. Minimum 4."]
pub length: u8,
#[doc = "< Vendor identifier (OUI)."]
pub vendor_oui: [u8; 3usize],
#[doc = "< Vendor-specific OUI type."]
pub vendor_oui_type: u8,
#[doc = "< Payload. Length is equal to value in 'length' field, minus 4."]
pub payload: __IncompleteArrayField<u8>,
}
#[doc = " @brief Received packet radio metadata header, this is the common header at the beginning of all promiscuous mode RX callback buffers"]
#[repr(C)]
#[repr(align(4))]
#[derive(Debug, Copy, Clone)]
pub struct wifi_pkt_rx_ctrl_t {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 28usize], u32>,
}
impl wifi_pkt_rx_ctrl_t {
#[inline]
pub fn rssi(&self) -> libc::c_int {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 8u8) as u32) }
}
#[inline]
pub fn set_rssi(&mut self, val: libc::c_int) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 8u8, val as u64)
}
}
#[inline]
pub fn rate(&self) -> libc::c_uint {
unsafe { ::core::mem::transmute(self._bitfield_1.get(8usize, 5u8) as u32) }
}
#[inline]
pub fn set_rate(&mut self, val: libc::c_uint) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(8usize, 5u8, val as u64)
}
}
#[inline]
pub fn sig_mode(&self) -> libc::c_uint {
unsafe { ::core::mem::transmute(self._bitfield_1.get(14usize, 2u8) as u32) }
}
#[inline]
pub fn set_sig_mode(&mut self, val: libc::c_uint) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(14usize, 2u8, val as u64)
}
}
#[inline]
pub fn mcs(&self) -> libc::c_uint {
unsafe { ::core::mem::transmute(self._bitfield_1.get(32usize, 7u8) as u32) }
}
#[inline]
pub fn set_mcs(&mut self, val: libc::c_uint) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(32usize, 7u8, val as u64)
}
}
#[inline]
pub fn cwb(&self) -> libc::c_uint {
unsafe { ::core::mem::transmute(self._bitfield_1.get(39usize, 1u8) as u32) }
}
#[inline]
pub fn set_cwb(&mut self, val: libc::c_uint) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(39usize, 1u8, val as u64)
}
}
#[inline]
pub fn smoothing(&self) -> libc::c_uint {
unsafe { ::core::mem::transmute(self._bitfield_1.get(56usize, 1u8) as u32) }
}
#[inline]
pub fn set_smoothing(&mut self, val: libc::c_uint) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(56usize, 1u8, val as u64)
}
}
#[inline]
pub fn not_sounding(&self) -> libc::c_uint {
unsafe { ::core::mem::transmute(self._bitfield_1.get(57usize, 1u8) as u32) }
}
#[inline]
pub fn set_not_sounding(&mut self, val: libc::c_uint) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(57usize, 1u8, val as u64)
}
}
#[inline]
pub fn aggregation(&self) -> libc::c_uint {
unsafe { ::core::mem::transmute(self._bitfield_1.get(59usize, 1u8) as u32) }
}
#[inline]
pub fn set_aggregation(&mut self, val: libc::c_uint) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(59usize, 1u8, val as u64)
}
}
#[inline]
pub fn stbc(&self) -> libc::c_uint {
unsafe { ::core::mem::transmute(self._bitfield_1.get(60usize, 2u8) as u32) }
}
#[inline]
pub fn set_stbc(&mut self, val: libc::c_uint) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(60usize, 2u8, val as u64)
}
}
#[inline]
pub fn fec_coding(&self) -> libc::c_uint {
unsafe { ::core::mem::transmute(self._bitfield_1.get(62usize, 1u8) as u32) }
}
#[inline]
pub fn set_fec_coding(&mut self, val: libc::c_uint) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(62usize, 1u8, val as u64)
}
}
#[inline]
pub fn sgi(&self) -> libc::c_uint {
unsafe { ::core::mem::transmute(self._bitfield_1.get(63usize, 1u8) as u32) }
}
#[inline]
pub fn set_sgi(&mut self, val: libc::c_uint) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(63usize, 1u8, val as u64)
}
}
#[inline]
pub fn noise_floor(&self) -> libc::c_int {
unsafe { ::core::mem::transmute(self._bitfield_1.get(64usize, 8u8) as u32) }
}
#[inline]
pub fn set_noise_floor(&mut self, val: libc::c_int) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(64usize, 8u8, val as u64)
}
}
#[inline]
pub fn ampdu_cnt(&self) -> libc::c_uint {
unsafe { ::core::mem::transmute(self._bitfield_1.get(72usize, 8u8) as u32) }
}
#[inline]
pub fn set_ampdu_cnt(&mut self, val: libc::c_uint) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(72usize, 8u8, val as u64)
}
}
#[inline]
pub fn channel(&self) -> libc::c_uint {
unsafe { ::core::mem::transmute(self._bitfield_1.get(80usize, 4u8) as u32) }
}
#[inline]
pub fn set_channel(&mut self, val: libc::c_uint) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(80usize, 4u8, val as u64)
}
}
#[inline]
pub fn secondary_channel(&self) -> libc::c_uint {
unsafe { ::core::mem::transmute(self._bitfield_1.get(84usize, 4u8) as u32) }
}
#[inline]
pub fn set_secondary_channel(&mut self, val: libc::c_uint) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(84usize, 4u8, val as u64)
}
}
#[inline]
pub fn timestamp(&self) -> libc::c_uint {
unsafe { ::core::mem::transmute(self._bitfield_1.get(96usize, 32u8) as u32) }
}
#[inline]
pub fn set_timestamp(&mut self, val: libc::c_uint) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(96usize, 32u8, val as u64)
}
}
#[inline]
pub fn ant(&self) -> libc::c_uint {
unsafe { ::core::mem::transmute(self._bitfield_1.get(191usize, 1u8) as u32) }
}
#[inline]
pub fn set_ant(&mut self, val: libc::c_uint) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(191usize, 1u8, val as u64)
}
}
#[inline]
pub fn sig_len(&self) -> libc::c_uint {
unsafe { ::core::mem::transmute(self._bitfield_1.get(192usize, 12u8) as u32) }
}
#[inline]
pub fn set_sig_len(&mut self, val: libc::c_uint) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(192usize, 12u8, val as u64)
}
}
#[inline]
pub fn rx_state(&self) -> libc::c_uint {
unsafe { ::core::mem::transmute(self._bitfield_1.get(216usize, 8u8) as u32) }
}
#[inline]
pub fn set_rx_state(&mut self, val: libc::c_uint) {
unsafe {
let val: u32 = ::core::mem::transmute(val);
self._bitfield_1.set(216usize, 8u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
rssi: libc::c_int,
rate: libc::c_uint,
sig_mode: libc::c_uint,
mcs: libc::c_uint,
cwb: libc::c_uint,
smoothing: libc::c_uint,
not_sounding: libc::c_uint,
aggregation: libc::c_uint,
stbc: libc::c_uint,
fec_coding: libc::c_uint,
sgi: libc::c_uint,
noise_floor: libc::c_int,
ampdu_cnt: libc::c_uint,
channel: libc::c_uint,
secondary_channel: libc::c_uint,
timestamp: libc::c_uint,
ant: libc::c_uint,
sig_len: libc::c_uint,
rx_state: libc::c_uint,
) -> __BindgenBitfieldUnit<[u8; 28usize], u32> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 28usize], u32> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 8u8, {
let rssi: u32 = unsafe { ::core::mem::transmute(rssi) };
rssi as u64
});
__bindgen_bitfield_unit.set(8usize, 5u8, {
let rate: u32 = unsafe { ::core::mem::transmute(rate) };
rate as u64
});
__bindgen_bitfield_unit.set(14usize, 2u8, {
let sig_mode: u32 = unsafe { ::core::mem::transmute(sig_mode) };
sig_mode as u64
});
__bindgen_bitfield_unit.set(32usize, 7u8, {
let mcs: u32 = unsafe { ::core::mem::transmute(mcs) };
mcs as u64
});
__bindgen_bitfield_unit.set(39usize, 1u8, {
let cwb: u32 = unsafe { ::core::mem::transmute(cwb) };
cwb as u64
});
__bindgen_bitfield_unit.set(56usize, 1u8, {
let smoothing: u32 = unsafe { ::core::mem::transmute(smoothing) };
smoothing as u64
});
__bindgen_bitfield_unit.set(57usize, 1u8, {
let not_sounding: u32 = unsafe { ::core::mem::transmute(not_sounding) };
not_sounding as u64
});
__bindgen_bitfield_unit.set(59usize, 1u8, {
let aggregation: u32 = unsafe { ::core::mem::transmute(aggregation) };
aggregation as u64
});
__bindgen_bitfield_unit.set(60usize, 2u8, {
let stbc: u32 = unsafe { ::core::mem::transmute(stbc) };
stbc as u64
});
__bindgen_bitfield_unit.set(62usize, 1u8, {
let fec_coding: u32 = unsafe { ::core::mem::transmute(fec_coding) };
fec_coding as u64
});
__bindgen_bitfield_unit.set(63usize, 1u8, {
let sgi: u32 = unsafe { ::core::mem::transmute(sgi) };
sgi as u64
});
__bindgen_bitfield_unit.set(64usize, 8u8, {
let noise_floor: u32 = unsafe { ::core::mem::transmute(noise_floor) };
noise_floor as u64
});
__bindgen_bitfield_unit.set(72usize, 8u8, {
let ampdu_cnt: u32 = unsafe { ::core::mem::transmute(ampdu_cnt) };
ampdu_cnt as u64
});
__bindgen_bitfield_unit.set(80usize, 4u8, {
let channel: u32 = unsafe { ::core::mem::transmute(channel) };
channel as u64
});
__bindgen_bitfield_unit.set(84usize, 4u8, {
let secondary_channel: u32 = unsafe { ::core::mem::transmute(secondary_channel) };
secondary_channel as u64
});
__bindgen_bitfield_unit.set(96usize, 32u8, {
let timestamp: u32 = unsafe { ::core::mem::transmute(timestamp) };
timestamp as u64
});
__bindgen_bitfield_unit.set(191usize, 1u8, {
let ant: u32 = unsafe { ::core::mem::transmute(ant) };
ant as u64
});
__bindgen_bitfield_unit.set(192usize, 12u8, {
let sig_len: u32 = unsafe { ::core::mem::transmute(sig_len) };
sig_len as u64
});
__bindgen_bitfield_unit.set(216usize, 8u8, {
let rx_state: u32 = unsafe { ::core::mem::transmute(rx_state) };
rx_state as u64
});
__bindgen_bitfield_unit
}
}
#[doc = " @brief Payload passed to 'buf' parameter of promiscuous mode RX callback."]
#[repr(C)]
#[derive(Debug)]
pub struct wifi_promiscuous_pkt_t {
#[doc = "< metadata header"]
pub rx_ctrl: wifi_pkt_rx_ctrl_t,
#[doc = "< Data or management payload. Length of payload is described by rx_ctrl.sig_len. Type of content determined by packet type argument of callback."]
pub payload: __IncompleteArrayField<u8>,
}
#[repr(u32)]
#[doc = " @brief Promiscuous frame type"]
#[doc = ""]
#[doc = " Passed to promiscuous mode RX callback to indicate the type of parameter in the buffer."]
#[doc = ""]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_promiscuous_pkt_type_t {
#[doc = "< Management frame, indicates 'buf' argument is wifi_promiscuous_pkt_t"]
WIFI_PKT_MGMT = 0,
#[doc = "< Control frame, indicates 'buf' argument is wifi_promiscuous_pkt_t"]
WIFI_PKT_CTRL = 1,
#[doc = "< Data frame, indiciates 'buf' argument is wifi_promiscuous_pkt_t"]
WIFI_PKT_DATA = 2,
#[doc = "< Other type, such as MIMO etc. 'buf' argument is wifi_promiscuous_pkt_t but the payload is zero length."]
WIFI_PKT_MISC = 3,
}
#[doc = " @brief Mask for filtering different packet types in promiscuous mode."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_promiscuous_filter_t {
#[doc = "< OR of one or more filter values WIFI_PROMIS_FILTER_*"]
pub filter_mask: u32,
}
#[doc = " @brief Channel state information(CSI) configuration type"]
#[doc = ""]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_csi_config_t {
#[doc = "< enable to receive legacy long training field(lltf) data. Default enabled"]
pub lltf_en: bool,
#[doc = "< enable to receive HT long training field(htltf) data. Default enabled"]
pub htltf_en: bool,
#[doc = "< enable to receive space time block code HT long training field(stbc-htltf2) data. Default enabled"]
pub stbc_htltf2_en: bool,
#[doc = "< enable to generate htlft data by averaging lltf and ht_ltf data when receiving HT packet. Otherwise, use ht_ltf data directly. Default enabled"]
pub ltf_merge_en: bool,
#[doc = "< enable to turn on channel filter to smooth adjacent sub-carrier. Disable it to keep independence of adjacent sub-carrier. Default enabled"]
pub channel_filter_en: bool,
#[doc = "< manually scale the CSI data by left shifting or automatically scale the CSI data. If set true, please set the shift bits. false: automatically. true: manually. Default false"]
pub manu_scale: bool,
#[doc = "< manually left shift bits of the scale of the CSI data. The range of the left shift bits is 0~15"]
pub shift: u8,
}
#[doc = " @brief CSI data type"]
#[doc = ""]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_csi_info_t {
#[doc = "< received packet radio metadata header of the CSI data"]
pub rx_ctrl: wifi_pkt_rx_ctrl_t,
#[doc = "< source MAC address of the CSI data"]
pub mac: [u8; 6usize],
#[doc = "< first four bytes of the CSI data is invalid or not"]
pub first_word_invalid: bool,
#[doc = "< buffer of CSI data"]
pub buf: *mut i8,
#[doc = "< length of CSI data"]
pub len: u16,
}
#[doc = " @brief WiFi GPIO configuration for antenna selection"]
#[doc = ""]
#[repr(C, packed)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_ant_gpio_t {
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 1usize], u8>,
}
impl wifi_ant_gpio_t {
#[inline]
pub fn gpio_select(&self) -> u8 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 1u8) as u8) }
}
#[inline]
pub fn set_gpio_select(&mut self, val: u8) {
unsafe {
let val: u8 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 1u8, val as u64)
}
}
#[inline]
pub fn gpio_num(&self) -> u8 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(1usize, 7u8) as u8) }
}
#[inline]
pub fn set_gpio_num(&mut self, val: u8) {
unsafe {
let val: u8 = ::core::mem::transmute(val);
self._bitfield_1.set(1usize, 7u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
gpio_select: u8,
gpio_num: u8,
) -> __BindgenBitfieldUnit<[u8; 1usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 1usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 1u8, {
let gpio_select: u8 = unsafe { ::core::mem::transmute(gpio_select) };
gpio_select as u64
});
__bindgen_bitfield_unit.set(1usize, 7u8, {
let gpio_num: u8 = unsafe { ::core::mem::transmute(gpio_num) };
gpio_num as u64
});
__bindgen_bitfield_unit
}
}
#[doc = " @brief WiFi GPIOs configuration for antenna selection"]
#[doc = ""]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_ant_gpio_config_t {
#[doc = "< The configurations of GPIOs that connect to external antenna switch"]
pub gpio_cfg: [wifi_ant_gpio_t; 4usize],
}
#[repr(u32)]
#[doc = " @brief WiFi antenna mode"]
#[doc = ""]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_ant_mode_t {
#[doc = "< Enable WiFi antenna 0 only"]
WIFI_ANT_MODE_ANT0 = 0,
#[doc = "< Enable WiFi antenna 1 only"]
WIFI_ANT_MODE_ANT1 = 1,
#[doc = "< Enable WiFi antenna 0 and 1, automatically select an antenna"]
WIFI_ANT_MODE_AUTO = 2,
#[doc = "< Invalid WiFi enabled antenna"]
WIFI_ANT_MODE_MAX = 3,
}
#[doc = " @brief WiFi antenna configuration"]
#[doc = ""]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_ant_config_t {
#[doc = "< WiFi antenna mode for receiving"]
pub rx_ant_mode: wifi_ant_mode_t,
#[doc = "< Default antenna mode for receiving, it's ignored if rx_ant_mode is not WIFI_ANT_MODE_AUTO"]
pub rx_ant_default: wifi_ant_t,
#[doc = "< WiFi antenna mode for transmission, it can be set to WIFI_ANT_MODE_AUTO only if rx_ant_mode is set to WIFI_ANT_MODE_AUTO"]
pub tx_ant_mode: wifi_ant_mode_t,
pub _bitfield_1: __BindgenBitfieldUnit<[u8; 1usize], u8>,
pub __bindgen_padding_0: [u8; 3usize],
}
impl wifi_ant_config_t {
#[inline]
pub fn enabled_ant0(&self) -> u8 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(0usize, 4u8) as u8) }
}
#[inline]
pub fn set_enabled_ant0(&mut self, val: u8) {
unsafe {
let val: u8 = ::core::mem::transmute(val);
self._bitfield_1.set(0usize, 4u8, val as u64)
}
}
#[inline]
pub fn enabled_ant1(&self) -> u8 {
unsafe { ::core::mem::transmute(self._bitfield_1.get(4usize, 4u8) as u8) }
}
#[inline]
pub fn set_enabled_ant1(&mut self, val: u8) {
unsafe {
let val: u8 = ::core::mem::transmute(val);
self._bitfield_1.set(4usize, 4u8, val as u64)
}
}
#[inline]
pub fn new_bitfield_1(
enabled_ant0: u8,
enabled_ant1: u8,
) -> __BindgenBitfieldUnit<[u8; 1usize], u8> {
let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 1usize], u8> =
Default::default();
__bindgen_bitfield_unit.set(0usize, 4u8, {
let enabled_ant0: u8 = unsafe { ::core::mem::transmute(enabled_ant0) };
enabled_ant0 as u64
});
__bindgen_bitfield_unit.set(4usize, 4u8, {
let enabled_ant1: u8 = unsafe { ::core::mem::transmute(enabled_ant1) };
enabled_ant1 as u64
});
__bindgen_bitfield_unit
}
}
#[repr(u32)]
#[doc = " @brief WiFi PHY rate encodings"]
#[doc = ""]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_phy_rate_t {
#[doc = "< 1 Mbps with long preamble"]
WIFI_PHY_RATE_1M_L = 0,
#[doc = "< 2 Mbps with long preamble"]
WIFI_PHY_RATE_2M_L = 1,
#[doc = "< 5.5 Mbps with long preamble"]
WIFI_PHY_RATE_5M_L = 2,
#[doc = "< 11 Mbps with long preamble"]
WIFI_PHY_RATE_11M_L = 3,
#[doc = "< 2 Mbps with short preamble"]
WIFI_PHY_RATE_2M_S = 5,
#[doc = "< 5.5 Mbps with short preamble"]
WIFI_PHY_RATE_5M_S = 6,
#[doc = "< 11 Mbps with short preamble"]
WIFI_PHY_RATE_11M_S = 7,
#[doc = "< 48 Mbps"]
WIFI_PHY_RATE_48M = 8,
#[doc = "< 24 Mbps"]
WIFI_PHY_RATE_24M = 9,
#[doc = "< 12 Mbps"]
WIFI_PHY_RATE_12M = 10,
#[doc = "< 6 Mbps"]
WIFI_PHY_RATE_6M = 11,
#[doc = "< 54 Mbps"]
WIFI_PHY_RATE_54M = 12,
#[doc = "< 36 Mbps"]
WIFI_PHY_RATE_36M = 13,
#[doc = "< 18 Mbps"]
WIFI_PHY_RATE_18M = 14,
#[doc = "< 9 Mbps"]
WIFI_PHY_RATE_9M = 15,
#[doc = "< MCS0 with long GI, 6.5 Mbps for 20MHz, 13.5 Mbps for 40MHz"]
WIFI_PHY_RATE_MCS0_LGI = 16,
#[doc = "< MCS1 with long GI, 13 Mbps for 20MHz, 27 Mbps for 40MHz"]
WIFI_PHY_RATE_MCS1_LGI = 17,
#[doc = "< MCS2 with long GI, 19.5 Mbps for 20MHz, 40.5 Mbps for 40MHz"]
WIFI_PHY_RATE_MCS2_LGI = 18,
#[doc = "< MCS3 with long GI, 26 Mbps for 20MHz, 54 Mbps for 40MHz"]
WIFI_PHY_RATE_MCS3_LGI = 19,
#[doc = "< MCS4 with long GI, 39 Mbps for 20MHz, 81 Mbps for 40MHz"]
WIFI_PHY_RATE_MCS4_LGI = 20,
#[doc = "< MCS5 with long GI, 52 Mbps for 20MHz, 108 Mbps for 40MHz"]
WIFI_PHY_RATE_MCS5_LGI = 21,
#[doc = "< MCS6 with long GI, 58.5 Mbps for 20MHz, 121.5 Mbps for 40MHz"]
WIFI_PHY_RATE_MCS6_LGI = 22,
#[doc = "< MCS7 with long GI, 65 Mbps for 20MHz, 135 Mbps for 40MHz"]
WIFI_PHY_RATE_MCS7_LGI = 23,
#[doc = "< MCS0 with short GI, 7.2 Mbps for 20MHz, 15 Mbps for 40MHz"]
WIFI_PHY_RATE_MCS0_SGI = 24,
#[doc = "< MCS1 with short GI, 14.4 Mbps for 20MHz, 30 Mbps for 40MHz"]
WIFI_PHY_RATE_MCS1_SGI = 25,
#[doc = "< MCS2 with short GI, 21.7 Mbps for 20MHz, 45 Mbps for 40MHz"]
WIFI_PHY_RATE_MCS2_SGI = 26,
#[doc = "< MCS3 with short GI, 28.9 Mbps for 20MHz, 60 Mbps for 40MHz"]
WIFI_PHY_RATE_MCS3_SGI = 27,
#[doc = "< MCS4 with short GI, 43.3 Mbps for 20MHz, 90 Mbps for 40MHz"]
WIFI_PHY_RATE_MCS4_SGI = 28,
#[doc = "< MCS5 with short GI, 57.8 Mbps for 20MHz, 120 Mbps for 40MHz"]
WIFI_PHY_RATE_MCS5_SGI = 29,
#[doc = "< MCS6 with short GI, 65 Mbps for 20MHz, 135 Mbps for 40MHz"]
WIFI_PHY_RATE_MCS6_SGI = 30,
#[doc = "< MCS7 with short GI, 72.2 Mbps for 20MHz, 150 Mbps for 40MHz"]
WIFI_PHY_RATE_MCS7_SGI = 31,
#[doc = "< 250 Kbps"]
WIFI_PHY_RATE_LORA_250K = 41,
#[doc = "< 500 Kbps"]
WIFI_PHY_RATE_LORA_500K = 42,
WIFI_PHY_RATE_MAX = 43,
}
#[repr(u32)]
#[doc = " WiFi event declarations"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_event_t {
#[doc = "< ESP32 WiFi ready"]
WIFI_EVENT_WIFI_READY = 0,
#[doc = "< ESP32 finish scanning AP"]
WIFI_EVENT_SCAN_DONE = 1,
#[doc = "< ESP32 station start"]
WIFI_EVENT_STA_START = 2,
#[doc = "< ESP32 station stop"]
WIFI_EVENT_STA_STOP = 3,
#[doc = "< ESP32 station connected to AP"]
WIFI_EVENT_STA_CONNECTED = 4,
#[doc = "< ESP32 station disconnected from AP"]
WIFI_EVENT_STA_DISCONNECTED = 5,
#[doc = "< the auth mode of AP connected by ESP32 station changed"]
WIFI_EVENT_STA_AUTHMODE_CHANGE = 6,
#[doc = "< ESP32 station wps succeeds in enrollee mode"]
WIFI_EVENT_STA_WPS_ER_SUCCESS = 7,
#[doc = "< ESP32 station wps fails in enrollee mode"]
WIFI_EVENT_STA_WPS_ER_FAILED = 8,
#[doc = "< ESP32 station wps timeout in enrollee mode"]
WIFI_EVENT_STA_WPS_ER_TIMEOUT = 9,
#[doc = "< ESP32 station wps pin code in enrollee mode"]
WIFI_EVENT_STA_WPS_ER_PIN = 10,
#[doc = "< ESP32 station wps overlap in enrollee mode"]
WIFI_EVENT_STA_WPS_ER_PBC_OVERLAP = 11,
#[doc = "< ESP32 soft-AP start"]
WIFI_EVENT_AP_START = 12,
#[doc = "< ESP32 soft-AP stop"]
WIFI_EVENT_AP_STOP = 13,
#[doc = "< a station connected to ESP32 soft-AP"]
WIFI_EVENT_AP_STACONNECTED = 14,
#[doc = "< a station disconnected from ESP32 soft-AP"]
WIFI_EVENT_AP_STADISCONNECTED = 15,
#[doc = "< Receive probe request packet in soft-AP interface"]
WIFI_EVENT_AP_PROBEREQRECVED = 16,
#[doc = "< Invalid WiFi event ID"]
WIFI_EVENT_MAX = 17,
}
extern "C" {
pub static mut WIFI_EVENT: esp_event_base_t;
}
#[doc = " Argument structure for WIFI_EVENT_SCAN_DONE event"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_event_sta_scan_done_t {
#[doc = "< status of scanning APs: 0 — success, 1 - failure"]
pub status: u32,
#[doc = "< number of scan results"]
pub number: u8,
#[doc = "< scan sequence number, used for block scan"]
pub scan_id: u8,
}
#[doc = " Argument structure for WIFI_EVENT_STA_CONNECTED event"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_event_sta_connected_t {
#[doc = "< SSID of connected AP"]
pub ssid: [u8; 32usize],
#[doc = "< SSID length of connected AP"]
pub ssid_len: u8,
#[doc = "< BSSID of connected AP"]
pub bssid: [u8; 6usize],
#[doc = "< channel of connected AP"]
pub channel: u8,
#[doc = "< authentication mode used by AP"]
pub authmode: wifi_auth_mode_t,
}
#[doc = " Argument structure for WIFI_EVENT_STA_DISCONNECTED event"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_event_sta_disconnected_t {
#[doc = "< SSID of disconnected AP"]
pub ssid: [u8; 32usize],
#[doc = "< SSID length of disconnected AP"]
pub ssid_len: u8,
#[doc = "< BSSID of disconnected AP"]
pub bssid: [u8; 6usize],
#[doc = "< reason of disconnection"]
pub reason: u8,
}
#[doc = " Argument structure for WIFI_EVENT_STA_AUTHMODE_CHANGE event"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_event_sta_authmode_change_t {
#[doc = "< the old auth mode of AP"]
pub old_mode: wifi_auth_mode_t,
#[doc = "< the new auth mode of AP"]
pub new_mode: wifi_auth_mode_t,
}
#[doc = " Argument structure for WIFI_EVENT_STA_WPS_ER_PIN event"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_event_sta_wps_er_pin_t {
#[doc = "< PIN code of station in enrollee mode"]
pub pin_code: [u8; 8usize],
}
#[repr(u32)]
#[doc = " Argument structure for WIFI_EVENT_STA_WPS_ER_FAILED event"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum wifi_event_sta_wps_fail_reason_t {
#[doc = "< ESP32 WPS normal fail reason"]
WPS_FAIL_REASON_NORMAL = 0,
#[doc = "< ESP32 WPS receive M2D frame"]
WPS_FAIL_REASON_RECV_M2D = 1,
WPS_FAIL_REASON_MAX = 2,
}
#[doc = " Argument structure for WIFI_EVENT_AP_STACONNECTED event"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_event_ap_staconnected_t {
#[doc = "< MAC address of the station connected to ESP32 soft-AP"]
pub mac: [u8; 6usize],
#[doc = "< the aid that ESP32 soft-AP gives to the station connected to"]
pub aid: u8,
}
#[doc = " Argument structure for WIFI_EVENT_AP_STADISCONNECTED event"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_event_ap_stadisconnected_t {
#[doc = "< MAC address of the station disconnects to ESP32 soft-AP"]
pub mac: [u8; 6usize],
#[doc = "< the aid that ESP32 soft-AP gave to the station disconnects to"]
pub aid: u8,
}
#[doc = " Argument structure for WIFI_EVENT_AP_PROBEREQRECVED event"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_event_ap_probe_req_rx_t {
#[doc = "< Received probe request signal strength"]
pub rssi: libc::c_int,
#[doc = "< MAC address of the station which send probe request"]
pub mac: [u8; 6usize],
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_ip6_addr {
pub addr: [u32; 4usize],
pub zone: u8,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_ip4_addr {
pub addr: u32,
}
pub type esp_ip4_addr_t = esp_ip4_addr;
pub type esp_ip6_addr_t = esp_ip6_addr;
#[repr(C)]
#[derive(Copy, Clone)]
pub struct _ip_addr {
pub u_addr: _ip_addr__bindgen_ty_1,
pub type_: u8,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union _ip_addr__bindgen_ty_1 {
pub ip6: esp_ip6_addr_t,
pub ip4: esp_ip4_addr_t,
_bindgen_union_align: [u32; 5usize],
}
pub type esp_ip_addr_t = _ip_addr;
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_ip6_addr_type_t {
ESP_IP6_ADDR_IS_UNKNOWN = 0,
ESP_IP6_ADDR_IS_GLOBAL = 1,
ESP_IP6_ADDR_IS_LINK_LOCAL = 2,
ESP_IP6_ADDR_IS_SITE_LOCAL = 3,
ESP_IP6_ADDR_IS_UNIQUE_LOCAL = 4,
ESP_IP6_ADDR_IS_IPV4_MAPPED_IPV6 = 5,
}
extern "C" {
#[doc = " @brief Get the IPv6 address type"]
#[doc = ""]
#[doc = " @param[in] ip6_addr IPv6 type"]
#[doc = ""]
#[doc = " @return IPv6 type in form of enum esp_ip6_addr_type_t"]
pub fn esp_netif_ip6_get_addr_type(ip6_addr: *mut esp_ip6_addr_t) -> esp_ip6_addr_type_t;
}
#[doc = " @brief Type of esp_netif_object server"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_netif_obj {
_unused: [u8; 0],
}
pub type esp_netif_t = esp_netif_obj;
#[repr(u32)]
#[doc = " @brief Type of DNS server"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_netif_dns_type_t {
#[doc = "< DNS main server address"]
ESP_NETIF_DNS_MAIN = 0,
#[doc = "< DNS backup server address (Wi-Fi STA and Ethernet only)"]
ESP_NETIF_DNS_BACKUP = 1,
#[doc = "< DNS fallback server address (Wi-Fi STA and Ethernet only)"]
ESP_NETIF_DNS_FALLBACK = 2,
ESP_NETIF_DNS_MAX = 3,
}
#[doc = " @brief DNS server info"]
#[repr(C)]
#[derive(Copy, Clone)]
pub struct esp_netif_dns_info_t {
#[doc = "< IPV4 address of DNS server"]
pub ip: esp_ip_addr_t,
}
#[repr(u32)]
#[doc = " @brief Status of DHCP client or DHCP server"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_netif_dhcp_status_t {
#[doc = "< DHCP client/server is in initial state (not yet started)"]
ESP_NETIF_DHCP_INIT = 0,
#[doc = "< DHCP client/server has been started"]
ESP_NETIF_DHCP_STARTED = 1,
#[doc = "< DHCP client/server has been stopped"]
ESP_NETIF_DHCP_STOPPED = 2,
ESP_NETIF_DHCP_STATUS_MAX = 3,
}
#[repr(u32)]
#[doc = " @brief Mode for DHCP client or DHCP server option functions"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_netif_dhcp_option_mode_t {
ESP_NETIF_OP_START = 0,
#[doc = "< Set option"]
ESP_NETIF_OP_SET = 1,
#[doc = "< Get option"]
ESP_NETIF_OP_GET = 2,
ESP_NETIF_OP_MAX = 3,
}
#[repr(u32)]
#[doc = " @brief Supported options for DHCP client or DHCP server"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_netif_dhcp_option_id_t {
#[doc = "< Network mask"]
ESP_NETIF_SUBNET_MASK = 1,
#[doc = "< Domain name server"]
ESP_NETIF_DOMAIN_NAME_SERVER = 6,
#[doc = "< Solicitation router address"]
ESP_NETIF_ROUTER_SOLICITATION_ADDRESS = 32,
#[doc = "< Request specific IP address"]
ESP_NETIF_REQUESTED_IP_ADDRESS = 50,
#[doc = "< Request IP address lease time"]
ESP_NETIF_IP_ADDRESS_LEASE_TIME = 51,
#[doc = "< Request IP address retry counter"]
ESP_NETIF_IP_REQUEST_RETRY_TIME = 52,
}
#[repr(u32)]
#[doc = " IP event declarations"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum ip_event_t {
#[doc = "< station got IP from connected AP"]
IP_EVENT_STA_GOT_IP = 0,
#[doc = "< station lost IP and the IP is reset to 0"]
IP_EVENT_STA_LOST_IP = 1,
#[doc = "< soft-AP assign an IP to a connected station"]
IP_EVENT_AP_STAIPASSIGNED = 2,
#[doc = "< station or ap or ethernet interface v6IP addr is preferred"]
IP_EVENT_GOT_IP6 = 3,
#[doc = "< ethernet got IP from connected AP"]
IP_EVENT_ETH_GOT_IP = 4,
#[doc = "< PPP interface got IP"]
IP_EVENT_PPP_GOT_IP = 5,
#[doc = "< PPP interface lost IP"]
IP_EVENT_PPP_LOST_IP = 6,
}
extern "C" {
pub static mut IP_EVENT: esp_event_base_t;
}
#[doc = " Event structure for IP_EVENT_STA_GOT_IP, IP_EVENT_ETH_GOT_IP events"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_netif_ip_info_t {
#[doc = "< Interface IPV4 address"]
pub ip: esp_ip4_addr_t,
#[doc = "< Interface IPV4 netmask"]
pub netmask: esp_ip4_addr_t,
#[doc = "< Interface IPV4 gateway address"]
pub gw: esp_ip4_addr_t,
}
#[doc = " @brief IPV6 IP address information"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_netif_ip6_info_t {
#[doc = "< Interface IPV6 address"]
pub ip: esp_ip6_addr_t,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct ip_event_got_ip_t {
#[doc = "< Interface index for which the event is received (left for legacy compilation)"]
pub if_index: libc::c_int,
#[doc = "< Pointer to corresponding esp-netif object"]
pub esp_netif: *mut esp_netif_t,
#[doc = "< IP address, netmask, gatway IP address"]
pub ip_info: esp_netif_ip_info_t,
#[doc = "< Whether the assigned IP has changed or not"]
pub ip_changed: bool,
}
#[doc = " Event structure for IP_EVENT_GOT_IP6 event"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct ip_event_got_ip6_t {
#[doc = "< Interface index for which the event is received (left for legacy compilation)"]
pub if_index: libc::c_int,
#[doc = "< Pointer to corresponding esp-netif object"]
pub esp_netif: *mut esp_netif_t,
#[doc = "< IPv6 address of the interface"]
pub ip6_info: esp_netif_ip6_info_t,
#[doc = "< IPv6 address index"]
pub ip_index: libc::c_int,
}
#[doc = " Event structure for IP_EVENT_AP_STAIPASSIGNED event"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct ip_event_ap_staipassigned_t {
#[doc = "< IP address which was assigned to the station"]
pub ip: esp_ip4_addr_t,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_netif_flags {
ESP_NETIF_DHCP_CLIENT = 1,
ESP_NETIF_DHCP_SERVER = 2,
ESP_NETIF_FLAG_AUTOUP = 4,
ESP_NETIF_FLAG_GARP = 8,
ESP_NETIF_FLAG_EVENT_IP_MODIFIED = 16,
ESP_NETIF_FLAG_IS_PPP = 32,
}
pub use self::esp_netif_flags as esp_netif_flags_t;
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_netif_ip_event_type {
ESP_NETIF_IP_EVENT_GOT_IP = 1,
ESP_NETIF_IP_EVENT_LOST_IP = 2,
}
pub use self::esp_netif_ip_event_type as esp_netif_ip_event_type_t;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_netif_inherent_config {
#[doc = "< flags that define esp-netif behavior"]
pub flags: esp_netif_flags_t,
#[doc = "< initial mac address for this interface"]
pub mac: [u8; 6usize],
#[doc = "< initial ip address for this interface"]
pub ip_info: *const esp_netif_ip_info_t,
#[doc = "< event id to be raised when interface gets an IP"]
pub get_ip_event: u32,
#[doc = "< event id to be raised when interface losts its IP"]
pub lost_ip_event: u32,
#[doc = "< string identifier of the interface"]
pub if_key: *const libc::c_char,
#[doc = "< textual description of the interface"]
pub if_desc: *const libc::c_char,
#[doc = "< numeric priority of this interface to become a default"]
#[doc = "routing if (if other netifs are up)"]
pub route_prio: libc::c_int,
}
pub type esp_netif_inherent_config_t = esp_netif_inherent_config;
pub type esp_netif_config_t = esp_netif_config;
#[doc = " @brief IO driver handle type"]
pub type esp_netif_iodriver_handle = *mut libc::c_void;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_netif_driver_base_s {
pub post_attach: ::core::option::Option<
unsafe extern "C" fn(netif: *mut esp_netif_t, h: esp_netif_iodriver_handle) -> esp_err_t,
>,
pub netif: *mut esp_netif_t,
}
pub type esp_netif_driver_base_t = esp_netif_driver_base_s;
#[doc = " @brief Specific IO driver configuration"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_netif_driver_ifconfig {
pub handle: esp_netif_iodriver_handle,
pub transmit: ::core::option::Option<
unsafe extern "C" fn(
h: *mut libc::c_void,
buffer: *mut libc::c_void,
len: size_t,
) -> esp_err_t,
>,
pub driver_free_rx_buffer: ::core::option::Option<
unsafe extern "C" fn(h: *mut libc::c_void, buffer: *mut libc::c_void),
>,
}
pub type esp_netif_driver_ifconfig_t = esp_netif_driver_ifconfig;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_netif_netstack_config {
_unused: [u8; 0],
}
#[doc = " @brief Specific L3 network stack configuration"]
pub type esp_netif_netstack_config_t = esp_netif_netstack_config;
#[doc = " @brief Generic esp_netif configuration"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_netif_config {
pub base: *const esp_netif_inherent_config_t,
pub driver: *const esp_netif_driver_ifconfig_t,
pub stack: *const esp_netif_netstack_config_t,
}
#[doc = " @brief ESP-NETIF Receive function type"]
pub type esp_netif_receive_t = ::core::option::Option<
unsafe extern "C" fn(
esp_netif: *mut esp_netif_t,
buffer: *mut libc::c_void,
len: size_t,
eb: *mut libc::c_void,
) -> esp_err_t,
>;
extern "C" {
pub static mut _g_esp_netif_netstack_default_eth: *const esp_netif_netstack_config_t;
}
extern "C" {
pub static mut _g_esp_netif_netstack_default_wifi_sta: *const esp_netif_netstack_config_t;
}
extern "C" {
pub static mut _g_esp_netif_netstack_default_wifi_ap: *const esp_netif_netstack_config_t;
}
extern "C" {
pub static mut _g_esp_netif_netstack_default_ppp: *const esp_netif_netstack_config_t;
}
extern "C" {
pub static _g_esp_netif_inherent_sta_config: esp_netif_inherent_config_t;
}
extern "C" {
pub static _g_esp_netif_inherent_ap_config: esp_netif_inherent_config_t;
}
extern "C" {
pub static _g_esp_netif_inherent_eth_config: esp_netif_inherent_config_t;
}
extern "C" {
pub static _g_esp_netif_inherent_ppp_config: esp_netif_inherent_config_t;
}
extern "C" {
pub static _g_esp_netif_soft_ap_ip: esp_netif_ip_info_t;
}
extern "C" {
#[doc = " @brief Initialize the underlying TCP/IP stack"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_FAIL if initializing failed"]
#[doc = ""]
#[doc = " @note This function should be called exactly once from application code, when the application starts up."]
pub fn esp_netif_init() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Deinitialize the esp-netif component (and the underlying TCP/IP stack)"]
#[doc = ""]
#[doc = " Note: Deinitialization is not supported yet"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_ERR_INVALID_STATE if esp_netif not initialized"]
#[doc = " - ESP_ERR_NOT_SUPPORTED otherwise"]
pub fn esp_netif_deinit() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Creates an instance of new esp-netif object based on provided config"]
#[doc = ""]
#[doc = " @param[in] esp_netif_config pointer esp-netif configuration"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - pointer to esp-netif object on success"]
#[doc = " - NULL otherwise"]
pub fn esp_netif_new(esp_netif_config: *const esp_netif_config_t) -> *mut esp_netif_t;
}
extern "C" {
#[doc = " @brief Destroys the esp_netif object"]
#[doc = ""]
#[doc = " @param[in] esp_netif pointer to the object to be deleted"]
pub fn esp_netif_destroy(esp_netif: *mut esp_netif_t);
}
extern "C" {
#[doc = " @brief Configures driver related options of esp_netif object"]
#[doc = ""]
#[doc = " @param[inout] esp_netif pointer to the object to be configured"]
#[doc = " @param[in] driver_config pointer esp-netif io driver related configuration"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_ESP_NETIF_INVALID_PARAMS if invalid parameters provided"]
#[doc = ""]
pub fn esp_netif_set_driver_config(
esp_netif: *mut esp_netif_t,
driver_config: *const esp_netif_driver_ifconfig_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Attaches esp_netif instance to the io driver handle"]
#[doc = ""]
#[doc = " Calling this function enables connecting specific esp_netif object"]
#[doc = " with already initialized io driver to update esp_netif object with driver"]
#[doc = " specific configuration (i.e. calls post_attach callback, which typically"]
#[doc = " sets io driver callbacks to esp_netif instance and starts the driver)"]
#[doc = ""]
#[doc = " @param[inout] esp_netif pointer to esp_netif object to be attached"]
#[doc = " @param[in] driver_handle pointer to the driver handle"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_ESP_NETIF_DRIVER_ATTACH_FAILED if driver's pot_attach callback failed"]
pub fn esp_netif_attach(
esp_netif: *mut esp_netif_t,
driver_handle: esp_netif_iodriver_handle,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Passes the raw packets from communication media to the appropriate TCP/IP stack"]
#[doc = ""]
#[doc = " This function is called from the configured (peripheral) driver layer."]
#[doc = " The data are then forwarded as frames to the TCP/IP stack."]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[in] buffer Received data"]
#[doc = " @param[in] len Length of the data frame"]
#[doc = " @param[in] eb Pointer to internal buffer (used in Wi-Fi driver)"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK"]
pub fn esp_netif_receive(
esp_netif: *mut esp_netif_t,
buffer: *mut libc::c_void,
len: size_t,
eb: *mut libc::c_void,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Default building block for network interface action upon IO driver start event"]
#[doc = " Creates network interface, if AUTOUP enabled turns the interface on,"]
#[doc = " if DHCPS enabled starts dhcp server"]
#[doc = ""]
#[doc = " @note This API can be directly used as event handler"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param base"]
#[doc = " @param event_id"]
#[doc = " @param data"]
pub fn esp_netif_action_start(
esp_netif: *mut libc::c_void,
base: esp_event_base_t,
event_id: i32,
data: *mut libc::c_void,
);
}
extern "C" {
#[doc = " @brief Default building block for network interface action upon IO driver stop event"]
#[doc = ""]
#[doc = " @note This API can be directly used as event handler"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param base"]
#[doc = " @param event_id"]
#[doc = " @param data"]
pub fn esp_netif_action_stop(
esp_netif: *mut libc::c_void,
base: esp_event_base_t,
event_id: i32,
data: *mut libc::c_void,
);
}
extern "C" {
#[doc = " @brief Default building block for network interface action upon IO driver connected event"]
#[doc = ""]
#[doc = " @note This API can be directly used as event handler"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param base"]
#[doc = " @param event_id"]
#[doc = " @param data"]
pub fn esp_netif_action_connected(
esp_netif: *mut libc::c_void,
base: esp_event_base_t,
event_id: i32,
data: *mut libc::c_void,
);
}
extern "C" {
#[doc = " @brief Default building block for network interface action upon IO driver disconnected event"]
#[doc = ""]
#[doc = " @note This API can be directly used as event handler"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param base"]
#[doc = " @param event_id"]
#[doc = " @param data"]
pub fn esp_netif_action_disconnected(
esp_netif: *mut libc::c_void,
base: esp_event_base_t,
event_id: i32,
data: *mut libc::c_void,
);
}
extern "C" {
#[doc = " @brief Default building block for network interface action upon network got IP event"]
#[doc = ""]
#[doc = " @note This API can be directly used as event handler"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param base"]
#[doc = " @param event_id"]
#[doc = " @param data"]
pub fn esp_netif_action_got_ip(
esp_netif: *mut libc::c_void,
base: esp_event_base_t,
event_id: i32,
data: *mut libc::c_void,
);
}
extern "C" {
#[doc = " @brief Set the mac address for the interface instance"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[in] mac Desired mac address for the related network interface"]
#[doc = " @return"]
#[doc = " - ESP_OK - success"]
#[doc = " - ESP_ERR_ESP_NETIF_IF_NOT_READY - interface status error"]
#[doc = " - ESP_ERR_NOT_SUPPORTED - mac not supported on this interface"]
pub fn esp_netif_set_mac(esp_netif: *mut esp_netif_t, mac: *mut u8) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get the mac address for the interface instance"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[out] mac Resultant mac address for the related network interface"]
#[doc = " @return"]
#[doc = " - ESP_OK - success"]
#[doc = " - ESP_ERR_ESP_NETIF_IF_NOT_READY - interface status error"]
#[doc = " - ESP_ERR_NOT_SUPPORTED - mac not supported on this interface"]
pub fn esp_netif_get_mac(esp_netif: *mut esp_netif_t, mac: *mut u8) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set the hostname of an interface"]
#[doc = ""]
#[doc = " The configured hostname overrides the default configuration value CONFIG_LWIP_LOCAL_HOSTNAME."]
#[doc = " Please note that when the hostname is altered after interface started/connected the changes"]
#[doc = " would only be reflected once the interface restarts/reconnects"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[in] hostname New hostname for the interface. Maximum length 32 bytes."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK - success"]
#[doc = " - ESP_ERR_ESP_NETIF_IF_NOT_READY - interface status error"]
#[doc = " - ESP_ERR_ESP_NETIF_INVALID_PARAMS - parameter error"]
pub fn esp_netif_set_hostname(
esp_netif: *mut esp_netif_t,
hostname: *const libc::c_char,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get interface hostname."]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[out] hostname Returns a pointer to the hostname. May be NULL if no hostname is set. If set non-NULL, pointer remains valid (and string may change if the hostname changes)."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK - success"]
#[doc = " - ESP_ERR_ESP_NETIF_IF_NOT_READY - interface status error"]
#[doc = " - ESP_ERR_ESP_NETIF_INVALID_PARAMS - parameter error"]
pub fn esp_netif_get_hostname(
esp_netif: *mut esp_netif_t,
hostname: *mut *const libc::c_char,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Test if supplied interface is up or down"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - true - Interface is up"]
#[doc = " - false - Interface is down"]
pub fn esp_netif_is_netif_up(esp_netif: *mut esp_netif_t) -> bool;
}
extern "C" {
#[doc = " @brief Get interface's IP address information"]
#[doc = ""]
#[doc = " If the interface is up, IP information is read directly from the TCP/IP stack."]
#[doc = " If the interface is down, IP information is read from a copy kept in the ESP-NETIF instance"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[out] ip_info If successful, IP information will be returned in this argument."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK"]
#[doc = " - ESP_ERR_ESP_NETIF_INVALID_PARAMS"]
pub fn esp_netif_get_ip_info(
esp_netif: *mut esp_netif_t,
ip_info: *mut esp_netif_ip_info_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get interface's old IP information"]
#[doc = ""]
#[doc = " Returns an \"old\" IP address previously stored for the interface when the valid IP changed."]
#[doc = ""]
#[doc = " If the IP lost timer has expired (meaning the interface was down for longer than the configured interval)"]
#[doc = " then the old IP information will be zero."]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[out] ip_info If successful, IP information will be returned in this argument."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK"]
#[doc = " - ESP_ERR_ESP_NETIF_INVALID_PARAMS"]
pub fn esp_netif_get_old_ip_info(
esp_netif: *mut esp_netif_t,
ip_info: *mut esp_netif_ip_info_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set interface's IP address information"]
#[doc = ""]
#[doc = " This function is mainly used to set a static IP on an interface."]
#[doc = ""]
#[doc = " If the interface is up, the new IP information is set directly in the TCP/IP stack."]
#[doc = ""]
#[doc = " The copy of IP information kept in the ESP-NETIF instance is also updated (this"]
#[doc = " copy is returned if the IP is queried while the interface is still down.)"]
#[doc = ""]
#[doc = " @note DHCP client/server must be stopped (if enabled for this interface) before setting new IP information."]
#[doc = ""]
#[doc = " @note Calling this interface for may generate a SYSTEM_EVENT_STA_GOT_IP or SYSTEM_EVENT_ETH_GOT_IP event."]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[in] ip_info IP information to set on the specified interface"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK"]
#[doc = " - ESP_ERR_ESP_NETIF_INVALID_PARAMS"]
#[doc = " - ESP_ERR_ESP_NETIF_DHCP_NOT_STOPPED If DHCP server or client is still running"]
pub fn esp_netif_set_ip_info(
esp_netif: *mut esp_netif_t,
ip_info: *const esp_netif_ip_info_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set interface old IP information"]
#[doc = ""]
#[doc = " This function is called from the DHCP client (if enabled), before a new IP is set."]
#[doc = " It is also called from the default handlers for the SYSTEM_EVENT_STA_CONNECTED and SYSTEM_EVENT_ETH_CONNECTED events."]
#[doc = ""]
#[doc = " Calling this function stores the previously configured IP, which can be used to determine if the IP changes in the future."]
#[doc = ""]
#[doc = " If the interface is disconnected or down for too long, the \"IP lost timer\" will expire (after the configured interval) and set the old IP information to zero."]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[in] ip_info Store the old IP information for the specified interface"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK"]
#[doc = " - ESP_ERR_ESP_NETIF_INVALID_PARAMS"]
pub fn esp_netif_set_old_ip_info(
esp_netif: *mut esp_netif_t,
ip_info: *const esp_netif_ip_info_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get net interface index from network stack implementation"]
#[doc = ""]
#[doc = " @note This index could be used in `setsockopt()` to bind socket with multicast interface"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = ""]
#[doc = " @return"]
#[doc = " implementation specific index of interface represented with supplied esp_netif"]
pub fn esp_netif_get_netif_impl_index(esp_netif: *mut esp_netif_t) -> libc::c_int;
}
extern "C" {
#[doc = " @brief Get net interface name from network stack implementation"]
#[doc = ""]
#[doc = " @note This name could be used in `setsockopt()` to bind socket with appropriate interface"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[out] name Interface name as specified in underlying TCP/IP stack. Note that the"]
#[doc = " actual name will be copied to the specified buffer, which must be allocated to hold"]
#[doc = " maximum interface name size (6 characters for lwIP)"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK"]
#[doc = " - ESP_ERR_ESP_NETIF_INVALID_PARAMS"]
pub fn esp_netif_get_netif_impl_name(
esp_netif: *mut esp_netif_t,
name: *mut libc::c_char,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set or Get DHCP server option"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[in] opt_op ESP_NETIF_OP_SET to set an option, ESP_NETIF_OP_GET to get an option."]
#[doc = " @param[in] opt_id Option index to get or set, must be one of the supported enum values."]
#[doc = " @param[inout] opt_val Pointer to the option parameter."]
#[doc = " @param[in] opt_len Length of the option parameter."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK"]
#[doc = " - ESP_ERR_ESP_NETIF_INVALID_PARAMS"]
#[doc = " - ESP_ERR_ESP_NETIF_DHCP_ALREADY_STOPPED"]
#[doc = " - ESP_ERR_ESP_NETIF_DHCP_ALREADY_STARTED"]
pub fn esp_netif_dhcps_option(
esp_netif: *mut esp_netif_t,
opt_op: esp_netif_dhcp_option_mode_t,
opt_id: esp_netif_dhcp_option_id_t,
opt_val: *mut libc::c_void,
opt_len: u32,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set or Get DHCP client option"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[in] opt_op ESP_NETIF_OP_SET to set an option, ESP_NETIF_OP_GET to get an option."]
#[doc = " @param[in] opt_id Option index to get or set, must be one of the supported enum values."]
#[doc = " @param[inout] opt_val Pointer to the option parameter."]
#[doc = " @param[in] opt_len Length of the option parameter."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK"]
#[doc = " - ESP_ERR_ESP_NETIF_INVALID_PARAMS"]
#[doc = " - ESP_ERR_ESP_NETIF_DHCP_ALREADY_STOPPED"]
#[doc = " - ESP_ERR_ESP_NETIF_DHCP_ALREADY_STARTED"]
pub fn esp_netif_dhcpc_option(
esp_netif: *mut esp_netif_t,
opt_op: esp_netif_dhcp_option_mode_t,
opt_id: esp_netif_dhcp_option_id_t,
opt_val: *mut libc::c_void,
opt_len: u32,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Start DHCP client (only if enabled in interface object)"]
#[doc = ""]
#[doc = " @note The default event handlers for the SYSTEM_EVENT_STA_CONNECTED and SYSTEM_EVENT_ETH_CONNECTED events call this function."]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK"]
#[doc = " - ESP_ERR_ESP_NETIF_INVALID_PARAMS"]
#[doc = " - ESP_ERR_ESP_NETIF_DHCP_ALREADY_STARTED"]
#[doc = " - ESP_ERR_ESP_NETIF_DHCPC_START_FAILED"]
pub fn esp_netif_dhcpc_start(esp_netif: *mut esp_netif_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Stop DHCP client (only if enabled in interface object)"]
#[doc = ""]
#[doc = " @note Calling action_netif_stop() will also stop the DHCP Client if it is running."]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK"]
#[doc = " - ESP_ERR_ESP_NETIF_INVALID_PARAMS"]
#[doc = " - ESP_ERR_ESP_NETIF_DHCP_ALREADY_STOPPED"]
#[doc = " - ESP_ERR_ESP_NETIF_IF_NOT_READY"]
pub fn esp_netif_dhcpc_stop(esp_netif: *mut esp_netif_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get DHCP client status"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[out] status If successful, the status of DHCP client will be returned in this argument."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK"]
pub fn esp_netif_dhcpc_get_status(
esp_netif: *mut esp_netif_t,
status: *mut esp_netif_dhcp_status_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get DHCP Server status"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[out] status If successful, the status of the DHCP server will be returned in this argument."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK"]
pub fn esp_netif_dhcps_get_status(
esp_netif: *mut esp_netif_t,
status: *mut esp_netif_dhcp_status_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Start DHCP server (only if enabled in interface object)"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK"]
#[doc = " - ESP_ERR_ESP_NETIF_INVALID_PARAMS"]
#[doc = " - ESP_ERR_ESP_NETIF_DHCP_ALREADY_STARTED"]
pub fn esp_netif_dhcps_start(esp_netif: *mut esp_netif_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Stop DHCP server (only if enabled in interface object)"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK"]
#[doc = " - ESP_ERR_ESP_NETIF_INVALID_PARAMS"]
#[doc = " - ESP_ERR_ESP_NETIF_DHCP_ALREADY_STOPPED"]
#[doc = " - ESP_ERR_ESP_NETIF_IF_NOT_READY"]
pub fn esp_netif_dhcps_stop(esp_netif: *mut esp_netif_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set DNS Server information"]
#[doc = ""]
#[doc = " This function behaves differently if DHCP server or client is enabled"]
#[doc = ""]
#[doc = " If DHCP client is enabled, main and backup DNS servers will be updated automatically"]
#[doc = " from the DHCP lease if the relevant DHCP options are set. Fallback DNS Server is never updated from the DHCP lease"]
#[doc = " and is designed to be set via this API."]
#[doc = " If DHCP client is disabled, all DNS server types can be set via this API only."]
#[doc = ""]
#[doc = " If DHCP server is enabled, the Main DNS Server setting is used by the DHCP server to provide a DNS Server option"]
#[doc = " to DHCP clients (Wi-Fi stations)."]
#[doc = " - The default Main DNS server is typically the IP of the Wi-Fi AP interface itself."]
#[doc = " - This function can override it by setting server type ESP_NETIF_DNS_MAIN."]
#[doc = " - Other DNS Server types are not supported for the Wi-Fi AP interface."]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[in] type Type of DNS Server to set: ESP_NETIF_DNS_MAIN, ESP_NETIF_DNS_BACKUP, ESP_NETIF_DNS_FALLBACK"]
#[doc = " @param[in] dns DNS Server address to set"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_ESP_NETIF_INVALID_PARAMS invalid params"]
pub fn esp_netif_set_dns_info(
esp_netif: *mut esp_netif_t,
type_: esp_netif_dns_type_t,
dns: *mut esp_netif_dns_info_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get DNS Server information"]
#[doc = ""]
#[doc = " Return the currently configured DNS Server address for the specified interface and Server type."]
#[doc = ""]
#[doc = " This may be result of a previous call to esp_netif_set_dns_info(). If the interface's DHCP client is enabled,"]
#[doc = " the Main or Backup DNS Server may be set by the current DHCP lease."]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[in] type Type of DNS Server to get: ESP_NETIF_DNS_MAIN, ESP_NETIF_DNS_BACKUP, ESP_NETIF_DNS_FALLBACK"]
#[doc = " @param[out] dns DNS Server result is written here on success"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_ESP_NETIF_INVALID_PARAMS invalid params"]
pub fn esp_netif_get_dns_info(
esp_netif: *mut esp_netif_t,
type_: esp_netif_dns_type_t,
dns: *mut esp_netif_dns_info_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Create interface link-local IPv6 address"]
#[doc = ""]
#[doc = " Cause the TCP/IP stack to create a link-local IPv6 address for the specified interface."]
#[doc = ""]
#[doc = " This function also registers a callback for the specified interface, so that if the link-local address becomes"]
#[doc = " verified as the preferred address then a SYSTEM_EVENT_GOT_IP6 event will be sent."]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK"]
#[doc = " - ESP_ERR_ESP_NETIF_INVALID_PARAMS"]
pub fn esp_netif_create_ip6_linklocal(esp_netif: *mut esp_netif_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get interface link-local IPv6 address"]
#[doc = ""]
#[doc = " If the specified interface is up and a preferred link-local IPv6 address"]
#[doc = " has been created for the interface, return a copy of it."]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[out] if_ip6 IPv6 information will be returned in this argument if successful."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK"]
#[doc = " - ESP_FAIL If interface is down, does not have a link-local IPv6 address,"]
#[doc = " or the link-local IPv6 address is not a preferred address."]
pub fn esp_netif_get_ip6_linklocal(
esp_netif: *mut esp_netif_t,
if_ip6: *mut esp_ip6_addr_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get interface global IPv6 address"]
#[doc = ""]
#[doc = " If the specified interface is up and a preferred global IPv6 address"]
#[doc = " has been created for the interface, return a copy of it."]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[out] if_ip6 IPv6 information will be returned in this argument if successful."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK"]
#[doc = " - ESP_FAIL If interface is down, does not have a global IPv6 address,"]
#[doc = " or the global IPv6 address is not a preferred address."]
pub fn esp_netif_get_ip6_global(
esp_netif: *mut esp_netif_t,
if_ip6: *mut esp_ip6_addr_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get all IPv6 addresses of the specified interface"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = " @param[out] if_ip6 Array of IPv6 addresses will be copied to the argument"]
#[doc = ""]
#[doc = " @return"]
#[doc = " number of returned IPv6 addresses"]
pub fn esp_netif_get_all_ip6(
esp_netif: *mut esp_netif_t,
if_ip6: *mut esp_ip6_addr_t,
) -> libc::c_int;
}
extern "C" {
#[doc = " @brief Sets IPv4 address to the specified octets"]
#[doc = ""]
#[doc = " @param[out] addr IP address to be set"]
#[doc = " @param a the first octet (127 for IP 127.0.0.1)"]
#[doc = " @param b"]
#[doc = " @param c"]
#[doc = " @param d"]
pub fn esp_netif_set_ip4_addr(addr: *mut esp_ip4_addr_t, a: u8, b: u8, c: u8, d: u8);
}
extern "C" {
#[doc = " @brief Converts numeric IP address into decimal dotted ASCII representation."]
#[doc = ""]
#[doc = " @param addr ip address in network order to convert"]
#[doc = " @param buf target buffer where the string is stored"]
#[doc = " @param buflen length of buf"]
#[doc = " @return either pointer to buf which now holds the ASCII"]
#[doc = " representation of addr or NULL if buf was too small"]
pub fn esp_ip4addr_ntoa(
addr: *const esp_ip4_addr_t,
buf: *mut libc::c_char,
buflen: libc::c_int,
) -> *mut libc::c_char;
}
extern "C" {
#[doc = " @brief Ascii internet address interpretation routine"]
#[doc = " The value returned is in network order."]
#[doc = ""]
#[doc = " @param addr IP address in ascii representation (e.g. \"127.0.0.1\")"]
#[doc = " @return ip address in network order"]
pub fn esp_ip4addr_aton(addr: *const libc::c_char) -> u32;
}
extern "C" {
#[doc = " @brief Gets media driver handle for this esp-netif instance"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = ""]
#[doc = " @return opaque pointer of related IO driver"]
pub fn esp_netif_get_io_driver(esp_netif: *mut esp_netif_t) -> esp_netif_iodriver_handle;
}
extern "C" {
#[doc = " @brief Searches over a list of created objects to find an instance with supplied if key"]
#[doc = ""]
#[doc = " @param if_key Textual description of network interface"]
#[doc = ""]
#[doc = " @return Handle to esp-netif instance"]
pub fn esp_netif_get_handle_from_ifkey(if_key: *const libc::c_char) -> *mut esp_netif_t;
}
extern "C" {
#[doc = " @brief Returns configured flags for this interface"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = ""]
#[doc = " @return Configuration flags"]
pub fn esp_netif_get_flags(esp_netif: *mut esp_netif_t) -> esp_netif_flags_t;
}
extern "C" {
#[doc = " @brief Returns configured interface key for this esp-netif instance"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = ""]
#[doc = " @return Textual description of related interface"]
pub fn esp_netif_get_ifkey(esp_netif: *mut esp_netif_t) -> *const libc::c_char;
}
extern "C" {
#[doc = " @brief Returns configured interface type for this esp-netif instance"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = ""]
#[doc = " @return Enumerated type of this interface, such as station, AP, ethernet"]
pub fn esp_netif_get_desc(esp_netif: *mut esp_netif_t) -> *const libc::c_char;
}
extern "C" {
#[doc = " @brief Returns configured routing priority number"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = ""]
#[doc = " @return Integer representing the instance's route-prio, or -1 if invalid paramters"]
pub fn esp_netif_get_route_prio(esp_netif: *mut esp_netif_t) -> libc::c_int;
}
extern "C" {
#[doc = " @brief Returns configured event for this esp-netif instance and supplied event type"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = ""]
#[doc = " @param event_type (either get or lost IP)"]
#[doc = ""]
#[doc = " @return specific event id which is configured to be raised if the interface lost or acquired IP address"]
#[doc = " -1 if supplied event_type is not known"]
pub fn esp_netif_get_event_id(
esp_netif: *mut esp_netif_t,
event_type: esp_netif_ip_event_type_t,
) -> i32;
}
extern "C" {
#[doc = " @brief Iterates over list of interfaces. Returns first netif if NULL given as parameter"]
#[doc = ""]
#[doc = " @param[in] esp_netif Handle to esp-netif instance"]
#[doc = ""]
#[doc = " @return First netif from the list if supplied parameter is NULL, next one otherwise"]
pub fn esp_netif_next(esp_netif: *mut esp_netif_t) -> *mut esp_netif_t;
}
extern "C" {
#[doc = " @brief Returns number of registered esp_netif objects"]
#[doc = ""]
#[doc = " @return Number of esp_netifs"]
pub fn esp_netif_get_nr_of_ifs() -> size_t;
}
#[repr(u32)]
#[doc = " System event types enumeration"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum system_event_id_t {
#[doc = "< ESP32 WiFi ready"]
SYSTEM_EVENT_WIFI_READY = 0,
#[doc = "< ESP32 finish scanning AP"]
SYSTEM_EVENT_SCAN_DONE = 1,
#[doc = "< ESP32 station start"]
SYSTEM_EVENT_STA_START = 2,
#[doc = "< ESP32 station stop"]
SYSTEM_EVENT_STA_STOP = 3,
#[doc = "< ESP32 station connected to AP"]
SYSTEM_EVENT_STA_CONNECTED = 4,
#[doc = "< ESP32 station disconnected from AP"]
SYSTEM_EVENT_STA_DISCONNECTED = 5,
#[doc = "< the auth mode of AP connected by ESP32 station changed"]
SYSTEM_EVENT_STA_AUTHMODE_CHANGE = 6,
#[doc = "< ESP32 station got IP from connected AP"]
SYSTEM_EVENT_STA_GOT_IP = 7,
#[doc = "< ESP32 station lost IP and the IP is reset to 0"]
SYSTEM_EVENT_STA_LOST_IP = 8,
#[doc = "< ESP32 station wps succeeds in enrollee mode"]
SYSTEM_EVENT_STA_WPS_ER_SUCCESS = 9,
#[doc = "< ESP32 station wps fails in enrollee mode"]
SYSTEM_EVENT_STA_WPS_ER_FAILED = 10,
#[doc = "< ESP32 station wps timeout in enrollee mode"]
SYSTEM_EVENT_STA_WPS_ER_TIMEOUT = 11,
#[doc = "< ESP32 station wps pin code in enrollee mode"]
SYSTEM_EVENT_STA_WPS_ER_PIN = 12,
#[doc = "< ESP32 station wps overlap in enrollee mode"]
SYSTEM_EVENT_STA_WPS_ER_PBC_OVERLAP = 13,
#[doc = "< ESP32 soft-AP start"]
SYSTEM_EVENT_AP_START = 14,
#[doc = "< ESP32 soft-AP stop"]
SYSTEM_EVENT_AP_STOP = 15,
#[doc = "< a station connected to ESP32 soft-AP"]
SYSTEM_EVENT_AP_STACONNECTED = 16,
#[doc = "< a station disconnected from ESP32 soft-AP"]
SYSTEM_EVENT_AP_STADISCONNECTED = 17,
#[doc = "< ESP32 soft-AP assign an IP to a connected station"]
SYSTEM_EVENT_AP_STAIPASSIGNED = 18,
#[doc = "< Receive probe request packet in soft-AP interface"]
SYSTEM_EVENT_AP_PROBEREQRECVED = 19,
#[doc = "< ESP32 station or ap or ethernet interface v6IP addr is preferred"]
SYSTEM_EVENT_GOT_IP6 = 20,
#[doc = "< ESP32 ethernet start"]
SYSTEM_EVENT_ETH_START = 21,
#[doc = "< ESP32 ethernet stop"]
SYSTEM_EVENT_ETH_STOP = 22,
#[doc = "< ESP32 ethernet phy link up"]
SYSTEM_EVENT_ETH_CONNECTED = 23,
#[doc = "< ESP32 ethernet phy link down"]
SYSTEM_EVENT_ETH_DISCONNECTED = 24,
#[doc = "< ESP32 ethernet got IP from connected AP"]
SYSTEM_EVENT_ETH_GOT_IP = 25,
#[doc = "< Number of members in this enum"]
SYSTEM_EVENT_MAX = 26,
}
#[doc = " Argument structure of SYSTEM_EVENT_STA_WPS_ER_FAILED event"]
pub use self::wifi_event_sta_wps_fail_reason_t as system_event_sta_wps_fail_reason_t;
#[doc = " Argument structure of SYSTEM_EVENT_SCAN_DONE event"]
pub type system_event_sta_scan_done_t = wifi_event_sta_scan_done_t;
#[doc = " Argument structure of SYSTEM_EVENT_STA_CONNECTED event"]
pub type system_event_sta_connected_t = wifi_event_sta_connected_t;
#[doc = " Argument structure of SYSTEM_EVENT_STA_DISCONNECTED event"]
pub type system_event_sta_disconnected_t = wifi_event_sta_disconnected_t;
#[doc = " Argument structure of SYSTEM_EVENT_STA_AUTHMODE_CHANGE event"]
pub type system_event_sta_authmode_change_t = wifi_event_sta_authmode_change_t;
#[doc = " Argument structure of SYSTEM_EVENT_STA_WPS_ER_PIN event"]
pub type system_event_sta_wps_er_pin_t = wifi_event_sta_wps_er_pin_t;
#[doc = " Argument structure of event"]
pub type system_event_ap_staconnected_t = wifi_event_ap_staconnected_t;
#[doc = " Argument structure of event"]
pub type system_event_ap_stadisconnected_t = wifi_event_ap_stadisconnected_t;
#[doc = " Argument structure of event"]
pub type system_event_ap_probe_req_rx_t = wifi_event_ap_probe_req_rx_t;
#[doc = " Argument structure of event"]
pub type system_event_ap_staipassigned_t = ip_event_ap_staipassigned_t;
#[doc = " Argument structure of event"]
pub type system_event_sta_got_ip_t = ip_event_got_ip_t;
#[doc = " Argument structure of event"]
pub type system_event_got_ip6_t = ip_event_got_ip6_t;
#[doc = " Union of all possible system_event argument structures"]
#[repr(C)]
#[derive(Copy, Clone)]
pub union system_event_info_t {
#[doc = "< ESP32 station connected to AP"]
pub connected: system_event_sta_connected_t,
#[doc = "< ESP32 station disconnected to AP"]
pub disconnected: system_event_sta_disconnected_t,
#[doc = "< ESP32 station scan (APs) done"]
pub scan_done: system_event_sta_scan_done_t,
#[doc = "< the auth mode of AP ESP32 station connected to changed"]
pub auth_change: system_event_sta_authmode_change_t,
#[doc = "< ESP32 station got IP, first time got IP or when IP is changed"]
pub got_ip: system_event_sta_got_ip_t,
#[doc = "< ESP32 station WPS enrollee mode PIN code received"]
pub sta_er_pin: system_event_sta_wps_er_pin_t,
#[doc = "< ESP32 station WPS enrollee mode failed reason code received"]
pub sta_er_fail_reason: system_event_sta_wps_fail_reason_t,
#[doc = "< a station connected to ESP32 soft-AP"]
pub sta_connected: system_event_ap_staconnected_t,
#[doc = "< a station disconnected to ESP32 soft-AP"]
pub sta_disconnected: system_event_ap_stadisconnected_t,
#[doc = "< ESP32 soft-AP receive probe request packet"]
pub ap_probereqrecved: system_event_ap_probe_req_rx_t,
#[doc = "< ESP32 soft-AP assign an IP to the station"]
pub ap_staipassigned: system_event_ap_staipassigned_t,
#[doc = "< ESP32 station\u{3000}or ap or ethernet ipv6 addr state change to preferred"]
pub got_ip6: system_event_got_ip6_t,
_bindgen_union_align: [u32; 11usize],
}
#[doc = " Event, as a tagged enum"]
#[repr(C)]
#[derive(Copy, Clone)]
pub struct system_event_t {
#[doc = "< event ID"]
pub event_id: system_event_id_t,
#[doc = "< event information"]
pub event_info: system_event_info_t,
}
#[doc = " Event handler function type"]
pub type system_event_handler_t = ::core::option::Option<
unsafe extern "C" fn(
event_base: esp_event_base_t,
event_id: i32,
event_data: *mut libc::c_void,
event_data_size: size_t,
ticks_to_wait: TickType_t,
) -> esp_err_t,
>;
extern "C" {
#[doc = " @brief Send a event to event task"]
#[doc = ""]
#[doc = " @note This API is part of the legacy event system. New code should use event library API in esp_event.h"]
#[doc = ""]
#[doc = " Other task/modules, such as the tcpip_adapter, can call this API to send an event to event task"]
#[doc = ""]
#[doc = " @param event Event to send"]
#[doc = ""]
#[doc = " @return ESP_OK : succeed"]
#[doc = " @return others : fail"]
pub fn esp_event_send(event: *mut system_event_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Send a event to event task"]
#[doc = ""]
#[doc = " @note This API is used by WiFi Driver only."]
#[doc = ""]
#[doc = " Other task/modules, such as the tcpip_adapter, can call this API to send an event to event task"]
#[doc = ""]
#[doc = " @param[in] event_base the event base that identifies the event"]
#[doc = " @param[in] event_id the event id that identifies the event"]
#[doc = " @param[in] event_data the data, specific to the event occurence, that gets passed to the handler"]
#[doc = " @param[in] event_data_size the size of the event data"]
#[doc = " @param[in] ticks_to_wait number of ticks to block on a full event queue"]
#[doc = ""]
#[doc = " @return ESP_OK : succeed"]
#[doc = " @return others : fail"]
pub fn esp_event_send_internal(
event_base: esp_event_base_t,
event_id: i32,
event_data: *mut libc::c_void,
event_data_size: size_t,
ticks_to_wait: TickType_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Default event handler for system events"]
#[doc = ""]
#[doc = " @note This API is part of the legacy event system. New code should use event library API in esp_event.h"]
#[doc = ""]
#[doc = " This function performs default handling of system events."]
#[doc = " When using esp_event_loop APIs, it is called automatically before invoking the user-provided"]
#[doc = " callback function."]
#[doc = ""]
#[doc = " Applications which implement a custom event loop must call this function"]
#[doc = " as part of event processing."]
#[doc = ""]
#[doc = " @param event pointer to event to be handled"]
#[doc = " @return ESP_OK if an event was handled successfully"]
pub fn esp_event_process_default(event: *mut system_event_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Install default event handlers for Ethernet interface"]
#[doc = ""]
#[doc = " @note This API is part of the legacy event system. New code should use event library API in esp_event.h"]
#[doc = ""]
pub fn esp_event_set_default_eth_handlers();
}
extern "C" {
#[doc = " @brief Install default event handlers for Wi-Fi interfaces (station and AP)"]
#[doc = ""]
#[doc = " @note This API is part of the legacy event system. New code should use event library API in esp_event.h"]
pub fn esp_event_set_default_wifi_handlers();
}
#[doc = " @brief Application specified event callback function"]
#[doc = ""]
#[doc = " @note This API is part of the legacy event system. New code should use event library API in esp_event.h"]
#[doc = ""]
#[doc = ""]
#[doc = " @param ctx reserved for user"]
#[doc = " @param event event type defined in this file"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - others: fail"]
pub type system_event_cb_t = ::core::option::Option<
unsafe extern "C" fn(ctx: *mut libc::c_void, event: *mut system_event_t) -> esp_err_t,
>;
extern "C" {
#[doc = " @brief Initialize event loop"]
#[doc = ""]
#[doc = " @note This API is part of the legacy event system. New code should use event library API in esp_event.h"]
#[doc = ""]
#[doc = " Create the event handler and task"]
#[doc = ""]
#[doc = " @param cb application specified event callback, it can be modified by call esp_event_set_cb"]
#[doc = " @param ctx reserved for user"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - others: fail"]
pub fn esp_event_loop_init(cb: system_event_cb_t, ctx: *mut libc::c_void) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set application specified event callback function"]
#[doc = ""]
#[doc = " @note This API is part of the legacy event system. New code should use event library API in esp_event.h"]
#[doc = ""]
#[doc = " @attention 1. If cb is NULL, means application don't need to handle"]
#[doc = " If cb is not NULL, it will be call when an event is received, after the default event callback is completed"]
#[doc = ""]
#[doc = " @param cb application callback function"]
#[doc = " @param ctx argument to be passed to callback"]
#[doc = ""]
#[doc = ""]
#[doc = " @return old callback"]
pub fn esp_event_loop_set_cb(
cb: system_event_cb_t,
ctx: *mut libc::c_void,
) -> system_event_cb_t;
}
#[doc = " Configuration for creating event loops"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_event_loop_args_t {
#[doc = "< size of the event loop queue"]
pub queue_size: i32,
#[doc = "< name of the event loop task; if NULL,"]
#[doc = "a dedicated task is not created for event loop"]
pub task_name: *const libc::c_char,
#[doc = "< priority of the event loop task, ignored if task name is NULL"]
pub task_priority: UBaseType_t,
#[doc = "< stack size of the event loop task, ignored if task name is NULL"]
pub task_stack_size: u32,
#[doc = "< core to which the event loop task is pinned to,"]
#[doc = "ignored if task name is NULL"]
pub task_core_id: BaseType_t,
}
extern "C" {
#[doc = " @brief Create a new event loop."]
#[doc = ""]
#[doc = " @param[in] event_loop_args configuration structure for the event loop to create"]
#[doc = " @param[out] event_loop handle to the created event loop"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Success"]
#[doc = " - ESP_ERR_NO_MEM: Cannot allocate memory for event loops list"]
#[doc = " - ESP_FAIL: Failed to create task loop"]
#[doc = " - Others: Fail"]
pub fn esp_event_loop_create(
event_loop_args: *const esp_event_loop_args_t,
event_loop: *mut esp_event_loop_handle_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Delete an existing event loop."]
#[doc = ""]
#[doc = " @param[in] event_loop event loop to delete"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Success"]
#[doc = " - Others: Fail"]
pub fn esp_event_loop_delete(event_loop: esp_event_loop_handle_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Create default event loop"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Success"]
#[doc = " - ESP_ERR_NO_MEM: Cannot allocate memory for event loops list"]
#[doc = " - ESP_FAIL: Failed to create task loop"]
#[doc = " - Others: Fail"]
pub fn esp_event_loop_create_default() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Delete the default event loop"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Success"]
#[doc = " - Others: Fail"]
pub fn esp_event_loop_delete_default() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Dispatch events posted to an event loop."]
#[doc = ""]
#[doc = " This function is used to dispatch events posted to a loop with no dedicated task, i.e task name was set to NULL"]
#[doc = " in event_loop_args argument during loop creation. This function includes an argument to limit the amount of time"]
#[doc = " it runs, returning control to the caller when that time expires (or some time afterwards). There is no guarantee"]
#[doc = " that a call to this function will exit at exactly the time of expiry. There is also no guarantee that events have"]
#[doc = " been dispatched during the call, as the function might have spent all of the alloted time waiting on the event queue."]
#[doc = " Once an event has been unqueued, however, it is guaranteed to be dispatched. This guarantee contributes to not being"]
#[doc = " able to exit exactly at time of expiry as (1) blocking on internal mutexes is necessary for dispatching the unqueued"]
#[doc = " event, and (2) during dispatch of the unqueued event there is no way to control the time occupied by handler code"]
#[doc = " execution. The guaranteed time of exit is therefore the alloted time + amount of time required to dispatch"]
#[doc = " the last unqueued event."]
#[doc = ""]
#[doc = " In cases where waiting on the queue times out, ESP_OK is returned and not ESP_ERR_TIMEOUT, since it is"]
#[doc = " normal behavior."]
#[doc = ""]
#[doc = " @param[in] event_loop event loop to dispatch posted events from"]
#[doc = " @param[in] ticks_to_run number of ticks to run the loop"]
#[doc = ""]
#[doc = " @note encountering an unknown event that has been posted to the loop will only generate a warning, not an error."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Success"]
#[doc = " - Others: Fail"]
pub fn esp_event_loop_run(
event_loop: esp_event_loop_handle_t,
ticks_to_run: TickType_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Register an event handler to the system event loop (legacy)."]
#[doc = ""]
#[doc = " @note This function is obsolete and will be deprecated soon, please use esp_event_handler_instance_register()"]
#[doc = " instead."]
#[doc = ""]
#[doc = " This function can be used to register a handler for either: (1) specific events,"]
#[doc = " (2) all events of a certain event base, or (3) all events known by the system event loop."]
#[doc = ""]
#[doc = " - specific events: specify exact event_base and event_id"]
#[doc = " - all events of a certain base: specify exact event_base and use ESP_EVENT_ANY_ID as the event_id"]
#[doc = " - all events known by the loop: use ESP_EVENT_ANY_BASE for event_base and ESP_EVENT_ANY_ID as the event_id"]
#[doc = ""]
#[doc = " Registering multiple handlers to events is possible. Registering a single handler to multiple events is"]
#[doc = " also possible. However, registering the same handler to the same event multiple times would cause the"]
#[doc = " previous registrations to be overwritten."]
#[doc = ""]
#[doc = " @param[in] event_base the base id of the event to register the handler for"]
#[doc = " @param[in] event_id the id of the event to register the handler for"]
#[doc = " @param[in] event_handler the handler function which gets called when the event is dispatched"]
#[doc = " @param[in] event_handler_arg data, aside from event data, that is passed to the handler when it is called"]
#[doc = ""]
#[doc = " @note the event loop library does not maintain a copy of event_handler_arg, therefore the user should"]
#[doc = " ensure that event_handler_arg still points to a valid location by the time the handler gets called"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Success"]
#[doc = " - ESP_ERR_NO_MEM: Cannot allocate memory for the handler"]
#[doc = " - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id"]
#[doc = " - Others: Fail"]
pub fn esp_event_handler_register(
event_base: esp_event_base_t,
event_id: i32,
event_handler: esp_event_handler_t,
event_handler_arg: *mut libc::c_void,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Register an event handler to a specific loop (legacy)."]
#[doc = ""]
#[doc = " @note This function is obsolete and will be deprecated soon, please use esp_event_handler_instance_register_with()"]
#[doc = " instead."]
#[doc = ""]
#[doc = " This function behaves in the same manner as esp_event_handler_register, except the additional"]
#[doc = " specification of the event loop to register the handler to."]
#[doc = ""]
#[doc = " @param[in] event_loop the event loop to register this handler function to"]
#[doc = " @param[in] event_base the base id of the event to register the handler for"]
#[doc = " @param[in] event_id the id of the event to register the handler for"]
#[doc = " @param[in] event_handler the handler function which gets called when the event is dispatched"]
#[doc = " @param[in] event_handler_arg data, aside from event data, that is passed to the handler when it is called"]
#[doc = ""]
#[doc = " @note the event loop library does not maintain a copy of event_handler_arg, therefore the user should"]
#[doc = " ensure that event_handler_arg still points to a valid location by the time the handler gets called"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Success"]
#[doc = " - ESP_ERR_NO_MEM: Cannot allocate memory for the handler"]
#[doc = " - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id"]
#[doc = " - Others: Fail"]
pub fn esp_event_handler_register_with(
event_loop: esp_event_loop_handle_t,
event_base: esp_event_base_t,
event_id: i32,
event_handler: esp_event_handler_t,
event_handler_arg: *mut libc::c_void,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Register an instance of event handler to a specific loop."]
#[doc = ""]
#[doc = " This function can be used to register a handler for either: (1) specific events,"]
#[doc = " (2) all events of a certain event base, or (3) all events known by the system event loop."]
#[doc = ""]
#[doc = " - specific events: specify exact event_base and event_id"]
#[doc = " - all events of a certain base: specify exact event_base and use ESP_EVENT_ANY_ID as the event_id"]
#[doc = " - all events known by the loop: use ESP_EVENT_ANY_BASE for event_base and ESP_EVENT_ANY_ID as the event_id"]
#[doc = ""]
#[doc = " Besides the error, the function returns an instance object as output parameter to identify each registration."]
#[doc = " This is necessary to remove (unregister) the registration before the event loop is deleted."]
#[doc = ""]
#[doc = " Registering multiple handlers to events, registering a single handler to multiple events as well as registering"]
#[doc = " the same handler to the same event multiple times is possible."]
#[doc = " Each registration yields a distinct instance object which identifies it over the registration"]
#[doc = " lifetime."]
#[doc = ""]
#[doc = " @param[in] event_loop the event loop to register this handler function to"]
#[doc = " @param[in] event_base the base id of the event to register the handler for"]
#[doc = " @param[in] event_id the id of the event to register the handler for"]
#[doc = " @param[in] event_handler the handler function which gets called when the event is dispatched"]
#[doc = " @param[in] event_handler_arg data, aside from event data, that is passed to the handler when it is called"]
#[doc = " @param[out] instance An event handler instance object related to the registered event handler and data, can be NULL."]
#[doc = " This needs to be kept if the specific callback instance should be unregistered before deleting the whole"]
#[doc = " event loop. Registering the same event handler multiple times is possible and yields distinct instance"]
#[doc = " objects. The data can be the same for all registrations."]
#[doc = " If no unregistration is needed but the handler should be deleted when the event loop is deleted,"]
#[doc = " instance can be NULL."]
#[doc = ""]
#[doc = " @note the event loop library does not maintain a copy of event_handler_arg, therefore the user should"]
#[doc = " ensure that event_handler_arg still points to a valid location by the time the handler gets called"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Success"]
#[doc = " - ESP_ERR_NO_MEM: Cannot allocate memory for the handler"]
#[doc = " - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id or instance is NULL"]
#[doc = " - Others: Fail"]
pub fn esp_event_handler_instance_register_with(
event_loop: esp_event_loop_handle_t,
event_base: esp_event_base_t,
event_id: i32,
event_handler: esp_event_handler_t,
event_handler_arg: *mut libc::c_void,
instance: *mut esp_event_handler_instance_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Register an instance of event handler to the default loop."]
#[doc = ""]
#[doc = " This function does the same as esp_event_handler_instance_register_with, except that it registers the"]
#[doc = " handler to the default event loop."]
#[doc = ""]
#[doc = " @param[in] event_base the base id of the event to register the handler for"]
#[doc = " @param[in] event_id the id of the event to register the handler for"]
#[doc = " @param[in] event_handler the handler function which gets called when the event is dispatched"]
#[doc = " @param[in] event_handler_arg data, aside from event data, that is passed to the handler when it is called"]
#[doc = " @param[out] instance An event handler instance object related to the registered event handler and data, can be NULL."]
#[doc = " This needs to be kept if the specific callback instance should be unregistered before deleting the whole"]
#[doc = " event loop. Registering the same event handler multiple times is possible and yields distinct instance"]
#[doc = " objects. The data can be the same for all registrations."]
#[doc = " If no unregistration is needed but the handler should be deleted when the event loop is deleted,"]
#[doc = " instance can be NULL."]
#[doc = ""]
#[doc = " @note the event loop library does not maintain a copy of event_handler_arg, therefore the user should"]
#[doc = " ensure that event_handler_arg still points to a valid location by the time the handler gets called"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Success"]
#[doc = " - ESP_ERR_NO_MEM: Cannot allocate memory for the handler"]
#[doc = " - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id or instance is NULL"]
#[doc = " - Others: Fail"]
pub fn esp_event_handler_instance_register(
event_base: esp_event_base_t,
event_id: i32,
event_handler: esp_event_handler_t,
event_handler_arg: *mut libc::c_void,
instance: *mut esp_event_handler_instance_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Unregister a handler with the system event loop (legacy)."]
#[doc = ""]
#[doc = " @note This function is obsolete and will be deprecated soon, please use esp_event_handler_instance_unregister()"]
#[doc = " instead."]
#[doc = ""]
#[doc = " This function can be used to unregister a handler so that it no longer gets called during dispatch."]
#[doc = " Handlers can be unregistered for either: (1) specific events, (2) all events of a certain event base,"]
#[doc = " or (3) all events known by the system event loop"]
#[doc = ""]
#[doc = " - specific events: specify exact event_base and event_id"]
#[doc = " - all events of a certain base: specify exact event_base and use ESP_EVENT_ANY_ID as the event_id"]
#[doc = " - all events known by the loop: use ESP_EVENT_ANY_BASE for event_base and ESP_EVENT_ANY_ID as the event_id"]
#[doc = ""]
#[doc = " This function ignores unregistration of handlers that has not been previously registered."]
#[doc = ""]
#[doc = " @param[in] event_base the base of the event with which to unregister the handler"]
#[doc = " @param[in] event_id the id of the event with which to unregister the handler"]
#[doc = " @param[in] event_handler the handler to unregister"]
#[doc = ""]
#[doc = " @return ESP_OK success"]
#[doc = " @return ESP_ERR_INVALID_ARG invalid combination of event base and event id"]
#[doc = " @return others fail"]
pub fn esp_event_handler_unregister(
event_base: esp_event_base_t,
event_id: i32,
event_handler: esp_event_handler_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Unregister a handler from a specific event loop (legacy)."]
#[doc = ""]
#[doc = " @note This function is obsolete and will be deprecated soon, please use esp_event_handler_instance_unregister_with()"]
#[doc = " instead."]
#[doc = ""]
#[doc = " This function behaves in the same manner as esp_event_handler_unregister, except the additional specification of"]
#[doc = " the event loop to unregister the handler with."]
#[doc = ""]
#[doc = " @param[in] event_loop the event loop with which to unregister this handler function"]
#[doc = " @param[in] event_base the base of the event with which to unregister the handler"]
#[doc = " @param[in] event_id the id of the event with which to unregister the handler"]
#[doc = " @param[in] event_handler the handler to unregister"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Success"]
#[doc = " - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id"]
#[doc = " - Others: Fail"]
pub fn esp_event_handler_unregister_with(
event_loop: esp_event_loop_handle_t,
event_base: esp_event_base_t,
event_id: i32,
event_handler: esp_event_handler_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Unregister a handler instance from a specific event loop."]
#[doc = ""]
#[doc = " This function can be used to unregister a handler so that it no longer gets called during dispatch."]
#[doc = " Handlers can be unregistered for either: (1) specific events, (2) all events of a certain event base,"]
#[doc = " or (3) all events known by the system event loop"]
#[doc = ""]
#[doc = " - specific events: specify exact event_base and event_id"]
#[doc = " - all events of a certain base: specify exact event_base and use ESP_EVENT_ANY_ID as the event_id"]
#[doc = " - all events known by the loop: use ESP_EVENT_ANY_BASE for event_base and ESP_EVENT_ANY_ID as the event_id"]
#[doc = ""]
#[doc = " This function ignores unregistration of handler instances that have not been previously registered."]
#[doc = ""]
#[doc = " @param[in] event_loop the event loop with which to unregister this handler function"]
#[doc = " @param[in] event_base the base of the event with which to unregister the handler"]
#[doc = " @param[in] event_id the id of the event with which to unregister the handler"]
#[doc = " @param[in] instance the instance object of the registration to be unregistered"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Success"]
#[doc = " - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id"]
#[doc = " - Others: Fail"]
pub fn esp_event_handler_instance_unregister_with(
event_loop: esp_event_loop_handle_t,
event_base: esp_event_base_t,
event_id: i32,
instance: esp_event_handler_instance_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Unregister a handler from the system event loop."]
#[doc = ""]
#[doc = " This function does the same as esp_event_handler_instance_unregister_with, except that it unregisters the"]
#[doc = " handler instance from the default event loop."]
#[doc = ""]
#[doc = " @param[in] event_base the base of the event with which to unregister the handler"]
#[doc = " @param[in] event_id the id of the event with which to unregister the handler"]
#[doc = " @param[in] instance the instance object of the registration to be unregistered"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Success"]
#[doc = " - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id"]
#[doc = " - Others: Fail"]
pub fn esp_event_handler_instance_unregister(
event_base: esp_event_base_t,
event_id: i32,
instance: esp_event_handler_instance_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Posts an event to the system default event loop. The event loop library keeps a copy of event_data and manages"]
#[doc = " the copy's lifetime automatically (allocation + deletion); this ensures that the data the"]
#[doc = " handler recieves is always valid."]
#[doc = ""]
#[doc = " @param[in] event_base the event base that identifies the event"]
#[doc = " @param[in] event_id the event id that identifies the event"]
#[doc = " @param[in] event_data the data, specific to the event occurence, that gets passed to the handler"]
#[doc = " @param[in] event_data_size the size of the event data"]
#[doc = " @param[in] ticks_to_wait number of ticks to block on a full event queue"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Success"]
#[doc = " - ESP_ERR_TIMEOUT: Time to wait for event queue to unblock expired,"]
#[doc = " queue full when posting from ISR"]
#[doc = " - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id"]
#[doc = " - Others: Fail"]
pub fn esp_event_post(
event_base: esp_event_base_t,
event_id: i32,
event_data: *mut libc::c_void,
event_data_size: size_t,
ticks_to_wait: TickType_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Posts an event to the specified event loop. The event loop library keeps a copy of event_data and manages"]
#[doc = " the copy's lifetime automatically (allocation + deletion); this ensures that the data the"]
#[doc = " handler recieves is always valid."]
#[doc = ""]
#[doc = " This function behaves in the same manner as esp_event_post_to, except the additional specification of the event loop"]
#[doc = " to post the event to."]
#[doc = ""]
#[doc = " @param[in] event_loop the event loop to post to"]
#[doc = " @param[in] event_base the event base that identifies the event"]
#[doc = " @param[in] event_id the event id that identifies the event"]
#[doc = " @param[in] event_data the data, specific to the event occurence, that gets passed to the handler"]
#[doc = " @param[in] event_data_size the size of the event data"]
#[doc = " @param[in] ticks_to_wait number of ticks to block on a full event queue"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Success"]
#[doc = " - ESP_ERR_TIMEOUT: Time to wait for event queue to unblock expired,"]
#[doc = " queue full when posting from ISR"]
#[doc = " - ESP_ERR_INVALID_ARG: Invalid combination of event base and event id"]
#[doc = " - Others: Fail"]
pub fn esp_event_post_to(
event_loop: esp_event_loop_handle_t,
event_base: esp_event_base_t,
event_id: i32,
event_data: *mut libc::c_void,
event_data_size: size_t,
ticks_to_wait: TickType_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Dumps statistics of all event loops."]
#[doc = ""]
#[doc = " Dumps event loop info in the format:"]
#[doc = ""]
#[doc = "@verbatim"]
#[doc = "event loop"]
#[doc = "handler"]
#[doc = "handler"]
#[doc = "..."]
#[doc = "event loop"]
#[doc = "handler"]
#[doc = "handler"]
#[doc = "..."]
#[doc = ""]
#[doc = "where:"]
#[doc = ""]
#[doc = "event loop"]
#[doc = "format: address,name rx:total_recieved dr:total_dropped"]
#[doc = "where:"]
#[doc = "address - memory address of the event loop"]
#[doc = "name - name of the event loop, 'none' if no dedicated task"]
#[doc = "total_recieved - number of successfully posted events"]
#[doc = "total_dropped - number of events unsuccessfully posted due to queue being full"]
#[doc = ""]
#[doc = "handler"]
#[doc = "format: address ev:base,id inv:total_invoked run:total_runtime"]
#[doc = "where:"]
#[doc = "address - address of the handler function"]
#[doc = "base,id - the event specified by event base and id this handler executes"]
#[doc = "total_invoked - number of times this handler has been invoked"]
#[doc = "total_runtime - total amount of time used for invoking this handler"]
#[doc = ""]
#[doc = "@endverbatim"]
#[doc = ""]
#[doc = " @param[in] file the file stream to output to"]
#[doc = ""]
#[doc = " @note this function is a noop when CONFIG_ESP_EVENT_LOOP_PROFILING is disabled"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Success"]
#[doc = " - ESP_ERR_NO_MEM: Cannot allocate memory for event loops list"]
#[doc = " - Others: Fail"]
pub fn esp_event_dump(file: *mut FILE) -> esp_err_t;
}
pub type esp_freertos_idle_cb_t = ::core::option::Option<unsafe extern "C" fn() -> bool>;
pub type esp_freertos_tick_cb_t = ::core::option::Option<unsafe extern "C" fn()>;
extern "C" {
#[doc = " @brief Register a callback to be called from the specified core's idle hook."]
#[doc = " The callback should return true if it should be called by the idle hook"]
#[doc = " once per interrupt (or FreeRTOS tick), and return false if it should"]
#[doc = " be called repeatedly as fast as possible by the idle hook."]
#[doc = ""]
#[doc = " @warning Idle callbacks MUST NOT, UNDER ANY CIRCUMSTANCES, CALL"]
#[doc = " A FUNCTION THAT MIGHT BLOCK."]
#[doc = ""]
#[doc = " @param[in] new_idle_cb Callback to be called"]
#[doc = " @param[in] cpuid id of the core"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Callback registered to the specified core's idle hook"]
#[doc = " - ESP_ERR_NO_MEM: No more space on the specified core's idle hook to register callback"]
#[doc = " - ESP_ERR_INVALID_ARG: cpuid is invalid"]
pub fn esp_register_freertos_idle_hook_for_cpu(
new_idle_cb: esp_freertos_idle_cb_t,
cpuid: UBaseType_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Register a callback to the idle hook of the core that calls this function."]
#[doc = " The callback should return true if it should be called by the idle hook"]
#[doc = " once per interrupt (or FreeRTOS tick), and return false if it should"]
#[doc = " be called repeatedly as fast as possible by the idle hook."]
#[doc = ""]
#[doc = " @warning Idle callbacks MUST NOT, UNDER ANY CIRCUMSTANCES, CALL"]
#[doc = " A FUNCTION THAT MIGHT BLOCK."]
#[doc = ""]
#[doc = " @param[in] new_idle_cb Callback to be called"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Callback registered to the calling core's idle hook"]
#[doc = " - ESP_ERR_NO_MEM: No more space on the calling core's idle hook to register callback"]
pub fn esp_register_freertos_idle_hook(new_idle_cb: esp_freertos_idle_cb_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Register a callback to be called from the specified core's tick hook."]
#[doc = ""]
#[doc = " @param[in] new_tick_cb Callback to be called"]
#[doc = " @param[in] cpuid id of the core"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Callback registered to specified core's tick hook"]
#[doc = " - ESP_ERR_NO_MEM: No more space on the specified core's tick hook to register the callback"]
#[doc = " - ESP_ERR_INVALID_ARG: cpuid is invalid"]
pub fn esp_register_freertos_tick_hook_for_cpu(
new_tick_cb: esp_freertos_tick_cb_t,
cpuid: UBaseType_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Register a callback to be called from the calling core's tick hook."]
#[doc = ""]
#[doc = " @param[in] new_tick_cb Callback to be called"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: Callback registered to the calling core's tick hook"]
#[doc = " - ESP_ERR_NO_MEM: No more space on the calling core's tick hook to register the callback"]
pub fn esp_register_freertos_tick_hook(new_tick_cb: esp_freertos_tick_cb_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Unregister an idle callback from the idle hook of the specified core"]
#[doc = ""]
#[doc = " @param[in] old_idle_cb Callback to be unregistered"]
#[doc = " @param[in] cpuid id of the core"]
pub fn esp_deregister_freertos_idle_hook_for_cpu(
old_idle_cb: esp_freertos_idle_cb_t,
cpuid: UBaseType_t,
);
}
extern "C" {
#[doc = " @brief Unregister an idle callback. If the idle callback is registered to"]
#[doc = " the idle hooks of both cores, the idle hook will be unregistered from"]
#[doc = " both cores"]
#[doc = ""]
#[doc = " @param[in] old_idle_cb Callback to be unregistered"]
pub fn esp_deregister_freertos_idle_hook(old_idle_cb: esp_freertos_idle_cb_t);
}
extern "C" {
#[doc = " @brief Unregister a tick callback from the tick hook of the specified core"]
#[doc = ""]
#[doc = " @param[in] old_tick_cb Callback to be unregistered"]
#[doc = " @param[in] cpuid id of the core"]
pub fn esp_deregister_freertos_tick_hook_for_cpu(
old_tick_cb: esp_freertos_tick_cb_t,
cpuid: UBaseType_t,
);
}
extern "C" {
#[doc = " @brief Unregister a tick callback. If the tick callback is registered to the"]
#[doc = " tick hooks of both cores, the tick hook will be unregistered from"]
#[doc = " both cores"]
#[doc = ""]
#[doc = " @param[in] old_tick_cb Callback to be unregistered"]
pub fn esp_deregister_freertos_tick_hook(old_tick_cb: esp_freertos_tick_cb_t);
}
#[repr(u32)]
#[doc = " @brief Status of sending ESPNOW data ."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_now_send_status_t {
#[doc = "< Send ESPNOW data successfully"]
ESP_NOW_SEND_SUCCESS = 0,
#[doc = "< Send ESPNOW data fail"]
ESP_NOW_SEND_FAIL = 1,
}
#[doc = " @brief ESPNOW peer information parameters."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_now_peer_info {
#[doc = "< ESPNOW peer MAC address that is also the MAC address of station or softap"]
pub peer_addr: [u8; 6usize],
#[doc = "< ESPNOW peer local master key that is used to encrypt data"]
pub lmk: [u8; 16usize],
#[doc = "< Wi-Fi channel that peer uses to send/receive ESPNOW data. If the value is 0,"]
#[doc = "use the current channel which station or softap is on. Otherwise, it must be"]
#[doc = "set as the channel that station or softap is on."]
pub channel: u8,
#[doc = "< Wi-Fi interface that peer uses to send/receive ESPNOW data"]
pub ifidx: wifi_interface_t,
#[doc = "< ESPNOW data that this peer sends/receives is encrypted or not"]
pub encrypt: bool,
#[doc = "< ESPNOW peer private data"]
pub priv_: *mut libc::c_void,
}
pub type esp_now_peer_info_t = esp_now_peer_info;
#[doc = " @brief Number of ESPNOW peers which exist currently."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct esp_now_peer_num {
#[doc = "< Total number of ESPNOW peers, maximum value is ESP_NOW_MAX_TOTAL_PEER_NUM"]
pub total_num: libc::c_int,
#[doc = "< Number of encrypted ESPNOW peers, maximum value is ESP_NOW_MAX_ENCRYPT_PEER_NUM"]
pub encrypt_num: libc::c_int,
}
pub type esp_now_peer_num_t = esp_now_peer_num;
#[doc = " @brief Callback function of receiving ESPNOW data"]
#[doc = " @param mac_addr peer MAC address"]
#[doc = " @param data received data"]
#[doc = " @param data_len length of received data"]
pub type esp_now_recv_cb_t = ::core::option::Option<
unsafe extern "C" fn(mac_addr: *const u8, data: *const u8, data_len: libc::c_int),
>;
#[doc = " @brief Callback function of sending ESPNOW data"]
#[doc = " @param mac_addr peer MAC address"]
#[doc = " @param status status of sending ESPNOW data (succeed or fail)"]
pub type esp_now_send_cb_t = ::core::option::Option<
unsafe extern "C" fn(mac_addr: *const u8, status: esp_now_send_status_t),
>;
extern "C" {
#[doc = " @brief Initialize ESPNOW function"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK : succeed"]
#[doc = " - ESP_ERR_ESPNOW_INTERNAL : Internal error"]
pub fn esp_now_init() -> esp_err_t;
}
extern "C" {
#[doc = " @brief De-initialize ESPNOW function"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK : succeed"]
pub fn esp_now_deinit() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get the version of ESPNOW"]
#[doc = ""]
#[doc = " @param version ESPNOW version"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK : succeed"]
#[doc = " - ESP_ERR_ESPNOW_ARG : invalid argument"]
pub fn esp_now_get_version(version: *mut u32) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Register callback function of receiving ESPNOW data"]
#[doc = ""]
#[doc = " @param cb callback function of receiving ESPNOW data"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK : succeed"]
#[doc = " - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized"]
#[doc = " - ESP_ERR_ESPNOW_INTERNAL : internal error"]
pub fn esp_now_register_recv_cb(cb: esp_now_recv_cb_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Unregister callback function of receiving ESPNOW data"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK : succeed"]
#[doc = " - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized"]
pub fn esp_now_unregister_recv_cb() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Register callback function of sending ESPNOW data"]
#[doc = ""]
#[doc = " @param cb callback function of sending ESPNOW data"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK : succeed"]
#[doc = " - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized"]
#[doc = " - ESP_ERR_ESPNOW_INTERNAL : internal error"]
pub fn esp_now_register_send_cb(cb: esp_now_send_cb_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Unregister callback function of sending ESPNOW data"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK : succeed"]
#[doc = " - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized"]
pub fn esp_now_unregister_send_cb() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Send ESPNOW data"]
#[doc = ""]
#[doc = " @attention 1. If peer_addr is not NULL, send data to the peer whose MAC address matches peer_addr"]
#[doc = " @attention 2. If peer_addr is NULL, send data to all of the peers that are added to the peer list"]
#[doc = " @attention 3. The maximum length of data must be less than ESP_NOW_MAX_DATA_LEN"]
#[doc = " @attention 4. The buffer pointed to by data argument does not need to be valid after esp_now_send returns"]
#[doc = ""]
#[doc = " @param peer_addr peer MAC address"]
#[doc = " @param data data to send"]
#[doc = " @param len length of data"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK : succeed"]
#[doc = " - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized"]
#[doc = " - ESP_ERR_ESPNOW_ARG : invalid argument"]
#[doc = " - ESP_ERR_ESPNOW_INTERNAL : internal error"]
#[doc = " - ESP_ERR_ESPNOW_NO_MEM : out of memory"]
#[doc = " - ESP_ERR_ESPNOW_NOT_FOUND : peer is not found"]
#[doc = " - ESP_ERR_ESPNOW_IF : current WiFi interface doesn't match that of peer"]
pub fn esp_now_send(peer_addr: *const u8, data: *const u8, len: size_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Add a peer to peer list"]
#[doc = ""]
#[doc = " @param peer peer information"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK : succeed"]
#[doc = " - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized"]
#[doc = " - ESP_ERR_ESPNOW_ARG : invalid argument"]
#[doc = " - ESP_ERR_ESPNOW_FULL : peer list is full"]
#[doc = " - ESP_ERR_ESPNOW_NO_MEM : out of memory"]
#[doc = " - ESP_ERR_ESPNOW_EXIST : peer has existed"]
pub fn esp_now_add_peer(peer: *const esp_now_peer_info_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Delete a peer from peer list"]
#[doc = ""]
#[doc = " @param peer_addr peer MAC address"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK : succeed"]
#[doc = " - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized"]
#[doc = " - ESP_ERR_ESPNOW_ARG : invalid argument"]
#[doc = " - ESP_ERR_ESPNOW_NOT_FOUND : peer is not found"]
pub fn esp_now_del_peer(peer_addr: *const u8) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Modify a peer"]
#[doc = ""]
#[doc = " @param peer peer information"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK : succeed"]
#[doc = " - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized"]
#[doc = " - ESP_ERR_ESPNOW_ARG : invalid argument"]
#[doc = " - ESP_ERR_ESPNOW_FULL : peer list is full"]
pub fn esp_now_mod_peer(peer: *const esp_now_peer_info_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get a peer whose MAC address matches peer_addr from peer list"]
#[doc = ""]
#[doc = " @param peer_addr peer MAC address"]
#[doc = " @param peer peer information"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK : succeed"]
#[doc = " - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized"]
#[doc = " - ESP_ERR_ESPNOW_ARG : invalid argument"]
#[doc = " - ESP_ERR_ESPNOW_NOT_FOUND : peer is not found"]
pub fn esp_now_get_peer(peer_addr: *const u8, peer: *mut esp_now_peer_info_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Fetch a peer from peer list"]
#[doc = ""]
#[doc = " @param from_head fetch from head of list or not"]
#[doc = " @param peer peer information"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK : succeed"]
#[doc = " - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized"]
#[doc = " - ESP_ERR_ESPNOW_ARG : invalid argument"]
#[doc = " - ESP_ERR_ESPNOW_NOT_FOUND : peer is not found"]
pub fn esp_now_fetch_peer(from_head: bool, peer: *mut esp_now_peer_info_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Peer exists or not"]
#[doc = ""]
#[doc = " @param peer_addr peer MAC address"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - true : peer exists"]
#[doc = " - false : peer not exists"]
pub fn esp_now_is_peer_exist(peer_addr: *const u8) -> bool;
}
extern "C" {
#[doc = " @brief Get the number of peers"]
#[doc = ""]
#[doc = " @param num number of peers"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK : succeed"]
#[doc = " - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized"]
#[doc = " - ESP_ERR_ESPNOW_ARG : invalid argument"]
pub fn esp_now_get_peer_num(num: *mut esp_now_peer_num_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set the primary master key"]
#[doc = ""]
#[doc = " @param pmk primary master key"]
#[doc = ""]
#[doc = " @attention 1. primary master key is used to encrypt local master key"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK : succeed"]
#[doc = " - ESP_ERR_ESPNOW_NOT_INIT : ESPNOW is not initialized"]
#[doc = " - ESP_ERR_ESPNOW_ARG : invalid argument"]
pub fn esp_now_set_pmk(pmk: *const u8) -> esp_err_t;
}
#[repr(u32)]
#[doc = " Touch pad channel"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum touch_pad_t {
#[doc = "< Touch pad channel 0 is GPIO4(ESP32)"]
TOUCH_PAD_NUM0 = 0,
#[doc = "< Touch pad channel 1 is GPIO0(ESP32) / GPIO1(ESP32-S2)"]
TOUCH_PAD_NUM1 = 1,
#[doc = "< Touch pad channel 2 is GPIO2(ESP32) / GPIO2(ESP32-S2)"]
TOUCH_PAD_NUM2 = 2,
#[doc = "< Touch pad channel 3 is GPIO15(ESP32) / GPIO3(ESP32-S2)"]
TOUCH_PAD_NUM3 = 3,
#[doc = "< Touch pad channel 4 is GPIO13(ESP32) / GPIO4(ESP32-S2)"]
TOUCH_PAD_NUM4 = 4,
#[doc = "< Touch pad channel 5 is GPIO12(ESP32) / GPIO5(ESP32-S2)"]
TOUCH_PAD_NUM5 = 5,
#[doc = "< Touch pad channel 6 is GPIO14(ESP32) / GPIO6(ESP32-S2)"]
TOUCH_PAD_NUM6 = 6,
#[doc = "< Touch pad channel 7 is GPIO27(ESP32) / GPIO7(ESP32-S2)"]
TOUCH_PAD_NUM7 = 7,
#[doc = "< Touch pad channel 8 is GPIO33(ESP32) / GPIO8(ESP32-S2)"]
TOUCH_PAD_NUM8 = 8,
#[doc = "< Touch pad channel 9 is GPIO32(ESP32) / GPIO9(ESP32-S2)"]
TOUCH_PAD_NUM9 = 9,
TOUCH_PAD_MAX = 10,
}
#[repr(i32)]
#[doc = " Touch sensor high reference voltage"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum touch_high_volt_t {
#[doc = "<Touch sensor high reference voltage, no change"]
TOUCH_HVOLT_KEEP = -1,
#[doc = "<Touch sensor high reference voltage, 2.4V"]
TOUCH_HVOLT_2V4 = 0,
#[doc = "<Touch sensor high reference voltage, 2.5V"]
TOUCH_HVOLT_2V5 = 1,
#[doc = "<Touch sensor high reference voltage, 2.6V"]
TOUCH_HVOLT_2V6 = 2,
#[doc = "<Touch sensor high reference voltage, 2.7V"]
TOUCH_HVOLT_2V7 = 3,
TOUCH_HVOLT_MAX = 4,
}
#[repr(i32)]
#[doc = " Touch sensor low reference voltage"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum touch_low_volt_t {
#[doc = "<Touch sensor low reference voltage, no change"]
TOUCH_LVOLT_KEEP = -1,
#[doc = "<Touch sensor low reference voltage, 0.5V"]
TOUCH_LVOLT_0V5 = 0,
#[doc = "<Touch sensor low reference voltage, 0.6V"]
TOUCH_LVOLT_0V6 = 1,
#[doc = "<Touch sensor low reference voltage, 0.7V"]
TOUCH_LVOLT_0V7 = 2,
#[doc = "<Touch sensor low reference voltage, 0.8V"]
TOUCH_LVOLT_0V8 = 3,
TOUCH_LVOLT_MAX = 4,
}
#[repr(i32)]
#[doc = " Touch sensor high reference voltage attenuation"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum touch_volt_atten_t {
#[doc = "<Touch sensor high reference voltage attenuation, no change"]
TOUCH_HVOLT_ATTEN_KEEP = -1,
#[doc = "<Touch sensor high reference voltage attenuation, 1.5V attenuation"]
TOUCH_HVOLT_ATTEN_1V5 = 0,
#[doc = "<Touch sensor high reference voltage attenuation, 1.0V attenuation"]
TOUCH_HVOLT_ATTEN_1V = 1,
#[doc = "<Touch sensor high reference voltage attenuation, 0.5V attenuation"]
TOUCH_HVOLT_ATTEN_0V5 = 2,
#[doc = "<Touch sensor high reference voltage attenuation, 0V attenuation"]
TOUCH_HVOLT_ATTEN_0V = 3,
TOUCH_HVOLT_ATTEN_MAX = 4,
}
#[repr(u32)]
#[doc = " Touch sensor charge/discharge speed"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum touch_cnt_slope_t {
#[doc = "<Touch sensor charge / discharge speed, always zero"]
TOUCH_PAD_SLOPE_0 = 0,
#[doc = "<Touch sensor charge / discharge speed, slowest"]
TOUCH_PAD_SLOPE_1 = 1,
#[doc = "<Touch sensor charge / discharge speed"]
TOUCH_PAD_SLOPE_2 = 2,
#[doc = "<Touch sensor charge / discharge speed"]
TOUCH_PAD_SLOPE_3 = 3,
#[doc = "<Touch sensor charge / discharge speed"]
TOUCH_PAD_SLOPE_4 = 4,
#[doc = "<Touch sensor charge / discharge speed"]
TOUCH_PAD_SLOPE_5 = 5,
#[doc = "<Touch sensor charge / discharge speed"]
TOUCH_PAD_SLOPE_6 = 6,
#[doc = "<Touch sensor charge / discharge speed, fast"]
TOUCH_PAD_SLOPE_7 = 7,
TOUCH_PAD_SLOPE_MAX = 8,
}
#[repr(u32)]
#[doc = " Touch sensor initial charge level"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum touch_tie_opt_t {
#[doc = "<Initial level of charging voltage, low level"]
TOUCH_PAD_TIE_OPT_LOW = 0,
#[doc = "<Initial level of charging voltage, high level"]
TOUCH_PAD_TIE_OPT_HIGH = 1,
TOUCH_PAD_TIE_OPT_MAX = 2,
}
#[repr(u32)]
#[doc = " Touch sensor FSM mode"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum touch_fsm_mode_t {
#[doc = "<To start touch FSM by timer"]
TOUCH_FSM_MODE_TIMER = 0,
#[doc = "<To start touch FSM by software trigger"]
TOUCH_FSM_MODE_SW = 1,
TOUCH_FSM_MODE_MAX = 2,
}
#[repr(u32)]
#[doc = " ESP32 Only"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum touch_trigger_mode_t {
#[doc = "<Touch interrupt will happen if counter value is less than threshold."]
TOUCH_TRIGGER_BELOW = 0,
#[doc = "<Touch interrupt will happen if counter value is larger than threshold."]
TOUCH_TRIGGER_ABOVE = 1,
TOUCH_TRIGGER_MAX = 2,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum touch_trigger_src_t {
#[doc = "< wakeup interrupt is generated if both SET1 and SET2 are \"touched\""]
TOUCH_TRIGGER_SOURCE_BOTH = 0,
#[doc = "< wakeup interrupt is generated if SET1 is \"touched\""]
TOUCH_TRIGGER_SOURCE_SET1 = 1,
TOUCH_TRIGGER_SOURCE_MAX = 2,
}
extern "C" {
#[doc = " @brief Initialize touch module."]
#[doc = " @note If default parameter don't match the usage scenario, it can be changed after this function."]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_NO_MEM Touch pad init error"]
pub fn touch_pad_init() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Un-install touch pad driver."]
#[doc = " @note After this function is called, other touch functions are prohibited from being called."]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_FAIL Touch pad driver not initialized"]
pub fn touch_pad_deinit() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Initialize touch pad GPIO"]
#[doc = " @param touch_num touch pad index"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if argument is wrong"]
pub fn touch_pad_io_init(touch_num: touch_pad_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set touch sensor high voltage threshold of chanrge."]
#[doc = " The touch sensor measures the channel capacitance value by charging and discharging the channel."]
#[doc = " So the high threshold should be less than the supply voltage."]
#[doc = " @param refh the value of DREFH"]
#[doc = " @param refl the value of DREFL"]
#[doc = " @param atten the attenuation on DREFH"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if argument is wrong"]
pub fn touch_pad_set_voltage(
refh: touch_high_volt_t,
refl: touch_low_volt_t,
atten: touch_volt_atten_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get touch sensor reference voltage,"]
#[doc = " @param refh pointer to accept DREFH value"]
#[doc = " @param refl pointer to accept DREFL value"]
#[doc = " @param atten pointer to accept the attenuation on DREFH"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
pub fn touch_pad_get_voltage(
refh: *mut touch_high_volt_t,
refl: *mut touch_low_volt_t,
atten: *mut touch_volt_atten_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set touch sensor charge/discharge speed for each pad."]
#[doc = " If the slope is 0, the counter would always be zero."]
#[doc = " If the slope is 1, the charging and discharging would be slow, accordingly."]
#[doc = " If the slope is set 7, which is the maximum value, the charging and discharging would be fast."]
#[doc = " @note The higher the charge and discharge current, the greater the immunity of the touch channel,"]
#[doc = " but it will increase the system power consumption."]
#[doc = " @param touch_num touch pad index"]
#[doc = " @param slope touch pad charge/discharge speed"]
#[doc = " @param opt the initial voltage"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if argument is wrong"]
pub fn touch_pad_set_cnt_mode(
touch_num: touch_pad_t,
slope: touch_cnt_slope_t,
opt: touch_tie_opt_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get touch sensor charge/discharge speed for each pad"]
#[doc = " @param touch_num touch pad index"]
#[doc = " @param slope pointer to accept touch pad charge/discharge slope"]
#[doc = " @param opt pointer to accept the initial voltage"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if argument is wrong"]
pub fn touch_pad_get_cnt_mode(
touch_num: touch_pad_t,
slope: *mut touch_cnt_slope_t,
opt: *mut touch_tie_opt_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Deregister the handler previously registered using touch_pad_isr_handler_register"]
#[doc = " @param fn handler function to call (as passed to touch_pad_isr_handler_register)"]
#[doc = " @param arg argument of the handler (as passed to touch_pad_isr_handler_register)"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_STATE if a handler matching both fn and"]
#[doc = " arg isn't registered"]
pub fn touch_pad_isr_deregister(
fn_: ::core::option::Option<unsafe extern "C" fn(arg1: *mut libc::c_void)>,
arg: *mut libc::c_void,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get the touch pad which caused wakeup from deep sleep."]
#[doc = " @param pad_num pointer to touch pad which caused wakeup"]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG parameter is NULL"]
pub fn touch_pad_get_wakeup_status(pad_num: *mut touch_pad_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set touch sensor FSM mode, the test action can be triggered by the timer,"]
#[doc = " as well as by the software."]
#[doc = " @param mode FSM mode"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if argument is wrong"]
pub fn touch_pad_set_fsm_mode(mode: touch_fsm_mode_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get touch sensor FSM mode"]
#[doc = " @param mode pointer to accept FSM mode"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
pub fn touch_pad_get_fsm_mode(mode: *mut touch_fsm_mode_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief To clear the touch sensor channel active status."]
#[doc = ""]
#[doc = " @note The FSM automatically updates the touch sensor status. It is generally not necessary to call this API to clear the status."]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
pub fn touch_pad_clear_status() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get the touch sensor channel active status mask."]
#[doc = " The bit position represents the channel number. The 0/1 status of the bit represents the trigger status."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - The touch sensor status. e.g. Touch1 trigger status is `status_mask & (BIT1)`."]
pub fn touch_pad_get_status() -> u32;
}
extern "C" {
#[doc = " @brief Check touch sensor measurement status."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - True measurement is under way"]
#[doc = " - False measurement done"]
pub fn touch_pad_meas_is_done() -> bool;
}
extern "C" {
#[doc = " @brief Configure touch pad interrupt threshold."]
#[doc = ""]
#[doc = " @note If FSM mode is set to TOUCH_FSM_MODE_TIMER, this function will be blocked for one measurement cycle and wait for data to be valid."]
#[doc = ""]
#[doc = " @param touch_num touch pad index"]
#[doc = " @param threshold interrupt threshold,"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG if argument wrong"]
#[doc = " - ESP_FAIL if touch pad not initialized"]
pub fn touch_pad_config(touch_num: touch_pad_t, threshold: u16) -> esp_err_t;
}
extern "C" {
#[doc = " @brief get touch sensor counter value."]
#[doc = " Each touch sensor has a counter to count the number of charge/discharge cycles."]
#[doc = " When the pad is not 'touched', we can get a number of the counter."]
#[doc = " When the pad is 'touched', the value in counter will get smaller because of the larger equivalent capacitance."]
#[doc = ""]
#[doc = " @note This API requests hardware measurement once. If IIR filter mode is enabled,"]
#[doc = " please use 'touch_pad_read_raw_data' interface instead."]
#[doc = ""]
#[doc = " @param touch_num touch pad index"]
#[doc = " @param touch_value pointer to accept touch sensor value"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Touch pad parameter error"]
#[doc = " - ESP_ERR_INVALID_STATE This touch pad hardware connection is error, the value of \"touch_value\" is 0."]
#[doc = " - ESP_FAIL Touch pad not initialized"]
pub fn touch_pad_read(touch_num: touch_pad_t, touch_value: *mut u16) -> esp_err_t;
}
extern "C" {
#[doc = " @brief get filtered touch sensor counter value by IIR filter."]
#[doc = ""]
#[doc = " @note touch_pad_filter_start has to be called before calling touch_pad_read_filtered."]
#[doc = " This function can be called from ISR"]
#[doc = ""]
#[doc = " @param touch_num touch pad index"]
#[doc = " @param touch_value pointer to accept touch sensor value"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Touch pad parameter error"]
#[doc = " - ESP_ERR_INVALID_STATE This touch pad hardware connection is error, the value of \"touch_value\" is 0."]
#[doc = " - ESP_FAIL Touch pad not initialized"]
pub fn touch_pad_read_filtered(touch_num: touch_pad_t, touch_value: *mut u16) -> esp_err_t;
}
extern "C" {
#[doc = " @brief get raw data (touch sensor counter value) from IIR filter process."]
#[doc = " Need not request hardware measurements."]
#[doc = ""]
#[doc = " @note touch_pad_filter_start has to be called before calling touch_pad_read_raw_data."]
#[doc = " This function can be called from ISR"]
#[doc = ""]
#[doc = " @param touch_num touch pad index"]
#[doc = " @param touch_value pointer to accept touch sensor value"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG Touch pad parameter error"]
#[doc = " - ESP_ERR_INVALID_STATE This touch pad hardware connection is error, the value of \"touch_value\" is 0."]
#[doc = " - ESP_FAIL Touch pad not initialized"]
pub fn touch_pad_read_raw_data(touch_num: touch_pad_t, touch_value: *mut u16) -> esp_err_t;
}
#[doc = " @brief Callback function that is called after each IIR filter calculation."]
#[doc = " @note This callback is called in timer task in each filtering cycle."]
#[doc = " @note This callback should not be blocked."]
#[doc = " @param raw_value The latest raw data(touch sensor counter value) that"]
#[doc = " points to all channels(raw_value[0..TOUCH_PAD_MAX-1])."]
#[doc = " @param filtered_value The latest IIR filtered data(calculated from raw data) that"]
#[doc = " points to all channels(filtered_value[0..TOUCH_PAD_MAX-1])."]
#[doc = ""]
pub type filter_cb_t =
::core::option::Option<unsafe extern "C" fn(raw_value: *mut u16, filtered_value: *mut u16)>;
extern "C" {
#[doc = " @brief Register the callback function that is called after each IIR filter calculation."]
#[doc = " @note The 'read_cb' callback is called in timer task in each filtering cycle."]
#[doc = " @param read_cb Pointer to filtered callback function."]
#[doc = " If the argument passed in is NULL, the callback will stop."]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG set error"]
pub fn touch_pad_set_filter_read_cb(read_cb: filter_cb_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Register touch-pad ISR."]
#[doc = " The handler will be attached to the same CPU core that this function is running on."]
#[doc = " @param fn Pointer to ISR handler"]
#[doc = " @param arg Parameter for ISR"]
#[doc = " @return"]
#[doc = " - ESP_OK Success ;"]
#[doc = " - ESP_ERR_INVALID_ARG GPIO error"]
#[doc = " - ESP_ERR_NO_MEM No memory"]
pub fn touch_pad_isr_register(fn_: intr_handler_t, arg: *mut libc::c_void) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set touch sensor measurement and sleep time."]
#[doc = " Excessive total time will slow down the touch response."]
#[doc = " Too small measurement time will not be sampled enough, resulting in inaccurate measurements."]
#[doc = ""]
#[doc = " @note The greater the duty cycle of the measurement time, the more system power is consumed."]
#[doc = " @param sleep_cycle The touch sensor will sleep after each measurement."]
#[doc = " sleep_cycle decide the interval between each measurement."]
#[doc = " t_sleep = sleep_cycle / (RTC_SLOW_CLK frequency)."]
#[doc = " The approximate frequency value of RTC_SLOW_CLK can be obtained using rtc_clk_slow_freq_get_hz function."]
#[doc = " @param meas_cycle The duration of the touch sensor measurement."]
#[doc = " t_meas = meas_cycle / 8M, the maximum measure time is 0xffff / 8M = 8.19 ms"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
pub fn touch_pad_set_meas_time(sleep_cycle: u16, meas_cycle: u16) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get touch sensor measurement and sleep time"]
#[doc = " @param sleep_cycle Pointer to accept sleep cycle number"]
#[doc = " @param meas_cycle Pointer to accept measurement cycle count."]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
pub fn touch_pad_get_meas_time(sleep_cycle: *mut u16, meas_cycle: *mut u16) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Trigger a touch sensor measurement, only support in SW mode of FSM"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
pub fn touch_pad_sw_start() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set touch sensor interrupt threshold"]
#[doc = " @param touch_num touch pad index"]
#[doc = " @param threshold threshold of touchpad count, refer to touch_pad_set_trigger_mode to see how to set trigger mode."]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if argument is wrong"]
pub fn touch_pad_set_thresh(touch_num: touch_pad_t, threshold: u16) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get touch sensor interrupt threshold"]
#[doc = " @param touch_num touch pad index"]
#[doc = " @param threshold pointer to accept threshold"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if argument is wrong"]
pub fn touch_pad_get_thresh(touch_num: touch_pad_t, threshold: *mut u16) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set touch sensor interrupt trigger mode."]
#[doc = " Interrupt can be triggered either when counter result is less than"]
#[doc = " threshold or when counter result is more than threshold."]
#[doc = " @param mode touch sensor interrupt trigger mode"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if argument is wrong"]
pub fn touch_pad_set_trigger_mode(mode: touch_trigger_mode_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get touch sensor interrupt trigger mode"]
#[doc = " @param mode pointer to accept touch sensor interrupt trigger mode"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
pub fn touch_pad_get_trigger_mode(mode: *mut touch_trigger_mode_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set touch sensor interrupt trigger source. There are two sets of touch signals."]
#[doc = " Set1 and set2 can be mapped to several touch signals. Either set will be triggered"]
#[doc = " if at least one of its touch signal is 'touched'. The interrupt can be configured to be generated"]
#[doc = " if set1 is triggered, or only if both sets are triggered."]
#[doc = " @param src touch sensor interrupt trigger source"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if argument is wrong"]
pub fn touch_pad_set_trigger_source(src: touch_trigger_src_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get touch sensor interrupt trigger source"]
#[doc = " @param src pointer to accept touch sensor interrupt trigger source"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
pub fn touch_pad_get_trigger_source(src: *mut touch_trigger_src_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set touch sensor group mask."]
#[doc = " Touch pad module has two sets of signals, 'Touched' signal is triggered only if"]
#[doc = " at least one of touch pad in this group is \"touched\"."]
#[doc = " This function will set the register bits according to the given bitmask."]
#[doc = " @param set1_mask bitmask of touch sensor signal group1, it's a 10-bit value"]
#[doc = " @param set2_mask bitmask of touch sensor signal group2, it's a 10-bit value"]
#[doc = " @param en_mask bitmask of touch sensor work enable, it's a 10-bit value"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if argument is wrong"]
pub fn touch_pad_set_group_mask(set1_mask: u16, set2_mask: u16, en_mask: u16) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get touch sensor group mask."]
#[doc = " @param set1_mask pointer to accept bitmask of touch sensor signal group1, it's a 10-bit value"]
#[doc = " @param set2_mask pointer to accept bitmask of touch sensor signal group2, it's a 10-bit value"]
#[doc = " @param en_mask pointer to accept bitmask of touch sensor work enable, it's a 10-bit value"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
pub fn touch_pad_get_group_mask(
set1_mask: *mut u16,
set2_mask: *mut u16,
en_mask: *mut u16,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Clear touch sensor group mask."]
#[doc = " Touch pad module has two sets of signals, Interrupt is triggered only if"]
#[doc = " at least one of touch pad in this group is \"touched\"."]
#[doc = " This function will clear the register bits according to the given bitmask."]
#[doc = " @param set1_mask bitmask touch sensor signal group1, it's a 10-bit value"]
#[doc = " @param set2_mask bitmask touch sensor signal group2, it's a 10-bit value"]
#[doc = " @param en_mask bitmask of touch sensor work enable, it's a 10-bit value"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if argument is wrong"]
pub fn touch_pad_clear_group_mask(set1_mask: u16, set2_mask: u16, en_mask: u16) -> esp_err_t;
}
extern "C" {
#[doc = " @brief To enable touch pad interrupt"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
pub fn touch_pad_intr_enable() -> esp_err_t;
}
extern "C" {
#[doc = " @brief To disable touch pad interrupt"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
pub fn touch_pad_intr_disable() -> esp_err_t;
}
extern "C" {
#[doc = " @brief To clear touch pad interrupt"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
pub fn touch_pad_intr_clear() -> esp_err_t;
}
extern "C" {
#[doc = " @brief set touch pad filter calibration period, in ms."]
#[doc = " Need to call touch_pad_filter_start before all touch filter APIs"]
#[doc = " @param new_period_ms filter period, in ms"]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_STATE driver state error"]
#[doc = " - ESP_ERR_INVALID_ARG parameter error"]
pub fn touch_pad_set_filter_period(new_period_ms: u32) -> esp_err_t;
}
extern "C" {
#[doc = " @brief get touch pad filter calibration period, in ms"]
#[doc = " Need to call touch_pad_filter_start before all touch filter APIs"]
#[doc = " @param p_period_ms pointer to accept period"]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_STATE driver state error"]
#[doc = " - ESP_ERR_INVALID_ARG parameter error"]
pub fn touch_pad_get_filter_period(p_period_ms: *mut u32) -> esp_err_t;
}
extern "C" {
#[doc = " @brief start touch pad filter function"]
#[doc = " This API will start a filter to process the noise in order to prevent false triggering"]
#[doc = " when detecting slight change of capacitance."]
#[doc = " Need to call touch_pad_filter_start before all touch filter APIs"]
#[doc = ""]
#[doc = " @note This filter uses FreeRTOS timer, which is dispatched from a task with"]
#[doc = " priority 1 by default on CPU 0. So if some application task with higher priority"]
#[doc = " takes a lot of CPU0 time, then the quality of data obtained from this filter will be affected."]
#[doc = " You can adjust FreeRTOS timer task priority in menuconfig."]
#[doc = " @param filter_period_ms filter calibration period, in ms"]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_ARG parameter error"]
#[doc = " - ESP_ERR_NO_MEM No memory for driver"]
#[doc = " - ESP_ERR_INVALID_STATE driver state error"]
pub fn touch_pad_filter_start(filter_period_ms: u32) -> esp_err_t;
}
extern "C" {
#[doc = " @brief stop touch pad filter function"]
#[doc = " Need to call touch_pad_filter_start before all touch filter APIs"]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_STATE driver state error"]
pub fn touch_pad_filter_stop() -> esp_err_t;
}
extern "C" {
#[doc = " @brief delete touch pad filter driver and release the memory"]
#[doc = " Need to call touch_pad_filter_start before all touch filter APIs"]
#[doc = " @return"]
#[doc = " - ESP_OK Success"]
#[doc = " - ESP_ERR_INVALID_STATE driver state error"]
pub fn touch_pad_filter_delete() -> esp_err_t;
}
#[repr(u32)]
#[doc = " @brief Logic function used for EXT1 wakeup mode."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_sleep_ext1_wakeup_mode_t {
#[doc = "!< Wake the chip when all selected GPIOs go low"]
ESP_EXT1_WAKEUP_ALL_LOW = 0,
#[doc = "!< Wake the chip when any of the selected GPIOs go high"]
ESP_EXT1_WAKEUP_ANY_HIGH = 1,
}
#[repr(u32)]
#[doc = " @brief Power domains which can be powered down in sleep mode"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_sleep_pd_domain_t {
#[doc = "!< RTC IO, sensors and ULP co-processor"]
ESP_PD_DOMAIN_RTC_PERIPH = 0,
#[doc = "!< RTC slow memory"]
ESP_PD_DOMAIN_RTC_SLOW_MEM = 1,
#[doc = "!< RTC fast memory"]
ESP_PD_DOMAIN_RTC_FAST_MEM = 2,
#[doc = "!< XTAL oscillator"]
ESP_PD_DOMAIN_XTAL = 3,
#[doc = "!< Number of domains"]
ESP_PD_DOMAIN_MAX = 4,
}
#[repr(u32)]
#[doc = " @brief Power down options"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_sleep_pd_option_t {
#[doc = "!< Power down the power domain in sleep mode"]
ESP_PD_OPTION_OFF = 0,
#[doc = "!< Keep power domain enabled during sleep mode"]
ESP_PD_OPTION_ON = 1,
#[doc = "!< Keep power domain enabled in sleep mode, if it is needed by one of the wakeup options. Otherwise power it down."]
ESP_PD_OPTION_AUTO = 2,
}
#[repr(u32)]
#[doc = " @brief Sleep wakeup cause"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_sleep_source_t {
#[doc = "!< In case of deep sleep, reset was not caused by exit from deep sleep"]
ESP_SLEEP_WAKEUP_UNDEFINED = 0,
#[doc = "!< Not a wakeup cause, used to disable all wakeup sources with esp_sleep_disable_wakeup_source"]
ESP_SLEEP_WAKEUP_ALL = 1,
#[doc = "!< Wakeup caused by external signal using RTC_IO"]
ESP_SLEEP_WAKEUP_EXT0 = 2,
#[doc = "!< Wakeup caused by external signal using RTC_CNTL"]
ESP_SLEEP_WAKEUP_EXT1 = 3,
#[doc = "!< Wakeup caused by timer"]
ESP_SLEEP_WAKEUP_TIMER = 4,
#[doc = "!< Wakeup caused by touchpad"]
ESP_SLEEP_WAKEUP_TOUCHPAD = 5,
#[doc = "!< Wakeup caused by ULP program"]
ESP_SLEEP_WAKEUP_ULP = 6,
#[doc = "!< Wakeup caused by GPIO (light sleep only)"]
ESP_SLEEP_WAKEUP_GPIO = 7,
#[doc = "!< Wakeup caused by UART (light sleep only)"]
ESP_SLEEP_WAKEUP_UART = 8,
}
pub use self::esp_sleep_source_t as esp_sleep_wakeup_cause_t;
extern "C" {
#[doc = " @brief Disable wakeup source"]
#[doc = ""]
#[doc = " This function is used to deactivate wake up trigger for source"]
#[doc = " defined as parameter of the function."]
#[doc = ""]
#[doc = " @note This function does not modify wake up configuration in RTC."]
#[doc = " It will be performed in esp_sleep_start function."]
#[doc = ""]
#[doc = " See docs/sleep-modes.rst for details."]
#[doc = ""]
#[doc = " @param source - number of source to disable of type esp_sleep_source_t"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_STATE if trigger was not active"]
pub fn esp_sleep_disable_wakeup_source(source: esp_sleep_source_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable wakeup by ULP coprocessor"]
#[doc = " @note ULP wakeup source cannot be used when RTC_PERIPH power domain is forced"]
#[doc = " to be powered on (ESP_PD_OPTION_ON) or when ext0 wakeup source is used."]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_NOT_SUPPORTED if additional current by touch (CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT) is enabled."]
#[doc = " - ESP_ERR_INVALID_STATE if ULP co-processor is not enabled or if wakeup triggers conflict"]
pub fn esp_sleep_enable_ulp_wakeup() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable wakeup by timer"]
#[doc = " @param time_in_us time before wakeup, in microseconds"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if value is out of range (TBD)"]
pub fn esp_sleep_enable_timer_wakeup(time_in_us: u64) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable wakeup by touch sensor"]
#[doc = ""]
#[doc = " @note Touch wakeup source cannot be used when RTC_PERIPH power domain is forced"]
#[doc = " to be powered on (ESP_PD_OPTION_ON) or when ext0 wakeup"]
#[doc = " source is used."]
#[doc = ""]
#[doc = " @note The FSM mode of the touch button should be configured"]
#[doc = " as the timer trigger mode."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_NOT_SUPPORTED if additional current by touch (CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT) is enabled."]
#[doc = " - ESP_ERR_INVALID_STATE if wakeup triggers conflict"]
pub fn esp_sleep_enable_touchpad_wakeup() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get the touch pad which caused wakeup"]
#[doc = ""]
#[doc = " If wakeup was caused by another source, this function will return TOUCH_PAD_MAX;"]
#[doc = ""]
#[doc = " @return touch pad which caused wakeup"]
pub fn esp_sleep_get_touchpad_wakeup_status() -> touch_pad_t;
}
extern "C" {
#[doc = " @brief Enable wakeup using a pin"]
#[doc = ""]
#[doc = " This function uses external wakeup feature of RTC_IO peripheral."]
#[doc = " It will work only if RTC peripherals are kept on during sleep."]
#[doc = ""]
#[doc = " This feature can monitor any pin which is an RTC IO. Once the pin transitions"]
#[doc = " into the state given by level argument, the chip will be woken up."]
#[doc = ""]
#[doc = " @note This function does not modify pin configuration. The pin is"]
#[doc = " configured in esp_sleep_start, immediately before entering sleep mode."]
#[doc = ""]
#[doc = " @note ext0 wakeup source cannot be used together with touch or ULP wakeup sources."]
#[doc = ""]
#[doc = " @param gpio_num GPIO number used as wakeup source. Only GPIOs which are have RTC"]
#[doc = " functionality can be used: 0,2,4,12-15,25-27,32-39."]
#[doc = " @param level input level which will trigger wakeup (0=low, 1=high)"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if the selected GPIO is not an RTC GPIO,"]
#[doc = " or the mode is invalid"]
#[doc = " - ESP_ERR_INVALID_STATE if wakeup triggers conflict"]
pub fn esp_sleep_enable_ext0_wakeup(gpio_num: gpio_num_t, level: libc::c_int) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable wakeup using multiple pins"]
#[doc = ""]
#[doc = " This function uses external wakeup feature of RTC controller."]
#[doc = " It will work even if RTC peripherals are shut down during sleep."]
#[doc = ""]
#[doc = " This feature can monitor any number of pins which are in RTC IOs."]
#[doc = " Once any of the selected pins goes into the state given by mode argument,"]
#[doc = " the chip will be woken up."]
#[doc = ""]
#[doc = " @note This function does not modify pin configuration. The pins are"]
#[doc = " configured in esp_sleep_start, immediately before"]
#[doc = " entering sleep mode."]
#[doc = ""]
#[doc = " @note internal pullups and pulldowns don't work when RTC peripherals are"]
#[doc = " shut down. In this case, external resistors need to be added."]
#[doc = " Alternatively, RTC peripherals (and pullups/pulldowns) may be"]
#[doc = " kept enabled using esp_sleep_pd_config function."]
#[doc = ""]
#[doc = " @param mask bit mask of GPIO numbers which will cause wakeup. Only GPIOs"]
#[doc = " which are have RTC functionality can be used in this bit map:"]
#[doc = " 0,2,4,12-15,25-27,32-39."]
#[doc = " @param mode select logic function used to determine wakeup condition:"]
#[doc = " - ESP_EXT1_WAKEUP_ALL_LOW: wake up when all selected GPIOs are low"]
#[doc = " - ESP_EXT1_WAKEUP_ANY_HIGH: wake up when any of the selected GPIOs is high"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if any of the selected GPIOs is not an RTC GPIO,"]
#[doc = " or mode is invalid"]
pub fn esp_sleep_enable_ext1_wakeup(mask: u64, mode: esp_sleep_ext1_wakeup_mode_t)
-> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable wakeup from light sleep using GPIOs"]
#[doc = ""]
#[doc = " Each GPIO supports wakeup function, which can be triggered on either low level"]
#[doc = " or high level. Unlike EXT0 and EXT1 wakeup sources, this method can be used"]
#[doc = " both for all IOs: RTC IOs and digital IOs. It can only be used to wakeup from"]
#[doc = " light sleep though."]
#[doc = ""]
#[doc = " To enable wakeup, first call gpio_wakeup_enable, specifying gpio number and"]
#[doc = " wakeup level, for each GPIO which is used for wakeup."]
#[doc = " Then call this function to enable wakeup feature."]
#[doc = ""]
#[doc = " @note GPIO wakeup source cannot be used together with touch or ULP wakeup sources."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_STATE if wakeup triggers conflict"]
pub fn esp_sleep_enable_gpio_wakeup() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable wakeup from light sleep using UART"]
#[doc = ""]
#[doc = " Use uart_set_wakeup_threshold function to configure UART wakeup threshold."]
#[doc = ""]
#[doc = " Wakeup from light sleep takes some time, so not every character sent"]
#[doc = " to the UART can be received by the application."]
#[doc = ""]
#[doc = " @note ESP32 does not support wakeup from UART2."]
#[doc = ""]
#[doc = " @param uart_num UART port to wake up from"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if wakeup from given UART is not supported"]
pub fn esp_sleep_enable_uart_wakeup(uart_num: libc::c_int) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get the bit mask of GPIOs which caused wakeup (ext1)"]
#[doc = ""]
#[doc = " If wakeup was caused by another source, this function will return 0."]
#[doc = ""]
#[doc = " @return bit mask, if GPIOn caused wakeup, BIT(n) will be set"]
pub fn esp_sleep_get_ext1_wakeup_status() -> u64;
}
extern "C" {
#[doc = " @brief Set power down mode for an RTC power domain in sleep mode"]
#[doc = ""]
#[doc = " If not set set using this API, all power domains default to ESP_PD_OPTION_AUTO."]
#[doc = ""]
#[doc = " @param domain power domain to configure"]
#[doc = " @param option power down option (ESP_PD_OPTION_OFF, ESP_PD_OPTION_ON, or ESP_PD_OPTION_AUTO)"]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_ERR_INVALID_ARG if either of the arguments is out of range"]
pub fn esp_sleep_pd_config(
domain: esp_sleep_pd_domain_t,
option: esp_sleep_pd_option_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enter deep sleep with the configured wakeup options"]
#[doc = ""]
#[doc = " This function does not return."]
pub fn esp_deep_sleep_start();
}
extern "C" {
#[doc = " @brief Enter light sleep with the configured wakeup options"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success (returned after wakeup)"]
#[doc = " - ESP_ERR_INVALID_STATE if WiFi or BT is not stopped"]
pub fn esp_light_sleep_start() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enter deep-sleep mode"]
#[doc = ""]
#[doc = " The device will automatically wake up after the deep-sleep time"]
#[doc = " Upon waking up, the device calls deep sleep wake stub, and then proceeds"]
#[doc = " to load application."]
#[doc = ""]
#[doc = " Call to this function is equivalent to a call to esp_deep_sleep_enable_timer_wakeup"]
#[doc = " followed by a call to esp_deep_sleep_start."]
#[doc = ""]
#[doc = " esp_deep_sleep does not shut down WiFi, BT, and higher level protocol"]
#[doc = " connections gracefully."]
#[doc = " Make sure relevant WiFi and BT stack functions are called to close any"]
#[doc = " connections and deinitialize the peripherals. These include:"]
#[doc = " - esp_bluedroid_disable"]
#[doc = " - esp_bt_controller_disable"]
#[doc = " - esp_wifi_stop"]
#[doc = ""]
#[doc = " This function does not return."]
#[doc = ""]
#[doc = " @param time_in_us deep-sleep time, unit: microsecond"]
pub fn esp_deep_sleep(time_in_us: u64);
}
extern "C" {
#[doc = " @brief Get the wakeup source which caused wakeup from sleep"]
#[doc = ""]
#[doc = " @return cause of wake up from last sleep (deep sleep or light sleep)"]
pub fn esp_sleep_get_wakeup_cause() -> esp_sleep_wakeup_cause_t;
}
extern "C" {
#[doc = " @brief Default stub to run on wake from deep sleep."]
#[doc = ""]
#[doc = " Allows for executing code immediately on wake from sleep, before"]
#[doc = " the software bootloader or ESP-IDF app has started up."]
#[doc = ""]
#[doc = " This function is weak-linked, so you can implement your own version"]
#[doc = " to run code immediately when the chip wakes from"]
#[doc = " sleep."]
#[doc = ""]
#[doc = " See docs/deep-sleep-stub.rst for details."]
pub fn esp_wake_deep_sleep();
}
#[doc = " @brief Function type for stub to run on wake from sleep."]
#[doc = ""]
pub type esp_deep_sleep_wake_stub_fn_t = ::core::option::Option<unsafe extern "C" fn()>;
extern "C" {
#[doc = " @brief Install a new stub at runtime to run on wake from deep sleep"]
#[doc = ""]
#[doc = " If implementing esp_wake_deep_sleep() then it is not necessary to"]
#[doc = " call this function."]
#[doc = ""]
#[doc = " However, it is possible to call this function to substitute a"]
#[doc = " different deep sleep stub. Any function used as a deep sleep stub"]
#[doc = " must be marked RTC_IRAM_ATTR, and must obey the same rules given"]
#[doc = " for esp_wake_deep_sleep()."]
pub fn esp_set_deep_sleep_wake_stub(new_stub: esp_deep_sleep_wake_stub_fn_t);
}
extern "C" {
#[doc = " @brief Get current wake from deep sleep stub"]
#[doc = " @return Return current wake from deep sleep stub, or NULL if"]
#[doc = " no stub is installed."]
pub fn esp_get_deep_sleep_wake_stub() -> esp_deep_sleep_wake_stub_fn_t;
}
extern "C" {
#[doc = " @brief The default esp-idf-provided esp_wake_deep_sleep() stub."]
#[doc = ""]
#[doc = " See docs/deep-sleep-stub.rst for details."]
pub fn esp_default_wake_deep_sleep();
}
extern "C" {
#[doc = " @brief Disable logging from the ROM code after deep sleep."]
#[doc = ""]
#[doc = " Using LSB of RTC_STORE4."]
pub fn esp_deep_sleep_disable_rom_logging();
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum smartconfig_type_t {
#[doc = "< protocol: ESPTouch"]
SC_TYPE_ESPTOUCH = 0,
#[doc = "< protocol: AirKiss"]
SC_TYPE_AIRKISS = 1,
#[doc = "< protocol: ESPTouch and AirKiss"]
SC_TYPE_ESPTOUCH_AIRKISS = 2,
}
#[repr(u32)]
#[doc = " Smartconfig event declarations"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum smartconfig_event_t {
#[doc = "< ESP32 station smartconfig has finished to scan for APs"]
SC_EVENT_SCAN_DONE = 0,
#[doc = "< ESP32 station smartconfig has found the channel of the target AP"]
SC_EVENT_FOUND_CHANNEL = 1,
#[doc = "< ESP32 station smartconfig got the SSID and password"]
SC_EVENT_GOT_SSID_PSWD = 2,
#[doc = "< ESP32 station smartconfig has sent ACK to cellphone"]
SC_EVENT_SEND_ACK_DONE = 3,
}
extern "C" {
pub static mut SC_EVENT: esp_event_base_t;
}
#[doc = " Argument structure for SC_EVENT_GOT_SSID_PSWD event"]
#[repr(C)]
#[derive(Copy, Clone)]
pub struct smartconfig_event_got_ssid_pswd_t {
#[doc = "< SSID of the AP. Null terminated string."]
pub ssid: [u8; 32usize],
#[doc = "< Password of the AP. Null terminated string."]
pub password: [u8; 64usize],
#[doc = "< whether set MAC address of target AP or not."]
pub bssid_set: bool,
#[doc = "< MAC address of target AP."]
pub bssid: [u8; 6usize],
#[doc = "< Type of smartconfig(ESPTouch or AirKiss)."]
pub type_: smartconfig_type_t,
#[doc = "< Token from cellphone which is used to send ACK to cellphone."]
pub token: u8,
#[doc = "< IP address of cellphone."]
pub cellphone_ip: [u8; 4usize],
}
#[doc = " Configure structure for esp_smartconfig_start"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct smartconfig_start_config_t {
#[doc = "< Enable smartconfig logs."]
pub enable_log: bool,
}
extern "C" {
#[doc = " @brief Get the version of SmartConfig."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - SmartConfig version const char."]
pub fn esp_smartconfig_get_version() -> *const libc::c_char;
}
extern "C" {
#[doc = " @brief Start SmartConfig, config ESP device to connect AP. You need to broadcast information by phone APP."]
#[doc = " Device sniffer special packets from the air that containing SSID and password of target AP."]
#[doc = ""]
#[doc = " @attention 1. This API can be called in station or softAP-station mode."]
#[doc = " @attention 2. Can not call esp_smartconfig_start twice before it finish, please call"]
#[doc = " esp_smartconfig_stop first."]
#[doc = ""]
#[doc = " @param config pointer to smartconfig start configure structure"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - others: fail"]
pub fn esp_smartconfig_start(config: *const smartconfig_start_config_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Stop SmartConfig, free the buffer taken by esp_smartconfig_start."]
#[doc = ""]
#[doc = " @attention Whether connect to AP succeed or not, this API should be called to free"]
#[doc = " memory taken by smartconfig_start."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - others: fail"]
pub fn esp_smartconfig_stop() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set timeout of SmartConfig process."]
#[doc = ""]
#[doc = " @attention Timing starts from SC_STATUS_FIND_CHANNEL status. SmartConfig will restart if timeout."]
#[doc = ""]
#[doc = " @param time_s range 15s~255s, offset:45s."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - others: fail"]
pub fn esp_esptouch_set_timeout(time_s: u8) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set protocol type of SmartConfig."]
#[doc = ""]
#[doc = " @attention If users need to set the SmartConfig type, please set it before calling"]
#[doc = " esp_smartconfig_start."]
#[doc = ""]
#[doc = " @param type Choose from the smartconfig_type_t."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - others: fail"]
pub fn esp_smartconfig_set_type(type_: smartconfig_type_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set mode of SmartConfig. default normal mode."]
#[doc = ""]
#[doc = " @attention 1. Please call it before API esp_smartconfig_start."]
#[doc = " @attention 2. Fast mode have corresponding APP(phone)."]
#[doc = " @attention 3. Two mode is compatible."]
#[doc = ""]
#[doc = " @param enable false-disable(default); true-enable;"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - others: fail"]
pub fn esp_smartconfig_fast_mode(enable: bool) -> esp_err_t;
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_crypto_hash_alg_t {
ESP_CRYPTO_HASH_ALG_MD5 = 0,
ESP_CRYPTO_HASH_ALG_SHA1 = 1,
ESP_CRYPTO_HASH_ALG_HMAC_MD5 = 2,
ESP_CRYPTO_HASH_ALG_HMAC_SHA1 = 3,
ESP_CRYPTO_HASH_ALG_SHA256 = 4,
ESP_CRYPTO_HASH_ALG_HMAC_SHA256 = 5,
}
#[repr(u32)]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum esp_crypto_cipher_alg_t {
ESP_CRYPTO_CIPHER_NULL = 0,
ESP_CRYPTO_CIPHER_ALG_AES = 1,
ESP_CRYPTO_CIPHER_ALG_3DES = 2,
ESP_CRYPTO_CIPHER_ALG_DES = 3,
ESP_CRYPTO_CIPHER_ALG_RC2 = 4,
ESP_CRYPTO_CIPHER_ALG_RC4 = 5,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct crypto_hash {
_unused: [u8; 0],
}
pub type esp_crypto_hash_t = crypto_hash;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct crypto_cipher {
_unused: [u8; 0],
}
pub type esp_crypto_cipher_t = crypto_cipher;
#[doc = " @brief The AES callback function when do WPS connect."]
#[doc = ""]
#[doc = " @param key Encryption key."]
#[doc = " @param iv Encryption IV for CBC mode (16 bytes)."]
#[doc = " @param data Data to encrypt in-place."]
#[doc = " @param data_len Length of data in bytes (must be divisible by 16)"]
pub type esp_aes_128_encrypt_t = ::core::option::Option<
unsafe extern "C" fn(
key: *const libc::c_uchar,
iv: *const libc::c_uchar,
data: *mut libc::c_uchar,
data_len: libc::c_int,
) -> libc::c_int,
>;
#[doc = " @brief The AES callback function when do WPS connect."]
#[doc = ""]
#[doc = " @param key Decryption key."]
#[doc = " @param iv Decryption IV for CBC mode (16 bytes)."]
#[doc = " @param data Data to decrypt in-place."]
#[doc = " @param data_len Length of data in bytes (must be divisible by 16)"]
#[doc = ""]
pub type esp_aes_128_decrypt_t = ::core::option::Option<
unsafe extern "C" fn(
key: *const libc::c_uchar,
iv: *const libc::c_uchar,
data: *mut libc::c_uchar,
data_len: libc::c_int,
) -> libc::c_int,
>;
#[doc = " @brief The AES callback function when do STA connect."]
#[doc = ""]
#[doc = " @param kek 16-octet Key encryption key (KEK)."]
#[doc = " @param n Length of the plaintext key in 64-bit units;"]
#[doc = " @param plain Plaintext key to be wrapped, n * 64 bits"]
#[doc = " @param cipher Wrapped key, (n + 1) * 64 bits"]
#[doc = ""]
pub type esp_aes_wrap_t = ::core::option::Option<
unsafe extern "C" fn(
kek: *const libc::c_uchar,
n: libc::c_int,
plain: *const libc::c_uchar,
cipher: *mut libc::c_uchar,
) -> libc::c_int,
>;
#[doc = " @brief The AES callback function when do STA connect."]
#[doc = ""]
#[doc = " @param kek 16-octet Key decryption key (KEK)."]
#[doc = " @param n Length of the plaintext key in 64-bit units;"]
#[doc = " @param cipher Wrapped key to be unwrapped, (n + 1) * 64 bits"]
#[doc = " @param plain Plaintext key, n * 64 bits"]
#[doc = ""]
pub type esp_aes_unwrap_t = ::core::option::Option<
unsafe extern "C" fn(
kek: *const libc::c_uchar,
n: libc::c_int,
cipher: *const libc::c_uchar,
plain: *mut libc::c_uchar,
) -> libc::c_int,
>;
#[doc = " @brief The SHA256 callback function when do WPS connect."]
#[doc = ""]
#[doc = " @param key Key for HMAC operations."]
#[doc = " @param key_len Length of the key in bytes."]
#[doc = " @param num_elem Number of elements in the data vector."]
#[doc = " @param addr Pointers to the data areas."]
#[doc = " @param len Lengths of the data blocks."]
#[doc = " @param mac Buffer for the hash (32 bytes)."]
#[doc = ""]
pub type esp_hmac_sha256_vector_t = ::core::option::Option<
unsafe extern "C" fn(
key: *const libc::c_uchar,
key_len: libc::c_int,
num_elem: libc::c_int,
addr: *mut *const libc::c_uchar,
len: *const libc::c_int,
mac: *mut libc::c_uchar,
) -> libc::c_int,
>;
#[doc = " @brief The AES callback function when do STA connect."]
#[doc = ""]
#[doc = " @param key Key for PRF."]
#[doc = " @param key_len Length of the key in bytes."]
#[doc = " @param label A unique label for each purpose of the PRF."]
#[doc = " @param data Extra data to bind into the key."]
#[doc = " @param data_len Length of the data."]
#[doc = " @param buf Buffer for the generated pseudo-random key."]
#[doc = " @param buf_len Number of bytes of key to generate."]
#[doc = ""]
pub type esp_sha256_prf_t = ::core::option::Option<
unsafe extern "C" fn(
key: *const libc::c_uchar,
key_len: libc::c_int,
label: *const libc::c_char,
data: *const libc::c_uchar,
data_len: libc::c_int,
buf: *mut libc::c_uchar,
buf_len: libc::c_int,
) -> libc::c_int,
>;
#[doc = " @brief HMAC-MD5 over data buffer (RFC 2104)'"]
#[doc = ""]
#[doc = " @key: Key for HMAC operations"]
#[doc = " @key_len: Length of the key in bytes"]
#[doc = " @data: Pointers to the data area"]
#[doc = " @data_len: Length of the data area"]
#[doc = " @mac: Buffer for the hash (16 bytes)"]
#[doc = " Returns: 0 on success, -1 on failure"]
pub type esp_hmac_md5_t = ::core::option::Option<
unsafe extern "C" fn(
key: *const libc::c_uchar,
key_len: libc::c_uint,
data: *const libc::c_uchar,
data_len: libc::c_uint,
mac: *mut libc::c_uchar,
) -> libc::c_int,
>;
#[doc = " @brief HMAC-MD5 over data vector (RFC 2104)"]
#[doc = ""]
#[doc = " @key: Key for HMAC operations"]
#[doc = " @key_len: Length of the key in bytes"]
#[doc = " @num_elem: Number of elements in the data vector"]
#[doc = " @addr: Pointers to the data areas"]
#[doc = " @len: Lengths of the data blocks"]
#[doc = " @mac: Buffer for the hash (16 bytes)"]
#[doc = " Returns: 0 on success, -1 on failure"]
pub type esp_hmac_md5_vector_t = ::core::option::Option<
unsafe extern "C" fn(
key: *const libc::c_uchar,
key_len: libc::c_uint,
num_elem: libc::c_uint,
addr: *mut *const libc::c_uchar,
len: *const libc::c_uint,
mac: *mut libc::c_uchar,
) -> libc::c_int,
>;
#[doc = " @brief HMAC-SHA1 over data buffer (RFC 2104)"]
#[doc = ""]
#[doc = " @key: Key for HMAC operations"]
#[doc = " @key_len: Length of the key in bytes"]
#[doc = " @data: Pointers to the data area"]
#[doc = " @data_len: Length of the data area"]
#[doc = " @mac: Buffer for the hash (20 bytes)"]
#[doc = " Returns: 0 on success, -1 of failure"]
pub type esp_hmac_sha1_t = ::core::option::Option<
unsafe extern "C" fn(
key: *const libc::c_uchar,
key_len: libc::c_uint,
data: *const libc::c_uchar,
data_len: libc::c_uint,
mac: *mut libc::c_uchar,
) -> libc::c_int,
>;
#[doc = " @brief HMAC-SHA1 over data vector (RFC 2104)"]
#[doc = ""]
#[doc = " @key: Key for HMAC operations"]
#[doc = " @key_len: Length of the key in bytes"]
#[doc = " @num_elem: Number of elements in the data vector"]
#[doc = " @addr: Pointers to the data areas"]
#[doc = " @len: Lengths of the data blocks"]
#[doc = " @mac: Buffer for the hash (20 bytes)"]
#[doc = " Returns: 0 on success, -1 on failure"]
pub type esp_hmac_sha1_vector_t = ::core::option::Option<
unsafe extern "C" fn(
key: *const libc::c_uchar,
key_len: libc::c_uint,
num_elem: libc::c_uint,
addr: *mut *const libc::c_uchar,
len: *const libc::c_uint,
mac: *mut libc::c_uchar,
) -> libc::c_int,
>;
#[doc = " @brief SHA1-based Pseudo-Random Function (PRF) (IEEE 802.11i, 8.5.1.1)"]
#[doc = ""]
#[doc = " @key: Key for PRF"]
#[doc = " @key_len: Length of the key in bytes"]
#[doc = " @label: A unique label for each purpose of the PRF"]
#[doc = " @data: Extra data to bind into the key"]
#[doc = " @data_len: Length of the data"]
#[doc = " @buf: Buffer for the generated pseudo-random key"]
#[doc = " @buf_len: Number of bytes of key to generate"]
#[doc = " Returns: 0 on success, -1 of failure"]
#[doc = ""]
#[doc = " This function is used to derive new, cryptographically separate keys from a"]
#[doc = " given key (e.g., PMK in IEEE 802.11i)."]
pub type esp_sha1_prf_t = ::core::option::Option<
unsafe extern "C" fn(
key: *const libc::c_uchar,
key_len: libc::c_uint,
label: *const libc::c_char,
data: *const libc::c_uchar,
data_len: libc::c_uint,
buf: *mut libc::c_uchar,
buf_len: libc::c_uint,
) -> libc::c_int,
>;
#[doc = " @brief SHA-1 hash for data vector"]
#[doc = ""]
#[doc = " @num_elem: Number of elements in the data vector"]
#[doc = " @addr: Pointers to the data areas"]
#[doc = " @len: Lengths of the data blocks"]
#[doc = " @mac: Buffer for the hash"]
#[doc = " Returns: 0 on success, -1 on failure"]
pub type esp_sha1_vector_t = ::core::option::Option<
unsafe extern "C" fn(
num_elem: libc::c_uint,
addr: *mut *const libc::c_uchar,
len: *const libc::c_uint,
mac: *mut libc::c_uchar,
) -> libc::c_int,
>;
#[doc = " @brief SHA1-based key derivation function (PBKDF2) for IEEE 802.11i"]
#[doc = ""]
#[doc = " @passphrase: ASCII passphrase"]
#[doc = " @ssid: SSID"]
#[doc = " @ssid_len: SSID length in bytes"]
#[doc = " @iterations: Number of iterations to run"]
#[doc = " @buf: Buffer for the generated key"]
#[doc = " @buflen: Length of the buffer in bytes"]
#[doc = " Returns: 0 on success, -1 of failure"]
#[doc = ""]
#[doc = " This function is used to derive PSK for WPA-PSK. For this protocol,"]
#[doc = " iterations is set to 4096 and buflen to 32. This function is described in"]
#[doc = " IEEE Std 802.11-2004, Clause H.4. The main construction is from PKCS#5 v2.0."]
pub type esp_pbkdf2_sha1_t = ::core::option::Option<
unsafe extern "C" fn(
passphrase: *const libc::c_char,
ssid: *const libc::c_char,
ssid_len: libc::c_uint,
iterations: libc::c_int,
buf: *mut libc::c_uchar,
buflen: libc::c_uint,
) -> libc::c_int,
>;
#[doc = " @brief XOR RC4 stream to given data with skip-stream-start"]
#[doc = ""]
#[doc = " @key: RC4 key"]
#[doc = " @keylen: RC4 key length"]
#[doc = " @skip: number of bytes to skip from the beginning of the RC4 stream"]
#[doc = " @data: data to be XOR'ed with RC4 stream"]
#[doc = " @data_len: buf length"]
#[doc = " Returns: 0 on success, -1 on failure"]
#[doc = ""]
#[doc = " Generate RC4 pseudo random stream for the given key, skip beginning of the"]
#[doc = " stream, and XOR the end result with the data buffer to perform RC4"]
#[doc = " encryption/decryption."]
pub type esp_rc4_skip_t = ::core::option::Option<
unsafe extern "C" fn(
key: *const libc::c_uchar,
keylen: libc::c_uint,
skip: libc::c_uint,
data: *mut libc::c_uchar,
data_len: libc::c_uint,
) -> libc::c_int,
>;
#[doc = " @brief MD5 hash for data vector"]
#[doc = ""]
#[doc = " @num_elem: Number of elements in the data vector"]
#[doc = " @addr: Pointers to the data areas"]
#[doc = " @len: Lengths of the data blocks"]
#[doc = " @mac: Buffer for the hash"]
#[doc = " Returns: 0 on success, -1 on failure"]
pub type esp_md5_vector_t = ::core::option::Option<
unsafe extern "C" fn(
num_elem: libc::c_uint,
addr: *mut *const libc::c_uchar,
len: *const libc::c_uint,
mac: *mut libc::c_uchar,
) -> libc::c_int,
>;
#[doc = " @brief Encrypt one AES block"]
#[doc = ""]
#[doc = " @ctx: Context pointer from aes_encrypt_init()"]
#[doc = " @plain: Plaintext data to be encrypted (16 bytes)"]
#[doc = " @crypt: Buffer for the encrypted data (16 bytes)"]
pub type esp_aes_encrypt_t = ::core::option::Option<
unsafe extern "C" fn(
ctx: *mut libc::c_void,
plain: *const libc::c_uchar,
crypt: *mut libc::c_uchar,
),
>;
#[doc = " @brief Initialize AES for encryption"]
#[doc = ""]
#[doc = " @key: Encryption key"]
#[doc = " @len: Key length in bytes (usually 16, i.e., 128 bits)"]
#[doc = " Returns: Pointer to context data or %NULL on failure"]
pub type esp_aes_encrypt_init_t = ::core::option::Option<
unsafe extern "C" fn(key: *const libc::c_uchar, len: libc::c_uint) -> *mut libc::c_void,
>;
#[doc = " @brief Deinitialize AES encryption"]
#[doc = ""]
#[doc = " @ctx: Context pointer from aes_encrypt_init()"]
pub type esp_aes_encrypt_deinit_t =
::core::option::Option<unsafe extern "C" fn(ctx: *mut libc::c_void)>;
#[doc = " @brief Decrypt one AES block"]
#[doc = ""]
#[doc = " @ctx: Context pointer from aes_encrypt_init()"]
#[doc = " @crypt: Encrypted data (16 bytes)"]
#[doc = " @plain: Buffer for the decrypted data (16 bytes)"]
pub type esp_aes_decrypt_t = ::core::option::Option<
unsafe extern "C" fn(
ctx: *mut libc::c_void,
crypt: *const libc::c_uchar,
plain: *mut libc::c_uchar,
),
>;
#[doc = " @brief Initialize AES for decryption"]
#[doc = ""]
#[doc = " @key: Decryption key"]
#[doc = " @len: Key length in bytes (usually 16, i.e., 128 bits)"]
#[doc = " Returns: Pointer to context data or %NULL on failure"]
pub type esp_aes_decrypt_init_t = ::core::option::Option<
unsafe extern "C" fn(key: *const libc::c_uchar, len: libc::c_uint) -> *mut libc::c_void,
>;
#[doc = " @brief Deinitialize AES decryption"]
#[doc = ""]
#[doc = " @ctx: Context pointer from aes_encrypt_init()"]
pub type esp_aes_decrypt_deinit_t =
::core::option::Option<unsafe extern "C" fn(ctx: *mut libc::c_void)>;
#[doc = " @brief One-Key CBC MAC (OMAC1) hash with AES-128 for MIC computation"]
#[doc = ""]
#[doc = " @key: 128-bit key for the hash operation"]
#[doc = " @data: Data buffer for which a MIC is computed"]
#[doc = " @data_len: Length of data buffer in bytes"]
#[doc = " @mic: Buffer for MIC (128 bits, i.e., 16 bytes)"]
#[doc = " Returns: 0 on success, -1 on failure"]
pub type esp_omac1_aes_128_t = ::core::option::Option<
unsafe extern "C" fn(
key: *const u8,
data: *const u8,
data_len: size_t,
mic: *mut u8,
) -> libc::c_int,
>;
#[doc = " @brief Decrypt data using CCMP (Counter Mode CBC-MAC Protocol OR"]
#[doc = " Counter Mode Cipher Block Chaining Message Authentication"]
#[doc = " Code Protocol) which is used in IEEE 802.11i RSN standard."]
#[doc = " @tk: 128-bit Temporal Key for obtained during 4-way handshake"]
#[doc = " @hdr: Pointer to IEEE802.11 frame headeri needed for AAD"]
#[doc = " @data: Pointer to encrypted data buffer"]
#[doc = " @data_len: Encrypted data length in bytes"]
#[doc = " @decrypted_len: Length of decrypted data"]
#[doc = " Returns: Pointer to decrypted data on success, NULL on failure"]
pub type esp_ccmp_decrypt_t = ::core::option::Option<
unsafe extern "C" fn(
tk: *const u8,
ieee80211_hdr: *const u8,
data: *const u8,
data_len: size_t,
decrypted_len: *mut size_t,
) -> *mut u8,
>;
#[doc = " @brief Encrypt data using CCMP (Counter Mode CBC-MAC Protocol OR"]
#[doc = " Counter Mode Cipher Block Chaining Message Authentication"]
#[doc = " Code Protocol) which is used in IEEE 802.11i RSN standard."]
#[doc = " @tk: 128-bit Temporal Key for obtained during 4-way handshake"]
#[doc = " @frame: Pointer to IEEE802.11 frame including header"]
#[doc = " @len: Length of the frame including header"]
#[doc = " @hdrlen: Length of the header"]
#[doc = " @pn: Packet Number counter"]
#[doc = " @keyid: Key ID to be mentioned in CCMP Vector"]
#[doc = " @encrypted_len: Length of the encrypted frame including header"]
pub type esp_ccmp_encrypt_t = ::core::option::Option<
unsafe extern "C" fn(
tk: *const u8,
frame: *mut u8,
len: size_t,
hdrlen: size_t,
pn: *mut u8,
keyid: libc::c_int,
encrypted_len: *mut size_t,
) -> *mut u8,
>;
#[doc = " @brief The crypto callback function structure used when do station security connect."]
#[doc = " The structure can be set as software crypto or the crypto optimized by ESP32"]
#[doc = " hardware."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wpa_crypto_funcs_t {
pub size: u32,
pub version: u32,
#[doc = "< station connect function used when send EAPOL frame"]
pub aes_wrap: esp_aes_wrap_t,
#[doc = "< station connect function used when decrypt key data"]
pub aes_unwrap: esp_aes_unwrap_t,
#[doc = "< station connect function used when check MIC"]
pub hmac_sha256_vector: esp_hmac_sha256_vector_t,
#[doc = "< station connect function used when check MIC"]
pub sha256_prf: esp_sha256_prf_t,
pub hmac_md5: esp_hmac_md5_t,
pub hamc_md5_vector: esp_hmac_md5_vector_t,
pub hmac_sha1: esp_hmac_sha1_t,
pub hmac_sha1_vector: esp_hmac_sha1_vector_t,
pub sha1_prf: esp_sha1_prf_t,
pub sha1_vector: esp_sha1_vector_t,
pub pbkdf2_sha1: esp_pbkdf2_sha1_t,
pub rc4_skip: esp_rc4_skip_t,
pub md5_vector: esp_md5_vector_t,
pub aes_encrypt: esp_aes_encrypt_t,
pub aes_encrypt_init: esp_aes_encrypt_init_t,
pub aes_encrypt_deinit: esp_aes_encrypt_deinit_t,
pub aes_decrypt: esp_aes_decrypt_t,
pub aes_decrypt_init: esp_aes_decrypt_init_t,
pub aes_decrypt_deinit: esp_aes_decrypt_deinit_t,
pub omac1_aes_128: esp_omac1_aes_128_t,
pub ccmp_decrypt: esp_ccmp_decrypt_t,
pub ccmp_encrypt: esp_ccmp_encrypt_t,
}
#[doc = " @brief The crypto callback function structure used in mesh vendor IE encryption. The"]
#[doc = " structure can be set as software crypto or the crypto optimized by ESP32"]
#[doc = " hardware."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct mesh_crypto_funcs_t {
#[doc = "< function used in mesh vendor IE encryption"]
pub aes_128_encrypt: esp_aes_128_encrypt_t,
#[doc = "< function used in mesh vendor IE decryption"]
pub aes_128_decrypt: esp_aes_128_decrypt_t,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_osi_funcs_t {
pub _version: i32,
pub _set_isr: ::core::option::Option<
unsafe extern "C" fn(n: i32, f: *mut libc::c_void, arg: *mut libc::c_void),
>,
pub _ints_on: ::core::option::Option<unsafe extern "C" fn(mask: u32)>,
pub _ints_off: ::core::option::Option<unsafe extern "C" fn(mask: u32)>,
pub _spin_lock_create: ::core::option::Option<unsafe extern "C" fn() -> *mut libc::c_void>,
pub _spin_lock_delete: ::core::option::Option<unsafe extern "C" fn(lock: *mut libc::c_void)>,
pub _wifi_int_disable:
::core::option::Option<unsafe extern "C" fn(wifi_int_mux: *mut libc::c_void) -> u32>,
pub _wifi_int_restore:
::core::option::Option<unsafe extern "C" fn(wifi_int_mux: *mut libc::c_void, tmp: u32)>,
pub _task_yield_from_isr: ::core::option::Option<unsafe extern "C" fn()>,
pub _semphr_create:
::core::option::Option<unsafe extern "C" fn(max: u32, init: u32) -> *mut libc::c_void>,
pub _semphr_delete: ::core::option::Option<unsafe extern "C" fn(semphr: *mut libc::c_void)>,
pub _semphr_take: ::core::option::Option<
unsafe extern "C" fn(semphr: *mut libc::c_void, block_time_tick: u32) -> i32,
>,
pub _semphr_give:
::core::option::Option<unsafe extern "C" fn(semphr: *mut libc::c_void) -> i32>,
pub _wifi_thread_semphr_get:
::core::option::Option<unsafe extern "C" fn() -> *mut libc::c_void>,
pub _mutex_create: ::core::option::Option<unsafe extern "C" fn() -> *mut libc::c_void>,
pub _recursive_mutex_create:
::core::option::Option<unsafe extern "C" fn() -> *mut libc::c_void>,
pub _mutex_delete: ::core::option::Option<unsafe extern "C" fn(mutex: *mut libc::c_void)>,
pub _mutex_lock: ::core::option::Option<unsafe extern "C" fn(mutex: *mut libc::c_void) -> i32>,
pub _mutex_unlock:
::core::option::Option<unsafe extern "C" fn(mutex: *mut libc::c_void) -> i32>,
pub _queue_create: ::core::option::Option<
unsafe extern "C" fn(queue_len: u32, item_size: u32) -> *mut libc::c_void,
>,
pub _queue_delete: ::core::option::Option<unsafe extern "C" fn(queue: *mut libc::c_void)>,
pub _queue_send: ::core::option::Option<
unsafe extern "C" fn(
queue: *mut libc::c_void,
item: *mut libc::c_void,
block_time_tick: u32,
) -> i32,
>,
pub _queue_send_from_isr: ::core::option::Option<
unsafe extern "C" fn(
queue: *mut libc::c_void,
item: *mut libc::c_void,
hptw: *mut libc::c_void,
) -> i32,
>,
pub _queue_send_to_back: ::core::option::Option<
unsafe extern "C" fn(
queue: *mut libc::c_void,
item: *mut libc::c_void,
block_time_tick: u32,
) -> i32,
>,
pub _queue_send_to_front: ::core::option::Option<
unsafe extern "C" fn(
queue: *mut libc::c_void,
item: *mut libc::c_void,
block_time_tick: u32,
) -> i32,
>,
pub _queue_recv: ::core::option::Option<
unsafe extern "C" fn(
queue: *mut libc::c_void,
item: *mut libc::c_void,
block_time_tick: u32,
) -> i32,
>,
pub _queue_msg_waiting:
::core::option::Option<unsafe extern "C" fn(queue: *mut libc::c_void) -> u32>,
pub _event_group_create: ::core::option::Option<unsafe extern "C" fn() -> *mut libc::c_void>,
pub _event_group_delete: ::core::option::Option<unsafe extern "C" fn(event: *mut libc::c_void)>,
pub _event_group_set_bits:
::core::option::Option<unsafe extern "C" fn(event: *mut libc::c_void, bits: u32) -> u32>,
pub _event_group_clear_bits:
::core::option::Option<unsafe extern "C" fn(event: *mut libc::c_void, bits: u32) -> u32>,
pub _event_group_wait_bits: ::core::option::Option<
unsafe extern "C" fn(
event: *mut libc::c_void,
bits_to_wait_for: u32,
clear_on_exit: i32,
wait_for_all_bits: i32,
block_time_tick: u32,
) -> u32,
>,
pub _task_create_pinned_to_core: ::core::option::Option<
unsafe extern "C" fn(
task_func: *mut libc::c_void,
name: *const libc::c_char,
stack_depth: u32,
param: *mut libc::c_void,
prio: u32,
task_handle: *mut libc::c_void,
core_id: u32,
) -> i32,
>,
pub _task_create: ::core::option::Option<
unsafe extern "C" fn(
task_func: *mut libc::c_void,
name: *const libc::c_char,
stack_depth: u32,
param: *mut libc::c_void,
prio: u32,
task_handle: *mut libc::c_void,
) -> i32,
>,
pub _task_delete: ::core::option::Option<unsafe extern "C" fn(task_handle: *mut libc::c_void)>,
pub _task_delay: ::core::option::Option<unsafe extern "C" fn(tick: u32)>,
pub _task_ms_to_tick: ::core::option::Option<unsafe extern "C" fn(ms: u32) -> i32>,
pub _task_get_current_task: ::core::option::Option<unsafe extern "C" fn() -> *mut libc::c_void>,
pub _task_get_max_priority: ::core::option::Option<unsafe extern "C" fn() -> i32>,
pub _malloc: ::core::option::Option<unsafe extern "C" fn(size: u32) -> *mut libc::c_void>,
pub _free: ::core::option::Option<unsafe extern "C" fn(p: *mut libc::c_void)>,
pub _event_post: ::core::option::Option<
unsafe extern "C" fn(
event_base: *const libc::c_char,
event_id: i32,
event_data: *mut libc::c_void,
event_data_size: size_t,
ticks_to_wait: u32,
) -> i32,
>,
pub _get_free_heap_size: ::core::option::Option<unsafe extern "C" fn() -> u32>,
pub _rand: ::core::option::Option<unsafe extern "C" fn() -> u32>,
pub _dport_access_stall_other_cpu_start_wrap: ::core::option::Option<unsafe extern "C" fn()>,
pub _dport_access_stall_other_cpu_end_wrap: ::core::option::Option<unsafe extern "C" fn()>,
pub _phy_rf_deinit: ::core::option::Option<unsafe extern "C" fn(module: u32) -> i32>,
pub _phy_load_cal_and_init: ::core::option::Option<unsafe extern "C" fn(module: u32)>,
pub _phy_common_clock_enable: ::core::option::Option<unsafe extern "C" fn()>,
pub _phy_common_clock_disable: ::core::option::Option<unsafe extern "C" fn()>,
pub _phy_update_country_info:
::core::option::Option<unsafe extern "C" fn(country: *const libc::c_char) -> i32>,
pub _read_mac: ::core::option::Option<unsafe extern "C" fn(mac: *mut u8, type_: u32) -> i32>,
pub _timer_arm: ::core::option::Option<
unsafe extern "C" fn(timer: *mut libc::c_void, tmout: u32, repeat: bool),
>,
pub _timer_disarm: ::core::option::Option<unsafe extern "C" fn(timer: *mut libc::c_void)>,
pub _timer_done: ::core::option::Option<unsafe extern "C" fn(ptimer: *mut libc::c_void)>,
pub _timer_setfn: ::core::option::Option<
unsafe extern "C" fn(
ptimer: *mut libc::c_void,
pfunction: *mut libc::c_void,
parg: *mut libc::c_void,
),
>,
pub _timer_arm_us: ::core::option::Option<
unsafe extern "C" fn(ptimer: *mut libc::c_void, us: u32, repeat: bool),
>,
pub _wifi_reset_mac: ::core::option::Option<unsafe extern "C" fn()>,
pub _wifi_clock_enable: ::core::option::Option<unsafe extern "C" fn()>,
pub _wifi_clock_disable: ::core::option::Option<unsafe extern "C" fn()>,
pub _esp_timer_get_time: ::core::option::Option<unsafe extern "C" fn() -> i64>,
pub _nvs_set_i8: ::core::option::Option<
unsafe extern "C" fn(handle: u32, key: *const libc::c_char, value: i8) -> i32,
>,
pub _nvs_get_i8: ::core::option::Option<
unsafe extern "C" fn(handle: u32, key: *const libc::c_char, out_value: *mut i8) -> i32,
>,
pub _nvs_set_u8: ::core::option::Option<
unsafe extern "C" fn(handle: u32, key: *const libc::c_char, value: u8) -> i32,
>,
pub _nvs_get_u8: ::core::option::Option<
unsafe extern "C" fn(handle: u32, key: *const libc::c_char, out_value: *mut u8) -> i32,
>,
pub _nvs_set_u16: ::core::option::Option<
unsafe extern "C" fn(handle: u32, key: *const libc::c_char, value: u16) -> i32,
>,
pub _nvs_get_u16: ::core::option::Option<
unsafe extern "C" fn(handle: u32, key: *const libc::c_char, out_value: *mut u16) -> i32,
>,
pub _nvs_open: ::core::option::Option<
unsafe extern "C" fn(
name: *const libc::c_char,
open_mode: u32,
out_handle: *mut u32,
) -> i32,
>,
pub _nvs_close: ::core::option::Option<unsafe extern "C" fn(handle: u32)>,
pub _nvs_commit: ::core::option::Option<unsafe extern "C" fn(handle: u32) -> i32>,
pub _nvs_set_blob: ::core::option::Option<
unsafe extern "C" fn(
handle: u32,
key: *const libc::c_char,
value: *const libc::c_void,
length: size_t,
) -> i32,
>,
pub _nvs_get_blob: ::core::option::Option<
unsafe extern "C" fn(
handle: u32,
key: *const libc::c_char,
out_value: *mut libc::c_void,
length: *mut size_t,
) -> i32,
>,
pub _nvs_erase_key:
::core::option::Option<unsafe extern "C" fn(handle: u32, key: *const libc::c_char) -> i32>,
pub _get_random: ::core::option::Option<unsafe extern "C" fn(buf: *mut u8, len: size_t) -> i32>,
pub _get_time: ::core::option::Option<unsafe extern "C" fn(t: *mut libc::c_void) -> i32>,
pub _random: ::core::option::Option<unsafe extern "C" fn() -> libc::c_ulong>,
pub _log_write: ::core::option::Option<
unsafe extern "C" fn(
level: u32,
tag: *const libc::c_char,
format: *const libc::c_char,
...
),
>,
pub _log_writev: ::core::option::Option<
unsafe extern "C" fn(
level: u32,
tag: *const libc::c_char,
format: *const libc::c_char,
args: va_list,
),
>,
pub _log_timestamp: ::core::option::Option<unsafe extern "C" fn() -> u32>,
pub _malloc_internal:
::core::option::Option<unsafe extern "C" fn(size: size_t) -> *mut libc::c_void>,
pub _realloc_internal: ::core::option::Option<
unsafe extern "C" fn(ptr: *mut libc::c_void, size: size_t) -> *mut libc::c_void,
>,
pub _calloc_internal:
::core::option::Option<unsafe extern "C" fn(n: size_t, size: size_t) -> *mut libc::c_void>,
pub _zalloc_internal:
::core::option::Option<unsafe extern "C" fn(size: size_t) -> *mut libc::c_void>,
pub _wifi_malloc:
::core::option::Option<unsafe extern "C" fn(size: size_t) -> *mut libc::c_void>,
pub _wifi_realloc: ::core::option::Option<
unsafe extern "C" fn(ptr: *mut libc::c_void, size: size_t) -> *mut libc::c_void,
>,
pub _wifi_calloc:
::core::option::Option<unsafe extern "C" fn(n: size_t, size: size_t) -> *mut libc::c_void>,
pub _wifi_zalloc:
::core::option::Option<unsafe extern "C" fn(size: size_t) -> *mut libc::c_void>,
pub _wifi_create_queue: ::core::option::Option<
unsafe extern "C" fn(queue_len: i32, item_size: i32) -> *mut libc::c_void,
>,
pub _wifi_delete_queue: ::core::option::Option<unsafe extern "C" fn(queue: *mut libc::c_void)>,
pub _modem_sleep_enter: ::core::option::Option<unsafe extern "C" fn(module: u32) -> i32>,
pub _modem_sleep_exit: ::core::option::Option<unsafe extern "C" fn(module: u32) -> i32>,
pub _modem_sleep_register: ::core::option::Option<unsafe extern "C" fn(module: u32) -> i32>,
pub _modem_sleep_deregister: ::core::option::Option<unsafe extern "C" fn(module: u32) -> i32>,
pub _coex_status_get: ::core::option::Option<unsafe extern "C" fn() -> u32>,
pub _coex_condition_set:
::core::option::Option<unsafe extern "C" fn(type_: u32, dissatisfy: bool)>,
pub _coex_wifi_request: ::core::option::Option<
unsafe extern "C" fn(event: u32, latency: u32, duration: u32) -> i32,
>,
pub _coex_wifi_release: ::core::option::Option<unsafe extern "C" fn(event: u32) -> i32>,
pub _magic: i32,
}
extern "C" {
pub static mut g_wifi_osi_funcs: wifi_osi_funcs_t;
}
extern "C" {
#[doc = " @brief Attaches wifi station interface to supplied netif"]
#[doc = ""]
#[doc = " @param esp_netif instance to attach the wifi station to"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_FAIL if attach failed"]
pub fn esp_netif_attach_wifi_station(esp_netif: *mut esp_netif_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Attaches wifi soft AP interface to supplied netif"]
#[doc = ""]
#[doc = " @param esp_netif instance to attach the wifi AP to"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success"]
#[doc = " - ESP_FAIL if attach failed"]
pub fn esp_netif_attach_wifi_ap(esp_netif: *mut esp_netif_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Sets default wifi event handlers for STA interface"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success, error returned from esp_event_handler_register if failed"]
pub fn esp_wifi_set_default_wifi_sta_handlers() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Sets default wifi event handlers for STA interface"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success, error returned from esp_event_handler_register if failed"]
pub fn esp_wifi_set_default_wifi_ap_handlers() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Clears default wifi event handlers for supplied network interface"]
#[doc = ""]
#[doc = " @param esp_netif instance of corresponding if object"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK on success, error returned from esp_event_handler_register if failed"]
pub fn esp_wifi_clear_default_wifi_driver_and_handlers(
esp_netif: *mut libc::c_void,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Creates default WIFI AP. In case of any init error this API aborts."]
#[doc = ""]
#[doc = " @return pointer to esp-netif instance"]
pub fn esp_netif_create_default_wifi_ap() -> *mut esp_netif_t;
}
extern "C" {
#[doc = " @brief Creates default WIFI STA. In case of any init error this API aborts."]
#[doc = ""]
#[doc = " @return pointer to esp-netif instance"]
pub fn esp_netif_create_default_wifi_sta() -> *mut esp_netif_t;
}
extern "C" {
#[doc = " @brief Creates esp_netif WiFi object based on the custom configuration."]
#[doc = ""]
#[doc = " @attention This API DOES NOT register default handlers!"]
#[doc = ""]
#[doc = " @param[in] wifi_if type of wifi interface"]
#[doc = " @param[in] esp_netif_config inherent esp-netif configuration pointer"]
#[doc = ""]
#[doc = " @return pointer to esp-netif instance"]
pub fn esp_netif_create_wifi(
wifi_if: wifi_interface_t,
esp_netif_config: *mut esp_netif_inherent_config_t,
) -> *mut esp_netif_t;
}
extern "C" {
#[doc = " @brief Creates default STA and AP network interfaces for esp-mesh."]
#[doc = ""]
#[doc = " Both netifs are almost identical to the default station and softAP, but with"]
#[doc = " DHCP client and server disabled. Please note that the DHCP client is typically"]
#[doc = " enabled only if the device is promoted to a root node."]
#[doc = ""]
#[doc = " Returns created interfaces which could be ignored setting parameters to NULL"]
#[doc = " if an application code does not need to save the interface instances"]
#[doc = " for further processing."]
#[doc = ""]
#[doc = " @param[out] p_netif_sta pointer where the resultant STA interface is saved (if non NULL)"]
#[doc = " @param[out] p_netif_ap pointer where the resultant AP interface is saved (if non NULL)"]
#[doc = ""]
#[doc = " @return ESP_OK on success"]
pub fn esp_netif_create_default_wifi_mesh_netifs(
p_netif_sta: *mut *mut esp_netif_t,
p_netif_ap: *mut *mut esp_netif_t,
) -> esp_err_t;
}
#[doc = " @brief WiFi stack configuration parameters passed to esp_wifi_init call."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct wifi_init_config_t {
#[doc = "< WiFi event handler"]
pub event_handler: system_event_handler_t,
#[doc = "< WiFi OS functions"]
pub osi_funcs: *mut wifi_osi_funcs_t,
#[doc = "< WiFi station crypto functions when connect"]
pub wpa_crypto_funcs: wpa_crypto_funcs_t,
#[doc = "< WiFi static RX buffer number"]
pub static_rx_buf_num: libc::c_int,
#[doc = "< WiFi dynamic RX buffer number"]
pub dynamic_rx_buf_num: libc::c_int,
#[doc = "< WiFi TX buffer type"]
pub tx_buf_type: libc::c_int,
#[doc = "< WiFi static TX buffer number"]
pub static_tx_buf_num: libc::c_int,
#[doc = "< WiFi dynamic TX buffer number"]
pub dynamic_tx_buf_num: libc::c_int,
#[doc = "< WiFi channel state information enable flag"]
pub csi_enable: libc::c_int,
#[doc = "< WiFi AMPDU RX feature enable flag"]
pub ampdu_rx_enable: libc::c_int,
#[doc = "< WiFi AMPDU TX feature enable flag"]
pub ampdu_tx_enable: libc::c_int,
#[doc = "< WiFi NVS flash enable flag"]
pub nvs_enable: libc::c_int,
#[doc = "< Nano option for printf/scan family enable flag"]
pub nano_enable: libc::c_int,
#[doc = "< WiFi Block Ack TX window size"]
pub tx_ba_win: libc::c_int,
#[doc = "< WiFi Block Ack RX window size"]
pub rx_ba_win: libc::c_int,
#[doc = "< WiFi Task Core ID"]
pub wifi_task_core_id: libc::c_int,
#[doc = "< WiFi softAP maximum length of the beacon"]
pub beacon_max_len: libc::c_int,
#[doc = "< WiFi management short buffer number, the minimum value is 6, the maximum value is 32"]
pub mgmt_sbuf_num: libc::c_int,
#[doc = "< Enables additional WiFi features and capabilities"]
pub feature_caps: u64,
#[doc = "< WiFi init magic number, it should be the last field"]
pub magic: libc::c_int,
}
extern "C" {
pub static g_wifi_default_wpa_crypto_funcs: wpa_crypto_funcs_t;
}
extern "C" {
pub static mut g_wifi_feature_caps: u64;
}
extern "C" {
#[doc = " @brief Init WiFi"]
#[doc = " Alloc resource for WiFi driver, such as WiFi control structure, RX/TX buffer,"]
#[doc = " WiFi NVS structure etc, this WiFi also start WiFi task"]
#[doc = ""]
#[doc = " @attention 1. This API must be called before all other WiFi API can be called"]
#[doc = " @attention 2. Always use WIFI_INIT_CONFIG_DEFAULT macro to init the config to default values, this can"]
#[doc = " guarantee all the fields got correct value when more fields are added into wifi_init_config_t"]
#[doc = " in future release. If you want to set your owner initial values, overwrite the default values"]
#[doc = " which are set by WIFI_INIT_CONFIG_DEFAULT, please be notified that the field 'magic' of"]
#[doc = " wifi_init_config_t should always be WIFI_INIT_CONFIG_MAGIC!"]
#[doc = ""]
#[doc = " @param config pointer to WiFi init configuration structure; can point to a temporary variable."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_NO_MEM: out of memory"]
#[doc = " - others: refer to error code esp_err.h"]
pub fn esp_wifi_init(config: *const wifi_init_config_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Deinit WiFi"]
#[doc = " Free all resource allocated in esp_wifi_init and stop WiFi task"]
#[doc = ""]
#[doc = " @attention 1. This API should be called if you want to remove WiFi driver from the system"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
pub fn esp_wifi_deinit() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set the WiFi operating mode"]
#[doc = ""]
#[doc = " Set the WiFi operating mode as station, soft-AP or station+soft-AP,"]
#[doc = " The default mode is soft-AP mode."]
#[doc = ""]
#[doc = " @param mode WiFi operating mode"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
#[doc = " - others: refer to error code in esp_err.h"]
pub fn esp_wifi_set_mode(mode: wifi_mode_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get current operating mode of WiFi"]
#[doc = ""]
#[doc = " @param[out] mode store current WiFi mode"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
pub fn esp_wifi_get_mode(mode: *mut wifi_mode_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Start WiFi according to current configuration"]
#[doc = " If mode is WIFI_MODE_STA, it create station control block and start station"]
#[doc = " If mode is WIFI_MODE_AP, it create soft-AP control block and start soft-AP"]
#[doc = " If mode is WIFI_MODE_APSTA, it create soft-AP and station control block and start soft-AP and station"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
#[doc = " - ESP_ERR_NO_MEM: out of memory"]
#[doc = " - ESP_ERR_WIFI_CONN: WiFi internal error, station or soft-AP control block wrong"]
#[doc = " - ESP_FAIL: other WiFi internal errors"]
pub fn esp_wifi_start() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Stop WiFi"]
#[doc = " If mode is WIFI_MODE_STA, it stop station and free station control block"]
#[doc = " If mode is WIFI_MODE_AP, it stop soft-AP and free soft-AP control block"]
#[doc = " If mode is WIFI_MODE_APSTA, it stop station/soft-AP and free station/soft-AP control block"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
pub fn esp_wifi_stop() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Restore WiFi stack persistent settings to default values"]
#[doc = ""]
#[doc = " This function will reset settings made using the following APIs:"]
#[doc = " - esp_wifi_get_auto_connect,"]
#[doc = " - esp_wifi_set_protocol,"]
#[doc = " - esp_wifi_set_config related"]
#[doc = " - esp_wifi_set_mode"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
pub fn esp_wifi_restore() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Connect the ESP32 WiFi station to the AP."]
#[doc = ""]
#[doc = " @attention 1. This API only impact WIFI_MODE_STA or WIFI_MODE_APSTA mode"]
#[doc = " @attention 2. If the ESP32 is connected to an AP, call esp_wifi_disconnect to disconnect."]
#[doc = " @attention 3. The scanning triggered by esp_wifi_start_scan() will not be effective until connection between ESP32 and the AP is established."]
#[doc = " If ESP32 is scanning and connecting at the same time, ESP32 will abort scanning and return a warning message and error"]
#[doc = " number ESP_ERR_WIFI_STATE."]
#[doc = " If you want to do reconnection after ESP32 received disconnect event, remember to add the maximum retry time, otherwise the called"]
#[doc = " scan will not work. This is especially true when the AP doesn't exist, and you still try reconnection after ESP32 received disconnect"]
#[doc = " event with the reason code WIFI_REASON_NO_AP_FOUND."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_NOT_STARTED: WiFi is not started by esp_wifi_start"]
#[doc = " - ESP_ERR_WIFI_CONN: WiFi internal error, station or soft-AP control block wrong"]
#[doc = " - ESP_ERR_WIFI_SSID: SSID of AP which station connects is invalid"]
pub fn esp_wifi_connect() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Disconnect the ESP32 WiFi station from the AP."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi was not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_NOT_STARTED: WiFi was not started by esp_wifi_start"]
#[doc = " - ESP_FAIL: other WiFi internal errors"]
pub fn esp_wifi_disconnect() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Currently this API is just an stub API"]
#[doc = ""]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - others: fail"]
pub fn esp_wifi_clear_fast_connect() -> esp_err_t;
}
extern "C" {
#[doc = " @brief deauthenticate all stations or associated id equals to aid"]
#[doc = ""]
#[doc = " @param aid when aid is 0, deauthenticate all stations, otherwise deauthenticate station whose associated id is aid"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_NOT_STARTED: WiFi was not started by esp_wifi_start"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
#[doc = " - ESP_ERR_WIFI_MODE: WiFi mode is wrong"]
pub fn esp_wifi_deauth_sta(aid: u16) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Scan all available APs."]
#[doc = ""]
#[doc = " @attention If this API is called, the found APs are stored in WiFi driver dynamic allocated memory and the"]
#[doc = " will be freed in esp_wifi_scan_get_ap_records, so generally, call esp_wifi_scan_get_ap_records to cause"]
#[doc = " the memory to be freed once the scan is done"]
#[doc = " @attention The values of maximum active scan time and passive scan time per channel are limited to 1500 milliseconds."]
#[doc = " Values above 1500ms may cause station to disconnect from AP and are not recommended."]
#[doc = ""]
#[doc = " @param config configuration of scanning"]
#[doc = " @param block if block is true, this API will block the caller until the scan is done, otherwise"]
#[doc = " it will return immediately"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_NOT_STARTED: WiFi was not started by esp_wifi_start"]
#[doc = " - ESP_ERR_WIFI_TIMEOUT: blocking scan is timeout"]
#[doc = " - ESP_ERR_WIFI_STATE: wifi still connecting when invoke esp_wifi_scan_start"]
#[doc = " - others: refer to error code in esp_err.h"]
pub fn esp_wifi_scan_start(config: *const wifi_scan_config_t, block: bool) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Stop the scan in process"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_NOT_STARTED: WiFi is not started by esp_wifi_start"]
pub fn esp_wifi_scan_stop() -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get number of APs found in last scan"]
#[doc = ""]
#[doc = " @param[out] number store number of APIs found in last scan"]
#[doc = ""]
#[doc = " @attention This API can only be called when the scan is completed, otherwise it may get wrong value."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_NOT_STARTED: WiFi is not started by esp_wifi_start"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
pub fn esp_wifi_scan_get_ap_num(number: *mut u16) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get AP list found in last scan"]
#[doc = ""]
#[doc = " @param[inout] number As input param, it stores max AP number ap_records can hold."]
#[doc = " As output param, it receives the actual AP number this API returns."]
#[doc = " @param ap_records wifi_ap_record_t array to hold the found APs"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_NOT_STARTED: WiFi is not started by esp_wifi_start"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
#[doc = " - ESP_ERR_NO_MEM: out of memory"]
pub fn esp_wifi_scan_get_ap_records(
number: *mut u16,
ap_records: *mut wifi_ap_record_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get information of AP which the ESP32 station is associated with"]
#[doc = ""]
#[doc = " @param ap_info the wifi_ap_record_t to hold AP information"]
#[doc = " sta can get the connected ap's phy mode info through the struct member"]
#[doc = " phy_11b，phy_11g，phy_11n，phy_lr in the wifi_ap_record_t struct."]
#[doc = " For example, phy_11b = 1 imply that ap support 802.11b mode"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_CONN: The station interface don't initialized"]
#[doc = " - ESP_ERR_WIFI_NOT_CONNECT: The station is in disconnect status"]
pub fn esp_wifi_sta_get_ap_info(ap_info: *mut wifi_ap_record_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set current WiFi power save type"]
#[doc = ""]
#[doc = " @attention Default power save type is WIFI_PS_MIN_MODEM."]
#[doc = ""]
#[doc = " @param type power save type"]
#[doc = ""]
#[doc = " @return ESP_OK: succeed"]
pub fn esp_wifi_set_ps(type_: wifi_ps_type_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get current WiFi power save type"]
#[doc = ""]
#[doc = " @attention Default power save type is WIFI_PS_MIN_MODEM."]
#[doc = ""]
#[doc = " @param[out] type: store current power save type"]
#[doc = ""]
#[doc = " @return ESP_OK: succeed"]
pub fn esp_wifi_get_ps(type_: *mut wifi_ps_type_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set protocol type of specified interface"]
#[doc = " The default protocol is (WIFI_PROTOCOL_11B|WIFI_PROTOCOL_11G|WIFI_PROTOCOL_11N)"]
#[doc = ""]
#[doc = " @attention Currently we only support 802.11b or 802.11bg or 802.11bgn mode"]
#[doc = ""]
#[doc = " @param ifx interfaces"]
#[doc = " @param protocol_bitmap WiFi protocol bitmap"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_IF: invalid interface"]
#[doc = " - others: refer to error codes in esp_err.h"]
pub fn esp_wifi_set_protocol(ifx: wifi_interface_t, protocol_bitmap: u8) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get the current protocol bitmap of the specified interface"]
#[doc = ""]
#[doc = " @param ifx interface"]
#[doc = " @param[out] protocol_bitmap store current WiFi protocol bitmap of interface ifx"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_IF: invalid interface"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
#[doc = " - others: refer to error codes in esp_err.h"]
pub fn esp_wifi_get_protocol(ifx: wifi_interface_t, protocol_bitmap: *mut u8) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set the bandwidth of ESP32 specified interface"]
#[doc = ""]
#[doc = " @attention 1. API return false if try to configure an interface that is not enabled"]
#[doc = " @attention 2. WIFI_BW_HT40 is supported only when the interface support 11N"]
#[doc = ""]
#[doc = " @param ifx interface to be configured"]
#[doc = " @param bw bandwidth"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_IF: invalid interface"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
#[doc = " - others: refer to error codes in esp_err.h"]
pub fn esp_wifi_set_bandwidth(ifx: wifi_interface_t, bw: wifi_bandwidth_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get the bandwidth of ESP32 specified interface"]
#[doc = ""]
#[doc = " @attention 1. API return false if try to get a interface that is not enable"]
#[doc = ""]
#[doc = " @param ifx interface to be configured"]
#[doc = " @param[out] bw store bandwidth of interface ifx"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_IF: invalid interface"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
pub fn esp_wifi_get_bandwidth(ifx: wifi_interface_t, bw: *mut wifi_bandwidth_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set primary/secondary channel of ESP32"]
#[doc = ""]
#[doc = " @attention 1. This API should be called after esp_wifi_start()"]
#[doc = " @attention 2. When ESP32 is in STA mode, this API should not be called when STA is scanning or connecting to an external AP"]
#[doc = " @attention 3. When ESP32 is in softAP mode, this API should not be called when softAP has connected to external STAs"]
#[doc = " @attention 4. When ESP32 is in STA+softAP mode, this API should not be called when in the scenarios described above"]
#[doc = ""]
#[doc = " @param primary for HT20, primary is the channel number, for HT40, primary is the primary channel"]
#[doc = " @param second for HT20, second is ignored, for HT40, second is the second channel"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_IF: invalid interface"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
pub fn esp_wifi_set_channel(primary: u8, second: wifi_second_chan_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get the primary/secondary channel of ESP32"]
#[doc = ""]
#[doc = " @attention 1. API return false if try to get a interface that is not enable"]
#[doc = ""]
#[doc = " @param primary store current primary channel"]
#[doc = " @param[out] second store current second channel"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
pub fn esp_wifi_get_channel(primary: *mut u8, second: *mut wifi_second_chan_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief configure country info"]
#[doc = ""]
#[doc = " @attention 1. The default country is {.cc=\"CN\", .schan=1, .nchan=13, policy=WIFI_COUNTRY_POLICY_AUTO}"]
#[doc = " @attention 2. When the country policy is WIFI_COUNTRY_POLICY_AUTO, the country info of the AP to which"]
#[doc = " the station is connected is used. E.g. if the configured country info is {.cc=\"USA\", .schan=1, .nchan=11}"]
#[doc = " and the country info of the AP to which the station is connected is {.cc=\"JP\", .schan=1, .nchan=14}"]
#[doc = " then the country info that will be used is {.cc=\"JP\", .schan=1, .nchan=14}. If the station disconnected"]
#[doc = " from the AP the country info is set back back to the country info of the station automatically,"]
#[doc = " {.cc=\"US\", .schan=1, .nchan=11} in the example."]
#[doc = " @attention 3. When the country policy is WIFI_COUNTRY_POLICY_MANUAL, always use the configured country info."]
#[doc = " @attention 4. When the country info is changed because of configuration or because the station connects to a different"]
#[doc = " external AP, the country IE in probe response/beacon of the soft-AP is changed also."]
#[doc = " @attention 5. The country configuration is stored into flash."]
#[doc = " @attention 6. This API doesn't validate the per-country rules, it's up to the user to fill in all fields according to"]
#[doc = " local regulations."]
#[doc = " @attention 7. When this API is called, the PHY init data will switch to the PHY init data type corresponding to the"]
#[doc = " country info."]
#[doc = ""]
#[doc = " @param country the configured country info"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
pub fn esp_wifi_set_country(country: *const wifi_country_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief get the current country info"]
#[doc = ""]
#[doc = " @param country country info"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
pub fn esp_wifi_get_country(country: *mut wifi_country_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set MAC address of the ESP32 WiFi station or the soft-AP interface."]
#[doc = ""]
#[doc = " @attention 1. This API can only be called when the interface is disabled"]
#[doc = " @attention 2. ESP32 soft-AP and station have different MAC addresses, do not set them to be the same."]
#[doc = " @attention 3. The bit 0 of the first byte of ESP32 MAC address can not be 1. For example, the MAC address"]
#[doc = " can set to be \"1a:XX:XX:XX:XX:XX\", but can not be \"15:XX:XX:XX:XX:XX\"."]
#[doc = ""]
#[doc = " @param ifx interface"]
#[doc = " @param mac the MAC address"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
#[doc = " - ESP_ERR_WIFI_IF: invalid interface"]
#[doc = " - ESP_ERR_WIFI_MAC: invalid mac address"]
#[doc = " - ESP_ERR_WIFI_MODE: WiFi mode is wrong"]
#[doc = " - others: refer to error codes in esp_err.h"]
pub fn esp_wifi_set_mac(ifx: wifi_interface_t, mac: *const u8) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get mac of specified interface"]
#[doc = ""]
#[doc = " @param ifx interface"]
#[doc = " @param[out] mac store mac of the interface ifx"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
#[doc = " - ESP_ERR_WIFI_IF: invalid interface"]
pub fn esp_wifi_get_mac(ifx: wifi_interface_t, mac: *mut u8) -> esp_err_t;
}
#[doc = " @brief The RX callback function in the promiscuous mode."]
#[doc = " Each time a packet is received, the callback function will be called."]
#[doc = ""]
#[doc = " @param buf Data received. Type of data in buffer (wifi_promiscuous_pkt_t or wifi_pkt_rx_ctrl_t) indicated by 'type' parameter."]
#[doc = " @param type promiscuous packet type."]
#[doc = ""]
pub type wifi_promiscuous_cb_t = ::core::option::Option<
unsafe extern "C" fn(buf: *mut libc::c_void, type_: wifi_promiscuous_pkt_type_t),
>;
extern "C" {
#[doc = " @brief Register the RX callback function in the promiscuous mode."]
#[doc = ""]
#[doc = " Each time a packet is received, the registered callback function will be called."]
#[doc = ""]
#[doc = " @param cb callback"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
pub fn esp_wifi_set_promiscuous_rx_cb(cb: wifi_promiscuous_cb_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable the promiscuous mode."]
#[doc = ""]
#[doc = " @param en false - disable, true - enable"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
pub fn esp_wifi_set_promiscuous(en: bool) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get the promiscuous mode."]
#[doc = ""]
#[doc = " @param[out] en store the current status of promiscuous mode"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
pub fn esp_wifi_get_promiscuous(en: *mut bool) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable the promiscuous mode packet type filter."]
#[doc = ""]
#[doc = " @note The default filter is to filter all packets except WIFI_PKT_MISC"]
#[doc = ""]
#[doc = " @param filter the packet type filtered in promiscuous mode."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
pub fn esp_wifi_set_promiscuous_filter(filter: *const wifi_promiscuous_filter_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get the promiscuous filter."]
#[doc = ""]
#[doc = " @param[out] filter store the current status of promiscuous filter"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
pub fn esp_wifi_get_promiscuous_filter(filter: *mut wifi_promiscuous_filter_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable subtype filter of the control packet in promiscuous mode."]
#[doc = ""]
#[doc = " @note The default filter is to filter none control packet."]
#[doc = ""]
#[doc = " @param filter the subtype of the control packet filtered in promiscuous mode."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
pub fn esp_wifi_set_promiscuous_ctrl_filter(
filter: *const wifi_promiscuous_filter_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get the subtype filter of the control packet in promiscuous mode."]
#[doc = ""]
#[doc = " @param[out] filter store the current status of subtype filter of the control packet in promiscuous mode"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_ARG: invalid argument"]
pub fn esp_wifi_get_promiscuous_ctrl_filter(
filter: *mut wifi_promiscuous_filter_t,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set the configuration of the ESP32 STA or AP"]
#[doc = ""]
#[doc = " @attention 1. This API can be called only when specified interface is enabled, otherwise, API fail"]
#[doc = " @attention 2. For station configuration, bssid_set needs to be 0; and it needs to be 1 only when users need to check the MAC address of the AP."]
#[doc = " @attention 3. ESP32 is limited to only one channel, so when in the soft-AP+station mode, the soft-AP will adjust its channel automatically to be the same as"]
#[doc = " the channel of the ESP32 station."]
#[doc = ""]
#[doc = " @param interface interface"]
#[doc = " @param conf station or soft-AP configuration"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
#[doc = " - ESP_ERR_WIFI_IF: invalid interface"]
#[doc = " - ESP_ERR_WIFI_MODE: invalid mode"]
#[doc = " - ESP_ERR_WIFI_PASSWORD: invalid password"]
#[doc = " - ESP_ERR_WIFI_NVS: WiFi internal NVS error"]
#[doc = " - others: refer to the erro code in esp_err.h"]
pub fn esp_wifi_set_config(interface: wifi_interface_t, conf: *mut wifi_config_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get configuration of specified interface"]
#[doc = ""]
#[doc = " @param interface interface"]
#[doc = " @param[out] conf station or soft-AP configuration"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
#[doc = " - ESP_ERR_WIFI_IF: invalid interface"]
pub fn esp_wifi_get_config(interface: wifi_interface_t, conf: *mut wifi_config_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get STAs associated with soft-AP"]
#[doc = ""]
#[doc = " @attention SSC only API"]
#[doc = ""]
#[doc = " @param[out] sta station list"]
#[doc = " ap can get the connected sta's phy mode info through the struct member"]
#[doc = " phy_11b，phy_11g，phy_11n，phy_lr in the wifi_sta_info_t struct."]
#[doc = " For example, phy_11b = 1 imply that sta support 802.11b mode"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
#[doc = " - ESP_ERR_WIFI_MODE: WiFi mode is wrong"]
#[doc = " - ESP_ERR_WIFI_CONN: WiFi internal error, the station/soft-AP control block is invalid"]
pub fn esp_wifi_ap_get_sta_list(sta: *mut wifi_sta_list_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get AID of STA connected with soft-AP"]
#[doc = ""]
#[doc = " @param mac STA's mac address"]
#[doc = " @param[out] aid Store the AID corresponding to STA mac"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
#[doc = " - ESP_ERR_NOT_FOUND: Requested resource not found"]
#[doc = " - ESP_ERR_WIFI_MODE: WiFi mode is wrong"]
#[doc = " - ESP_ERR_WIFI_CONN: WiFi internal error, the station/soft-AP control block is invalid"]
pub fn esp_wifi_ap_get_sta_aid(mac: *const u8, aid: *mut u16) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set the WiFi API configuration storage type"]
#[doc = ""]
#[doc = " @attention 1. The default value is WIFI_STORAGE_FLASH"]
#[doc = ""]
#[doc = " @param storage : storage type"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
pub fn esp_wifi_set_storage(storage: wifi_storage_t) -> esp_err_t;
}
#[doc = " @brief Function signature for received Vendor-Specific Information Element callback."]
#[doc = " @param ctx Context argument, as passed to esp_wifi_set_vendor_ie_cb() when registering callback."]
#[doc = " @param type Information element type, based on frame type received."]
#[doc = " @param sa Source 802.11 address."]
#[doc = " @param vnd_ie Pointer to the vendor specific element data received."]
#[doc = " @param rssi Received signal strength indication."]
pub type esp_vendor_ie_cb_t = ::core::option::Option<
unsafe extern "C" fn(
ctx: *mut libc::c_void,
type_: wifi_vendor_ie_type_t,
sa: *const u8,
vnd_ie: *const vendor_ie_data_t,
rssi: libc::c_int,
),
>;
extern "C" {
#[doc = " @brief Set 802.11 Vendor-Specific Information Element"]
#[doc = ""]
#[doc = " @param enable If true, specified IE is enabled. If false, specified IE is removed."]
#[doc = " @param type Information Element type. Determines the frame type to associate with the IE."]
#[doc = " @param idx Index to set or clear. Each IE type can be associated with up to two elements (indices 0 & 1)."]
#[doc = " @param vnd_ie Pointer to vendor specific element data. First 6 bytes should be a header with fields matching vendor_ie_data_t."]
#[doc = " If enable is false, this argument is ignored and can be NULL. Data does not need to remain valid after the function returns."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init()"]
#[doc = " - ESP_ERR_INVALID_ARG: Invalid argument, including if first byte of vnd_ie is not WIFI_VENDOR_IE_ELEMENT_ID (0xDD)"]
#[doc = " or second byte is an invalid length."]
#[doc = " - ESP_ERR_NO_MEM: Out of memory"]
pub fn esp_wifi_set_vendor_ie(
enable: bool,
type_: wifi_vendor_ie_type_t,
idx: wifi_vendor_ie_id_t,
vnd_ie: *const libc::c_void,
) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Register Vendor-Specific Information Element monitoring callback."]
#[doc = ""]
#[doc = " @param cb Callback function"]
#[doc = " @param ctx Context argument, passed to callback function."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
pub fn esp_wifi_set_vendor_ie_cb(cb: esp_vendor_ie_cb_t, ctx: *mut libc::c_void) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set maximum transmitting power after WiFi start."]
#[doc = ""]
#[doc = " @attention 1. Maximum power before wifi startup is limited by PHY init data bin."]
#[doc = " @attention 2. The value set by this API will be mapped to the max_tx_power of the structure wifi_country_t variable."]
#[doc = " @attention 3. Mapping Table {Power, max_tx_power} = {{8, 2}, {20, 5}, {28, 7}, {34, 8}, {44, 11},"]
#[doc = " {52, 13}, {56, 14}, {60, 15}, {66, 16}, {72, 18}, {78, 20}}."]
#[doc = " @attention 4. Param power unit is 0.25dBm, range is [8, 78] corresponding to 2dBm - 20dBm."]
#[doc = " @attention 5. Relationship between set value and actual value. As follows:"]
#[doc = " +------------+--------------+"]
#[doc = " | set value | actual value |"]
#[doc = " +============+==============+"]
#[doc = " | [8, 19] | 8 |"]
#[doc = " +------------+--------------+"]
#[doc = " | [20, 27] | 20 |"]
#[doc = " +------------+--------------+"]
#[doc = " | [28, 33] | 28 |"]
#[doc = " +------------+--------------+"]
#[doc = " | [34, 43] | 34 |"]
#[doc = " +------------+--------------+"]
#[doc = " | [44, 51] | 44 |"]
#[doc = " +------------+--------------+"]
#[doc = " | [52, 55] | 52 |"]
#[doc = " +------------+--------------+"]
#[doc = " | [56, 59] | 56 |"]
#[doc = " +------------+--------------+"]
#[doc = " | [60, 65] | 60 |"]
#[doc = " +------------+--------------+"]
#[doc = " | [66, 71] | 66 |"]
#[doc = " +------------+--------------+"]
#[doc = " | [72, 77] | 72 |"]
#[doc = " +------------+--------------+"]
#[doc = " | 78 | 78 |"]
#[doc = " +------------+--------------+"]
#[doc = " @param power Maximum WiFi transmitting power."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_NOT_START: WiFi is not started by esp_wifi_start"]
#[doc = " - ESP_ERR_WIFI_ARG: invalid argument, e.g. parameter is out of range"]
pub fn esp_wifi_set_max_tx_power(power: i8) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get maximum transmiting power after WiFi start"]
#[doc = ""]
#[doc = " @param power Maximum WiFi transmitting power, unit is 0.25dBm."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_NOT_START: WiFi is not started by esp_wifi_start"]
#[doc = " - ESP_ERR_WIFI_ARG: invalid argument"]
pub fn esp_wifi_get_max_tx_power(power: *mut i8) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set mask to enable or disable some WiFi events"]
#[doc = ""]
#[doc = " @attention 1. Mask can be created by logical OR of various WIFI_EVENT_MASK_ constants."]
#[doc = " Events which have corresponding bit set in the mask will not be delivered to the system event handler."]
#[doc = " @attention 2. Default WiFi event mask is WIFI_EVENT_MASK_AP_PROBEREQRECVED."]
#[doc = " @attention 3. There may be lots of stations sending probe request data around."]
#[doc = " Don't unmask this event unless you need to receive probe request data."]
#[doc = ""]
#[doc = " @param mask WiFi event mask."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
pub fn esp_wifi_set_event_mask(mask: u32) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get mask of WiFi events"]
#[doc = ""]
#[doc = " @param mask WiFi event mask."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_ARG: invalid argument"]
pub fn esp_wifi_get_event_mask(mask: *mut u32) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Send raw ieee80211 data"]
#[doc = ""]
#[doc = " @attention Currently only support for sending beacon/probe request/probe response/action and non-QoS"]
#[doc = " data frame"]
#[doc = ""]
#[doc = " @param ifx interface if the Wi-Fi mode is Station, the ifx should be WIFI_IF_STA. If the Wi-Fi"]
#[doc = " mode is SoftAP, the ifx should be WIFI_IF_AP. If the Wi-Fi mode is Station+SoftAP, the"]
#[doc = " ifx should be WIFI_IF_STA or WIFI_IF_AP. If the ifx is wrong, the API returns ESP_ERR_WIFI_IF."]
#[doc = " @param buffer raw ieee80211 buffer"]
#[doc = " @param len the length of raw buffer, the len must be <= 1500 Bytes and >= 24 Bytes"]
#[doc = " @param en_sys_seq indicate whether use the internal sequence number. If en_sys_seq is false, the"]
#[doc = " sequence in raw buffer is unchanged, otherwise it will be overwritten by WiFi driver with"]
#[doc = " the system sequence number."]
#[doc = " Generally, if esp_wifi_80211_tx is called before the Wi-Fi connection has been set up, both"]
#[doc = " en_sys_seq==true and en_sys_seq==false are fine. However, if the API is called after the Wi-Fi"]
#[doc = " connection has been set up, en_sys_seq must be true, otherwise ESP_ERR_WIFI_ARG is returned."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: success"]
#[doc = " - ESP_ERR_WIFI_IF: Invalid interface"]
#[doc = " - ESP_ERR_INVALID_ARG: Invalid parameter"]
#[doc = " - ESP_ERR_WIFI_NO_MEM: out of memory"]
pub fn esp_wifi_80211_tx(
ifx: wifi_interface_t,
buffer: *const libc::c_void,
len: libc::c_int,
en_sys_seq: bool,
) -> esp_err_t;
}
#[doc = " @brief The RX callback function of Channel State Information(CSI) data."]
#[doc = ""]
#[doc = " Each time a CSI data is received, the callback function will be called."]
#[doc = ""]
#[doc = " @param ctx context argument, passed to esp_wifi_set_csi_rx_cb() when registering callback function."]
#[doc = " @param data CSI data received. The memory that it points to will be deallocated after callback function returns."]
#[doc = ""]
pub type wifi_csi_cb_t = ::core::option::Option<
unsafe extern "C" fn(ctx: *mut libc::c_void, data: *mut wifi_csi_info_t),
>;
extern "C" {
#[doc = " @brief Register the RX callback function of CSI data."]
#[doc = ""]
#[doc = " Each time a CSI data is received, the callback function will be called."]
#[doc = ""]
#[doc = " @param cb callback"]
#[doc = " @param ctx context argument, passed to callback function"]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
pub fn esp_wifi_set_csi_rx_cb(cb: wifi_csi_cb_t, ctx: *mut libc::c_void) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set CSI data configuration"]
#[doc = ""]
#[doc = " @param config configuration"]
#[doc = ""]
#[doc = " return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_NOT_START: WiFi is not started by esp_wifi_start or promiscuous mode is not enabled"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
pub fn esp_wifi_set_csi_config(config: *const wifi_csi_config_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Enable or disable CSI"]
#[doc = ""]
#[doc = " @param en true - enable, false - disable"]
#[doc = ""]
#[doc = " return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_NOT_START: WiFi is not started by esp_wifi_start or promiscuous mode is not enabled"]
#[doc = " - ESP_ERR_INVALID_ARG: invalid argument"]
pub fn esp_wifi_set_csi(en: bool) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set antenna GPIO configuration"]
#[doc = ""]
#[doc = " @param config Antenna GPIO configuration."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_ARG: Invalid argument, e.g. parameter is NULL, invalid GPIO number etc"]
pub fn esp_wifi_set_ant_gpio(config: *const wifi_ant_gpio_config_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get current antenna GPIO configuration"]
#[doc = ""]
#[doc = " @param config Antenna GPIO configuration."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_ARG: invalid argument, e.g. parameter is NULL"]
pub fn esp_wifi_get_ant_gpio(config: *mut wifi_ant_gpio_config_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Set antenna configuration"]
#[doc = ""]
#[doc = " @param config Antenna configuration."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_ARG: Invalid argument, e.g. parameter is NULL, invalid antenna mode or invalid GPIO number"]
pub fn esp_wifi_set_ant(config: *const wifi_ant_config_t) -> esp_err_t;
}
extern "C" {
#[doc = " @brief Get current antenna configuration"]
#[doc = ""]
#[doc = " @param config Antenna configuration."]
#[doc = ""]
#[doc = " @return"]
#[doc = " - ESP_OK: succeed"]
#[doc = " - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init"]
#[doc = " - ESP_ERR_WIFI_ARG: invalid argument, e.g. parameter is NULL"]
pub fn esp_wifi_get_ant(config: *mut wifi_ant_config_t) -> esp_err_t;
}
pub type locale_t = *mut __locale_t;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct tm {
pub tm_sec: libc::c_int,
pub tm_min: libc::c_int,
pub tm_hour: libc::c_int,
pub tm_mday: libc::c_int,
pub tm_mon: libc::c_int,
pub tm_year: libc::c_int,
pub tm_wday: libc::c_int,
pub tm_yday: libc::c_int,
pub tm_isdst: libc::c_int,
}
extern "C" {
pub fn clock() -> clock_t;
}
extern "C" {
pub fn difftime(_time2: time_t, _time1: time_t) -> f64;
}
extern "C" {
pub fn mktime(_timeptr: *mut tm) -> time_t;
}
extern "C" {
pub fn time(_timer: *mut time_t) -> time_t;
}
extern "C" {
pub fn asctime(_tblock: *const tm) -> *mut libc::c_char;
}
extern "C" {
pub fn ctime(_time: *const time_t) -> *mut libc::c_char;
}
extern "C" {
pub fn gmtime(_timer: *const time_t) -> *mut tm;
}
extern "C" {
pub fn localtime(_timer: *const time_t) -> *mut tm;
}
extern "C" {
pub fn strftime(
_s: *mut libc::c_char,
_maxsize: size_t,
_fmt: *const libc::c_char,
_t: *const tm,
) -> size_t;
}
extern "C" {
pub fn strftime_l(
_s: *mut libc::c_char,
_maxsize: size_t,
_fmt: *const libc::c_char,
_t: *const tm,
_l: locale_t,
) -> size_t;
}
extern "C" {
pub fn asctime_r(arg1: *const tm, arg2: *mut libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn ctime_r(arg1: *const time_t, arg2: *mut libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn gmtime_r(arg1: *const time_t, arg2: *mut tm) -> *mut tm;
}
extern "C" {
pub fn localtime_r(arg1: *const time_t, arg2: *mut tm) -> *mut tm;
}
extern "C" {
pub fn tzset();
}
extern "C" {
pub fn _tzset_r(arg1: *mut _reent);
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct __tzrule_struct {
pub ch: libc::c_char,
pub m: libc::c_int,
pub n: libc::c_int,
pub d: libc::c_int,
pub s: libc::c_int,
pub change: time_t,
pub offset: libc::c_long,
}
pub type __tzrule_type = __tzrule_struct;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct __tzinfo_struct {
pub __tznorth: libc::c_int,
pub __tzyear: libc::c_int,
pub __tzrule: [__tzrule_type; 2usize],
}
pub type __tzinfo_type = __tzinfo_struct;
extern "C" {
pub fn __gettzinfo() -> *mut __tzinfo_type;
}
extern "C" {
pub static mut _timezone: libc::c_long;
}
extern "C" {
pub static mut _daylight: libc::c_int;
}
extern "C" {
pub static mut _tzname: [*mut libc::c_char; 2usize];
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union sigval {
pub sival_int: libc::c_int,
pub sival_ptr: *mut libc::c_void,
_bindgen_union_align: u32,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub struct sigevent {
pub sigev_notify: libc::c_int,
pub sigev_signo: libc::c_int,
pub sigev_value: sigval,
pub sigev_notify_function: ::core::option::Option<unsafe extern "C" fn(arg1: sigval)>,
pub sigev_notify_attributes: *mut pthread_attr_t,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub struct siginfo_t {
pub si_signo: libc::c_int,
pub si_code: libc::c_int,
pub si_value: sigval,
}
pub type _sig_func_ptr = ::core::option::Option<unsafe extern "C" fn(arg1: libc::c_int)>;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct sigaction {
pub sa_handler: _sig_func_ptr,
pub sa_mask: sigset_t,
pub sa_flags: libc::c_int,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct sigaltstack {
pub ss_sp: *mut libc::c_void,
pub ss_flags: libc::c_int,
pub ss_size: size_t,
}
pub type stack_t = sigaltstack;
extern "C" {
pub fn sigprocmask(how: libc::c_int, set: *const sigset_t, oset: *mut sigset_t) -> libc::c_int;
}
extern "C" {
pub fn pthread_sigmask(
how: libc::c_int,
set: *const sigset_t,
oset: *mut sigset_t,
) -> libc::c_int;
}
extern "C" {
pub fn kill(arg1: pid_t, arg2: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn killpg(arg1: pid_t, arg2: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn sigaction(
arg1: libc::c_int,
arg2: *const sigaction,
arg3: *mut sigaction,
) -> libc::c_int;
}
extern "C" {
pub fn sigaddset(arg1: *mut sigset_t, arg2: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn sigdelset(arg1: *mut sigset_t, arg2: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn sigismember(arg1: *const sigset_t, arg2: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn sigfillset(arg1: *mut sigset_t) -> libc::c_int;
}
extern "C" {
pub fn sigemptyset(arg1: *mut sigset_t) -> libc::c_int;
}
extern "C" {
pub fn sigpending(arg1: *mut sigset_t) -> libc::c_int;
}
extern "C" {
pub fn sigsuspend(arg1: *const sigset_t) -> libc::c_int;
}
extern "C" {
pub fn sigwait(set: *const sigset_t, sig: *mut libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn sigpause(arg1: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn sigaltstack(arg1: *const stack_t, arg2: *mut stack_t) -> libc::c_int;
}
extern "C" {
pub fn pthread_kill(thread: pthread_t, sig: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn sigwaitinfo(set: *const sigset_t, info: *mut siginfo_t) -> libc::c_int;
}
extern "C" {
pub fn sigtimedwait(
set: *const sigset_t,
info: *mut siginfo_t,
timeout: *const timespec,
) -> libc::c_int;
}
extern "C" {
pub fn sigqueue(pid: pid_t, signo: libc::c_int, value: sigval) -> libc::c_int;
}
pub type sig_atomic_t = libc::c_int;
pub type sig_t = _sig_func_ptr;
extern "C" {
pub fn _signal_r(arg1: *mut _reent, arg2: libc::c_int, arg3: _sig_func_ptr) -> _sig_func_ptr;
}
extern "C" {
pub fn _raise_r(arg1: *mut _reent, arg2: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn signal(arg1: libc::c_int, arg2: _sig_func_ptr) -> _sig_func_ptr;
}
extern "C" {
pub fn raise(arg1: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn psignal(arg1: libc::c_int, arg2: *const libc::c_char);
}
extern "C" {
pub fn clock_settime(clock_id: clockid_t, tp: *const timespec) -> libc::c_int;
}
extern "C" {
pub fn clock_gettime(clock_id: clockid_t, tp: *mut timespec) -> libc::c_int;
}
extern "C" {
pub fn clock_getres(clock_id: clockid_t, res: *mut timespec) -> libc::c_int;
}
extern "C" {
pub fn timer_create(
clock_id: clockid_t,
evp: *mut sigevent,
timerid: *mut timer_t,
) -> libc::c_int;
}
extern "C" {
pub fn timer_delete(timerid: timer_t) -> libc::c_int;
}
extern "C" {
pub fn timer_settime(
timerid: timer_t,
flags: libc::c_int,
value: *const itimerspec,
ovalue: *mut itimerspec,
) -> libc::c_int;
}
extern "C" {
pub fn timer_gettime(timerid: timer_t, value: *mut itimerspec) -> libc::c_int;
}
extern "C" {
pub fn timer_getoverrun(timerid: timer_t) -> libc::c_int;
}
extern "C" {
pub fn nanosleep(rqtp: *const timespec, rmtp: *mut timespec) -> libc::c_int;
}
extern "C" {
pub fn clock_nanosleep(
clock_id: clockid_t,
flags: libc::c_int,
rqtp: *const timespec,
rmtp: *mut timespec,
) -> libc::c_int;
}
extern "C" {
pub static mut environ: *mut *mut libc::c_char;
}
extern "C" {
pub fn _exit(__status: libc::c_int);
}
extern "C" {
pub fn access(__path: *const libc::c_char, __amode: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn alarm(__secs: libc::c_uint) -> libc::c_uint;
}
extern "C" {
pub fn chdir(__path: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn chmod(__path: *const libc::c_char, __mode: mode_t) -> libc::c_int;
}
extern "C" {
pub fn chown(__path: *const libc::c_char, __owner: uid_t, __group: gid_t) -> libc::c_int;
}
extern "C" {
pub fn chroot(__path: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn close(__fildes: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn confstr(__name: libc::c_int, __buf: *mut libc::c_char, __len: size_t) -> size_t;
}
extern "C" {
pub fn daemon(nochdir: libc::c_int, noclose: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn dup(__fildes: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn dup2(__fildes: libc::c_int, __fildes2: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn endusershell();
}
extern "C" {
pub fn execl(__path: *const libc::c_char, arg1: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn execle(__path: *const libc::c_char, arg1: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn execlp(__file: *const libc::c_char, arg1: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn execlpe(__file: *const libc::c_char, arg1: *const libc::c_char, ...) -> libc::c_int;
}
extern "C" {
pub fn execv(__path: *const libc::c_char, __argv: *const *mut libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn execve(
__path: *const libc::c_char,
__argv: *const *mut libc::c_char,
__envp: *const *mut libc::c_char,
) -> libc::c_int;
}
extern "C" {
pub fn execvp(__file: *const libc::c_char, __argv: *const *mut libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn faccessat(
__dirfd: libc::c_int,
__path: *const libc::c_char,
__mode: libc::c_int,
__flags: libc::c_int,
) -> libc::c_int;
}
extern "C" {
pub fn fchdir(__fildes: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn fchmod(__fildes: libc::c_int, __mode: mode_t) -> libc::c_int;
}
extern "C" {
pub fn fchown(__fildes: libc::c_int, __owner: uid_t, __group: gid_t) -> libc::c_int;
}
extern "C" {
pub fn fchownat(
__dirfd: libc::c_int,
__path: *const libc::c_char,
__owner: uid_t,
__group: gid_t,
__flags: libc::c_int,
) -> libc::c_int;
}
extern "C" {
pub fn fexecve(
__fd: libc::c_int,
__argv: *const *mut libc::c_char,
__envp: *const *mut libc::c_char,
) -> libc::c_int;
}
extern "C" {
pub fn fork() -> pid_t;
}
extern "C" {
pub fn fpathconf(__fd: libc::c_int, __name: libc::c_int) -> libc::c_long;
}
extern "C" {
pub fn fsync(__fd: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn fdatasync(__fd: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn getcwd(__buf: *mut libc::c_char, __size: size_t) -> *mut libc::c_char;
}
extern "C" {
pub fn getdomainname(__name: *mut libc::c_char, __len: size_t) -> libc::c_int;
}
extern "C" {
pub fn getentropy(arg1: *mut libc::c_void, arg2: size_t) -> libc::c_int;
}
extern "C" {
pub fn getegid() -> gid_t;
}
extern "C" {
pub fn geteuid() -> uid_t;
}
extern "C" {
pub fn getgid() -> gid_t;
}
extern "C" {
pub fn getgroups(__gidsetsize: libc::c_int, __grouplist: *mut gid_t) -> libc::c_int;
}
extern "C" {
pub fn gethostid() -> libc::c_long;
}
extern "C" {
pub fn getlogin() -> *mut libc::c_char;
}
extern "C" {
pub fn getpass(__prompt: *const libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn getpagesize() -> libc::c_int;
}
extern "C" {
pub fn getpeereid(arg1: libc::c_int, arg2: *mut uid_t, arg3: *mut gid_t) -> libc::c_int;
}
extern "C" {
pub fn getpgid(arg1: pid_t) -> pid_t;
}
extern "C" {
pub fn getpgrp() -> pid_t;
}
extern "C" {
pub fn getpid() -> pid_t;
}
extern "C" {
pub fn getppid() -> pid_t;
}
extern "C" {
pub fn getsid(arg1: pid_t) -> pid_t;
}
extern "C" {
pub fn getuid() -> uid_t;
}
extern "C" {
pub fn getusershell() -> *mut libc::c_char;
}
extern "C" {
pub fn getwd(__buf: *mut libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn iruserok(
raddr: libc::c_ulong,
superuser: libc::c_int,
ruser: *const libc::c_char,
luser: *const libc::c_char,
) -> libc::c_int;
}
extern "C" {
pub fn isatty(__fildes: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn issetugid() -> libc::c_int;
}
extern "C" {
pub fn lchown(__path: *const libc::c_char, __owner: uid_t, __group: gid_t) -> libc::c_int;
}
extern "C" {
pub fn link(__path1: *const libc::c_char, __path2: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn linkat(
__dirfd1: libc::c_int,
__path1: *const libc::c_char,
__dirfd2: libc::c_int,
__path2: *const libc::c_char,
__flags: libc::c_int,
) -> libc::c_int;
}
extern "C" {
pub fn nice(__nice_value: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn lseek(__fildes: libc::c_int, __offset: off_t, __whence: libc::c_int) -> off_t;
}
extern "C" {
pub fn lockf(__fd: libc::c_int, __cmd: libc::c_int, __len: off_t) -> libc::c_int;
}
extern "C" {
pub fn pathconf(__path: *const libc::c_char, __name: libc::c_int) -> libc::c_long;
}
extern "C" {
pub fn pause() -> libc::c_int;
}
extern "C" {
pub fn pthread_atfork(
arg1: ::core::option::Option<unsafe extern "C" fn()>,
arg2: ::core::option::Option<unsafe extern "C" fn()>,
arg3: ::core::option::Option<unsafe extern "C" fn()>,
) -> libc::c_int;
}
extern "C" {
pub fn pipe(__fildes: *mut libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn pread(
__fd: libc::c_int,
__buf: *mut libc::c_void,
__nbytes: size_t,
__offset: off_t,
) -> ssize_t;
}
extern "C" {
pub fn pwrite(
__fd: libc::c_int,
__buf: *const libc::c_void,
__nbytes: size_t,
__offset: off_t,
) -> ssize_t;
}
extern "C" {
pub fn read(__fd: libc::c_int, __buf: *mut libc::c_void, __nbyte: size_t) -> libc::c_int;
}
extern "C" {
pub fn rresvport(__alport: *mut libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn revoke(__path: *mut libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn rmdir(__path: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn ruserok(
rhost: *const libc::c_char,
superuser: libc::c_int,
ruser: *const libc::c_char,
luser: *const libc::c_char,
) -> libc::c_int;
}
extern "C" {
pub fn sbrk(__incr: isize) -> *mut libc::c_void;
}
extern "C" {
pub fn setegid(__gid: gid_t) -> libc::c_int;
}
extern "C" {
pub fn seteuid(__uid: uid_t) -> libc::c_int;
}
extern "C" {
pub fn setgid(__gid: gid_t) -> libc::c_int;
}
extern "C" {
pub fn setgroups(ngroups: libc::c_int, grouplist: *const gid_t) -> libc::c_int;
}
extern "C" {
pub fn sethostname(arg1: *const libc::c_char, arg2: size_t) -> libc::c_int;
}
extern "C" {
pub fn setpgid(__pid: pid_t, __pgid: pid_t) -> libc::c_int;
}
extern "C" {
pub fn setpgrp() -> libc::c_int;
}
extern "C" {
pub fn setregid(__rgid: gid_t, __egid: gid_t) -> libc::c_int;
}
extern "C" {
pub fn setreuid(__ruid: uid_t, __euid: uid_t) -> libc::c_int;
}
extern "C" {
pub fn setsid() -> pid_t;
}
extern "C" {
pub fn setuid(__uid: uid_t) -> libc::c_int;
}
extern "C" {
pub fn setusershell();
}
extern "C" {
pub fn sleep(__seconds: libc::c_uint) -> libc::c_uint;
}
extern "C" {
pub fn sysconf(__name: libc::c_int) -> libc::c_long;
}
extern "C" {
pub fn tcgetpgrp(__fildes: libc::c_int) -> pid_t;
}
extern "C" {
pub fn tcsetpgrp(__fildes: libc::c_int, __pgrp_id: pid_t) -> libc::c_int;
}
extern "C" {
pub fn ttyname(__fildes: libc::c_int) -> *mut libc::c_char;
}
extern "C" {
pub fn ttyname_r(arg1: libc::c_int, arg2: *mut libc::c_char, arg3: size_t) -> libc::c_int;
}
extern "C" {
pub fn unlink(__path: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn usleep(__useconds: useconds_t) -> libc::c_int;
}
extern "C" {
pub fn vhangup() -> libc::c_int;
}
extern "C" {
pub fn write(__fd: libc::c_int, __buf: *const libc::c_void, __nbyte: size_t) -> libc::c_int;
}
extern "C" {
pub static mut optarg: *mut libc::c_char;
}
extern "C" {
pub static mut optind: libc::c_int;
}
extern "C" {
pub static mut opterr: libc::c_int;
}
extern "C" {
pub static mut optopt: libc::c_int;
}
extern "C" {
pub fn getopt(
arg1: libc::c_int,
arg2: *const *mut libc::c_char,
arg3: *const libc::c_char,
) -> libc::c_int;
}
extern "C" {
pub static mut optreset: libc::c_int;
}
extern "C" {
pub fn vfork() -> libc::c_int;
}
extern "C" {
pub fn ftruncate(__fd: libc::c_int, __length: off_t) -> libc::c_int;
}
extern "C" {
pub fn truncate(arg1: *const libc::c_char, __length: off_t) -> libc::c_int;
}
extern "C" {
pub fn getdtablesize() -> libc::c_int;
}
extern "C" {
pub fn ualarm(__useconds: useconds_t, __interval: useconds_t) -> useconds_t;
}
extern "C" {
pub fn gethostname(__name: *mut libc::c_char, __len: size_t) -> libc::c_int;
}
extern "C" {
pub fn setdtablesize(arg1: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn sync();
}
extern "C" {
pub fn readlink(
__path: *const libc::c_char,
__buf: *mut libc::c_char,
__buflen: size_t,
) -> ssize_t;
}
extern "C" {
pub fn symlink(__name1: *const libc::c_char, __name2: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn readlinkat(
__dirfd1: libc::c_int,
__path: *const libc::c_char,
__buf: *mut libc::c_char,
__buflen: size_t,
) -> ssize_t;
}
extern "C" {
pub fn symlinkat(
arg1: *const libc::c_char,
arg2: libc::c_int,
arg3: *const libc::c_char,
) -> libc::c_int;
}
extern "C" {
pub fn unlinkat(arg1: libc::c_int, arg2: *const libc::c_char, arg3: libc::c_int)
-> libc::c_int;
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct timezone {
pub tz_minuteswest: libc::c_int,
pub tz_dsttime: libc::c_int,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct bintime {
pub sec: time_t,
pub frac: u64,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct itimerval {
pub it_interval: timeval,
pub it_value: timeval,
}
extern "C" {
pub fn utimes(__path: *const libc::c_char, __tvp: *const timeval) -> libc::c_int;
}
extern "C" {
pub fn adjtime(arg1: *const timeval, arg2: *mut timeval) -> libc::c_int;
}
extern "C" {
pub fn futimes(arg1: libc::c_int, arg2: *const timeval) -> libc::c_int;
}
extern "C" {
pub fn lutimes(arg1: *const libc::c_char, arg2: *const timeval) -> libc::c_int;
}
extern "C" {
pub fn settimeofday(arg1: *const timeval, arg2: *const timezone) -> libc::c_int;
}
extern "C" {
pub fn getitimer(__which: libc::c_int, __value: *mut itimerval) -> libc::c_int;
}
extern "C" {
pub fn setitimer(
__which: libc::c_int,
__value: *const itimerval,
__ovalue: *mut itimerval,
) -> libc::c_int;
}
extern "C" {
pub fn gettimeofday(__p: *mut timeval, __tz: *mut libc::c_void) -> libc::c_int;
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct flock {
pub l_type: libc::c_short,
pub l_whence: libc::c_short,
pub l_start: libc::c_long,
pub l_len: libc::c_long,
pub l_pid: libc::c_short,
pub l_xxx: libc::c_short,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct eflock {
pub l_type: libc::c_short,
pub l_whence: libc::c_short,
pub l_start: libc::c_long,
pub l_len: libc::c_long,
pub l_pid: libc::c_short,
pub l_xxx: libc::c_short,
pub l_rpid: libc::c_long,
pub l_rsys: libc::c_long,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct stat {
pub st_dev: dev_t,
pub st_ino: ino_t,
pub st_mode: mode_t,
pub st_nlink: nlink_t,
pub st_uid: uid_t,
pub st_gid: gid_t,
pub st_rdev: dev_t,
pub st_size: off_t,
pub st_atime: time_t,
pub st_spare1: libc::c_long,
pub st_mtime: time_t,
pub st_spare2: libc::c_long,
pub st_ctime: time_t,
pub st_spare3: libc::c_long,
pub st_blksize: blksize_t,
pub st_blocks: blkcnt_t,
pub st_spare4: [libc::c_long; 2usize],
}
extern "C" {
pub fn fstat(__fd: libc::c_int, __sbuf: *mut stat) -> libc::c_int;
}
extern "C" {
pub fn mkdir(_path: *const libc::c_char, __mode: mode_t) -> libc::c_int;
}
extern "C" {
pub fn mkfifo(__path: *const libc::c_char, __mode: mode_t) -> libc::c_int;
}
extern "C" {
pub fn stat(__path: *const libc::c_char, __sbuf: *mut stat) -> libc::c_int;
}
extern "C" {
pub fn umask(__mask: mode_t) -> mode_t;
}
extern "C" {
pub fn fchmodat(
arg1: libc::c_int,
arg2: *const libc::c_char,
arg3: mode_t,
arg4: libc::c_int,
) -> libc::c_int;
}
extern "C" {
pub fn fstatat(
arg1: libc::c_int,
arg2: *const libc::c_char,
arg3: *mut stat,
arg4: libc::c_int,
) -> libc::c_int;
}
extern "C" {
pub fn mkdirat(arg1: libc::c_int, arg2: *const libc::c_char, arg3: mode_t) -> libc::c_int;
}
extern "C" {
pub fn mkfifoat(arg1: libc::c_int, arg2: *const libc::c_char, arg3: mode_t) -> libc::c_int;
}
extern "C" {
pub fn mknodat(
arg1: libc::c_int,
arg2: *const libc::c_char,
arg3: mode_t,
arg4: dev_t,
) -> libc::c_int;
}
extern "C" {
pub fn utimensat(
arg1: libc::c_int,
arg2: *const libc::c_char,
arg3: *const timespec,
arg4: libc::c_int,
) -> libc::c_int;
}
extern "C" {
pub fn futimens(arg1: libc::c_int, arg2: *const timespec) -> libc::c_int;
}
extern "C" {
pub fn open(arg1: *const libc::c_char, arg2: libc::c_int, ...) -> libc::c_int;
}
extern "C" {
pub fn openat(
arg1: libc::c_int,
arg2: *const libc::c_char,
arg3: libc::c_int,
...
) -> libc::c_int;
}
extern "C" {
pub fn creat(arg1: *const libc::c_char, arg2: mode_t) -> libc::c_int;
}
extern "C" {
pub fn fcntl(arg1: libc::c_int, arg2: libc::c_int, ...) -> libc::c_int;
}
extern "C" {
pub fn flock(arg1: libc::c_int, arg2: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn ioctl(fd: libc::c_int, request: libc::c_int, ...) -> libc::c_int;
}
#[repr(u32)]
#[doc = " SNTP time update mode"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum sntp_sync_mode_t {
#[doc = "< Update system time immediately when receiving a response from the SNTP server."]
SNTP_SYNC_MODE_IMMED = 0,
#[doc = "< Smooth time updating. Time error is gradually reduced using adjtime function. If the difference between SNTP response time and system time is large (more than 35 minutes) then update immediately."]
SNTP_SYNC_MODE_SMOOTH = 1,
}
#[repr(u32)]
#[doc = " SNTP sync status"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum sntp_sync_status_t {
SNTP_SYNC_STATUS_RESET = 0,
SNTP_SYNC_STATUS_COMPLETED = 1,
SNTP_SYNC_STATUS_IN_PROGRESS = 2,
}
#[doc = " @brief SNTP callback function for notifying about time sync event"]
#[doc = ""]
#[doc = " @param tv Time received from SNTP server."]
pub type sntp_sync_time_cb_t = ::core::option::Option<unsafe extern "C" fn(tv: *mut timeval)>;
extern "C" {
#[doc = " @brief This function updates the system time."]
#[doc = ""]
#[doc = " This is a weak-linked function. It is possible to replace all SNTP update functionality"]
#[doc = " by placing a sntp_sync_time() function in the app firmware source."]
#[doc = " If the default implementation is used, calling sntp_set_sync_mode() allows"]
#[doc = " the time synchronization mode to be changed to instant or smooth."]
#[doc = " If a callback function is registered via sntp_set_time_sync_notification_cb(),"]
#[doc = " it will be called following time synchronization."]
#[doc = ""]
#[doc = " @param tv Time received from SNTP server."]
pub fn sntp_sync_time(tv: *mut timeval);
}
extern "C" {
#[doc = " @brief Set the sync mode"]
#[doc = ""]
#[doc = " Allowable two mode: SNTP_SYNC_MODE_IMMED and SNTP_SYNC_MODE_SMOOTH."]
#[doc = " @param sync_mode Sync mode."]
pub fn sntp_set_sync_mode(sync_mode: sntp_sync_mode_t);
}
extern "C" {
#[doc = " @brief Get set sync mode"]
#[doc = ""]
#[doc = " @return SNTP_SYNC_MODE_IMMED: Update time immediately."]
#[doc = " SNTP_SYNC_MODE_SMOOTH: Smooth time updating."]
pub fn sntp_get_sync_mode() -> sntp_sync_mode_t;
}
extern "C" {
#[doc = " @brief Get status of time sync"]
#[doc = ""]
#[doc = " After the update is completed, the status will be returned as SNTP_SYNC_STATUS_COMPLETED."]
#[doc = " After that, the status will be reset to SNTP_SYNC_STATUS_RESET."]
#[doc = " If the update operation is not completed yet, the status will be SNTP_SYNC_STATUS_RESET."]
#[doc = " If a smooth mode was chosen and the synchronization is still continuing (adjtime works), then it will be SNTP_SYNC_STATUS_IN_PROGRESS."]
#[doc = ""]
#[doc = " @return SNTP_SYNC_STATUS_RESET: Reset status."]
#[doc = " SNTP_SYNC_STATUS_COMPLETED: Time is synchronized."]
#[doc = " SNTP_SYNC_STATUS_IN_PROGRESS: Smooth time sync in progress."]
pub fn sntp_get_sync_status() -> sntp_sync_status_t;
}
extern "C" {
#[doc = " @brief Set status of time sync"]
#[doc = ""]
#[doc = " @param sync_status status of time sync (see sntp_sync_status_t)"]
pub fn sntp_set_sync_status(sync_status: sntp_sync_status_t);
}
extern "C" {
#[doc = " @brief Set a callback function for time synchronization notification"]
#[doc = ""]
#[doc = " @param callback a callback function"]
pub fn sntp_set_time_sync_notification_cb(callback: sntp_sync_time_cb_t);
}
extern "C" {
#[doc = " @brief Set the sync interval of SNTP operation"]
#[doc = ""]
#[doc = " Note: SNTPv4 RFC 4330 enforces a minimum sync interval of 15 seconds."]
#[doc = " This sync interval will be used in the next attempt update time throught SNTP."]
#[doc = " To apply the new sync interval call the sntp_restart() function,"]
#[doc = " otherwise, it will be applied after the last interval expired."]
#[doc = ""]
#[doc = " @param interval_ms The sync interval in ms. It cannot be lower than 15 seconds, otherwise 15 seconds will be set."]
pub fn sntp_set_sync_interval(interval_ms: u32);
}
extern "C" {
#[doc = " @brief Get the sync interval of SNTP operation"]
#[doc = ""]
#[doc = " @return the sync interval"]
pub fn sntp_get_sync_interval() -> u32;
}
extern "C" {
#[doc = " @brief Restart SNTP"]
#[doc = ""]
#[doc = " @return True - Restart"]
#[doc = " False - SNTP was not initialized yet"]
pub fn sntp_restart() -> bool;
}
extern "C" {
pub fn dhcp_ip_addr_restore(netif: *mut libc::c_void) -> bool;
}
extern "C" {
pub fn dhcp_ip_addr_store(netif: *mut libc::c_void);
}
extern "C" {
pub fn dhcp_ip_addr_erase(esp_netif: *mut libc::c_void);
}
pub type error_t = libc::c_int;
extern "C" {
pub fn __errno() -> *mut libc::c_int;
}
extern "C" {
pub static mut _sys_errlist: [*const libc::c_char; 0usize];
}
extern "C" {
pub static mut _sys_nerr: libc::c_int;
}
extern "C" {
pub fn esp_vfs_lwip_sockets_register();
}
pub type sys_sem_t = SemaphoreHandle_t;
pub type sys_mutex_t = SemaphoreHandle_t;
pub type sys_thread_t = TaskHandle_t;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct sys_mbox_s {
pub os_mbox: QueueHandle_t,
pub owner: *mut libc::c_void,
}
pub type sys_mbox_t = *mut sys_mbox_s;
extern "C" {
pub fn sys_delay_ms(ms: u32);
}
extern "C" {
pub fn sys_thread_sem_init() -> *mut sys_sem_t;
}
extern "C" {
pub fn sys_thread_sem_deinit();
}
extern "C" {
pub fn sys_thread_sem_get() -> *mut sys_sem_t;
}
pub type u8_t = u8;
pub type s8_t = i8;
pub type u16_t = u16;
pub type s16_t = i16;
pub type u32_t = u32;
pub type s32_t = i32;
pub type sys_prot_t = libc::c_int;
pub type u64_t = u64;
pub type s64_t = i64;
pub type mem_ptr_t = usize;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct imaxdiv_t {
pub quot: intmax_t,
pub rem: intmax_t,
}
extern "C" {
pub fn imaxabs(j: intmax_t) -> intmax_t;
}
extern "C" {
pub fn imaxdiv(numer: intmax_t, denomer: intmax_t) -> imaxdiv_t;
}
extern "C" {
pub fn strtoimax(
arg1: *const libc::c_char,
arg2: *mut *mut libc::c_char,
arg3: libc::c_int,
) -> intmax_t;
}
extern "C" {
pub fn _strtoimax_r(
arg1: *mut _reent,
arg2: *const libc::c_char,
arg3: *mut *mut libc::c_char,
arg4: libc::c_int,
) -> intmax_t;
}
extern "C" {
pub fn strtoumax(
arg1: *const libc::c_char,
arg2: *mut *mut libc::c_char,
arg3: libc::c_int,
) -> uintmax_t;
}
extern "C" {
pub fn _strtoumax_r(
arg1: *mut _reent,
arg2: *const libc::c_char,
arg3: *mut *mut libc::c_char,
arg4: libc::c_int,
) -> uintmax_t;
}
extern "C" {
pub fn wcstoimax(arg1: *const wchar_t, arg2: *mut *mut wchar_t, arg3: libc::c_int) -> intmax_t;
}
extern "C" {
pub fn _wcstoimax_r(
arg1: *mut _reent,
arg2: *const wchar_t,
arg3: *mut *mut wchar_t,
arg4: libc::c_int,
) -> intmax_t;
}
extern "C" {
pub fn wcstoumax(arg1: *const wchar_t, arg2: *mut *mut wchar_t, arg3: libc::c_int)
-> uintmax_t;
}
extern "C" {
pub fn _wcstoumax_r(
arg1: *mut _reent,
arg2: *const wchar_t,
arg3: *mut *mut wchar_t,
arg4: libc::c_int,
) -> uintmax_t;
}
extern "C" {
pub fn strtoimax_l(
arg1: *const libc::c_char,
_restrict: *mut *mut libc::c_char,
arg2: libc::c_int,
arg3: locale_t,
) -> intmax_t;
}
extern "C" {
pub fn strtoumax_l(
arg1: *const libc::c_char,
_restrict: *mut *mut libc::c_char,
arg2: libc::c_int,
arg3: locale_t,
) -> uintmax_t;
}
extern "C" {
pub fn wcstoimax_l(
arg1: *const wchar_t,
_restrict: *mut *mut wchar_t,
arg2: libc::c_int,
arg3: locale_t,
) -> intmax_t;
}
extern "C" {
pub fn wcstoumax_l(
arg1: *const wchar_t,
_restrict: *mut *mut wchar_t,
arg2: libc::c_int,
arg3: locale_t,
) -> uintmax_t;
}
extern "C" {
pub fn isalnum(__c: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn isalpha(__c: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn iscntrl(__c: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn isdigit(__c: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn isgraph(__c: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn islower(__c: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn isprint(__c: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn ispunct(__c: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn isspace(__c: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn isupper(__c: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn isxdigit(__c: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn tolower(__c: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn toupper(__c: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn isblank(__c: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn isascii(__c: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn toascii(__c: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn isalnum_l(__c: libc::c_int, __l: locale_t) -> libc::c_int;
}
extern "C" {
pub fn isalpha_l(__c: libc::c_int, __l: locale_t) -> libc::c_int;
}
extern "C" {
pub fn isblank_l(__c: libc::c_int, __l: locale_t) -> libc::c_int;
}
extern "C" {
pub fn iscntrl_l(__c: libc::c_int, __l: locale_t) -> libc::c_int;
}
extern "C" {
pub fn isdigit_l(__c: libc::c_int, __l: locale_t) -> libc::c_int;
}
extern "C" {
pub fn isgraph_l(__c: libc::c_int, __l: locale_t) -> libc::c_int;
}
extern "C" {
pub fn islower_l(__c: libc::c_int, __l: locale_t) -> libc::c_int;
}
extern "C" {
pub fn isprint_l(__c: libc::c_int, __l: locale_t) -> libc::c_int;
}
extern "C" {
pub fn ispunct_l(__c: libc::c_int, __l: locale_t) -> libc::c_int;
}
extern "C" {
pub fn isspace_l(__c: libc::c_int, __l: locale_t) -> libc::c_int;
}
extern "C" {
pub fn isupper_l(__c: libc::c_int, __l: locale_t) -> libc::c_int;
}
extern "C" {
pub fn isxdigit_l(__c: libc::c_int, __l: locale_t) -> libc::c_int;
}
extern "C" {
pub fn tolower_l(__c: libc::c_int, __l: locale_t) -> libc::c_int;
}
extern "C" {
pub fn toupper_l(__c: libc::c_int, __l: locale_t) -> libc::c_int;
}
extern "C" {
pub fn isascii_l(__c: libc::c_int, __l: locale_t) -> libc::c_int;
}
extern "C" {
pub fn toascii_l(__c: libc::c_int, __l: locale_t) -> libc::c_int;
}
extern "C" {
pub fn __locale_ctype_ptr() -> *const libc::c_char;
}
extern "C" {
pub fn __locale_ctype_ptr_l(arg1: locale_t) -> *const libc::c_char;
}
extern "C" {
pub static mut _ctype_: [libc::c_char; 0usize];
}
extern "C" {
pub fn lwip_htons(x: u16_t) -> u16_t;
}
extern "C" {
pub fn lwip_htonl(x: u32_t) -> u32_t;
}
extern "C" {
pub fn lwip_itoa(result: *mut libc::c_char, bufsize: size_t, number: libc::c_int);
}
extern "C" {
pub fn lwip_strnicmp(
str1: *const libc::c_char,
str2: *const libc::c_char,
len: size_t,
) -> libc::c_int;
}
extern "C" {
pub fn lwip_stricmp(str1: *const libc::c_char, str2: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn lwip_strnstr(
buffer: *const libc::c_char,
token: *const libc::c_char,
n: size_t,
) -> *mut libc::c_char;
}
#[doc = " This is the aligned version of ip4_addr_t,"]
#[doc = "used as local variable, on the stack, etc."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct ip4_addr {
pub addr: u32_t,
}
#[doc = " ip4_addr_t uses a struct for convenience only, so that the same defines can"]
#[doc = " operate both on ip4_addr_t as well as on ip4_addr_p_t."]
pub type ip4_addr_t = ip4_addr;
extern "C" {
pub fn ip4_addr_isbroadcast_u32(addr: u32_t, netif: *const netif) -> u8_t;
}
extern "C" {
pub fn ip4_addr_netmask_valid(netmask: u32_t) -> u8_t;
}
extern "C" {
pub fn ipaddr_addr(cp: *const libc::c_char) -> u32_t;
}
extern "C" {
pub fn ip4addr_aton(cp: *const libc::c_char, addr: *mut ip4_addr_t) -> libc::c_int;
}
extern "C" {
#[doc = " returns ptr to static buffer; not reentrant!"]
pub fn ip4addr_ntoa(addr: *const ip4_addr_t) -> *mut libc::c_char;
}
extern "C" {
pub fn ip4addr_ntoa_r(
addr: *const ip4_addr_t,
buf: *mut libc::c_char,
buflen: libc::c_int,
) -> *mut libc::c_char;
}
#[repr(u32)]
#[doc = " Symbolic constants for the 'type' parameters in some of the macros."]
#[doc = " These exist for efficiency only, allowing the macros to avoid certain tests"]
#[doc = " when the address is known not to be of a certain type. Dead code elimination"]
#[doc = " will do the rest. IP6_MULTICAST is supported but currently not optimized."]
#[doc = " @see ip6_addr_has_scope, ip6_addr_assign_zone, ip6_addr_lacks_zone."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum lwip_ipv6_scope_type {
#[doc = " Unknown"]
IP6_UNKNOWN = 0,
#[doc = " Unicast"]
IP6_UNICAST = 1,
#[doc = " Multicast"]
IP6_MULTICAST = 2,
}
#[doc = " This is the aligned version of ip6_addr_t,"]
#[doc = "used as local variable, on the stack, etc."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct ip6_addr {
pub addr: [u32_t; 4usize],
pub zone: u8_t,
}
#[doc = " IPv6 address"]
pub type ip6_addr_t = ip6_addr;
extern "C" {
pub fn ip6addr_aton(cp: *const libc::c_char, addr: *mut ip6_addr_t) -> libc::c_int;
}
extern "C" {
#[doc = " returns ptr to static buffer; not reentrant!"]
pub fn ip6addr_ntoa(addr: *const ip6_addr_t) -> *mut libc::c_char;
}
extern "C" {
pub fn ip6addr_ntoa_r(
addr: *const ip6_addr_t,
buf: *mut libc::c_char,
buflen: libc::c_int,
) -> *mut libc::c_char;
}
#[repr(u32)]
#[doc = " @ingroup ipaddr"]
#[doc = " IP address types for use in ip_addr_t.type member."]
#[doc = " @see tcp_new_ip_type(), udp_new_ip_type(), raw_new_ip_type()."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum lwip_ip_addr_type {
#[doc = " IPv4"]
IPADDR_TYPE_V4 = 0,
#[doc = " IPv6"]
IPADDR_TYPE_V6 = 6,
#[doc = " IPv4+IPv6 (\"dual-stack\")"]
IPADDR_TYPE_ANY = 46,
}
#[doc = " @ingroup ipaddr"]
#[doc = " A union struct for both IP version's addresses."]
#[doc = " ATTENTION: watch out for its size when adding IPv6 address scope!"]
#[repr(C)]
#[derive(Copy, Clone)]
pub struct ip_addr {
pub u_addr: ip_addr__bindgen_ty_1,
#[doc = " @ref lwip_ip_addr_type"]
pub type_: u8_t,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union ip_addr__bindgen_ty_1 {
pub ip6: ip6_addr_t,
pub ip4: ip4_addr_t,
_bindgen_union_align: [u32; 5usize],
}
pub type ip_addr_t = ip_addr;
extern "C" {
pub static ip_addr_any_type: ip_addr_t;
}
extern "C" {
pub fn ipaddr_ntoa(addr: *const ip_addr_t) -> *mut libc::c_char;
}
extern "C" {
pub fn ipaddr_ntoa_r(
addr: *const ip_addr_t,
buf: *mut libc::c_char,
buflen: libc::c_int,
) -> *mut libc::c_char;
}
extern "C" {
pub fn ipaddr_aton(cp: *const libc::c_char, addr: *mut ip_addr_t) -> libc::c_int;
}
extern "C" {
pub static ip_addr_any: ip_addr_t;
}
extern "C" {
pub static ip_addr_broadcast: ip_addr_t;
}
extern "C" {
pub static ip6_addr_any: ip_addr_t;
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct in_addr {
pub s_addr: in_addr_t,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub struct in6_addr {
pub un: in6_addr__bindgen_ty_1,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub union in6_addr__bindgen_ty_1 {
pub u32_addr: [u32_t; 4usize],
pub u8_addr: [u8_t; 16usize],
_bindgen_union_align: [u32; 4usize],
}
extern "C" {
pub static in6addr_any: in6_addr;
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct pollfd {
pub fd: libc::c_int,
pub events: libc::c_short,
pub revents: libc::c_short,
}
pub type nfds_t = libc::c_uint;
extern "C" {
pub fn poll(fds: *mut pollfd, nfds: nfds_t, timeout: libc::c_int) -> libc::c_int;
}
#[repr(i32)]
#[doc = " Definitions for error constants."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum err_enum_t {
#[doc = " No error, everything OK."]
ERR_OK = 0,
#[doc = " Out of memory error."]
ERR_MEM = -1,
#[doc = " Buffer error."]
ERR_BUF = -2,
#[doc = " Timeout."]
ERR_TIMEOUT = -3,
#[doc = " Routing problem."]
ERR_RTE = -4,
#[doc = " Operation in progress"]
ERR_INPROGRESS = -5,
#[doc = " Illegal value."]
ERR_VAL = -6,
#[doc = " Operation would block."]
ERR_WOULDBLOCK = -7,
#[doc = " Address in use."]
ERR_USE = -8,
#[doc = " Already connecting."]
ERR_ALREADY = -9,
#[doc = " Conn already established."]
ERR_ISCONN = -10,
#[doc = " Not connected."]
ERR_CONN = -11,
#[doc = " Low-level netif error"]
ERR_IF = -12,
#[doc = " Connection aborted."]
ERR_ABRT = -13,
#[doc = " Connection reset."]
ERR_RST = -14,
#[doc = " Connection closed."]
ERR_CLSD = -15,
#[doc = " Illegal argument."]
ERR_ARG = -16,
}
pub type err_t = s8_t;
extern "C" {
pub fn lwip_strerr(err: err_t) -> *const libc::c_char;
}
extern "C" {
pub fn err_to_errno(err: err_t) -> libc::c_int;
}
impl pbuf_layer {
pub const PBUF_RAW: pbuf_layer = pbuf_layer::PBUF_RAW_TX;
}
#[repr(u32)]
#[doc = " @ingroup pbuf"]
#[doc = " Enumeration of pbuf layers"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum pbuf_layer {
#[doc = " Includes spare room for transport layer header, e.g. UDP header."]
#[doc = " Use this if you intend to pass the pbuf to functions like udp_send()."]
PBUF_TRANSPORT = 74,
#[doc = " Includes spare room for IP header."]
#[doc = " Use this if you intend to pass the pbuf to functions like raw_send()."]
PBUF_IP = 54,
#[doc = " Includes spare room for link layer header (ethernet header)."]
#[doc = " Use this if you intend to pass the pbuf to functions like ethernet_output()."]
#[doc = " @see PBUF_LINK_HLEN"]
PBUF_LINK = 14,
#[doc = " Includes spare room for additional encapsulation header before ethernet"]
#[doc = " headers (e.g. 802.11)."]
#[doc = " Use this if you intend to pass the pbuf to functions like netif->linkoutput()."]
#[doc = " @see PBUF_LINK_ENCAPSULATION_HLEN"]
PBUF_RAW_TX = 0,
}
#[repr(u32)]
#[doc = " @ingroup pbuf"]
#[doc = " Enumeration of pbuf types"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum pbuf_type {
#[doc = " pbuf data is stored in RAM, used for TX mostly, struct pbuf and its payload"]
#[doc = "are allocated in one piece of contiguous memory (so the first payload byte"]
#[doc = "can be calculated from struct pbuf)."]
#[doc = "pbuf_alloc() allocates PBUF_RAM pbufs as unchained pbufs (although that might"]
#[doc = "change in future versions)."]
#[doc = "This should be used for all OUTGOING packets (TX)."]
PBUF_RAM = 640,
#[doc = " pbuf data is stored in ROM, i.e. struct pbuf and its payload are located in"]
#[doc = "totally different memory areas. Since it points to ROM, payload does not"]
#[doc = "have to be copied when queued for transmission."]
PBUF_ROM = 1,
#[doc = " pbuf comes from the pbuf pool. Much like PBUF_ROM but payload might change"]
#[doc = "so it has to be duplicated when queued before transmitting, depending on"]
#[doc = "who has a 'ref' to it."]
PBUF_REF = 65,
#[doc = " pbuf payload refers to RAM. This one comes from a pool and should be used"]
#[doc = "for RX. Payload can be chained (scatter-gather RX) but like PBUF_RAM, struct"]
#[doc = "pbuf and its payload are allocated in one piece of contiguous memory (so"]
#[doc = "the first payload byte can be calculated from struct pbuf)."]
#[doc = "Don't use this for TX, if the pool becomes empty e.g. because of TCP queuing,"]
#[doc = "you are unable to receive TCP acks!"]
PBUF_POOL = 386,
}
#[doc = " Main packet buffer struct"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct pbuf {
#[doc = " next pbuf in singly linked pbuf chain"]
pub next: *mut pbuf,
#[doc = " pointer to the actual data in the buffer"]
pub payload: *mut libc::c_void,
#[doc = " total length of this buffer and all next buffers in chain"]
#[doc = " belonging to the same packet."]
#[doc = ""]
#[doc = " For non-queue packet chains this is the invariant:"]
#[doc = " p->tot_len == p->len + (p->next? p->next->tot_len: 0)"]
pub tot_len: u16_t,
#[doc = " length of this buffer"]
pub len: u16_t,
#[doc = " a bit field indicating pbuf type and allocation sources"]
#[doc = "(see PBUF_TYPE_FLAG_*, PBUF_ALLOC_FLAG_* and PBUF_TYPE_ALLOC_SRC_MASK)"]
pub type_internal: u8_t,
#[doc = " misc flags"]
pub flags: u8_t,
#[doc = " the reference count always equals the number of pointers"]
#[doc = " that refer to this pbuf. This can be pointers from an application,"]
#[doc = " the stack itself, or pbuf->next pointers from a chain."]
pub ref_: u8_t,
#[doc = " For incoming packets, this contains the input netif's index"]
pub if_idx: u8_t,
pub l2_owner: *mut netif,
pub l2_buf: *mut libc::c_void,
}
#[doc = " Helper struct for const-correctness only."]
#[doc = " The only meaning of this one is to provide a const payload pointer"]
#[doc = " for PBUF_ROM type."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct pbuf_rom {
#[doc = " next pbuf in singly linked pbuf chain"]
pub next: *mut pbuf,
#[doc = " pointer to the actual data in the buffer"]
pub payload: *const libc::c_void,
}
#[doc = " Prototype for a function to free a custom pbuf"]
pub type pbuf_free_custom_fn = ::core::option::Option<unsafe extern "C" fn(p: *mut pbuf)>;
#[doc = " A custom pbuf: like a pbuf, but following a function pointer to free it."]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct pbuf_custom {
#[doc = " The actual pbuf"]
pub pbuf: pbuf,
#[doc = " This function is called when pbuf_free deallocates this pbuf(_custom)"]
pub custom_free_function: pbuf_free_custom_fn,
}
extern "C" {
pub fn pbuf_alloc(l: pbuf_layer, length: u16_t, type_: pbuf_type) -> *mut pbuf;
}
extern "C" {
pub fn pbuf_alloc_reference(
payload: *mut libc::c_void,
length: u16_t,
type_: pbuf_type,
) -> *mut pbuf;
}
extern "C" {
pub fn pbuf_alloced_custom(
l: pbuf_layer,
length: u16_t,
type_: pbuf_type,
p: *mut pbuf_custom,
payload_mem: *mut libc::c_void,
payload_mem_len: u16_t,
) -> *mut pbuf;
}
extern "C" {
pub fn pbuf_realloc(p: *mut pbuf, size: u16_t);
}
extern "C" {
pub fn pbuf_header(p: *mut pbuf, header_size: s16_t) -> u8_t;
}
extern "C" {
pub fn pbuf_header_force(p: *mut pbuf, header_size: s16_t) -> u8_t;
}
extern "C" {
pub fn pbuf_add_header(p: *mut pbuf, header_size_increment: size_t) -> u8_t;
}
extern "C" {
pub fn pbuf_add_header_force(p: *mut pbuf, header_size_increment: size_t) -> u8_t;
}
extern "C" {
pub fn pbuf_remove_header(p: *mut pbuf, header_size: size_t) -> u8_t;
}
extern "C" {
pub fn pbuf_free_header(q: *mut pbuf, size: u16_t) -> *mut pbuf;
}
extern "C" {
pub fn pbuf_ref(p: *mut pbuf);
}
extern "C" {
pub fn pbuf_free(p: *mut pbuf) -> u8_t;
}
extern "C" {
pub fn pbuf_clen(p: *const pbuf) -> u16_t;
}
extern "C" {
pub fn pbuf_cat(head: *mut pbuf, tail: *mut pbuf);
}
extern "C" {
pub fn pbuf_chain(head: *mut pbuf, tail: *mut pbuf);
}
extern "C" {
pub fn pbuf_dechain(p: *mut pbuf) -> *mut pbuf;
}
extern "C" {
pub fn pbuf_copy(p_to: *mut pbuf, p_from: *const pbuf) -> err_t;
}
extern "C" {
pub fn pbuf_copy_partial(
p: *const pbuf,
dataptr: *mut libc::c_void,
len: u16_t,
offset: u16_t,
) -> u16_t;
}
extern "C" {
pub fn pbuf_get_contiguous(
p: *const pbuf,
buffer: *mut libc::c_void,
bufsize: size_t,
len: u16_t,
offset: u16_t,
) -> *mut libc::c_void;
}
extern "C" {
pub fn pbuf_take(buf: *mut pbuf, dataptr: *const libc::c_void, len: u16_t) -> err_t;
}
extern "C" {
pub fn pbuf_take_at(
buf: *mut pbuf,
dataptr: *const libc::c_void,
len: u16_t,
offset: u16_t,
) -> err_t;
}
extern "C" {
pub fn pbuf_skip(in_: *mut pbuf, in_offset: u16_t, out_offset: *mut u16_t) -> *mut pbuf;
}
extern "C" {
pub fn pbuf_coalesce(p: *mut pbuf, layer: pbuf_layer) -> *mut pbuf;
}
extern "C" {
pub fn pbuf_clone(l: pbuf_layer, type_: pbuf_type, p: *mut pbuf) -> *mut pbuf;
}
extern "C" {
pub fn pbuf_get_at(p: *const pbuf, offset: u16_t) -> u8_t;
}
extern "C" {
pub fn pbuf_try_get_at(p: *const pbuf, offset: u16_t) -> libc::c_int;
}
extern "C" {
pub fn pbuf_put_at(p: *mut pbuf, offset: u16_t, data: u8_t);
}
extern "C" {
pub fn pbuf_memcmp(p: *const pbuf, offset: u16_t, s2: *const libc::c_void, n: u16_t) -> u16_t;
}
extern "C" {
pub fn pbuf_memfind(
p: *const pbuf,
mem: *const libc::c_void,
mem_len: u16_t,
start_offset: u16_t,
) -> u16_t;
}
extern "C" {
pub fn pbuf_strstr(p: *const pbuf, substr: *const libc::c_char) -> u16_t;
}
pub type mem_size_t = size_t;
extern "C" {
pub fn mem_init();
}
extern "C" {
pub fn mem_trim(mem: *mut libc::c_void, size: mem_size_t) -> *mut libc::c_void;
}
extern "C" {
pub fn mem_malloc(size: mem_size_t) -> *mut libc::c_void;
}
extern "C" {
pub fn mem_calloc(count: mem_size_t, size: mem_size_t) -> *mut libc::c_void;
}
extern "C" {
pub fn mem_free(mem: *mut libc::c_void);
}
#[repr(u32)]
#[doc = " Create the list of all memory pools managed by memp. MEMP_MAX represents a NULL pool at the end"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum memp_t {
MEMP_RAW_PCB = 0,
MEMP_UDP_PCB = 1,
MEMP_TCP_PCB = 2,
MEMP_TCP_PCB_LISTEN = 3,
MEMP_TCP_SEG = 4,
MEMP_FRAG_PBUF = 5,
MEMP_NETBUF = 6,
MEMP_NETCONN = 7,
MEMP_TCPIP_MSG_API = 8,
MEMP_TCPIP_MSG_INPKT = 9,
MEMP_ARP_QUEUE = 10,
MEMP_IGMP_GROUP = 11,
MEMP_SYS_TIMEOUT = 12,
MEMP_NETDB = 13,
MEMP_ND6_QUEUE = 14,
MEMP_IP6_REASSDATA = 15,
MEMP_MLD6_GROUP = 16,
MEMP_PBUF = 17,
MEMP_PBUF_POOL = 18,
MEMP_MAX = 19,
}
#[doc = " Memory pool descriptor"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct memp_desc {
#[doc = " Textual description"]
pub desc: *const libc::c_char,
#[doc = " Element size"]
pub size: u16_t,
}
extern "C" {
pub fn memp_init_pool(desc: *const memp_desc);
}
extern "C" {
pub fn memp_malloc_pool(desc: *const memp_desc) -> *mut libc::c_void;
}
extern "C" {
pub fn memp_free_pool(desc: *const memp_desc, mem: *mut libc::c_void);
}
extern "C" {
pub static memp_pools: [*const memp_desc; 19usize];
}
extern "C" {
pub fn memp_init();
}
extern "C" {
pub fn memp_malloc(type_: memp_t) -> *mut libc::c_void;
}
extern "C" {
pub fn memp_free(type_: memp_t, mem: *mut libc::c_void);
}
#[repr(u32)]
#[doc = " @}"]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum lwip_internal_netif_client_data_index {
LWIP_NETIF_CLIENT_DATA_INDEX_DHCP = 0,
LWIP_NETIF_CLIENT_DATA_INDEX_IGMP = 1,
LWIP_NETIF_CLIENT_DATA_INDEX_MLD6 = 2,
LWIP_NETIF_CLIENT_DATA_INDEX_MAX = 3,
}
#[repr(u32)]
#[doc = " MAC Filter Actions, these are passed to a netif's igmp_mac_filter or"]
#[doc = " mld_mac_filter callback function."]
#[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
pub enum netif_mac_filter_action {
#[doc = " Delete a filter entry"]
NETIF_DEL_MAC_FILTER = 0,
#[doc = " Add a filter entry"]
NETIF_ADD_MAC_FILTER = 1,
}
#[doc = " Function prototype for netif init functions. Set up flags and output/linkoutput"]
#[doc = " callback functions in this function."]
#[doc = ""]
#[doc = " @param netif The netif to initialize"]
pub type netif_init_fn = ::core::option::Option<unsafe extern "C" fn(netif: *mut netif) -> err_t>;
#[doc = " Function prototype for netif->input functions. This function is saved as 'input'"]
#[doc = " callback function in the netif struct. Call it when a packet has been received."]
#[doc = ""]
#[doc = " @param p The received packet, copied into a pbuf"]
#[doc = " @param inp The netif which received the packet"]
#[doc = " @return ERR_OK if the packet was handled"]
#[doc = " != ERR_OK is the packet was NOT handled, in this case, the caller has"]
#[doc = " to free the pbuf"]
pub type netif_input_fn =
::core::option::Option<unsafe extern "C" fn(p: *mut pbuf, inp: *mut netif) -> err_t>;
#[doc = " Function prototype for netif->output functions. Called by lwIP when a packet"]
#[doc = " shall be sent. For ethernet netif, set this to 'etharp_output' and set"]
#[doc = " 'linkoutput'."]
#[doc = ""]
#[doc = " @param netif The netif which shall send a packet"]
#[doc = " @param p The packet to send (p->payload points to IP header)"]
#[doc = " @param ipaddr The IP address to which the packet shall be sent"]
pub type netif_output_fn = ::core::option::Option<
unsafe extern "C" fn(netif: *mut netif, p: *mut pbuf, ipaddr: *const ip4_addr_t) -> err_t,
>;
#[doc = " Function prototype for netif->output_ip6 functions. Called by lwIP when a packet"]
#[doc = " shall be sent. For ethernet netif, set this to 'ethip6_output' and set"]
#[doc = " 'linkoutput'."]
#[doc = ""]
#[doc = " @param netif The netif which shall send a packet"]
#[doc = " @param p The packet to send (p->payload points to IP header)"]
#[doc = " @param ipaddr The IPv6 address to which the packet shall be sent"]
pub type netif_output_ip6_fn = ::core::option::Option<
unsafe extern "C" fn(netif: *mut netif, p: *mut pbuf, ipaddr: *const ip6_addr_t) -> err_t,
>;
#[doc = " Function prototype for netif->linkoutput functions. Only used for ethernet"]
#[doc = " netifs. This function is called by ARP when a packet shall be sent."]
#[doc = ""]
#[doc = " @param netif The netif which shall send a packet"]
#[doc = " @param p The packet to send (raw ethernet packet)"]
pub type netif_linkoutput_fn =
::core::option::Option<unsafe extern "C" fn(netif: *mut netif, p: *mut pbuf) -> err_t>;
#[doc = " Function prototype for netif status- or link-callback functions."]
pub type netif_status_callback_fn = ::core::option::Option<unsafe extern "C" fn(netif: *mut netif)>;
#[doc = " Function prototype for netif igmp_mac_filter functions"]
pub type netif_igmp_mac_filter_fn = ::core::option::Option<
unsafe extern "C" fn(
netif: *mut netif,
group: *const ip4_addr_t,
action: netif_mac_filter_action,
) -> err_t,
>;
#[doc = " Function prototype for netif mld_mac_filter functions"]
pub type netif_mld_mac_filter_fn = ::core::option::Option<
unsafe extern "C" fn(
netif: *mut netif,
group: *const ip6_addr_t,
action: netif_mac_filter_action,
) -> err_t,
>;
pub type netif_addr_idx_t = u8_t;
pub type dhcp_event_fn = ::core::option::Option<unsafe extern "C" fn()>;
#[doc = " Generic data structure used for all lwIP network interfaces."]
#[doc = " The following fields should be filled in by the initialization"]
#[doc = " function for the device driver: hwaddr_len, hwaddr[], mtu, flags"]
#[repr(C)]
#[derive(Copy, Clone)]
pub struct netif {
#[doc = " pointer to next in linked list"]
pub next: *mut netif,
#[doc = " IP address configuration in network byte order"]
pub ip_addr: ip_addr_t,
pub netmask: ip_addr_t,
pub gw: ip_addr_t,
#[doc = " Array of IPv6 addresses for this netif."]
pub ip6_addr: [ip_addr_t; 3usize],
#[doc = " The state of each IPv6 address (Tentative, Preferred, etc)."]
#[doc = " @see ip6_addr.h"]
pub ip6_addr_state: [u8_t; 3usize],
#[doc = " Remaining valid and preferred lifetime of each IPv6 address, in seconds."]
#[doc = " For valid lifetimes, the special value of IP6_ADDR_LIFE_STATIC (0)"]
#[doc = " indicates the address is static and has no lifetimes."]
pub ip6_addr_valid_life: [u32_t; 3usize],
pub ip6_addr_pref_life: [u32_t; 3usize],
pub ipv6_addr_cb:
::core::option::Option<unsafe extern "C" fn(netif: *mut netif, ip_idex: u8_t)>,
#[doc = " This function is called by the network device driver"]
#[doc = " to pass a packet up the TCP/IP stack."]
pub input: netif_input_fn,
#[doc = " This function is called by the IP module when it wants"]
#[doc = " to send a packet on the interface. This function typically"]
#[doc = " first resolves the hardware address, then sends the packet."]
#[doc = " For ethernet physical layer, this is usually etharp_output()"]
pub output: netif_output_fn,
#[doc = " This function is called by ethernet_output() when it wants"]
#[doc = " to send a packet on the interface. This function outputs"]
#[doc = " the pbuf as-is on the link medium."]
pub linkoutput: netif_linkoutput_fn,
#[doc = " This function is called by the IPv6 module when it wants"]
#[doc = " to send a packet on the interface. This function typically"]
#[doc = " first resolves the hardware address, then sends the packet."]
#[doc = " For ethernet physical layer, this is usually ethip6_output()"]
pub output_ip6: netif_output_ip6_fn,
#[doc = " This field can be set by the device driver and could point"]
#[doc = " to state information for the device."]
pub state: *mut libc::c_void,
pub client_data: [*mut libc::c_void; 3usize],
pub dhcps_pcb: *mut udp_pcb,
pub dhcp_event: dhcp_event_fn,
pub hostname: *const libc::c_char,
#[doc = " maximum transfer unit (in bytes)"]
pub mtu: u16_t,
#[doc = " maximum transfer unit (in bytes), updated by RA"]
pub mtu6: u16_t,
#[doc = " link level hardware address of this interface"]
pub hwaddr: [u8_t; 6usize],
#[doc = " number of bytes used in hwaddr"]
pub hwaddr_len: u8_t,
#[doc = " flags (@see @ref netif_flags)"]
pub flags: u8_t,
#[doc = " descriptive abbreviation"]
pub name: [libc::c_char; 2usize],
#[doc = " number of this interface. Used for @ref if_api and @ref netifapi_netif,"]
#[doc = " as well as for IPv6 zones"]
pub num: u8_t,
#[doc = " is this netif enabled for IPv6 autoconfiguration"]
pub ip6_autoconfig_enabled: u8_t,
#[doc = " Number of Router Solicitation messages that remain to be sent."]
pub rs_count: u8_t,
#[doc = " This function could be called to add or delete an entry in the multicast"]
#[doc = "filter table of the ethernet MAC."]
pub igmp_mac_filter: netif_igmp_mac_filter_fn,
#[doc = " This function could be called to add or delete an entry in the IPv6 multicast"]
#[doc = "filter table of the ethernet MAC."]
pub mld_mac_filter: netif_mld_mac_filter_fn,
pub loop_first: *mut pbuf,
pub loop_last: *mut pbuf,
pub loop_cnt_current: u16_t,
pub l2_buffer_free_notify: ::core::option::Option<
unsafe extern "C" fn(lwip_netif: *mut netif, user_buf: *mut libc::c_void),
>,
pub last_ip_addr: ip_addr_t,
}
extern "C" {
pub static mut netif_list: *mut netif;
}
extern "C" {
pub static mut netif_default: *mut netif;
}
extern "C" {
pub fn netif_init();
}
extern "C" {
pub fn netif_add_noaddr(
netif: *mut netif,
state: *mut libc::c_void,
init: netif_init_fn,
input: netif_input_fn,
) -> *mut netif;
}
extern "C" {
pub fn netif_add(
netif: *mut netif,
ipaddr: *const ip4_addr_t,
netmask: *const ip4_addr_t,
gw: *const ip4_addr_t,
state: *mut libc::c_void,
init: netif_init_fn,
input: netif_input_fn,
) -> *mut netif;
}
extern "C" {
pub fn netif_set_addr(
netif: *mut netif,
ipaddr: *const ip4_addr_t,
netmask: *const ip4_addr_t,
gw: *const ip4_addr_t,
);
}
extern "C" {
pub fn netif_remove(netif: *mut netif);
}
extern "C" {
pub fn netif_find(name: *const libc::c_char) -> *mut netif;
}
extern "C" {
pub fn netif_set_default(netif: *mut netif);
}
extern "C" {
pub fn netif_set_ipaddr(netif: *mut netif, ipaddr: *const ip4_addr_t);
}
extern "C" {
pub fn netif_set_netmask(netif: *mut netif, netmask: *const ip4_addr_t);
}
extern "C" {
pub fn netif_set_gw(netif: *mut netif, gw: *const ip4_addr_t);
}
extern "C" {
pub fn netif_set_up(netif: *mut netif);
}
extern "C" {
pub fn netif_set_down(netif: *mut netif);
}
extern "C" {
pub fn netif_set_link_up(netif: *mut netif);
}
extern "C" {
pub fn netif_set_link_down(netif: *mut netif);
}
extern "C" {
pub fn netif_loop_output(netif: *mut netif, p: *mut pbuf) -> err_t;
}
extern "C" {
pub fn netif_poll(netif: *mut netif);
}
extern "C" {
pub fn netif_input(p: *mut pbuf, inp: *mut netif) -> err_t;
}
extern "C" {
pub fn netif_ip6_addr_set(netif: *mut netif, addr_idx: s8_t, addr6: *const ip6_addr_t);
}
extern "C" {
pub fn netif_ip6_addr_set_parts(
netif: *mut netif,
addr_idx: s8_t,
i0: u32_t,
i1: u32_t,
i2: u32_t,
i3: u32_t,
);
}
extern "C" {
pub fn netif_ip6_addr_set_state(netif: *mut netif, addr_idx: s8_t, state: u8_t);
}
extern "C" {
pub fn netif_get_ip6_addr_match(netif: *mut netif, ip6addr: *const ip6_addr_t) -> s8_t;
}
extern "C" {
pub fn netif_create_ip6_linklocal_address(netif: *mut netif, from_mac_48bit: u8_t);
}
extern "C" {
pub fn netif_add_ip6_address(
netif: *mut netif,
ip6addr: *const ip6_addr_t,
chosen_idx: *mut s8_t,
) -> err_t;
}
extern "C" {
pub fn netif_name_to_index(name: *const libc::c_char) -> u8_t;
}
extern "C" {
pub fn netif_index_to_name(idx: u8_t, name: *mut libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn netif_get_by_index(idx: u8_t) -> *mut netif;
}
#[doc = " @ingroup netif"]
#[doc = " Extended netif status callback (NSC) reasons flags."]
#[doc = " May be extended in the future!"]
pub type netif_nsc_reason_t = u16_t;
#[doc = " @ingroup netif"]
#[doc = " Argument supplied to netif_ext_callback_fn."]
#[repr(C)]
#[derive(Copy, Clone)]
pub union netif_ext_callback_args_t {
pub link_changed: netif_ext_callback_args_t_link_changed_s,
pub status_changed: netif_ext_callback_args_t_status_changed_s,
pub ipv4_changed: netif_ext_callback_args_t_ipv4_changed_s,
pub ipv6_set: netif_ext_callback_args_t_ipv6_set_s,
pub ipv6_addr_state_changed: netif_ext_callback_args_t_ipv6_addr_state_changed_s,
_bindgen_union_align: [u32; 3usize],
}
#[doc = " Args to LWIP_NSC_LINK_CHANGED callback"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct netif_ext_callback_args_t_link_changed_s {
#[doc = " 1: up; 0: down"]
pub state: u8_t,
}
#[doc = " Args to LWIP_NSC_STATUS_CHANGED callback"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct netif_ext_callback_args_t_status_changed_s {
#[doc = " 1: up; 0: down"]
pub state: u8_t,
}
#[doc = " Args to LWIP_NSC_IPV4_ADDRESS_CHANGED|LWIP_NSC_IPV4_GATEWAY_CHANGED|LWIP_NSC_IPV4_NETMASK_CHANGED|LWIP_NSC_IPV4_SETTINGS_CHANGED callback"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct netif_ext_callback_args_t_ipv4_changed_s {
#[doc = " Old IPv4 address"]
pub old_address: *const ip_addr_t,
pub old_netmask: *const ip_addr_t,
pub old_gw: *const ip_addr_t,
}
#[doc = " Args to LWIP_NSC_IPV6_SET callback"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct netif_ext_callback_args_t_ipv6_set_s {
#[doc = " Index of changed IPv6 address"]
pub addr_index: s8_t,
#[doc = " Old IPv6 address"]
pub old_address: *const ip_addr_t,
}
#[doc = " Args to LWIP_NSC_IPV6_ADDR_STATE_CHANGED callback"]
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct netif_ext_callback_args_t_ipv6_addr_state_changed_s {
#[doc = " Index of affected IPv6 address"]
pub addr_index: s8_t,
#[doc = " Old IPv6 address state"]
pub old_state: u8_t,
#[doc = " Affected IPv6 address"]
pub address: *const ip_addr_t,
}
#[doc = " @ingroup netif"]
#[doc = " Function used for extended netif status callbacks"]
#[doc = " Note: When parsing reason argument, keep in mind that more reasons may be added in the future!"]
#[doc = " @param netif netif that is affected by change"]
#[doc = " @param reason change reason"]
#[doc = " @param args depends on reason, see reason description"]
pub type netif_ext_callback_fn = ::core::option::Option<
unsafe extern "C" fn(
netif: *mut netif,
reason: netif_nsc_reason_t,
args: *const netif_ext_callback_args_t,
),
>;
extern "C" {
pub fn bcmp(
arg1: *const libc::c_void,
arg2: *const libc::c_void,
arg3: libc::c_uint,
) -> libc::c_int;
}
extern "C" {
pub fn bcopy(arg1: *const libc::c_void, arg2: *mut libc::c_void, arg3: size_t);
}
extern "C" {
pub fn bzero(arg1: *mut libc::c_void, arg2: libc::c_uint);
}
extern "C" {
pub fn explicit_bzero(arg1: *mut libc::c_void, arg2: size_t);
}
extern "C" {
pub fn ffs(arg1: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn ffsl(arg1: libc::c_long) -> libc::c_int;
}
extern "C" {
pub fn ffsll(arg1: libc::c_longlong) -> libc::c_int;
}
extern "C" {
pub fn fls(arg1: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn flsl(arg1: libc::c_long) -> libc::c_int;
}
extern "C" {
pub fn flsll(arg1: libc::c_longlong) -> libc::c_int;
}
extern "C" {
pub fn index(arg1: *const libc::c_char, arg2: libc::c_int) -> *mut libc::c_char;
}
extern "C" {
pub fn rindex(arg1: *const libc::c_char, arg2: libc::c_int) -> *mut libc::c_char;
}
extern "C" {
pub fn strcasecmp(arg1: *const libc::c_char, arg2: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn strncasecmp(
arg1: *const libc::c_char,
arg2: *const libc::c_char,
arg3: libc::c_uint,
) -> libc::c_int;
}
extern "C" {
pub fn strcasecmp_l(
arg1: *const libc::c_char,
arg2: *const libc::c_char,
arg3: locale_t,
) -> libc::c_int;
}
extern "C" {
pub fn strncasecmp_l(
arg1: *const libc::c_char,
arg2: *const libc::c_char,
arg3: size_t,
arg4: locale_t,
) -> libc::c_int;
}
extern "C" {
pub fn memchr(
arg1: *const libc::c_void,
arg2: libc::c_int,
arg3: libc::c_uint,
) -> *mut libc::c_void;
}
extern "C" {
pub fn memcmp(
arg1: *const libc::c_void,
arg2: *const libc::c_void,
arg3: libc::c_uint,
) -> libc::c_int;
}
extern "C" {
pub fn memcpy(
arg1: *mut libc::c_void,
arg2: *const libc::c_void,
arg3: libc::c_uint,
) -> *mut libc::c_void;
}
extern "C" {
pub fn memmove(
arg1: *mut libc::c_void,
arg2: *const libc::c_void,
arg3: libc::c_uint,
) -> *mut libc::c_void;
}
extern "C" {
pub fn memset(
arg1: *mut libc::c_void,
arg2: libc::c_int,
arg3: libc::c_uint,
) -> *mut libc::c_void;
}
extern "C" {
pub fn strcat(arg1: *mut libc::c_char, arg2: *const libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn strchr(arg1: *const libc::c_char, arg2: libc::c_int) -> *mut libc::c_char;
}
extern "C" {
pub fn strcmp(arg1: *const libc::c_char, arg2: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn strcoll(arg1: *const libc::c_char, arg2: *const libc::c_char) -> libc::c_int;
}
extern "C" {
pub fn strcpy(arg1: *mut libc::c_char, arg2: *const libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn strcspn(arg1: *const libc::c_char, arg2: *const libc::c_char) -> libc::c_uint;
}
extern "C" {
pub fn strerror(arg1: libc::c_int) -> *mut libc::c_char;
}
extern "C" {
pub fn strlen(arg1: *const libc::c_char) -> libc::c_uint;
}
extern "C" {
pub fn strncat(
arg1: *mut libc::c_char,
arg2: *const libc::c_char,
arg3: libc::c_uint,
) -> *mut libc::c_char;
}
extern "C" {
pub fn strncmp(
arg1: *const libc::c_char,
arg2: *const libc::c_char,
arg3: libc::c_uint,
) -> libc::c_int;
}
extern "C" {
pub fn strncpy(
arg1: *mut libc::c_char,
arg2: *const libc::c_char,
arg3: libc::c_uint,
) -> *mut libc::c_char;
}
extern "C" {
pub fn strpbrk(arg1: *const libc::c_char, arg2: *const libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn strrchr(arg1: *const libc::c_char, arg2: libc::c_int) -> *mut libc::c_char;
}
extern "C" {
pub fn strspn(arg1: *const libc::c_char, arg2: *const libc::c_char) -> libc::c_uint;
}
extern "C" {
pub fn strstr(arg1: *const libc::c_char, arg2: *const libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn strtok(arg1: *mut libc::c_char, arg2: *const libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn strxfrm(
arg1: *mut libc::c_char,
arg2: *const libc::c_char,
arg3: libc::c_uint,
) -> libc::c_uint;
}
extern "C" {
pub fn strcoll_l(
arg1: *const libc::c_char,
arg2: *const libc::c_char,
arg3: locale_t,
) -> libc::c_int;
}
extern "C" {
pub fn strerror_l(arg1: libc::c_int, arg2: locale_t) -> *mut libc::c_char;
}
extern "C" {
pub fn strxfrm_l(
arg1: *mut libc::c_char,
arg2: *const libc::c_char,
arg3: size_t,
arg4: locale_t,
) -> size_t;
}
extern "C" {
pub fn strtok_r(
arg1: *mut libc::c_char,
arg2: *const libc::c_char,
arg3: *mut *mut libc::c_char,
) -> *mut libc::c_char;
}
extern "C" {
pub fn timingsafe_bcmp(
arg1: *const libc::c_void,
arg2: *const libc::c_void,
arg3: size_t,
) -> libc::c_int;
}
extern "C" {
pub fn timingsafe_memcmp(
arg1: *const libc::c_void,
arg2: *const libc::c_void,
arg3: size_t,
) -> libc::c_int;
}
extern "C" {
pub fn memccpy(
arg1: *mut libc::c_void,
arg2: *const libc::c_void,
arg3: libc::c_int,
arg4: size_t,
) -> *mut libc::c_void;
}
extern "C" {
pub fn stpcpy(arg1: *mut libc::c_char, arg2: *const libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn stpncpy(
arg1: *mut libc::c_char,
arg2: *const libc::c_char,
arg3: libc::c_uint,
) -> *mut libc::c_char;
}
extern "C" {
pub fn strdup(arg1: *const libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn _strdup_r(arg1: *mut _reent, arg2: *const libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn strndup(arg1: *const libc::c_char, arg2: libc::c_uint) -> *mut libc::c_char;
}
extern "C" {
pub fn _strndup_r(
arg1: *mut _reent,
arg2: *const libc::c_char,
arg3: size_t,
) -> *mut libc::c_char;
}
extern "C" {
#[link_name = "\u{1}__xpg_strerror_r"]
pub fn strerror_r(arg1: libc::c_int, arg2: *mut libc::c_char, arg3: size_t) -> libc::c_int;
}
extern "C" {
pub fn _strerror_r(
arg1: *mut _reent,
arg2: libc::c_int,
arg3: libc::c_int,
arg4: *mut libc::c_int,
) -> *mut libc::c_char;
}
extern "C" {
pub fn strlcat(
arg1: *mut libc::c_char,
arg2: *const libc::c_char,
arg3: libc::c_uint,
) -> libc::c_uint;
}
extern "C" {
pub fn strlcpy(
arg1: *mut libc::c_char,
arg2: *const libc::c_char,
arg3: libc::c_uint,
) -> libc::c_uint;
}
extern "C" {
pub fn strnlen(arg1: *const libc::c_char, arg2: size_t) -> size_t;
}
extern "C" {
pub fn strsep(arg1: *mut *mut libc::c_char, arg2: *const libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn strnstr(
arg1: *const libc::c_char,
arg2: *const libc::c_char,
arg3: size_t,
) -> *mut libc::c_char;
}
extern "C" {
pub fn strlwr(arg1: *mut libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn strupr(arg1: *mut libc::c_char) -> *mut libc::c_char;
}
extern "C" {
pub fn strsignal(__signo: libc::c_int) -> *mut libc::c_char;
}
pub type sa_family_t = u8_t;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct sockaddr_in {
pub sin_len: u8_t,
pub sin_family: sa_family_t,
pub sin_port: in_port_t,
pub sin_addr: in_addr,
pub sin_zero: [libc::c_char; 8usize],
}
#[repr(C)]
#[derive(Copy, Clone)]
pub struct sockaddr_in6 {
pub sin6_len: u8_t,
pub sin6_family: sa_family_t,
pub sin6_port: in_port_t,
pub sin6_flowinfo: u32_t,
pub sin6_addr: in6_addr,
pub sin6_scope_id: u32_t,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct sockaddr {
pub sa_len: u8_t,
pub sa_family: sa_family_t,
pub sa_data: [libc::c_char; 14usize],
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct sockaddr_storage {
pub s2_len: u8_t,
pub ss_family: sa_family_t,
pub s2_data1: [libc::c_char; 2usize],
pub s2_data2: [u32_t; 3usize],
pub s2_data3: [u32_t; 3usize],
}
pub type socklen_t = u32_t;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct iovec {
pub iov_base: *mut libc::c_void,
pub iov_len: size_t,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct msghdr {
pub msg_name: *mut libc::c_void,
pub msg_namelen: socklen_t,
pub msg_iov: *mut iovec,
pub msg_iovlen: libc::c_int,
pub msg_control: *mut libc::c_void,
pub msg_controllen: socklen_t,
pub msg_flags: libc::c_int,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct cmsghdr {
pub cmsg_len: socklen_t,
pub cmsg_level: libc::c_int,
pub cmsg_type: libc::c_int,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct ifreq {
pub ifr_name: [libc::c_char; 6usize],
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct linger {
pub l_onoff: libc::c_int,
pub l_linger: libc::c_int,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct ip_mreq {
pub imr_multiaddr: in_addr,
pub imr_interface: in_addr,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct in_pktinfo {
pub ipi_ifindex: libc::c_uint,
pub ipi_addr: in_addr,
}
#[repr(C)]
#[derive(Copy, Clone)]
pub struct ipv6_mreq {
pub ipv6mr_multiaddr: in6_addr,
pub ipv6mr_interface: libc::c_uint,
}
extern "C" {
pub fn lwip_socket_thread_init();
}
extern "C" {
pub fn lwip_socket_thread_cleanup();
}
extern "C" {
pub fn lwip_accept(s: libc::c_int, addr: *mut sockaddr, addrlen: *mut socklen_t)
-> libc::c_int;
}
extern "C" {
pub fn lwip_bind(s: libc::c_int, name: *const sockaddr, namelen: socklen_t) -> libc::c_int;
}
extern "C" {
pub fn lwip_shutdown(s: libc::c_int, how: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn lwip_getpeername(
s: libc::c_int,
name: *mut sockaddr,
namelen: *mut socklen_t,
) -> libc::c_int;
}
extern "C" {
pub fn lwip_getsockname(
s: libc::c_int,
name: *mut sockaddr,
namelen: *mut socklen_t,
) -> libc::c_int;
}
extern "C" {
pub fn lwip_getsockopt(
s: libc::c_int,
level: libc::c_int,
optname: libc::c_int,
optval: *mut libc::c_void,
optlen: *mut socklen_t,
) -> libc::c_int;
}
extern "C" {
pub fn lwip_setsockopt(
s: libc::c_int,
level: libc::c_int,
optname: libc::c_int,
optval: *const libc::c_void,
optlen: socklen_t,
) -> libc::c_int;
}
extern "C" {
pub fn lwip_close(s: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn lwip_connect(s: libc::c_int, name: *const sockaddr, namelen: socklen_t) -> libc::c_int;
}
extern "C" {
pub fn lwip_listen(s: libc::c_int, backlog: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn lwip_recv(
s: libc::c_int,
mem: *mut libc::c_void,
len: size_t,
flags: libc::c_int,
) -> ssize_t;
}
extern "C" {
pub fn lwip_read(s: libc::c_int, mem: *mut libc::c_void, len: size_t) -> ssize_t;
}
extern "C" {
pub fn lwip_readv(s: libc::c_int, iov: *const iovec, iovcnt: libc::c_int) -> ssize_t;
}
extern "C" {
pub fn lwip_recvfrom(
s: libc::c_int,
mem: *mut libc::c_void,
len: size_t,
flags: libc::c_int,
from: *mut sockaddr,
fromlen: *mut socklen_t,
) -> ssize_t;
}
extern "C" {
pub fn lwip_recvmsg(s: libc::c_int, message: *mut msghdr, flags: libc::c_int) -> ssize_t;
}
extern "C" {
pub fn lwip_send(
s: libc::c_int,
dataptr: *const libc::c_void,
size: size_t,
flags: libc::c_int,
) -> ssize_t;
}
extern "C" {
pub fn lwip_sendmsg(s: libc::c_int, message: *const msghdr, flags: libc::c_int) -> ssize_t;
}
extern "C" {
pub fn lwip_sendto(
s: libc::c_int,
dataptr: *const libc::c_void,
size: size_t,
flags: libc::c_int,
to: *const sockaddr,
tolen: socklen_t,
) -> ssize_t;
}
extern "C" {
pub fn lwip_socket(
domain: libc::c_int,
type_: libc::c_int,
protocol: libc::c_int,
) -> libc::c_int;
}
extern "C" {
pub fn lwip_write(s: libc::c_int, dataptr: *const libc::c_void, size: size_t) -> ssize_t;
}
extern "C" {
pub fn lwip_writev(s: libc::c_int, iov: *const iovec, iovcnt: libc::c_int) -> ssize_t;
}
extern "C" {
pub fn lwip_select(
maxfdp1: libc::c_int,
readset: *mut _types_fd_set,
writeset: *mut _types_fd_set,
exceptset: *mut _types_fd_set,
timeout: *mut timeval,
) -> libc::c_int;
}
extern "C" {
pub fn lwip_poll(fds: *mut pollfd, nfds: nfds_t, timeout: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn lwip_ioctl(s: libc::c_int, cmd: libc::c_long, argp: *mut libc::c_void) -> libc::c_int;
}
extern "C" {
pub fn lwip_fcntl(s: libc::c_int, cmd: libc::c_int, val: libc::c_int) -> libc::c_int;
}
extern "C" {
pub fn lwip_inet_ntop(
af: libc::c_int,
src: *const libc::c_void,
dst: *mut libc::c_char,
size: socklen_t,
) -> *const libc::c_char;
}
extern "C" {
pub fn lwip_inet_pton(
af: libc::c_int,
src: *const libc::c_char,
dst: *mut libc::c_void,
) -> libc::c_int;
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct hostent {
pub h_name: *mut libc::c_char,
pub h_aliases: *mut *mut libc::c_char,
pub h_addrtype: libc::c_int,
pub h_length: libc::c_int,
pub h_addr_list: *mut *mut libc::c_char,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct addrinfo {
pub ai_flags: libc::c_int,
pub ai_family: libc::c_int,
pub ai_socktype: libc::c_int,
pub ai_protocol: libc::c_int,
pub ai_addrlen: socklen_t,
pub ai_addr: *mut sockaddr,
pub ai_canonname: *mut libc::c_char,
pub ai_next: *mut addrinfo,
}
extern "C" {
pub static mut h_errno: libc::c_int;
}
extern "C" {
pub fn lwip_gethostbyname(name: *const libc::c_char) -> *mut hostent;
}
extern "C" {
pub fn lwip_gethostbyname_r(
name: *const libc::c_char,
ret: *mut hostent,
buf: *mut libc::c_char,
buflen: size_t,
result: *mut *mut hostent,
h_errnop: *mut libc::c_int,
) -> libc::c_int;
}
extern "C" {
pub fn lwip_freeaddrinfo(ai: *mut addrinfo);
}
extern "C" {
pub fn lwip_getaddrinfo(
nodename: *const libc::c_char,
servname: *const libc::c_char,
hints: *const addrinfo,
res: *mut *mut addrinfo,
) -> libc::c_int;
}
pub type __builtin_va_list = __va_list_tag;
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct __va_list_tag {
pub __va_stk: *mut libc::c_int,
pub __va_reg: *mut libc::c_int,
pub __va_ndx: libc::c_int,
}
#[repr(C)]
#[derive(Debug, Copy, Clone)]
pub struct udp_pcb {
pub _address: u8,
}